* [PATCH] arm64: Add KRYO{3,4}XX CPU cores to spectre-v2 safe list
@ 2020-01-16 14:19 Sai Prakash Ranjan
2020-01-16 15:32 ` Will Deacon
0 siblings, 1 reply; 8+ messages in thread
From: Sai Prakash Ranjan @ 2020-01-16 14:19 UTC (permalink / raw)
To: Will Deacon, Catalin Marinas, Marc Zyngier, Andre Przywara, Mark Rutland
Cc: linux-kernel, linux-arm-msm, linux-arm-kernel, Douglas Anderson,
Stephen Boyd, Bjorn Andersson, Matthias Kaehlcke, James Morse,
Sai Prakash Ranjan
KRYO3XX silver CPU cores and KRYO4XX silver, gold CPU cores
are not affected by Spectre variant 2. Add them to spectre_v2
safe list to correct ARM_SMCCC_ARCH_WORKAROUND_1 warning and
vulnerability sysfs value.
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
---
arch/arm64/include/asm/cputype.h | 6 ++++++
arch/arm64/kernel/cpu_errata.c | 3 +++
2 files changed, 9 insertions(+)
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index aca07c2f6e6e..7219cddeba66 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -85,6 +85,9 @@
#define QCOM_CPU_PART_FALKOR_V1 0x800
#define QCOM_CPU_PART_FALKOR 0xC00
#define QCOM_CPU_PART_KRYO 0x200
+#define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803
+#define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804
+#define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805
#define NVIDIA_CPU_PART_DENVER 0x003
#define NVIDIA_CPU_PART_CARMEL 0x004
@@ -111,6 +114,9 @@
#define MIDR_QCOM_FALKOR_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR_V1)
#define MIDR_QCOM_FALKOR MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR)
#define MIDR_QCOM_KRYO MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO)
+#define MIDR_QCOM_KRYO_3XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_SILVER)
+#define MIDR_QCOM_KRYO_4XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_GOLD)
+#define MIDR_QCOM_KRYO_4XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_SILVER)
#define MIDR_NVIDIA_DENVER MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_DENVER)
#define MIDR_NVIDIA_CARMEL MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_CARMEL)
#define MIDR_FUJITSU_A64FX MIDR_CPU_MODEL(ARM_CPU_IMP_FUJITSU, FUJITSU_CPU_PART_A64FX)
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
index 85f4bec22f6d..58ba2d1c66a3 100644
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -548,6 +548,9 @@ static const struct midr_range spectre_v2_safe_list[] = {
MIDR_ALL_VERSIONS(MIDR_CORTEX_A55),
MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53),
MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
+ MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER),
+ MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_GOLD),
+ MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER),
{ /* sentinel */ }
};
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH] arm64: Add KRYO{3,4}XX CPU cores to spectre-v2 safe list
2020-01-16 14:19 [PATCH] arm64: Add KRYO{3,4}XX CPU cores to spectre-v2 safe list Sai Prakash Ranjan
@ 2020-01-16 15:32 ` Will Deacon
2020-01-16 15:42 ` Jeffrey Hugo
2020-01-16 16:11 ` Sai Prakash Ranjan
0 siblings, 2 replies; 8+ messages in thread
From: Will Deacon @ 2020-01-16 15:32 UTC (permalink / raw)
To: Sai Prakash Ranjan, jhugo
Cc: Catalin Marinas, Marc Zyngier, Andre Przywara, Mark Rutland,
linux-kernel, linux-arm-msm, linux-arm-kernel, Douglas Anderson,
Stephen Boyd, Bjorn Andersson, Matthias Kaehlcke, James Morse
[+Jeffrey]
On Thu, Jan 16, 2020 at 07:49:12PM +0530, Sai Prakash Ranjan wrote:
> KRYO3XX silver CPU cores and KRYO4XX silver, gold CPU cores
> are not affected by Spectre variant 2. Add them to spectre_v2
> safe list to correct ARM_SMCCC_ARCH_WORKAROUND_1 warning and
> vulnerability sysfs value.
>
> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
> ---
> arch/arm64/include/asm/cputype.h | 6 ++++++
> arch/arm64/kernel/cpu_errata.c | 3 +++
> 2 files changed, 9 insertions(+)
>
> diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
> index aca07c2f6e6e..7219cddeba66 100644
> --- a/arch/arm64/include/asm/cputype.h
> +++ b/arch/arm64/include/asm/cputype.h
> @@ -85,6 +85,9 @@
> #define QCOM_CPU_PART_FALKOR_V1 0x800
> #define QCOM_CPU_PART_FALKOR 0xC00
> #define QCOM_CPU_PART_KRYO 0x200
> +#define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803
> +#define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804
> +#define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805
Jeffrey is the only person I know who understands the CPU naming here, so
I've added him in case this needs either renaming or extending to cover
other CPUs. I wouldn't be at all surprised if we need a function call
rather than a bunch of table entries...
That said, the internet claims that KRYO4XX gold is based on Cortex-A76,
and so CSV2 should be set...
Will
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH] arm64: Add KRYO{3,4}XX CPU cores to spectre-v2 safe list
2020-01-16 15:32 ` Will Deacon
@ 2020-01-16 15:42 ` Jeffrey Hugo
2020-01-16 15:57 ` Sai Prakash Ranjan
2020-01-16 16:11 ` Sai Prakash Ranjan
1 sibling, 1 reply; 8+ messages in thread
From: Jeffrey Hugo @ 2020-01-16 15:42 UTC (permalink / raw)
To: Will Deacon, Sai Prakash Ranjan
Cc: Mark Rutland, Marc Zyngier, Catalin Marinas, linux-arm-msm,
linux-kernel, Douglas Anderson, Matthias Kaehlcke,
Bjorn Andersson, Andre Przywara, James Morse, Stephen Boyd,
linux-arm-kernel
On 1/16/2020 8:32 AM, Will Deacon wrote:
> [+Jeffrey]
>
> On Thu, Jan 16, 2020 at 07:49:12PM +0530, Sai Prakash Ranjan wrote:
>> KRYO3XX silver CPU cores and KRYO4XX silver, gold CPU cores
>> are not affected by Spectre variant 2. Add them to spectre_v2
>> safe list to correct ARM_SMCCC_ARCH_WORKAROUND_1 warning and
>> vulnerability sysfs value.
>>
>> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
>> ---
>> arch/arm64/include/asm/cputype.h | 6 ++++++
>> arch/arm64/kernel/cpu_errata.c | 3 +++
>> 2 files changed, 9 insertions(+)
>>
>> diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
>> index aca07c2f6e6e..7219cddeba66 100644
>> --- a/arch/arm64/include/asm/cputype.h
>> +++ b/arch/arm64/include/asm/cputype.h
>> @@ -85,6 +85,9 @@
>> #define QCOM_CPU_PART_FALKOR_V1 0x800
>> #define QCOM_CPU_PART_FALKOR 0xC00
>> #define QCOM_CPU_PART_KRYO 0x200
>> +#define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803
>> +#define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804
>> +#define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805
>
> Jeffrey is the only person I know who understands the CPU naming here, so
> I've added him in case this needs either renaming or extending to cover
> other CPUs. I wouldn't be at all surprised if we need a function call
> rather than a bunch of table entries...
The added lines look sane to me, from a naming and MIDR perspective. I
don't know off hand if these CPUs are really fixed or not.
I wonder why a "KRYO_3XX_GOLD 0x802" line is not being added. Sai?
>
> That said, the internet claims that KRYO4XX gold is based on Cortex-A76,
> and so CSV2 should be set...
>
> Will
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
--
Jeffrey Hugo
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH] arm64: Add KRYO{3,4}XX CPU cores to spectre-v2 safe list
2020-01-16 15:42 ` Jeffrey Hugo
@ 2020-01-16 15:57 ` Sai Prakash Ranjan
0 siblings, 0 replies; 8+ messages in thread
From: Sai Prakash Ranjan @ 2020-01-16 15:57 UTC (permalink / raw)
To: Jeffrey Hugo, Will Deacon
Cc: Will Deacon, Mark Rutland, Marc Zyngier, Catalin Marinas,
linux-arm-msm, linux-kernel, Douglas Anderson, Matthias Kaehlcke,
Bjorn Andersson, Andre Przywara, James Morse, Stephen Boyd,
linux-arm-kernel
Hi Jeffrey,
On 2020-01-16 21:12, Jeffrey Hugo wrote:
> On 1/16/2020 8:32 AM, Will Deacon wrote:
>> [+Jeffrey]
>>
>> On Thu, Jan 16, 2020 at 07:49:12PM +0530, Sai Prakash Ranjan wrote:
>>> KRYO3XX silver CPU cores and KRYO4XX silver, gold CPU cores
>>> are not affected by Spectre variant 2. Add them to spectre_v2
>>> safe list to correct ARM_SMCCC_ARCH_WORKAROUND_1 warning and
>>> vulnerability sysfs value.
>>>
>>> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
>>> ---
>>> arch/arm64/include/asm/cputype.h | 6 ++++++
>>> arch/arm64/kernel/cpu_errata.c | 3 +++
>>> 2 files changed, 9 insertions(+)
>>>
>>> diff --git a/arch/arm64/include/asm/cputype.h
>>> b/arch/arm64/include/asm/cputype.h
>>> index aca07c2f6e6e..7219cddeba66 100644
>>> --- a/arch/arm64/include/asm/cputype.h
>>> +++ b/arch/arm64/include/asm/cputype.h
>>> @@ -85,6 +85,9 @@
>>> #define QCOM_CPU_PART_FALKOR_V1 0x800
>>> #define QCOM_CPU_PART_FALKOR 0xC00
>>> #define QCOM_CPU_PART_KRYO 0x200
>>> +#define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803
>>> +#define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804
>>> +#define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805
>>
>> Jeffrey is the only person I know who understands the CPU naming here,
>> so
>> I've added him in case this needs either renaming or extending to
>> cover
>> other CPUs. I wouldn't be at all surprised if we need a function call
>> rather than a bunch of table entries...
>
> The added lines look sane to me, from a naming and MIDR perspective.
> I don't know off hand if these CPUs are really fixed or not.
>
> I wonder why a "KRYO_3XX_GOLD 0x802" line is not being added. Sai?
>
KRYO_3XX_GOLD is based on Cortex-A75 which is not spectre v2 safe.
Thanks,
Sai
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a
member
of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] arm64: Add KRYO{3,4}XX CPU cores to spectre-v2 safe list
2020-01-16 15:32 ` Will Deacon
2020-01-16 15:42 ` Jeffrey Hugo
@ 2020-01-16 16:11 ` Sai Prakash Ranjan
2020-01-16 18:27 ` Doug Anderson
1 sibling, 1 reply; 8+ messages in thread
From: Sai Prakash Ranjan @ 2020-01-16 16:11 UTC (permalink / raw)
To: Will Deacon
Cc: jhugo, Catalin Marinas, Marc Zyngier, Andre Przywara,
Mark Rutland, linux-kernel, linux-arm-msm, linux-arm-kernel,
Douglas Anderson, Stephen Boyd, Bjorn Andersson,
Matthias Kaehlcke, James Morse
Hi Will,
On 2020-01-16 21:02, Will Deacon wrote:
> [+Jeffrey]
>
> On Thu, Jan 16, 2020 at 07:49:12PM +0530, Sai Prakash Ranjan wrote:
>> KRYO3XX silver CPU cores and KRYO4XX silver, gold CPU cores
>> are not affected by Spectre variant 2. Add them to spectre_v2
>> safe list to correct ARM_SMCCC_ARCH_WORKAROUND_1 warning and
>> vulnerability sysfs value.
>>
>> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
>> ---
>> arch/arm64/include/asm/cputype.h | 6 ++++++
>> arch/arm64/kernel/cpu_errata.c | 3 +++
>> 2 files changed, 9 insertions(+)
>>
>> diff --git a/arch/arm64/include/asm/cputype.h
>> b/arch/arm64/include/asm/cputype.h
>> index aca07c2f6e6e..7219cddeba66 100644
>> --- a/arch/arm64/include/asm/cputype.h
>> +++ b/arch/arm64/include/asm/cputype.h
>> @@ -85,6 +85,9 @@
>> #define QCOM_CPU_PART_FALKOR_V1 0x800
>> #define QCOM_CPU_PART_FALKOR 0xC00
>> #define QCOM_CPU_PART_KRYO 0x200
>> +#define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803
>> +#define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804
>> +#define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805
>
> Jeffrey is the only person I know who understands the CPU naming here,
> so
> I've added him in case this needs either renaming or extending to cover
> other CPUs. I wouldn't be at all surprised if we need a function call
> rather than a bunch of table entries...
>
> That said, the internet claims that KRYO4XX gold is based on
> Cortex-A76,
> and so CSV2 should be set...
>
Yes the internet claims are true and CSV2 is set. SANITY check logs in
here show ID_PFR0_EL1 - https://lore.kernel.org/patchwork/patch/1138457/
Thanks,
Sai
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a
member
of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH] arm64: Add KRYO{3,4}XX CPU cores to spectre-v2 safe list
2020-01-16 16:11 ` Sai Prakash Ranjan
@ 2020-01-16 18:27 ` Doug Anderson
2020-01-16 18:31 ` Will Deacon
2020-01-16 20:04 ` Sai Prakash Ranjan
0 siblings, 2 replies; 8+ messages in thread
From: Doug Anderson @ 2020-01-16 18:27 UTC (permalink / raw)
To: Sai Prakash Ranjan
Cc: Will Deacon, Jeffrey Hugo, Catalin Marinas, Marc Zyngier,
Andre Przywara, Mark Rutland, LKML, linux-arm-msm, Linux ARM,
Stephen Boyd, Bjorn Andersson, Matthias Kaehlcke, James Morse
Hi,
On Thu, Jan 16, 2020 at 8:11 AM Sai Prakash Ranjan
<saiprakash.ranjan@codeaurora.org> wrote:
>
> Hi Will,
>
> On 2020-01-16 21:02, Will Deacon wrote:
> > [+Jeffrey]
> >
> > On Thu, Jan 16, 2020 at 07:49:12PM +0530, Sai Prakash Ranjan wrote:
> >> KRYO3XX silver CPU cores and KRYO4XX silver, gold CPU cores
> >> are not affected by Spectre variant 2. Add them to spectre_v2
> >> safe list to correct ARM_SMCCC_ARCH_WORKAROUND_1 warning and
> >> vulnerability sysfs value.
> >>
> >> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
> >> ---
> >> arch/arm64/include/asm/cputype.h | 6 ++++++
> >> arch/arm64/kernel/cpu_errata.c | 3 +++
> >> 2 files changed, 9 insertions(+)
> >>
> >> diff --git a/arch/arm64/include/asm/cputype.h
> >> b/arch/arm64/include/asm/cputype.h
> >> index aca07c2f6e6e..7219cddeba66 100644
> >> --- a/arch/arm64/include/asm/cputype.h
> >> +++ b/arch/arm64/include/asm/cputype.h
> >> @@ -85,6 +85,9 @@
> >> #define QCOM_CPU_PART_FALKOR_V1 0x800
> >> #define QCOM_CPU_PART_FALKOR 0xC00
> >> #define QCOM_CPU_PART_KRYO 0x200
> >> +#define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803
> >> +#define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804
> >> +#define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805
> >
> > Jeffrey is the only person I know who understands the CPU naming here,
> > so
> > I've added him in case this needs either renaming or extending to cover
> > other CPUs. I wouldn't be at all surprised if we need a function call
> > rather than a bunch of table entries...
> >
> > That said, the internet claims that KRYO4XX gold is based on
> > Cortex-A76,
> > and so CSV2 should be set...
> >
>
> Yes the internet claims are true and CSV2 is set. SANITY check logs in
> here show ID_PFR0_EL1 - https://lore.kernel.org/patchwork/patch/1138457/
I'm probably just being a noob here and am confused, but if CSV2 is
set then why do you need your patch at all? The code I see says that
if CSV2 is set then we don't even check the spectre_v2_safe_list().
-Doug
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH] arm64: Add KRYO{3,4}XX CPU cores to spectre-v2 safe list
2020-01-16 18:27 ` Doug Anderson
@ 2020-01-16 18:31 ` Will Deacon
2020-01-16 20:04 ` Sai Prakash Ranjan
1 sibling, 0 replies; 8+ messages in thread
From: Will Deacon @ 2020-01-16 18:31 UTC (permalink / raw)
To: Doug Anderson
Cc: Sai Prakash Ranjan, Jeffrey Hugo, Catalin Marinas, Marc Zyngier,
Andre Przywara, Mark Rutland, LKML, linux-arm-msm, Linux ARM,
Stephen Boyd, Bjorn Andersson, Matthias Kaehlcke, James Morse
On Thu, Jan 16, 2020 at 10:27:08AM -0800, Doug Anderson wrote:
> On Thu, Jan 16, 2020 at 8:11 AM Sai Prakash Ranjan
> <saiprakash.ranjan@codeaurora.org> wrote:
> > On 2020-01-16 21:02, Will Deacon wrote:
> > > On Thu, Jan 16, 2020 at 07:49:12PM +0530, Sai Prakash Ranjan wrote:
> > >> KRYO3XX silver CPU cores and KRYO4XX silver, gold CPU cores
> > >> are not affected by Spectre variant 2. Add them to spectre_v2
> > >> safe list to correct ARM_SMCCC_ARCH_WORKAROUND_1 warning and
> > >> vulnerability sysfs value.
> > >>
> > >> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
> > >> ---
> > >> arch/arm64/include/asm/cputype.h | 6 ++++++
> > >> arch/arm64/kernel/cpu_errata.c | 3 +++
> > >> 2 files changed, 9 insertions(+)
> > >>
> > >> diff --git a/arch/arm64/include/asm/cputype.h
> > >> b/arch/arm64/include/asm/cputype.h
> > >> index aca07c2f6e6e..7219cddeba66 100644
> > >> --- a/arch/arm64/include/asm/cputype.h
> > >> +++ b/arch/arm64/include/asm/cputype.h
> > >> @@ -85,6 +85,9 @@
> > >> #define QCOM_CPU_PART_FALKOR_V1 0x800
> > >> #define QCOM_CPU_PART_FALKOR 0xC00
> > >> #define QCOM_CPU_PART_KRYO 0x200
> > >> +#define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803
> > >> +#define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804
> > >> +#define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805
> > >
> > > Jeffrey is the only person I know who understands the CPU naming here,
> > > so
> > > I've added him in case this needs either renaming or extending to cover
> > > other CPUs. I wouldn't be at all surprised if we need a function call
> > > rather than a bunch of table entries...
> > >
> > > That said, the internet claims that KRYO4XX gold is based on
> > > Cortex-A76,
> > > and so CSV2 should be set...
> > >
> >
> > Yes the internet claims are true and CSV2 is set. SANITY check logs in
> > here show ID_PFR0_EL1 - https://lore.kernel.org/patchwork/patch/1138457/
>
> I'm probably just being a noob here and am confused, but if CSV2 is
> set then why do you need your patch at all? The code I see says that
> if CSV2 is set then we don't even check the spectre_v2_safe_list().
You're not being a noob at all -- you're making the same point that I was
trying to make :)
So I think we can take this patch with the KRYO_4XX_GOLD part dropped.
Will
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH] arm64: Add KRYO{3,4}XX CPU cores to spectre-v2 safe list
2020-01-16 18:27 ` Doug Anderson
2020-01-16 18:31 ` Will Deacon
@ 2020-01-16 20:04 ` Sai Prakash Ranjan
1 sibling, 0 replies; 8+ messages in thread
From: Sai Prakash Ranjan @ 2020-01-16 20:04 UTC (permalink / raw)
To: Doug Anderson, Will Deacon
Cc: Jeffrey Hugo, Catalin Marinas, Marc Zyngier, Andre Przywara,
Mark Rutland, LKML, linux-arm-msm, Linux ARM, Stephen Boyd,
Bjorn Andersson, Matthias Kaehlcke, James Morse,
linux-arm-msm-owner
Hi,
On 2020-01-16 23:57, Doug Anderson wrote:
> Hi,
>
> On Thu, Jan 16, 2020 at 8:11 AM Sai Prakash Ranjan
> <saiprakash.ranjan@codeaurora.org> wrote:
>>
>> Hi Will,
>>
>> On 2020-01-16 21:02, Will Deacon wrote:
>> > [+Jeffrey]
>> >
>> > On Thu, Jan 16, 2020 at 07:49:12PM +0530, Sai Prakash Ranjan wrote:
>> >> KRYO3XX silver CPU cores and KRYO4XX silver, gold CPU cores
>> >> are not affected by Spectre variant 2. Add them to spectre_v2
>> >> safe list to correct ARM_SMCCC_ARCH_WORKAROUND_1 warning and
>> >> vulnerability sysfs value.
>> >>
>> >> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
>> >> ---
>> >> arch/arm64/include/asm/cputype.h | 6 ++++++
>> >> arch/arm64/kernel/cpu_errata.c | 3 +++
>> >> 2 files changed, 9 insertions(+)
>> >>
>> >> diff --git a/arch/arm64/include/asm/cputype.h
>> >> b/arch/arm64/include/asm/cputype.h
>> >> index aca07c2f6e6e..7219cddeba66 100644
>> >> --- a/arch/arm64/include/asm/cputype.h
>> >> +++ b/arch/arm64/include/asm/cputype.h
>> >> @@ -85,6 +85,9 @@
>> >> #define QCOM_CPU_PART_FALKOR_V1 0x800
>> >> #define QCOM_CPU_PART_FALKOR 0xC00
>> >> #define QCOM_CPU_PART_KRYO 0x200
>> >> +#define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803
>> >> +#define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804
>> >> +#define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805
>> >
>> > Jeffrey is the only person I know who understands the CPU naming here,
>> > so
>> > I've added him in case this needs either renaming or extending to cover
>> > other CPUs. I wouldn't be at all surprised if we need a function call
>> > rather than a bunch of table entries...
>> >
>> > That said, the internet claims that KRYO4XX gold is based on
>> > Cortex-A76,
>> > and so CSV2 should be set...
>> >
>>
>> Yes the internet claims are true and CSV2 is set. SANITY check logs in
>> here show ID_PFR0_EL1 -
>> https://lore.kernel.org/patchwork/patch/1138457/
>
> I'm probably just being a noob here and am confused, but if CSV2 is
> set then why do you need your patch at all? The code I see says that
> if CSV2 is set then we don't even check the spectre_v2_safe_list().
>
I am a noob here and didn't understand what Will meant ;). V2 posted
now.
Thanks,
Sai
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^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2020-01-16 20:04 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
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2020-01-16 14:19 [PATCH] arm64: Add KRYO{3,4}XX CPU cores to spectre-v2 safe list Sai Prakash Ranjan
2020-01-16 15:32 ` Will Deacon
2020-01-16 15:42 ` Jeffrey Hugo
2020-01-16 15:57 ` Sai Prakash Ranjan
2020-01-16 16:11 ` Sai Prakash Ranjan
2020-01-16 18:27 ` Doug Anderson
2020-01-16 18:31 ` Will Deacon
2020-01-16 20:04 ` Sai Prakash Ranjan
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