Documentation: DT bindings: update DT binding docs with Tegra chips

Documentation: DT bindings: update DT binding docs with Tegra chips

[Paul Walmsley]

Update some of the DT binding documentation text files, per Mark's
comments at:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

The primary goal with this series is to avoid checkpatch.pl warnings
and align to the policy that Mark described.  This series also updates
Documentation/devicetree/bindings/submitting-patches.txt to formally
document this policy.

These patches apply on next-20150123.


- Paul

[PATCH 08/24] Documentation: DT bindings: add more chip compatible strings for Tegra UART

[Paul Walmsley]

Add compatible strings for the UART IP blocks present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jingchang Lu <jingchang.lu@freescale.com>
Cc: Peter Hurley <peter@hurleysoftware.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>
Cc: John Crispin <blogic@openwrt.org>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../devicetree/bindings/serial/of-serial.txt       |    5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/of-serial.txt b/Documentation/devicetree/bindings/serial/of-serial.txt
index b52b98234b9b..06ebae54cbcc 100644
--- a/Documentation/devicetree/bindings/serial/of-serial.txt
+++ b/Documentation/devicetree/bindings/serial/of-serial.txt
@@ -9,6 +9,11 @@ Required properties:
 	- "ns16750"
 	- "ns16850"
 	- "nvidia,tegra20-uart"
+	- "nvidia,tegra30-uart" (not yet matched by the driver)
+	- "nvidia,tegra114-uart" (not yet matched by the driver)
+	- "nvidia,tegra124-uart" (not yet matched by the driver)
+	- "nvidia,tegra132-uart" (not yet matched by the driver)
+	- "nvidia,tegra210-uart" (not yet matched by the driver)
 	- "nxp,lpc3220-uart"
 	- "ralink,rt2880-uart"
 	- "ibm,qpace-nwp-serial"

[PATCH 10/24] Documentation: DT bindings: add more chip compatible strings for Tegra I2C

[Paul Walmsley]

Add compatible strings for the I2C IP blocks present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Wolfram Sang <wsa@the-dreams.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: linux-i2c@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../devicetree/bindings/i2c/nvidia,tegra20-i2c.txt |    3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
index 87507e9ce6db..8e233d913a78 100644
--- a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
+++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
@@ -2,6 +2,9 @@ NVIDIA Tegra20/Tegra30/Tegra114 I2C controller driver.
 
 Required properties:
 - compatible : should be:
+	"nvidia,tegra210-i2c" (not yet matched by the driver)
+	"nvidia,tegra132-i2c" (not yet matched by the driver)
+	"nvidia,tegra124-i2c" (not yet matched by the driver)
 	"nvidia,tegra114-i2c"
 	"nvidia,tegra30-i2c"
 	"nvidia,tegra20-i2c"

[PATCH 02/24] Documentation: DT bindings: add more chip compatible strings for Tegra PCIe

[Paul Walmsley]

Add compatible strings for the PCIe IP blocks present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: linux-tegra@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../bindings/pci/nvidia,tegra20-pcie.txt           |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
index d763e047c6ae..e772884f1c33 100644
--- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
@@ -5,6 +5,8 @@ Required properties:
   - "nvidia,tegra20-pcie"
   - "nvidia,tegra30-pcie"
   - "nvidia,tegra124-pcie"
+  - "nvidia,tegra132-pcie" (not yet matched in the driver)
+  - "nvidia,tegra210-pcie" (not yet matched in the driver)
 - device_type: Must be "pci"
 - reg: A list of physical base address and length for each set of controller
   registers. Must contain an entry for each entry in the reg-names property.

Re: [PATCH 02/24] Documentation: DT bindings: add more chip compatible strings for Tegra PCIe

[Rob Herring]

On Wed, Jan 28, 2015 at 5:49 PM, Paul Walmsley <paul@pwsan.com> wrote:
>
> Add compatible strings for the PCIe IP blocks present on several Tegra
> chips.  The primary objective here is to avoid checkpatch warnings,
> per:
>
> http://marc.info/?l=linux-tegra&m=142201349727836&w=2
>
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
> Cc: Thierry Reding <thierry.reding@gmail.com>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Pawel Moll <pawel.moll@arm.com>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
> Cc: Kumar Gala <galak@codeaurora.org>
> Cc: Stephen Warren <swarren@wwwdotorg.org>
> Cc: Alexandre Courbot <gnurou@gmail.com>
> Cc: linux-tegra@vger.kernel.org
> Cc: linux-pci@vger.kernel.org
> Cc: devicetree@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> ---
>  .../bindings/pci/nvidia,tegra20-pcie.txt           |    2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> index d763e047c6ae..e772884f1c33 100644
> --- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> @@ -5,6 +5,8 @@ Required properties:
>    - "nvidia,tegra20-pcie"
>    - "nvidia,tegra30-pcie"
>    - "nvidia,tegra124-pcie"
> +  - "nvidia,tegra132-pcie" (not yet matched in the driver)
> +  - "nvidia,tegra210-pcie" (not yet matched in the driver)

Whether the driver matches or not is irrelevant to the binding and may
change over time. Does this mean the driver matches on something else
or Tegra132 is not yet supported in the driver? If the former, what is
important is what are the valid combinations of compatible properties
and that is not captured here. In other words, what is the fallback
compatible string for each chip?

The same comments apply to the rest of the series.

Rob

Re: [PATCH 02/24] Documentation: DT bindings: add more chip compatible strings for Tegra PCIe

[Paul Walmsley]

Hi Rob

On Thu, 29 Jan 2015, Rob Herring wrote:

> On Wed, Jan 28, 2015 at 5:49 PM, Paul Walmsley <paul@pwsan.com> wrote:
> >
> > Add compatible strings for the PCIe IP blocks present on several Tegra
> > chips.  The primary objective here is to avoid checkpatch warnings,
> > per:
> >
> > http://marc.info/?l=linux-tegra&m=142201349727836&w=2
> >
> > Signed-off-by: Paul Walmsley <paul@pwsan.com>
> > Cc: Thierry Reding <thierry.reding@gmail.com>
> > Cc: Rob Herring <robh+dt@kernel.org>
> > Cc: Pawel Moll <pawel.moll@arm.com>
> > Cc: Mark Rutland <mark.rutland@arm.com>
> > Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
> > Cc: Kumar Gala <galak@codeaurora.org>
> > Cc: Stephen Warren <swarren@wwwdotorg.org>
> > Cc: Alexandre Courbot <gnurou@gmail.com>
> > Cc: linux-tegra@vger.kernel.org
> > Cc: linux-pci@vger.kernel.org
> > Cc: devicetree@vger.kernel.org
> > Cc: linux-kernel@vger.kernel.org
> > ---
> >  .../bindings/pci/nvidia,tegra20-pcie.txt           |    2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> > index d763e047c6ae..e772884f1c33 100644
> > --- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> > +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> > @@ -5,6 +5,8 @@ Required properties:
> >    - "nvidia,tegra20-pcie"
> >    - "nvidia,tegra30-pcie"
> >    - "nvidia,tegra124-pcie"
> > +  - "nvidia,tegra132-pcie" (not yet matched in the driver)
> > +  - "nvidia,tegra210-pcie" (not yet matched in the driver)
> 
> Whether the driver matches or not is irrelevant to the binding and may
> change over time. Does this mean the driver matches on something else
> or Tegra132 is not yet supported in the driver? 

It means that the driver currently matches on one of the first three 
strings that don't carry that annotation.

> If the former, what is important is what are the valid combinations of 
> compatible properties and that is not captured here. In other words, 
> what is the fallback compatible string for each chip?

The intention was to try to be helpful: to document that anyone adding a 
"nvidia,tegra132-pcie" compatible string would also need to add one of the 
other strings as a fallback.  Would you like that to be documented in a 
different way, or removed?


- Paul

Re: [PATCH 02/24] Documentation: DT bindings: add more chip compatible strings for Tegra PCIe

[Rob Herring]

On Thu, Jan 29, 2015 at 9:45 AM, Paul Walmsley <paul@pwsan.com> wrote:
> Hi Rob
>
> On Thu, 29 Jan 2015, Rob Herring wrote:
>
>> On Wed, Jan 28, 2015 at 5:49 PM, Paul Walmsley <paul@pwsan.com> wrote:
>> >
>> > Add compatible strings for the PCIe IP blocks present on several Tegra
>> > chips.  The primary objective here is to avoid checkpatch warnings,
>> > per:
>> >

[...]

>> > +  - "nvidia,tegra132-pcie" (not yet matched in the driver)
>> > +  - "nvidia,tegra210-pcie" (not yet matched in the driver)
>>
>> Whether the driver matches or not is irrelevant to the binding and may
>> change over time. Does this mean the driver matches on something else
>> or Tegra132 is not yet supported in the driver?
>
> It means that the driver currently matches on one of the first three
> strings that don't carry that annotation.
>
>> If the former, what is important is what are the valid combinations of
>> compatible properties and that is not captured here. In other words,
>> what is the fallback compatible string for each chip?
>
> The intention was to try to be helpful: to document that anyone adding a
> "nvidia,tegra132-pcie" compatible string would also need to add one of the
> other strings as a fallback.  Would you like that to be documented in a
> different way, or removed?

Then you should say something like 'must contain "nvidia,tegra20-pcie"
and one of: ...'

You can also use nvidia,<chip>-pcie if you want. checkpatch will check
for that pattern too. Then your documentation can be something like:

Must contain '"nvidia,<chip>-pcie", "nvidia,tegra20-pcie"' where
<chip> is tegra30, tegra132, ...

We don't enforce that the <chip> part is documented ATM and not likely
until we have a schema if ever.

Rob

Re: [PATCH 02/24] Documentation: DT bindings: add more chip compatible strings for Tegra PCIe

[Paul Walmsley]

Hi Rob

On Thu, 29 Jan 2015, Rob Herring wrote:

> On Thu, Jan 29, 2015 at 9:45 AM, Paul Walmsley <paul@pwsan.com> wrote:
> > On Thu, 29 Jan 2015, Rob Herring wrote:
> >
> >> On Wed, Jan 28, 2015 at 5:49 PM, Paul Walmsley <paul@pwsan.com> wrote:
> >> >
> >> > Add compatible strings for the PCIe IP blocks present on several Tegra
> >> > chips.  The primary objective here is to avoid checkpatch warnings,
> >> > per:
> >> >
> 
> [...]
> 
> >> > +  - "nvidia,tegra132-pcie" (not yet matched in the driver)
> >> > +  - "nvidia,tegra210-pcie" (not yet matched in the driver)
> >>
> >> Whether the driver matches or not is irrelevant to the binding and may
> >> change over time. Does this mean the driver matches on something else
> >> or Tegra132 is not yet supported in the driver?
> >
> > It means that the driver currently matches on one of the first three
> > strings that don't carry that annotation.
> >
> >> If the former, what is important is what are the valid combinations of
> >> compatible properties and that is not captured here. In other words,
> >> what is the fallback compatible string for each chip?
> >
> > The intention was to try to be helpful: to document that anyone adding a
> > "nvidia,tegra132-pcie" compatible string would also need to add one of the
> > other strings as a fallback.  Would you like that to be documented in a
> > different way, or removed?
> 
> Then you should say something like 'must contain "nvidia,tegra20-pcie"
> and one of: ...'
> 
> You can also use nvidia,<chip>-pcie if you want. checkpatch will check
> for that pattern too. Then your documentation can be something like:
> 
> Must contain '"nvidia,<chip>-pcie", "nvidia,tegra20-pcie"' where
> <chip> is tegra30, tegra132, ...
> 
> We don't enforce that the <chip> part is documented ATM and not likely
> until we have a schema if ever.

OK, thanks for the explanation.

So would it be acceptable to you to skip the attempt to document which 
strings are actually supported by the current driver, and to simply use 
the <chip> wildcard?


- Paul

Re: [PATCH 02/24] Documentation: DT bindings: add more chip compatible strings for Tegra PCIe

[Paul Walmsley]

On Thu, 29 Jan 2015, Paul Walmsley wrote:

> Hi Rob
> 
> On Thu, 29 Jan 2015, Rob Herring wrote:
> 
> > On Thu, Jan 29, 2015 at 9:45 AM, Paul Walmsley <paul@pwsan.com> wrote:
> > > On Thu, 29 Jan 2015, Rob Herring wrote:
> > >
> > >> On Wed, Jan 28, 2015 at 5:49 PM, Paul Walmsley <paul@pwsan.com> wrote:
> > >> >
> > >> > Add compatible strings for the PCIe IP blocks present on several Tegra
> > >> > chips.  The primary objective here is to avoid checkpatch warnings,
> > >> > per:
> > >> >
> > 
> > [...]
> > 
> > >> > +  - "nvidia,tegra132-pcie" (not yet matched in the driver)
> > >> > +  - "nvidia,tegra210-pcie" (not yet matched in the driver)
> > >>
> > >> Whether the driver matches or not is irrelevant to the binding and may
> > >> change over time. Does this mean the driver matches on something else
> > >> or Tegra132 is not yet supported in the driver?
> > >
> > > It means that the driver currently matches on one of the first three
> > > strings that don't carry that annotation.
> > >
> > >> If the former, what is important is what are the valid combinations of
> > >> compatible properties and that is not captured here. In other words,
> > >> what is the fallback compatible string for each chip?
> > >
> > > The intention was to try to be helpful: to document that anyone adding a
> > > "nvidia,tegra132-pcie" compatible string would also need to add one of the
> > > other strings as a fallback.  Would you like that to be documented in a
> > > different way, or removed?
> > 
> > Then you should say something like 'must contain "nvidia,tegra20-pcie"
> > and one of: ...'
> > 
> > You can also use nvidia,<chip>-pcie if you want. checkpatch will check
> > for that pattern too. Then your documentation can be something like:
> > 
> > Must contain '"nvidia,<chip>-pcie", "nvidia,tegra20-pcie"' where
> > <chip> is tegra30, tegra132, ...
> > 
> > We don't enforce that the <chip> part is documented ATM and not likely
> > until we have a schema if ever.
> 
> OK, thanks for the explanation.
> 
> So would it be acceptable to you to skip the attempt to document which 
> strings are actually supported by the current driver, and to simply use 
> the <chip> wildcard?

(Just in case it wasn't clear, I mean for the purposes of the current 
patch series, not necessarily in general)


- Paul

Re: [PATCH 02/24] Documentation: DT bindings: add more chip compatible strings for Tegra PCIe

[Rob Herring]

On Thu, Jan 29, 2015 at 11:08 AM, Paul Walmsley <paul@pwsan.com> wrote:
> Hi Rob
>
> On Thu, 29 Jan 2015, Rob Herring wrote:
>
>> On Thu, Jan 29, 2015 at 9:45 AM, Paul Walmsley <paul@pwsan.com> wrote:
>> > On Thu, 29 Jan 2015, Rob Herring wrote:
>> >
>> >> On Wed, Jan 28, 2015 at 5:49 PM, Paul Walmsley <paul@pwsan.com> wrote:
>> >> >
>> >> > Add compatible strings for the PCIe IP blocks present on several Tegra
>> >> > chips.  The primary objective here is to avoid checkpatch warnings,
>> >> > per:
>> >> >
>>
>> [...]
>>
>> >> > +  - "nvidia,tegra132-pcie" (not yet matched in the driver)
>> >> > +  - "nvidia,tegra210-pcie" (not yet matched in the driver)
>> >>
>> >> Whether the driver matches or not is irrelevant to the binding and may
>> >> change over time. Does this mean the driver matches on something else
>> >> or Tegra132 is not yet supported in the driver?
>> >
>> > It means that the driver currently matches on one of the first three
>> > strings that don't carry that annotation.
>> >
>> >> If the former, what is important is what are the valid combinations of
>> >> compatible properties and that is not captured here. In other words,
>> >> what is the fallback compatible string for each chip?
>> >
>> > The intention was to try to be helpful: to document that anyone adding a
>> > "nvidia,tegra132-pcie" compatible string would also need to add one of the
>> > other strings as a fallback.  Would you like that to be documented in a
>> > different way, or removed?
>>
>> Then you should say something like 'must contain "nvidia,tegra20-pcie"
>> and one of: ...'
>>
>> You can also use nvidia,<chip>-pcie if you want. checkpatch will check
>> for that pattern too. Then your documentation can be something like:
>>
>> Must contain '"nvidia,<chip>-pcie", "nvidia,tegra20-pcie"' where
>> <chip> is tegra30, tegra132, ...
>>
>> We don't enforce that the <chip> part is documented ATM and not likely
>> until we have a schema if ever.
>
> OK, thanks for the explanation.
>
> So would it be acceptable to you to skip the attempt to document which
> strings are actually supported by the current driver, and to simply use
> the <chip> wildcard?

I don't think the binding document should say anything about what the
driver uses or not. It should describe what combinations of compatible
strings in a dts are valid. I didn't look at every patch, but the ones
like this one are. I'd be fine with most of this all in one patch BTW.

You should attempt to document known values of <chip> if you use it
(you could refer to another doc for the list). I was only highlighting
what you can get away with if no one is paying attention, not that you
don't need to add tegra132, etc. :)

Rob

Re: [PATCH 02/24] Documentation: DT bindings: add more chip compatible strings for Tegra PCIe

[Paul Walmsley]

On Thu, 29 Jan 2015, Rob Herring wrote:

> On Thu, Jan 29, 2015 at 11:08 AM, Paul Walmsley <paul@pwsan.com> wrote:
> > On Thu, 29 Jan 2015, Rob Herring wrote:
> >
> >> On Thu, Jan 29, 2015 at 9:45 AM, Paul Walmsley <paul@pwsan.com> wrote:
> >> > On Thu, 29 Jan 2015, Rob Herring wrote:
> >> >
> >> >> On Wed, Jan 28, 2015 at 5:49 PM, Paul Walmsley <paul@pwsan.com> wrote:
> >> >> >
> >> >> > Add compatible strings for the PCIe IP blocks present on several Tegra
> >> >> > chips.  The primary objective here is to avoid checkpatch warnings,
> >> >> > per:
> >> >> >
> >>
> >> [...]
> >>
> >> >> > +  - "nvidia,tegra132-pcie" (not yet matched in the driver)
> >> >> > +  - "nvidia,tegra210-pcie" (not yet matched in the driver)
> >> >>
> >> >> Whether the driver matches or not is irrelevant to the binding and may
> >> >> change over time. Does this mean the driver matches on something else
> >> >> or Tegra132 is not yet supported in the driver?
> >> >
> >> > It means that the driver currently matches on one of the first three
> >> > strings that don't carry that annotation.
> >> >
> >> >> If the former, what is important is what are the valid combinations of
> >> >> compatible properties and that is not captured here. In other words,
> >> >> what is the fallback compatible string for each chip?
> >> >
> >> > The intention was to try to be helpful: to document that anyone adding a
> >> > "nvidia,tegra132-pcie" compatible string would also need to add one of the
> >> > other strings as a fallback.  Would you like that to be documented in a
> >> > different way, or removed?
> >>
> >> Then you should say something like 'must contain "nvidia,tegra20-pcie"
> >> and one of: ...'
> >>
> >> You can also use nvidia,<chip>-pcie if you want. checkpatch will check
> >> for that pattern too. Then your documentation can be something like:
> >>
> >> Must contain '"nvidia,<chip>-pcie", "nvidia,tegra20-pcie"' where
> >> <chip> is tegra30, tegra132, ...
> >>
> >> We don't enforce that the <chip> part is documented ATM and not likely
> >> until we have a schema if ever.
> >
> > OK, thanks for the explanation.
> >
> > So would it be acceptable to you to skip the attempt to document which
> > strings are actually supported by the current driver, and to simply use
> > the <chip> wildcard?
> 
> I don't think the binding document should say anything about what the
> driver uses or not. 

OK, will remove those.

> It should describe what combinations of compatible strings in a dts are 
> valid. I didn't look at every patch, but the ones like this one are.

OK, will switch to the format you described earlier:

"Must contain '"nvidia,<chip>-pcie", "nvidia,tegra20-pcie"' where
 <chip> is tegra30, tegra132, ..."

> I'd be fine with most of this all in one patch BTW.

OK, will squash.

> You should attempt to document known values of <chip> if you use it
> (you could refer to another doc for the list).

Is there an example of this in the tree that you have in mind, where 
another document is used for the list?  Would it just contain a list of 
the Tegra chips, e.g., tegra30, tegra114, tegra124, etc?

> I was only highlighting what you can get away with if no one is paying 
> attention, not that you don't need to add tegra132, etc. :)

OK.


- Paul

Re: [PATCH 02/24] Documentation: DT bindings: add more chip compatible strings for Tegra PCIe

[Paul Walmsley]

[-- Attachment #1: Type: TEXT/PLAIN, Size: 25388 bytes --]

Hi Rob,

I've implemented the changes that you requested.  Could you give this a 
quick look and see if it's sufficiently close to what you wanted?  Will 
plan to repost the entire (much smaller) series tomorrow.


- Paul

From: Paul Walmsley <paul@pwsan.com>
Date: Thu, 29 Jan 2015 18:41:18 -0700
Subject: [PATCH] Documentation: DT bindings: add more Tegra chip
 compatible strings

Align compatible strings for several IP blocks present on Tegra chips
with the latest doctrine from the DT maintainers:

http://marc.info/?l=devicetree&m=142255654213019&w=2

The primary objective here is to avoid checkpatch warnings, per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

DT binding text files have been updated for the following IP blocks:

- PCIe
- SOR
- SoC timers
- AHB "gizmo"
- APB_MISC
- pinmux control
- UART
- PWM
- I2C
- SPI
- RTC
- PMC
- eFuse
- AHCI
- HDA
- XUSB_PADCTRL
- SDHCI
- SOC_THERM
- AHUB
- I2S
- EHCI
- USB PHY

N.B. The nvidia,tegra20-timer compatible string is removed from the
nvidia,tegra30-timer.txt documentation file because it's already
mentioned in the nvidia,tegra20-timer.txt documentation file.

This second version takes into account the following requests from
Rob Herring <robherring2@gmail.com>:

- Per-IP block patches have been combined into a single patch

- Explicit documentation about which compatible strings are actually
  matched by the driver has been removed.  In its place is implicit
  documentation that loosely follows Rob's prescribed format:

  "Must contain '"nvidia,<chip>-pcie", "nvidia,tegra20-pcie"' where
   <chip> is tegra30, tegra132, ..." [...]  "You should attempt to
   document known values of <chip> if you use it"


Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Dylan Reid <dgreid@chromium.org>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Jingchang Lu <jingchang.lu@freescale.com>
Cc: John Crispin <blogic@openwrt.org>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mikko Perttunen <mperttunen@nvidia.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Peter Hurley <peter@hurleysoftware.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sean Paul <seanpaul@chromium.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Takashi Iwai <tiwai@suse.de>
Cc: Tejun Heo <tj@kernel.org>
Cc: "Terje Bergström" <tbergstrom@nvidia.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Cc: Wolfram Sang <wsa@the-dreams.de>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: devicetree@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Cc: linux-i2c@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linux-pwm@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
---
 .../devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt       |  5 ++++-
 .../devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt       |  6 +++++-
 Documentation/devicetree/bindings/ata/tegra-sata.txt           |  4 +++-
 Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt | 10 +++++-----
 .../devicetree/bindings/gpu/nvidia,tegra20-host1x.txt          |  8 ++++++--
 Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt   | 10 +++++-----
 .../devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt        |  9 ++++-----
 Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt |  6 +++++-
 Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt  |  8 ++++----
 .../devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt     |  3 ++-
 .../bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt           |  4 +++-
 Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt   |  7 ++++---
 Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt   |  4 +++-
 Documentation/devicetree/bindings/serial/of-serial.txt         |  5 ++++-
 .../devicetree/bindings/sound/nvidia,tegra30-ahub.txt          |  5 ++++-
 Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt |  4 +++-
 Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt |  5 ++++-
 Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt  |  4 +++-
 Documentation/devicetree/bindings/thermal/tegra-soctherm.txt   |  4 +++-
 .../devicetree/bindings/timer/nvidia,tegra30-timer.txt         |  4 +++-
 Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt  |  5 ++++-
 .../devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt         |  5 ++++-
 22 files changed, 85 insertions(+), 40 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt
index 234406d41c12..067c9790062f 100644
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt
@@ -1,7 +1,10 @@
 NVIDIA Tegra AHB
 
 Required properties:
-- compatible : "nvidia,tegra20-ahb" or "nvidia,tegra30-ahb"
+- compatible : For Tegra20, must contain "nvidia,tegra20-ahb".  For
+  Tegra30, must contain "nvidia,tegra30-ahb".  Otherwise, must contain
+  '"nvidia,<chip>-ahb", "nvidia,tegra30-ahb"' where <chip> is tegra124,
+  tegra132, or tegra210.
 - reg : Should contain 1 register ranges(address and length)
 
 Example:
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
index 68ac65f82a1c..dd75b972ee37 100644
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
@@ -6,7 +6,11 @@ modes. It provides power-gating controllers for SoC and CPU power-islands.
 
 Required properties:
 - name : Should be pmc
-- compatible : Should contain "nvidia,tegra<chip>-pmc".
+- compatible : For Tegra20, must contain "nvidia,tegra20-pmc".  For Tegra30,
+  must contain "nvidia,tegra30-pmc".  For Tegra114, must contain
+  "nvidia,tegra114-pmc".  For Tegra124, must contain "nvidia,tegra124-pmc".
+  Otherwise, must contain "nvidia,<chip>-pmc", plus at least one of the
+  above, where <chip> is tegra132.
 - reg : Offset and length of the register set for the device
 - clocks : Must contain an entry for each entry in clock-names.
   See ../clocks/clock-bindings.txt for details.
diff --git a/Documentation/devicetree/bindings/ata/tegra-sata.txt b/Documentation/devicetree/bindings/ata/tegra-sata.txt
index 946f2072570b..66c83c3e8915 100644
--- a/Documentation/devicetree/bindings/ata/tegra-sata.txt
+++ b/Documentation/devicetree/bindings/ata/tegra-sata.txt
@@ -1,7 +1,9 @@
 Tegra124 SoC SATA AHCI controller
 
 Required properties :
-- compatible : "nvidia,tegra124-ahci".
+- compatible : For Tegra124, must contain "nvidia,tegra124-ahci".  Otherwise,
+  must contain '"nvidia,<chip>-ahci", "nvidia,tegra124-ahci"', where <chip>
+  is tegra132.
 - reg : Should contain 2 entries:
   - AHCI register set (SATA BAR5)
   - SATA register set
diff --git a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
index d8c98c7614d0..23e1d3194174 100644
--- a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
+++ b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
@@ -1,11 +1,11 @@
 NVIDIA Tegra20/Tegra30/Tegr114/Tegra124 fuse block.
 
 Required properties:
-- compatible : should be:
-	"nvidia,tegra20-efuse"
-	"nvidia,tegra30-efuse"
-	"nvidia,tegra114-efuse"
-	"nvidia,tegra124-efuse"
+- compatible : For Tegra20, must contain "nvidia,tegra20-efuse".  For Tegra30,
+  must contain "nvidia,tegra30-efuse".  For Tegra114, must contain
+  "nvidia,tegra114-efuse".  For Tegra124, must contain "nvidia,tegra124-efuse".
+  Otherwise, must contain "nvidia,<chip>-efuse", plus one of the above, where
+  <chip> is tegra132.
   Details:
   nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data
 	due to a hardware bug. Tegra20 also lacks certain information which is
diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
index 4c32ef0b7db8..009f4bfa1590 100644
--- a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
+++ b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
@@ -197,7 +197,9 @@ of the following host1x client modules:
 - sor: serial output resource
 
   Required properties:
-  - compatible: "nvidia,tegra124-sor"
+  - compatible: For Tegra124, must contain "nvidia,tegra124-sor".  Otherwise,
+    must contain '"nvidia,<chip>-sor", "nvidia,tegra124-sor"', where <chip>
+    is tegra132.
   - reg: Physical base address and length of the controller's registers.
   - interrupts: The interrupt outputs from the controller.
   - clocks: Must contain an entry for each entry in clock-names.
@@ -222,7 +224,9 @@ of the following host1x client modules:
   - nvidia,dpaux: phandle to a DispayPort AUX interface
 
 - dpaux: DisplayPort AUX interface
-  - compatible: "nvidia,tegra124-dpaux"
+  - compatible: For Tegra124, must contain "nvidia,tegra124-dpaux".  Otherwise,
+    must contain '"nvidia,<chip>-dpaux", "nvidia,tegra124-dpaux"', where
+    <chip> is tegra132.
   - reg: Physical base address and length of the controller's registers.
   - interrupts: The interrupt outputs from the controller.
   - clocks: Must contain an entry for each entry in clock-names.
diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
index 87507e9ce6db..656716b72cc4 100644
--- a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
+++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
@@ -1,11 +1,11 @@
 NVIDIA Tegra20/Tegra30/Tegra114 I2C controller driver.
 
 Required properties:
-- compatible : should be:
-	"nvidia,tegra114-i2c"
-	"nvidia,tegra30-i2c"
-	"nvidia,tegra20-i2c"
-	"nvidia,tegra20-i2c-dvc"
+- compatible : For Tegra20, must be one of "nvidia,tegra20-i2c-dvc" or
+  "nvidia,tegra20-i2c".  For Tegra30, must be "nvidia,tegra30-i2c".
+  For Tegra114, must be "nvidia,tegra114-i2c".  Otherwise, must be
+  "nvidia,<chip>-i2c", plus at least one of the above, where <chip> is
+  tegra124, tegra132, or tegra210.
   Details of compatible are as follows:
   nvidia,tegra20-i2c-dvc: Tegra20 has specific I2C controller called as DVC I2C
 	controller. This only support master mode of I2C communication. Register
diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt
index b97b8bef1fe5..47b205cc9cc7 100644
--- a/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt
+++ b/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt
@@ -1,11 +1,10 @@
 NVIDIA Tegra20/Tegra30/Tegr114/Tegra124 apbmisc block
 
 Required properties:
-- compatible : should be:
-       "nvidia,tegra20-apbmisc"
-       "nvidia,tegra30-apbmisc"
-       "nvidia,tegra114-apbmisc"
-       "nvidia,tegra124-apbmisc"
+- compatible : For Tegra20, must be "nvidia,tegra20-apbmisc".  For Tegra30,
+  must be "nvidia,tegra30-apbmisc".  Otherwise, must contain
+  "nvidia,<chip>-apbmisc", plus one of the above, where <chip> is tegra114,
+  tegra124, tegra132.
 - reg: Should contain 2 entries: the first entry gives the physical address
        and length of the registers which contain revision and debug features.
        The second entry gives the physical address and length of the
diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
index f357c16ea815..15b8368ee1f2 100644
--- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
@@ -7,7 +7,11 @@ This file documents differences between the core properties described
 by mmc.txt and the properties used by the sdhci-tegra driver.
 
 Required properties:
-- compatible : Should be "nvidia,<chip>-sdhci"
+- compatible : For Tegra20, must contain "nvidia,tegra20-sdhci".
+  For Tegra30, must contain "nvidia,tegra30-sdhci".  For Tegra114,
+  must contain "nvidia,tegra114-sdhci".  For Tegra124, must contain
+  "nvidia,tegra124-sdhci".  Otherwise, must contain "nvidia,<chip>-sdhci",
+  plus one of the above, where <chip> is tegra132 or tegra210.
 - clocks : Must contain one entry, for the module clock.
   See ../clocks/clock-bindings.txt for details.
 - resets : Must contain an entry for each entry in reset-names.
diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
index d763e047c6ae..75321ae23c08 100644
--- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
@@ -1,10 +1,10 @@
 NVIDIA Tegra PCIe controller
 
 Required properties:
-- compatible: Must be one of:
-  - "nvidia,tegra20-pcie"
-  - "nvidia,tegra30-pcie"
-  - "nvidia,tegra124-pcie"
+- compatible: For Tegra20, must contain "nvidia,tegra20-pcie".  For Tegra30,
+  "nvidia,tegra30-pcie".  For Tegra124, must contain "nvidia,tegra124-pcie".
+  Otherwise, must contain "nvidia,<chip>-pcie", plus one of the above, where
+  <chip> is tegra132 or tegra210.
 - device_type: Must be "pci"
 - reg: A list of physical base address and length for each set of controller
   registers. Must contain an entry for each entry in the reg-names property.
diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
index 189814e7cdc7..ecb5c0d25218 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
@@ -6,7 +6,8 @@ nvidia,tegra30-pinmux.txt. In fact, this document assumes that binding as
 a baseline, and only documents the differences between the two bindings.
 
 Required properties:
-- compatible: "nvidia,tegra124-pinmux"
+- compatible: For Tegra124, must contain "nvidia,tegra124-pinmux".  For
+  Tegra132, must contain '"nvidia,tegra132-pinmux", "nvidia-tegra124-pinmux"'.
 - reg: Should contain a list of base address and size pairs for:
     -- first entry - the drive strength and pad control registers.
     -- second entry - the pinmux registers
diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt
index 2f9c0bd66457..30676ded85bb 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt
@@ -13,7 +13,9 @@ how to describe and reference PHYs in device trees.
 
 Required properties:
 --------------------
-- compatible: should be "nvidia,tegra124-xusb-padctl"
+- compatible: For Tegra124, must contain "nvidia,tegra124-xusb-padctl".
+  Otherwise, must contain '"nvidia,<chip>-xusb-padctl",
+  "nvidia-tegra124-xusb-padctl"', where <chip> is tegra132 or tegra210.
 - reg: Physical base address and length of the controller's registers.
 - resets: Must contain an entry for each entry in reset-names.
   See ../reset/reset.txt for details.
diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
index c7ea9d4a988b..c52f03b5032f 100644
--- a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
@@ -1,9 +1,10 @@
 Tegra SoC PWFM controller
 
 Required properties:
-- compatible: should be one of:
-  - "nvidia,tegra20-pwm"
-  - "nvidia,tegra30-pwm"
+- compatible: For Tegra20, must contain "nvidia,tegra20-pwm".  For Tegra30,
+  must contain "nvidia,tegra30-pwm".  Otherwise, must contain
+  "nvidia,<chip>-pwm", plus one of the above, where <chip> is tegra114,
+  tegra124, tegra132, or tegra210.
 - reg: physical base address and length of the controller's registers
 - #pwm-cells: should be 2. See pwm.txt in this directory for a description of
   the cells format.
diff --git a/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt b/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt
index 652d1ff2e8be..b7d98ed3e098 100644
--- a/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt
+++ b/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt
@@ -6,7 +6,9 @@ state.
 
 Required properties:
 
-- compatible : should be "nvidia,tegra20-rtc".
+- compatible : For Tegra20, must contain "nvidia,tegra20-rtc".  Otherwise,
+  must contain '"nvidia,<chip>-rtc", "nvidia,tegra20-rtc"', where <chip>
+  can be tegra30, tegra114, tegra124, or tegra132.
 - reg : Specifies base physical address and size of the registers.
 - interrupts : A single interrupt specifier.
 - clocks : Must contain one entry, for the module clock.
diff --git a/Documentation/devicetree/bindings/serial/of-serial.txt b/Documentation/devicetree/bindings/serial/of-serial.txt
index b52b98234b9b..bea60ef6cdc5 100644
--- a/Documentation/devicetree/bindings/serial/of-serial.txt
+++ b/Documentation/devicetree/bindings/serial/of-serial.txt
@@ -8,7 +8,10 @@ Required properties:
 	- "ns16550"
 	- "ns16750"
 	- "ns16850"
-	- "nvidia,tegra20-uart"
+	- For Tegra20, must contain "nvidia,tegra20-uart"
+	- For other Tegra, must contain '"nvidia,<chip>-uart",
+	  "nvidia,tegra20-uart"' where <chip> is tegra30, tegra114, tegra124,
+	  tegra132, or tegra210.
 	- "nxp,lpc3220-uart"
 	- "ralink,rt2880-uart"
 	- "ibm,qpace-nwp-serial"
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
index 946e2ac46091..0e9a1895d7fb 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
@@ -1,7 +1,10 @@
 NVIDIA Tegra30 AHUB (Audio Hub)
 
 Required properties:
-- compatible : "nvidia,tegra30-ahub", "nvidia,tegra114-ahub", etc.
+- compatible : For Tegra30, must contain "nvidia,tegra30-ahub".  For Tegra114,
+  must contain "nvidia,tegra114-ahub".  For Tegra124, must contain
+  "nvidia,tegra124-ahub".  Otherwise, must contain "nvidia,<chip>-ahub",
+  plus at least one of the above, where <chip> is tegra132.
 - reg : Should contain the register physical address and length for each of
   the AHUB's register blocks.
   - Tegra30 requires 2 entries, for the APBIF and AHUB/AUDIO register blocks.
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt
index b4730c2822bc..13e2ef496724 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt
@@ -1,7 +1,9 @@
 NVIDIA Tegra30 HDA controller
 
 Required properties:
-- compatible : "nvidia,tegra30-hda"
+- compatible : For Tegra30, must contain "nvidia,tegra30-hda".  Otherwise,
+  must contain '"nvidia,<chip>-hda", "nvidia,tegra30-hda"', where <chip> is
+  tegra114, tegra124, or tegra132.
 - reg : Should contain the HDA registers location and length.
 - interrupts : The interrupt from the HDA controller.
 - clocks : Must contain an entry for each required entry in clock-names.
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt
index 0c113ffe3814..38caa936f6f8 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt
@@ -1,7 +1,10 @@
 NVIDIA Tegra30 I2S controller
 
 Required properties:
-- compatible : "nvidia,tegra30-i2s"
+- compatible : For Tegra30, must contain "nvidia,tegra30-i2s".  For Tegra124,
+  must contain "nvidia,tegra124-i2s".  Otherwise, must contain
+  "nvidia,<chip>-i2s" plus at least one of the above, where <chip> is
+  tegra114 or tegra132.
 - reg : Should contain I2S registers location and length
 - clocks : Must contain one entry, for the module clock.
   See ../clocks/clock-bindings.txt for details.
diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
index 7ea701e07dc2..b785976fe98a 100644
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
@@ -1,7 +1,9 @@
 NVIDIA Tegra114 SPI controller.
 
 Required properties:
-- compatible : should be "nvidia,tegra114-spi".
+- compatible : For Tegra114, must contain "nvidia,tegra114-spi".
+  Otherwise, must contain '"nvidia,<chip>-spi", "nvidia,tegra114-spi"' where
+  <chip> is tegra124, tegra132, or tegra210.
 - reg: Should contain SPI registers location and length.
 - interrupts: Should contain SPI interrupts.
 - clock-names : Must include the following entries:
diff --git a/Documentation/devicetree/bindings/thermal/tegra-soctherm.txt b/Documentation/devicetree/bindings/thermal/tegra-soctherm.txt
index ecf3ed76cd46..6b68cd150405 100644
--- a/Documentation/devicetree/bindings/thermal/tegra-soctherm.txt
+++ b/Documentation/devicetree/bindings/thermal/tegra-soctherm.txt
@@ -7,7 +7,9 @@ notifications. It is also used to manage emergency shutdown in an
 overheating situation.
 
 Required properties :
-- compatible : "nvidia,tegra124-soctherm".
+- compatible : For Tegra124, must contain "nvidia,tegra124-soctherm".
+  For Tegra132, must contain "nvidia,tegra132-soctherm".
+  For Tegra210, must contain "nvidia,tegra210-soctherm".
 - reg : Should contain 1 entry:
   - SOCTHERM register set
 - interrupts : Defines the interrupt used by SOCTHERM
diff --git a/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt b/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt
index b5082a1cf461..1761f53ee36f 100644
--- a/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt
+++ b/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt
@@ -6,7 +6,9 @@ trigger a legacy watchdog reset.
 
 Required properties:
 
-- compatible : should be "nvidia,tegra30-timer", "nvidia,tegra20-timer".
+- compatible : For Tegra30, must contain "nvidia,tegra30-timer".  Otherwise,
+  must contain '"nvidia,<chip>-timer", "nvidia,tegra30-timer"' where
+  <chip> is tegra124 or tegra132.
 - reg : Specifies base physical address and size of the registers.
 - interrupts : A list of 6 interrupts; one per each of timer channels 1
     through 5, and one for the shared interrupt for the remaining channels.
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
index 3dc9140e3dfb..f60785f73d3d 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
@@ -6,7 +6,10 @@ Practice : Universal Serial Bus" with the following modifications
 and additions :
 
 Required properties :
- - compatible : Should be "nvidia,tegra20-ehci".
+ - compatible : For Tegra20, must contain "nvidia,tegra20-ehci".
+   For Tegra30, must contain "nvidia,tegra30-ehci".  Otherwise, must contain
+   "nvidia,<chip>-ehci" plus at least one of the above, where <chip> is
+   tegra114, tegra124, tegra132, or tegra210.
  - nvidia,phy : phandle of the PHY that the controller is connected to.
  - clocks : Must contain one entry, for the module clock.
    See ../clocks/clock-bindings.txt for details.
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
index c9205fbf26e2..a9aa79fb90ed 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
@@ -3,7 +3,10 @@ Tegra SOC USB PHY
 The device node for Tegra SOC USB PHY:
 
 Required properties :
- - compatible : Should be "nvidia,tegra<chip>-usb-phy".
+ - compatible : For Tegra20, must contain "nvidia,tegra20-usb-phy".
+   For Tegra30, must contain "nvidia,tegra30-usb-phy".  Otherwise, must contain
+   "nvidia,<chip>-usb-phy" plus at least one of the above, where <chip> is
+   tegra114, tegra124, tegra132, or tegra210.
  - reg : Defines the following set of registers, in the order listed:
    - The PHY's own register set.
      Always present.
-- 
2.1.4

Re: [PATCH 02/24] Documentation: DT bindings: add more chip compatible strings for Tegra PCIe

[Paul Walmsley]

Hi Rob

I've also updated the first patch, that tries to document what the DT 
maintainers' expectations are.  Care to give this one a quick glance too?


- Paul

From: Paul Walmsley <pwalmsley@nvidia.com>
Date: Wed, 28 Jan 2015 16:43:16 -0700
Subject: [PATCH] Documentation: DT: document compatible string existence
 requirement

DT maintainers require all compatible strings used in chip or board
DTS file to be previously documented somewhere in
Documentation/devicetree/bindings, per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Document this requirement in the DT patch submission requirements
text file.

This second version updates the documentation to align with
Rob's comments here:

http://marc.info/?l=devicetree&m=142255654213019&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../devicetree/bindings/submitting-patches.txt     | 23 ++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/Documentation/devicetree/bindings/submitting-patches.txt b/Documentation/devicetree/bindings/submitting-patches.txt
index b7ba01ad1426..56742bc70218 100644
--- a/Documentation/devicetree/bindings/submitting-patches.txt
+++ b/Documentation/devicetree/bindings/submitting-patches.txt
@@ -15,6 +15,29 @@ I. For patch submitters
   3) The Documentation/ portion of the patch should come in the series before
      the code implementing the binding.
 
+  4) Any compatible strings used in a chip or board DTS file must be
+     previously documented in the corresponding DT binding text file
+     in Documentation/devicetree/bindings.  This rule applies even if
+     the Linux device driver does not yet match on the compatible
+     string.  [ checkpatch will emit warnings if this step is not
+     followed as of commit bff5da4335256513497cc8c79f9a9d1665e09864
+     ("checkpatch: add DT compatible string documentation checks"). ]
+
+  5) The wildcard "<chip>" may be used in compatible strings, as in
+     the following example:
+
+         - compatible: Must contain '"nvidia,<chip>-pcie",
+           "nvidia,tegra20-pcie"' where <chip> is tegra30, tegra132, ...
+
+     As in the above example, the known values of "<chip>" should be
+     documented if it is used.
+
+  6) If a documented compatible string is not yet matched by the
+     driver, the documentation should also include a compatible
+     string that is matched by the driver (as in the "nvidia,tegra20-pcie"
+     example above).
+
+
 II. For kernel maintainers
 
   1) If you aren't comfortable reviewing a given binding, reply to it and ask
-- 
2.1.4

[PATCH 07/24] Documentation: DT bindings: add more chip compatible strings for Tegra124 pinmux

[Paul Walmsley]

Add a Tegra132 compatible string to the pinmux IP blocks present on
chips similar to Tegra124.  The primary objective here is to avoid
checkpatch warnings, per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Sean Paul <seanpaul@chromium.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../bindings/pinctrl/nvidia,tegra124-pinmux.txt    |    1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
index 189814e7cdc7..4eb7163a2eb8 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
@@ -7,6 +7,7 @@ a baseline, and only documents the differences between the two bindings.
 
 Required properties:
 - compatible: "nvidia,tegra124-pinmux"
+  "nvidia,tegra132-pinmux" (not yet matched in the driver)
 - reg: Should contain a list of base address and size pairs for:
     -- first entry - the drive strength and pad control registers.
     -- second entry - the pinmux registers

[PATCH 01/24] Documentation: DT: document compatible string existence requirement

[Paul Walmsley]

DT maintainers require all compatible strings used in chip or board
DTS file to be previously documented somewhere in
Documentation/devicetree/bindings, per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Document this requirement in the DT patch submission requirements
text file.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../devicetree/bindings/submitting-patches.txt     |    8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/submitting-patches.txt b/Documentation/devicetree/bindings/submitting-patches.txt
index b7ba01ad1426..4b2bbb6047c4 100644
--- a/Documentation/devicetree/bindings/submitting-patches.txt
+++ b/Documentation/devicetree/bindings/submitting-patches.txt
@@ -15,6 +15,14 @@ I. For patch submitters
   3) The Documentation/ portion of the patch should come in the series before
      the code implementing the binding.
 
+  4) Any compatible strings used in a chip or board DTS file must be
+     previously documented in the corresponding DT binding text file
+     in Documentation/devicetree/bindings.  This rule applies even if
+     the Linux device driver does not yet match on the compatible
+     string.  checkpatch will emit warnings if this step is not
+     followed as of commit bff5da4335256513497cc8c79f9a9d1665e09864
+     ("checkpatch: add DT compatible string documentation checks").
+
 II. For kernel maintainers
 
   1) If you aren't comfortable reviewing a given binding, reply to it and ask

Re: [PATCH 01/24] Documentation: DT: document compatible string existence requirement

[Javier Martinez Canillas]

Hello Paul,

On 01/29/2015 12:49 AM, Paul Walmsley wrote:
> 
> DT maintainers require all compatible strings used in chip or board
> DTS file to be previously documented somewhere in
> Documentation/devicetree/bindings, per:
> 
> http://marc.info/?l=linux-tegra&m=142201349727836&w=2
>

I would had preferred if checkpatch.pl didn't warn about the most specific
variants of the IP blocks tbh.

Since afaiu those were only added to the compatible string as a way to make
it future proof in case there is going to be needed later. So in that sense
I thought they were not part of the DT ABI.

Now, dumping the unused specific strings in binding docs only to make
checkpatch happy, will have the effect of making those unused strings become
part of the DT ABI. Which mean that couldn't be dropped later if those are
found to not be needed since there won't be a way to know if an OS following
the DT binding will be matching those or not.

But since the decision is to warn for all strings in a compatible property
even if those are not used, I agree with you that it should be documented.

Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>

Best regards,
Javier

Re: [PATCH 01/24] Documentation: DT: document compatible string existence requirement

[Paul Walmsley]

Hello Javier,

On 01/29/2015 09:43 AM, Javier Martinez Canillas wrote:
> Hello Paul,
>
> On 01/29/2015 12:49 AM, Paul Walmsley wrote:
>> DT maintainers require all compatible strings used in chip or board
>> DTS file to be previously documented somewhere in
>> Documentation/devicetree/bindings, per:
>>
>> http://marc.info/?l=linux-tegra&m=142201349727836&w=2
>>
> I would had preferred if checkpatch.pl didn't warn about the most specific
> variants of the IP blocks tbh.
>
> Since afaiu those were only added to the compatible string as a way to make
> it future proof in case there is going to be needed later. So in that sense
> I thought they were not part of the DT ABI.
>
> Now, dumping the unused specific strings in binding docs only to make
> checkpatch happy, will have the effect of making those unused strings become
> part of the DT ABI. Which mean that couldn't be dropped later if those are
> found to not be needed since there won't be a way to know if an OS following
> the DT binding will be matching those or not.
>
> But since the decision is to warn for all strings in a compatible property
> even if those are not used, I agree with you that it should be documented.
>
> Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>

Thanks for the review.

For what it's worth, I agree with almost everything you wrote.

- Paul

Re: [PATCH 01/24] Documentation: DT: document compatible string existence requirement

[Rob Herring]

On Thu, Jan 29, 2015 at 10:43 AM, Javier Martinez Canillas
<javier.martinez@collabora.co.uk> wrote:
> Hello Paul,
>
> On 01/29/2015 12:49 AM, Paul Walmsley wrote:
>>
>> DT maintainers require all compatible strings used in chip or board
>> DTS file to be previously documented somewhere in
>> Documentation/devicetree/bindings, per:
>>
>> http://marc.info/?l=linux-tegra&m=142201349727836&w=2
>>
>
> I would had preferred if checkpatch.pl didn't warn about the most specific
> variants of the IP blocks tbh.

Patches welcome.

It would be hard because in cases where there are generic strings, we
always need to have a specific one.

> Since afaiu those were only added to the compatible string as a way to make
> it future proof in case there is going to be needed later. So in that sense
> I thought they were not part of the DT ABI.
>
> Now, dumping the unused specific strings in binding docs only to make
> checkpatch happy, will have the effect of making those unused strings become
> part of the DT ABI. Which mean that couldn't be dropped later if those are
> found to not be needed since there won't be a way to know if an OS following
> the DT binding will be matching those or not.

If they are in the DTS, then they are effectively already part of the ABI.

You have some wiggle room if they are known not to be used whether
they are documented or not. You can never prove they are not needed in
the future to be able to drop them.

Rob

[PATCH 11/24] Documentation: DT bindings: add more chip compatible strings for Tegra SPI

[Paul Walmsley]

Add compatible strings for the SPI IP blocks present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../bindings/spi/nvidia,tegra114-spi.txt           |    5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
index 7ea701e07dc2..63b6d748f1cb 100644
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
@@ -1,7 +1,10 @@
 NVIDIA Tegra114 SPI controller.
 
 Required properties:
-- compatible : should be "nvidia,tegra114-spi".
+- compatible : "nvidia,tegra114-spi"
+  "nvidia,tegra124-spi" (not yet matched by the driver)
+  "nvidia,tegra132-spi" (not yet matched by the driver)
+  "nvidia,tegra210-spi" (not yet matched by the driver)
 - reg: Should contain SPI registers location and length.
 - interrupts: Should contain SPI interrupts.
 - clock-names : Must include the following entries:

[PATCH 09/24] Documentation: DT bindings: add more chip compatible strings for Tegra PWM

[Paul Walmsley]

Add compatible strings for the PWM IP blocks present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: linux-pwm@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../devicetree/bindings/pwm/nvidia,tegra20-pwm.txt |    4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
index c7ea9d4a988b..f3390f602378 100644
--- a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
@@ -4,6 +4,10 @@ Required properties:
 - compatible: should be one of:
   - "nvidia,tegra20-pwm"
   - "nvidia,tegra30-pwm"
+  - "nvidia,tegra114-pwm" (not yet matched by the driver)
+  - "nvidia,tegra124-pwm" (not yet matched by the driver)
+  - "nvidia,tegra132-pwm" (not yet matched by the driver)
+  - "nvidia,tegra210-pwm" (not yet matched by the driver)
 - reg: physical base address and length of the controller's registers
 - #pwm-cells: should be 2. See pwm.txt in this directory for a description of
   the cells format.

[PATCH 04/24] Documentation: DT bindings: add more chip compatible strings for Tegra timers

[Paul Walmsley]

Add compatible strings for the timer IP blocks present on several
Tegra chips.  The primary objective here is to avoid checkpatch
warnings, per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

N.B. The nvidia,tegra20-timer compatible string is removed from the
nvidia,tegra30-timer.txt documentation file because it's already
mentioned in the nvidia,tegra20-timer.txt documentation file.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../bindings/timer/nvidia,tegra30-timer.txt        |    4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt b/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt
index b5082a1cf461..bbf38d26605b 100644
--- a/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt
+++ b/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt
@@ -6,7 +6,9 @@ trigger a legacy watchdog reset.
 
 Required properties:
 
-- compatible : should be "nvidia,tegra30-timer", "nvidia,tegra20-timer".
+- compatible : "nvidia,tegra30-timer"
+  "nvidia,tegra124-timer" (not yet matched in the driver)
+  "nvidia,tegra132-timer" (not yet matched in the driver)
 - reg : Specifies base physical address and size of the registers.
 - interrupts : A list of 6 interrupts; one per each of timer channels 1
     through 5, and one for the shared interrupt for the remaining channels.

[PATCH 05/24] Documentation: DT bindings: add more chip compatible strings for Tegra AHB gizmo

[Paul Walmsley]

Add compatible strings for the AHB "gizmo" IP block present on several
Tegra chips.  The primary objective here is to avoid checkpatch
warnings, per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../bindings/arm/tegra/nvidia,tegra20-ahb.txt      |    6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt
index 234406d41c12..fef3a9ecb798 100644
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt
@@ -1,7 +1,11 @@
 NVIDIA Tegra AHB
 
 Required properties:
-- compatible : "nvidia,tegra20-ahb" or "nvidia,tegra30-ahb"
+- compatible : "nvidia,tegra20-ahb"
+  "nvidia,tegra30-ahb"
+  "nvidia,tegra124-ahb" (not yet matched by the driver)
+  "nvidia,tegra132-ahb" (not yet matched by the driver)
+  "nvidia,tegra210-ahb" (not yet matched by the driver)
 - reg : Should contain 1 register ranges(address and length)
 
 Example:

[PATCH 06/24] Documentation: DT bindings: add more chip compatible strings for Tegra APB_MISC

[Paul Walmsley]

Add compatible strings for the APB_MISC IP blocks present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../bindings/misc/nvidia,tegra20-apbmisc.txt       |    7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt
index b97b8bef1fe5..2723f3e4e52d 100644
--- a/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt
+++ b/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt
@@ -3,9 +3,10 @@ NVIDIA Tegra20/Tegra30/Tegr114/Tegra124 apbmisc block
 Required properties:
 - compatible : should be:
        "nvidia,tegra20-apbmisc"
-       "nvidia,tegra30-apbmisc"
-       "nvidia,tegra114-apbmisc"
-       "nvidia,tegra124-apbmisc"
+       "nvidia,tegra30-apbmisc" (not yet matched in the driver)
+       "nvidia,tegra114-apbmisc" (not yet matched in the driver)
+       "nvidia,tegra124-apbmisc" (not yet matched in the driver)
+       "nvidia,tegra132-apbmisc" (not yet matched in the driver)
 - reg: Should contain 2 entries: the first entry gives the physical address
        and length of the registers which contain revision and debug features.
        The second entry gives the physical address and length of the

[PATCH 03/24] Documentation: DT bindings: add more chip compatible strings for Tegra SOR

[Paul Walmsley]

Add compatible strings for the SOR IP blocks present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: "Terje Bergström" <tbergstrom@nvidia.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: dri-devel@lists.freedesktop.org
Cc: linux-tegra@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../bindings/gpu/nvidia,tegra20-host1x.txt         |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
index 4c32ef0b7db8..0e828c00e7e4 100644
--- a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
+++ b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
@@ -198,6 +198,7 @@ of the following host1x client modules:
 
   Required properties:
   - compatible: "nvidia,tegra124-sor"
+    "nvidia,tegra132-sor" (not yet matched in the driver)
   - reg: Physical base address and length of the controller's registers.
   - interrupts: The interrupt outputs from the controller.
   - clocks: Must contain an entry for each entry in clock-names.
@@ -223,6 +224,7 @@ of the following host1x client modules:
 
 - dpaux: DisplayPort AUX interface
   - compatible: "nvidia,tegra124-dpaux"
+    "nvidia,tegra132-dpaux" (not yet matched in the driver)
   - reg: Physical base address and length of the controller's registers.
   - interrupts: The interrupt outputs from the controller.
   - clocks: Must contain an entry for each entry in clock-names.

[PATCH 17/24] Documentation: DT bindings: add more chip compatible strings for Tegra XUSB pad control

[Paul Walmsley]

Add compatible strings for the XUSB pad control IP blocks present on
several Tegra chips.  The primary objective here is to avoid
checkpatch warnings, per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../pinctrl/nvidia,tegra124-xusb-padctl.txt        |    4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt
index 2f9c0bd66457..3c75716aa341 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt
@@ -13,7 +13,9 @@ how to describe and reference PHYs in device trees.
 
 Required properties:
 --------------------
-- compatible: should be "nvidia,tegra124-xusb-padctl"
+- compatible: "nvidia,tegra124-xusb-padctl",
+  "nvidia,tegra132-xusb-padctl" (not yet matched by the driver)
+  "nvidia,tegra210-xusb-padctl" (not yet matched by the driver)
 - reg: Physical base address and length of the controller's registers.
 - resets: Must contain an entry for each entry in reset-names.
   See ../reset/reset.txt for details.

[PATCH 14/24] Documentation: DT bindings: add more chip compatible strings for Tegra eFuse

[Paul Walmsley]

Add compatible strings for the eFuse IP blocks present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../bindings/fuse/nvidia,tegra20-fuse.txt          |    1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
index d8c98c7614d0..c602216826af 100644
--- a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
+++ b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
@@ -6,6 +6,7 @@ Required properties:
 	"nvidia,tegra30-efuse"
 	"nvidia,tegra114-efuse"
 	"nvidia,tegra124-efuse"
+	"nvidia,tegra132-efuse" (not yet matched by the driver)
   Details:
   nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data
 	due to a hardware bug. Tegra20 also lacks certain information which is

[PATCH 18/24] Documentation: DT bindings: add more chip compatible strings for Tegra SDHCI

[Paul Walmsley]

Add compatible strings for the SDHCI IP blocks present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../bindings/mmc/nvidia,tegra20-sdhci.txt          |    7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
index f357c16ea815..877e5883ff14 100644
--- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
@@ -7,7 +7,12 @@ This file documents differences between the core properties described
 by mmc.txt and the properties used by the sdhci-tegra driver.
 
 Required properties:
-- compatible : Should be "nvidia,<chip>-sdhci"
+- compatible : "nvidia,tegra20-sdhci"
+  "nvidia,tegra30-sdhci"
+  "nvidia,tegra114-sdhci"
+  "nvidia,tegra124-sdhci"
+  "nvidia,tegra132-sdhci" (not yet matched by the driver)
+  "nvidia,tegra210-sdhci" (not yet matched by the driver)
 - clocks : Must contain one entry, for the module clock.
   See ../clocks/clock-bindings.txt for details.
 - resets : Must contain an entry for each entry in reset-names.

[PATCH 13/24] Documentation: DT bindings: add more chip compatible strings for Tegra PMC

[Paul Walmsley]

Add compatible strings for the PMC IP block present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../bindings/arm/tegra/nvidia,tegra20-pmc.txt      |    6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
index 68ac65f82a1c..84bb31e7b778 100644
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
@@ -6,7 +6,11 @@ modes. It provides power-gating controllers for SoC and CPU power-islands.
 
 Required properties:
 - name : Should be pmc
-- compatible : Should contain "nvidia,tegra<chip>-pmc".
+- compatible : "nvidia,tegra20-pmc"
+  "nvidia,tegra30-pmc"
+  "nvidia,tegra114-pmc"
+  "nvidia,tegra124-pmc"
+  "nvidia,tegra132-pmc" (not yet matched by the driver)
 - reg : Offset and length of the register set for the device
 - clocks : Must contain an entry for each entry in clock-names.
   See ../clocks/clock-bindings.txt for details.

[PATCH 21/24] Documentation: DT bindings: add more chip compatible strings for Tegra I2S

[Paul Walmsley]

Add compatible strings for the I2S IP blocks present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../bindings/sound/nvidia,tegra30-i2s.txt          |    5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt
index 0c113ffe3814..f46566a09eeb 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt
@@ -1,7 +1,10 @@
 NVIDIA Tegra30 I2S controller
 
 Required properties:
-- compatible : "nvidia,tegra30-i2s"
+- compatible : "nvidia,tegra30-i2s",
+  "nvidia,tegra114-i2s" (not yet matched by driver)
+  "nvidia,tegra124-i2s"
+  "nvidia,tegra132-i2s" (not yet matched by driver)
 - reg : Should contain I2S registers location and length
 - clocks : Must contain one entry, for the module clock.
   See ../clocks/clock-bindings.txt for details.

[PATCH 22/24] Documentation: DT bindings: add more chip compatible strings for Tegra EHCI

[Paul Walmsley]

Add compatible strings for the EHCI IP blocks present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../bindings/usb/nvidia,tegra20-ehci.txt           |    7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
index 3dc9140e3dfb..5c95962d350a 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
@@ -6,7 +6,12 @@ Practice : Universal Serial Bus" with the following modifications
 and additions :
 
 Required properties :
- - compatible : Should be "nvidia,tegra20-ehci".
+ - compatible : "nvidia,tegra20-ehci"
+   "nvidia,tegra30-ehci"
+   "nvidia,tegra114-ehci" (not yet matched by the driver)
+   "nvidia,tegra124-ehci" (not yet matched by the driver)
+   "nvidia,tegra132-ehci" (not yet matched by the driver)
+   "nvidia,tegra210-ehci" (not yet matched by the driver)
  - nvidia,phy : phandle of the PHY that the controller is connected to.
  - clocks : Must contain one entry, for the module clock.
    See ../clocks/clock-bindings.txt for details.

[PATCH 23/24] Documentation: DT bindings: add more chip compatible strings for Tegra USB PHY

[Paul Walmsley]

Add compatible strings for the USB PHY IP blocks present on several
Tegra chips.  The primary objective here is to avoid checkpatch
warnings, per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../bindings/usb/nvidia,tegra20-usb-phy.txt        |    7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
index c9205fbf26e2..11a33346c409 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
@@ -3,7 +3,12 @@ Tegra SOC USB PHY
 The device node for Tegra SOC USB PHY:
 
 Required properties :
- - compatible : Should be "nvidia,tegra<chip>-usb-phy".
+ - compatible : "nvidia,tegra20-usb-phy"
+   "nvidia,tegra30-usb-phy"
+   "nvidia,tegra114-usb-phy" (not yet matched by the driver)
+   "nvidia,tegra124-usb-phy" (not yet matched by the driver)
+   "nvidia,tegra132-usb-phy" (not yet matched by the driver)
+   "nvidia,tegra210-usb-phy" (not yet matched by the driver)
  - reg : Defines the following set of registers, in the order listed:
    - The PHY's own register set.
      Always present.

[PATCH 12/24] Documentation: DT bindings: add more chip compatible strings for Tegra RTC

[Paul Walmsley]

Add compatible strings for the RTC IP blocks present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../devicetree/bindings/rtc/nvidia,tegra20-rtc.txt |    4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt b/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt
index 652d1ff2e8be..b6d27e17b5e4 100644
--- a/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt
+++ b/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt
@@ -6,7 +6,9 @@ state.
 
 Required properties:
 
-- compatible : should be "nvidia,tegra20-rtc".
+- compatible : "nvidia,tegra20-rtc"
+  "nvidia,tegra124-rtc" (not yet matched by the driver)
+  "nvidia,tegra132-rtc" (not yet matched by the driver)
 - reg : Specifies base physical address and size of the registers.
 - interrupts : A single interrupt specifier.
 - clocks : Must contain one entry, for the module clock.

[PATCH 20/24] Documentation: DT bindings: add more chip compatible strings for Tegra AHUB

[Paul Walmsley]

Add compatible strings for the AHUB IP blocks present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../bindings/sound/nvidia,tegra30-ahub.txt         |    4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
index 946e2ac46091..2d93e719e4d6 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
@@ -1,7 +1,9 @@
 NVIDIA Tegra30 AHUB (Audio Hub)
 
 Required properties:
-- compatible : "nvidia,tegra30-ahub", "nvidia,tegra114-ahub", etc.
+- compatible : "nvidia,tegra30-ahub", "nvidia,tegra114-ahub",
+  "nvidia,tegra124-ahub"
+  "nvidia,tegra132-ahub" (not yet matched by the driver)
 - reg : Should contain the register physical address and length for each of
   the AHUB's register blocks.
   - Tegra30 requires 2 entries, for the APBIF and AHUB/AUDIO register blocks.

[PATCH 15/24] Documentation: DT bindings: add more chip compatible strings for Tegra AHCI

[Paul Walmsley]

Add compatible strings for the AHCI IP blocks present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Tejun Heo <tj@kernel.org>
Cc: Mikko Perttunen <mperttunen@nvidia.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../devicetree/bindings/ata/tegra-sata.txt         |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/ata/tegra-sata.txt b/Documentation/devicetree/bindings/ata/tegra-sata.txt
index 946f2072570b..2c44860d075e 100644
--- a/Documentation/devicetree/bindings/ata/tegra-sata.txt
+++ b/Documentation/devicetree/bindings/ata/tegra-sata.txt
@@ -1,7 +1,8 @@
 Tegra124 SoC SATA AHCI controller
 
 Required properties :
-- compatible : "nvidia,tegra124-ahci".
+- compatible : "nvidia,tegra124-ahci",
+  "nvidia,tegra132-ahci" (not yet matched by the driver)
 - reg : Should contain 2 entries:
   - AHCI register set (SATA BAR5)
   - SATA register set

[PATCH 16/24] Documentation: DT bindings: add more chip compatible strings for Tegra HDA

[Paul Walmsley]

Add compatible strings for the HDA IP blocks present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Takashi Iwai <tiwai@suse.de>
Cc: Dylan Reid <dgreid@chromium.org>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../bindings/sound/nvidia,tegra30-hda.txt          |    5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt
index b4730c2822bc..a114ca135d03 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt
@@ -1,7 +1,10 @@
 NVIDIA Tegra30 HDA controller
 
 Required properties:
-- compatible : "nvidia,tegra30-hda"
+- compatible : "nvidia,tegra30-hda",
+  "nvidia,tegra114-hda" (not yet matched by the driver)
+  "nvidia,tegra124-hda" (not yet matched by the driver)
+  "nvidia,tegra132-hda" (not yet matched by the driver)
 - reg : Should contain the HDA registers location and length.
 - interrupts : The interrupt from the HDA controller.
 - clocks : Must contain an entry for each required entry in clock-names.

[PATCH 19/24] Documentation: DT bindings: add more chip compatible strings for Tegra SOC_THERM

[Paul Walmsley]

Add compatible strings for the SOC_THERM IP block present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: linux-pm@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../devicetree/bindings/thermal/tegra-soctherm.txt |    4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/thermal/tegra-soctherm.txt b/Documentation/devicetree/bindings/thermal/tegra-soctherm.txt
index ecf3ed76cd46..9113f3bcd6df 100644
--- a/Documentation/devicetree/bindings/thermal/tegra-soctherm.txt
+++ b/Documentation/devicetree/bindings/thermal/tegra-soctherm.txt
@@ -7,7 +7,9 @@ notifications. It is also used to manage emergency shutdown in an
 overheating situation.
 
 Required properties :
-- compatible : "nvidia,tegra124-soctherm".
+- compatible : "nvidia,tegra124-soctherm",
+  "nvidia,tegra132-soctherm" (not yet matched by the driver)
+  "nvidia,tegra210-soctherm" (not yet matched by the driver)
 - reg : Should contain 1 entry:
   - SOCTHERM register set
 - interrupts : Defines the interrupt used by SOCTHERM

[PATCH 24/24] Documentation: DT bindings: add nvidia, denver compatible string

[Paul Walmsley]

Add a compatible string for the NVIDIA Denver CPU to the ARM CPU DT
binding documentation file.  The primary objective here is to keep
checkpatch.pl from warning when the compatible string is used in an
SoC DT file, per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2


Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Rohit Vaswani <rvaswani@codeaurora.org>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: Marc Carino <marc.ceeeee@gmail.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
---
 Documentation/devicetree/bindings/arm/cpus.txt |    1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index b2aacbe16ed9..4ea31f0b7764 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -175,6 +175,7 @@ nodes to be present and contain the properties described below.
 			    "marvell,pj4a"
 			    "marvell,pj4b"
 			    "marvell,sheeva-v5"
+			    "nvidia,denver" (not yet matched in the code)
 			    "qcom,krait"
 			    "qcom,scorpion"
 	- enable-method

Re: [PATCH 24/24] Documentation: DT bindings: add nvidia, denver compatible string

[Rob Herring]

On Wed, Jan 28, 2015 at 5:49 PM, Paul Walmsley <paul@pwsan.com> wrote:
>
> Add a compatible string for the NVIDIA Denver CPU to the ARM CPU DT
> binding documentation file.  The primary objective here is to keep
> checkpatch.pl from warning when the compatible string is used in an
> SoC DT file, per:
>
> http://marc.info/?l=linux-tegra&m=142201349727836&w=2
>
>
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Pawel Moll <pawel.moll@arm.com>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
> Cc: Kumar Gala <galak@codeaurora.org>
> Cc: Heiko Stuebner <heiko@sntech.de>
> Cc: Arnd Bergmann <arnd@arndb.de>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Olof Johansson <olof@lixom.net>
> Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
> Cc: Rohit Vaswani <rvaswani@codeaurora.org>
> Cc: Paul Walmsley <pwalmsley@nvidia.com>
> Cc: Marc Carino <marc.ceeeee@gmail.com>
> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: devicetree@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-arm-kernel@lists.infradead.org
> ---
>  Documentation/devicetree/bindings/arm/cpus.txt |    1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
> index b2aacbe16ed9..4ea31f0b7764 100644
> --- a/Documentation/devicetree/bindings/arm/cpus.txt
> +++ b/Documentation/devicetree/bindings/arm/cpus.txt
> @@ -175,6 +175,7 @@ nodes to be present and contain the properties described below.
>                             "marvell,pj4a"
>                             "marvell,pj4b"
>                             "marvell,sheeva-v5"
> +                           "nvidia,denver" (not yet matched in the code)

There's not variations or versions of Denver cores or plans to change
from the codename?

Rob

Re: [PATCH 24/24] Documentation: DT bindings: add nvidia, denver compatible string

[Paul Walmsley]

Hi Rob

On Thu, 29 Jan 2015, Rob Herring wrote:

> On Wed, Jan 28, 2015 at 5:49 PM, Paul Walmsley <paul@pwsan.com> wrote:
> >
> > Add a compatible string for the NVIDIA Denver CPU to the ARM CPU DT
> > binding documentation file.  The primary objective here is to keep
> > checkpatch.pl from warning when the compatible string is used in an
> > SoC DT file, per:
> >
> > http://marc.info/?l=linux-tegra&m=142201349727836&w=2
> >
> >
> > Signed-off-by: Paul Walmsley <paul@pwsan.com>
> > Cc: Rob Herring <robh+dt@kernel.org>
> > Cc: Pawel Moll <pawel.moll@arm.com>
> > Cc: Mark Rutland <mark.rutland@arm.com>
> > Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
> > Cc: Kumar Gala <galak@codeaurora.org>
> > Cc: Heiko Stuebner <heiko@sntech.de>
> > Cc: Arnd Bergmann <arnd@arndb.de>
> > Cc: Catalin Marinas <catalin.marinas@arm.com>
> > Cc: Olof Johansson <olof@lixom.net>
> > Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
> > Cc: Rohit Vaswani <rvaswani@codeaurora.org>
> > Cc: Paul Walmsley <pwalmsley@nvidia.com>
> > Cc: Marc Carino <marc.ceeeee@gmail.com>
> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: devicetree@vger.kernel.org
> > Cc: linux-kernel@vger.kernel.org
> > Cc: linux-arm-kernel@lists.infradead.org
> > ---
> >  Documentation/devicetree/bindings/arm/cpus.txt |    1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
> > index b2aacbe16ed9..4ea31f0b7764 100644
> > --- a/Documentation/devicetree/bindings/arm/cpus.txt
> > +++ b/Documentation/devicetree/bindings/arm/cpus.txt
> > @@ -175,6 +175,7 @@ nodes to be present and contain the properties described below.
> >                             "marvell,pj4a"
> >                             "marvell,pj4b"
> >                             "marvell,sheeva-v5"
> > +                           "nvidia,denver" (not yet matched in the code)
> 
> There's not variations or versions of Denver cores or plans to change
> from the codename?

Hard to say what the future will bring.  I'll change it to 
"nvidia,tegra132-denver".


- Paul