[PATCH v2 0/4] ARM: v7-A !MMU support, prepare CONFIG_VECTORS_BASE removal

[PATCH v2 0/4] ARM: v7-A !MMU support, prepare CONFIG_VECTORS_BASE removal

[afzal mohammed]

Hi,

ARM core changes to support !MMU Kernel on v7-A MMU processors. This
series also does the preparation for CONFIG_VECTORS_BASE removal.

Based on the feedback from Russell, it was decided to handle vector
base dynamically in C for no-MMU & work towards the the goal of
removing VECTORS_BASE from Kconfig. MMU platform's always have
exception base address at 0xffff0000, hence a macro was defined and
it was decoupled from Kconfig. No-MMU CP15 scenario is handled
dynamically in C. Once vector region setup, used by Cortex-R, is
made devoid of VECTORS_BASE, it can be removed from Kconfig.

This series has been verified over current mainline plus [2] on
Vybrid Cosmic+, Cortex-M4 - !MMU Kernel and Cortex-A5 - MMU Kernel.

This series also has been verified over Vladimir's series plus [2] on
1. Vybrid Cosmic+
 a. Cortex-M4 !MMU Kernel
 b. Cortex-A5 MMU Kernel
 c. Cortex-A5 !MMU Kernel
2. AM437x IDK
 a. Cortex-A9 MMU Kernel
 b. Cortex-A9 !MMU Kernel

Regards
afzal


v2:
=> Fix bisectability issue on !MMU builds
=> UL suffix on VECTORS_BASE definition
=> Use existing helpers to detect security extensions
=> Rewrite a CPP step to C for readability

[1] "[RFC v2 PATCH 00/23] Allow NOMMU for MULTIPLATFORM",
    http://lists.infradead.org/pipermail/linux-arm-kernel/2016-November/470966.html
    (git://linux-arm.org/linux-vm.git nommu-rfc-v2)

[2] "[PATCH 1/2] ARM: nommu: allow enabling REMAP_VECTORS_TO_RAM"
    http://lists.infradead.org/pipermail/linux-arm-kernel/2016-December/473593.html
    (in -next)

afzal mohammed (4):
  ARM: mmu: decouple VECTORS_BASE from Kconfig
  ARM: nommu: dynamic exception base address setting
  ARM: nommu: display vectors base
  ARM: nommu: remove Hivecs configuration is asm

 arch/arm/include/asm/memory.h  |  2 ++
 arch/arm/kernel/head-nommu.S   |  5 ----
 arch/arm/mach-berlin/platsmp.c |  3 ++-
 arch/arm/mm/dump.c             |  5 ++--
 arch/arm/mm/init.c             |  9 ++++++--
 arch/arm/mm/mm.h               |  5 ++--
 arch/arm/mm/nommu.c            | 52 ++++++++++++++++++++++++++++++++++++++++--
 7 files changed, 67 insertions(+), 14 deletions(-)

-- 
2.11.0

[PATCH v2 1/4] ARM: mmu: decouple VECTORS_BASE from Kconfig

[afzal mohammed]

For MMU configurations, VECTORS_BASE is always 0xffff0000, a macro
definition will suffice.

For no-MMU, exception base address is dynamically determined in
subsequent patches. To preserve bisectability, now make the
macro applicable for no-MMU scenario too.

Thanks to 0-DAY kernel test infrastructure that found the
bisectability issue. This macro will be restricted to MMU case upon
dynamically determining exception base address for no-MMU.

Once exception address is handled dynamically for no-MMU,
VECTORS_BASE can be removed from Kconfig.

Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
---

v2: 
 Fix bisectability issue on !MMU builds
 UL suffix on VECTORS_BASE definition

 arch/arm/include/asm/memory.h  | 2 ++
 arch/arm/mach-berlin/platsmp.c | 3 ++-
 arch/arm/mm/dump.c             | 5 +++--
 arch/arm/mm/init.c             | 4 ++--
 4 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 76cbd9c674df..0b5416fe7709 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -111,6 +111,8 @@
 
 #endif /* !CONFIG_MMU */
 
+#define VECTORS_BASE		UL(0xffff0000)
+
 /*
  * We fix the TCM memories max 32 KiB ITCM resp DTCM at these
  * locations
diff --git a/arch/arm/mach-berlin/platsmp.c b/arch/arm/mach-berlin/platsmp.c
index 93f90688db18..578d41031abf 100644
--- a/arch/arm/mach-berlin/platsmp.c
+++ b/arch/arm/mach-berlin/platsmp.c
@@ -15,6 +15,7 @@
 
 #include <asm/cacheflush.h>
 #include <asm/cp15.h>
+#include <asm/memory.h>
 #include <asm/smp_plat.h>
 #include <asm/smp_scu.h>
 
@@ -75,7 +76,7 @@ static void __init berlin_smp_prepare_cpus(unsigned int max_cpus)
 	if (!cpu_ctrl)
 		goto unmap_scu;
 
-	vectors_base = ioremap(CONFIG_VECTORS_BASE, SZ_32K);
+	vectors_base = ioremap(VECTORS_BASE, SZ_32K);
 	if (!vectors_base)
 		goto unmap_scu;
 
diff --git a/arch/arm/mm/dump.c b/arch/arm/mm/dump.c
index 9fe8e241335c..21192d6eda40 100644
--- a/arch/arm/mm/dump.c
+++ b/arch/arm/mm/dump.c
@@ -18,6 +18,7 @@
 #include <linux/seq_file.h>
 
 #include <asm/fixmap.h>
+#include <asm/memory.h>
 #include <asm/pgtable.h>
 
 struct addr_marker {
@@ -31,8 +32,8 @@ static struct addr_marker address_markers[] = {
 	{ 0,			"vmalloc() Area" },
 	{ VMALLOC_END,		"vmalloc() End" },
 	{ FIXADDR_START,	"Fixmap Area" },
-	{ CONFIG_VECTORS_BASE,	"Vectors" },
-	{ CONFIG_VECTORS_BASE + PAGE_SIZE * 2, "Vectors End" },
+	{ VECTORS_BASE,	"Vectors" },
+	{ VECTORS_BASE + PAGE_SIZE * 2, "Vectors End" },
 	{ -1,			NULL },
 };
 
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 370581aeb871..823e119a5daa 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -27,6 +27,7 @@
 #include <asm/cp15.h>
 #include <asm/mach-types.h>
 #include <asm/memblock.h>
+#include <asm/memory.h>
 #include <asm/prom.h>
 #include <asm/sections.h>
 #include <asm/setup.h>
@@ -521,8 +522,7 @@ void __init mem_init(void)
 			"      .data : 0x%p" " - 0x%p" "   (%4td kB)\n"
 			"       .bss : 0x%p" " - 0x%p" "   (%4td kB)\n",
 
-			MLK(UL(CONFIG_VECTORS_BASE), UL(CONFIG_VECTORS_BASE) +
-				(PAGE_SIZE)),
+			MLK(VECTORS_BASE, VECTORS_BASE + PAGE_SIZE),
 #ifdef CONFIG_HAVE_TCM
 			MLK(DTCM_OFFSET, (unsigned long) dtcm_end),
 			MLK(ITCM_OFFSET, (unsigned long) itcm_end),
-- 
2.11.0

[PATCH v2 2/4] ARM: nommu: dynamic exception base address setting

[afzal mohammed]

No-MMU dynamic exception base address configuration on CP15
processors. In the case of low vectors, decision based on whether
security extensions are enabled & whether remap vectors to RAM
CONFIG option is selected.

For no-MMU without CP15, current default value of 0x0 is retained.

Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
---

v2:
 Use existing helpers to detect security extensions
 Rewrite a CPP step to C for readability

 arch/arm/mm/nommu.c | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 50 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 2740967727e2..20ac52579952 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -11,6 +11,7 @@
 #include <linux/kernel.h>
 
 #include <asm/cacheflush.h>
+#include <asm/cp15.h>
 #include <asm/sections.h>
 #include <asm/page.h>
 #include <asm/setup.h>
@@ -22,6 +23,8 @@
 
 #include "mm.h"
 
+unsigned long vectors_base;
+
 #ifdef CONFIG_ARM_MPU
 struct mpu_rgn_info mpu_rgn_info;
 
@@ -278,15 +281,60 @@ static void sanity_check_meminfo_mpu(void) {}
 static void __init mpu_setup(void) {}
 #endif /* CONFIG_ARM_MPU */
 
+#ifdef CONFIG_CPU_CP15
+#ifdef CONFIG_CPU_HIGH_VECTOR
+static unsigned long __init setup_vectors_base(void)
+{
+	unsigned long reg = get_cr();
+
+	set_cr(reg | CR_V);
+	return 0xffff0000;
+}
+#else /* CONFIG_CPU_HIGH_VECTOR */
+/* Write exception base address to VBAR */
+static inline void set_vbar(unsigned long val)
+{
+	asm("mcr p15, 0, %0, c12, c0, 0" : : "r" (val) : "cc");
+}
+
+/*
+ * Security extensions, bits[7:4], permitted values,
+ * 0b0000 - not implemented, 0b0001/0b0010 - implemented
+ */
+static inline bool security_extensions_enabled(void)
+{
+	return !!cpuid_feature_extract(CPUID_EXT_PFR1, 4);
+}
+
+static unsigned long __init setup_vectors_base(void)
+{
+	unsigned long base = 0, reg = get_cr();
+
+	set_cr(reg & ~CR_V);
+	if (security_extensions_enabled()) {
+		if (IS_ENABLED(CONFIG_REMAP_VECTORS_TO_RAM))
+			base = CONFIG_DRAM_BASE;
+		set_vbar(base);
+	} else if (IS_ENABLED(CONFIG_REMAP_VECTORS_TO_RAM)) {
+		if (CONFIG_DRAM_BASE != 0)
+			pr_err("Security extensions not enabled, vectors cannot be remapped to RAM, vectors base will be 0x00000000\n");
+	}
+
+	return base;
+}
+#endif /* CONFIG_CPU_HIGH_VECTOR */
+#endif /* CONFIG_CPU_CP15 */
+
 void __init arm_mm_memblock_reserve(void)
 {
 #ifndef CONFIG_CPU_V7M
+	vectors_base = IS_ENABLED(CONFIG_CPU_CP15) ? setup_vectors_base() : 0;
 	/*
 	 * Register the exception vector page.
 	 * some architectures which the DRAM is the exception vector to trap,
 	 * alloc_page breaks with error, although it is not NULL, but "0."
 	 */
-	memblock_reserve(CONFIG_VECTORS_BASE, 2 * PAGE_SIZE);
+	memblock_reserve(vectors_base, 2 * PAGE_SIZE);
 #else /* ifndef CONFIG_CPU_V7M */
 	/*
 	 * There is no dedicated vector page on V7-M. So nothing needs to be
@@ -310,7 +358,7 @@ void __init sanity_check_meminfo(void)
  */
 void __init paging_init(const struct machine_desc *mdesc)
 {
-	early_trap_init((void *)CONFIG_VECTORS_BASE);
+	early_trap_init((void *)vectors_base);
 	mpu_setup();
 	bootmem_init();
 }
-- 
2.11.0

[PATCH v2 3/4] ARM: nommu: display vectors base

[afzal mohammed]

The exception base address is now dynamically estimated for no-MMU,
display it. As it is the case, now limit VECTORS_BASE usage to MMU
scenario.

Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
---

v2:
 A change to accomodate bisectability resolution on patch 1/4

 arch/arm/include/asm/memory.h | 4 ++--
 arch/arm/mm/init.c            | 5 +++++
 arch/arm/mm/mm.h              | 5 +++--
 3 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 0b5416fe7709..9ae474bf84fc 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -83,6 +83,8 @@
 #define IOREMAP_MAX_ORDER	24
 #endif
 
+#define VECTORS_BASE		UL(0xffff0000)
+
 #else /* CONFIG_MMU */
 
 /*
@@ -111,8 +113,6 @@
 
 #endif /* !CONFIG_MMU */
 
-#define VECTORS_BASE		UL(0xffff0000)
-
 /*
  * We fix the TCM memories max 32 KiB ITCM resp DTCM at these
  * locations
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 823e119a5daa..9c68e3aba87c 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -522,7 +522,12 @@ void __init mem_init(void)
 			"      .data : 0x%p" " - 0x%p" "   (%4td kB)\n"
 			"       .bss : 0x%p" " - 0x%p" "   (%4td kB)\n",
 
+#ifdef CONFIG_MMU
 			MLK(VECTORS_BASE, VECTORS_BASE + PAGE_SIZE),
+#else
+			MLK(vectors_base, vectors_base + PAGE_SIZE),
+#endif
+
 #ifdef CONFIG_HAVE_TCM
 			MLK(DTCM_OFFSET, (unsigned long) dtcm_end),
 			MLK(ITCM_OFFSET, (unsigned long) itcm_end),
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index ce727d47275c..546f09437fca 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -79,8 +79,9 @@ struct static_vm {
 extern struct list_head static_vmlist;
 extern struct static_vm *find_static_vm_vaddr(void *vaddr);
 extern __init void add_static_vm_early(struct static_vm *svm);
-
-#endif
+#else /* CONFIG_MMU */
+extern unsigned long vectors_base;
+#endif /* CONFIG_MMU */
 
 #ifdef CONFIG_ZONE_DMA
 extern phys_addr_t arm_dma_limit;
-- 
2.11.0

Re: [PATCH v2 3/4] ARM: nommu: display vectors base

[Russell King - ARM Linux]

On Sun, Jan 22, 2017 at 08:52:12AM +0530, afzal mohammed wrote:
> The exception base address is now dynamically estimated for no-MMU,
> display it. As it is the case, now limit VECTORS_BASE usage to MMU
> scenario.
> 
> Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>

As I wrote elsewhere...

> diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
> index 0b5416fe7709..9ae474bf84fc 100644
> --- a/arch/arm/include/asm/memory.h
> +++ b/arch/arm/include/asm/memory.h
> @@ -83,6 +83,8 @@
>  #define IOREMAP_MAX_ORDER	24
>  #endif
>  
> +#define VECTORS_BASE		UL(0xffff0000)
> +
>  #else /* CONFIG_MMU */
>  
>  /*
> @@ -111,8 +113,6 @@
>  
>  #endif /* !CONFIG_MMU */
>  
> -#define VECTORS_BASE		UL(0xffff0000)

I think adding a definition for VECTORS_BASE in asm/memory.h for nommu:

extern unsigned long vectors_base;
#define VECTORS_BASE	vectors_base

> diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
> index 823e119a5daa..9c68e3aba87c 100644
> --- a/arch/arm/mm/init.c
> +++ b/arch/arm/mm/init.c
> @@ -522,7 +522,12 @@ void __init mem_init(void)
>  			"      .data : 0x%p" " - 0x%p" "   (%4td kB)\n"
>  			"       .bss : 0x%p" " - 0x%p" "   (%4td kB)\n",
>  
> +#ifdef CONFIG_MMU
>  			MLK(VECTORS_BASE, VECTORS_BASE + PAGE_SIZE),
> +#else
> +			MLK(vectors_base, vectors_base + PAGE_SIZE),
> +#endif

will mean that this conditional becomes unnecessary.

> diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
> index ce727d47275c..546f09437fca 100644
> --- a/arch/arm/mm/mm.h
> +++ b/arch/arm/mm/mm.h
> @@ -79,8 +79,9 @@ struct static_vm {
>  extern struct list_head static_vmlist;
>  extern struct static_vm *find_static_vm_vaddr(void *vaddr);
>  extern __init void add_static_vm_early(struct static_vm *svm);
> -
> -#endif
> +#else /* CONFIG_MMU */
> +extern unsigned long vectors_base;
> +#endif /* CONFIG_MMU */

and you don't need this here either.

Thanks.

-- 
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.

Re: [PATCH v2 3/4] ARM: nommu: display vectors base

[Afzal Mohammed]

Hi,

On Mon, Jan 30, 2017 at 02:03:26PM +0000, Russell King - ARM Linux wrote:
> On Sun, Jan 22, 2017 at 08:52:12AM +0530, afzal mohammed wrote:

> > The exception base address is now dynamically estimated for no-MMU,
> > display it. As it is the case, now limit VECTORS_BASE usage to MMU
> > scenario.

> > +#define VECTORS_BASE		UL(0xffff0000)
> > +
> >  #else /* CONFIG_MMU */
> >  
> >  /*
> > @@ -111,8 +113,6 @@
> >  
> >  #endif /* !CONFIG_MMU */
> >  
> > -#define VECTORS_BASE		UL(0xffff0000)
> 
> I think adding a definition for VECTORS_BASE in asm/memory.h for nommu:
> 
> extern unsigned long vectors_base;
> #define VECTORS_BASE	vectors_base

Above was required to be enclosed by below,

 #ifndef __ASSEMBLY__
 #endif

Putting it inside the existing #ifndef __ASSEMBLY__ (which encloses
other externs) in asm/memory.h would put it alongside not so related
definitions as compared to the existing location.

And the existing #ifndef __ASSEMBLY__ in asm/memory.h is a bit down
that makes the above stand separately,

> > +#ifdef CONFIG_MMU
> >  			MLK(VECTORS_BASE, VECTORS_BASE + PAGE_SIZE),
> > +#else
> > +			MLK(vectors_base, vectors_base + PAGE_SIZE),
> > +#endif
> 
> will mean that this conditional becomes unnecessary.

> > -#endif
> > +#else /* CONFIG_MMU */
> > +extern unsigned long vectors_base;
> > +#endif /* CONFIG_MMU */
> 
> and you don't need this here either.

but the above improvements make the patch simpler.

Regards
afzal

[PATCH v2 4/4] ARM: nommu: remove Hivecs configuration is asm

[afzal mohammed]

Now that exception based address is handled dynamically for
processors with CP15, remove Hivecs configuration in assembly.

Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
---
 arch/arm/kernel/head-nommu.S | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index 6b4eb27b8758..2e21e08de747 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -152,11 +152,6 @@ __after_proc_init:
 #ifdef CONFIG_CPU_ICACHE_DISABLE
 	bic	r0, r0, #CR_I
 #endif
-#ifdef CONFIG_CPU_HIGH_VECTOR
-	orr	r0, r0, #CR_V
-#else
-	bic	r0, r0, #CR_V
-#endif
 	mcr	p15, 0, r0, c1, c0, 0		@ write control reg
 #elif defined (CONFIG_CPU_V7M)
 	/* For V7M systems we want to modify the CCR similarly to the SCTLR */
-- 
2.11.0

Re: [PATCH v2 0/4] ARM: v7-A !MMU support, prepare CONFIG_VECTORS_BASE removal

[Vladimir Murzin]

On 22/01/17 03:16, afzal mohammed wrote:
> Hi,
> 
> ARM core changes to support !MMU Kernel on v7-A MMU processors. This
> series also does the preparation for CONFIG_VECTORS_BASE removal.
> 
> Based on the feedback from Russell, it was decided to handle vector
> base dynamically in C for no-MMU & work towards the the goal of
> removing VECTORS_BASE from Kconfig. MMU platform's always have
> exception base address at 0xffff0000, hence a macro was defined and
> it was decoupled from Kconfig. No-MMU CP15 scenario is handled
> dynamically in C. Once vector region setup, used by Cortex-R, is
> made devoid of VECTORS_BASE, it can be removed from Kconfig.
> 
> This series has been verified over current mainline plus [2] on
> Vybrid Cosmic+, Cortex-M4 - !MMU Kernel and Cortex-A5 - MMU Kernel.
> 
> This series also has been verified over Vladimir's series plus [2] on
> 1. Vybrid Cosmic+
>  a. Cortex-M4 !MMU Kernel
>  b. Cortex-A5 MMU Kernel
>  c. Cortex-A5 !MMU Kernel
> 2. AM437x IDK
>  a. Cortex-A9 MMU Kernel
>  b. Cortex-A9 !MMU Kernel
> 
> Regards
> afzal
> 

It did not break my R-class setup and M-class MPS2 works too, so FWIW:

Tested-by: Vladimir Murzin <vladimir.murzin@arm.com>

Cheers
Vladimir

> 
> v2:
> => Fix bisectability issue on !MMU builds
> => UL suffix on VECTORS_BASE definition
> => Use existing helpers to detect security extensions
> => Rewrite a CPP step to C for readability
> 
> [1] "[RFC v2 PATCH 00/23] Allow NOMMU for MULTIPLATFORM",
>     http://lists.infradead.org/pipermail/linux-arm-kernel/2016-November/470966.html
>     (git://linux-arm.org/linux-vm.git nommu-rfc-v2)
> 
> [2] "[PATCH 1/2] ARM: nommu: allow enabling REMAP_VECTORS_TO_RAM"
>     http://lists.infradead.org/pipermail/linux-arm-kernel/2016-December/473593.html
>     (in -next)
> 
> afzal mohammed (4):
>   ARM: mmu: decouple VECTORS_BASE from Kconfig
>   ARM: nommu: dynamic exception base address setting
>   ARM: nommu: display vectors base
>   ARM: nommu: remove Hivecs configuration is asm
> 
>  arch/arm/include/asm/memory.h  |  2 ++
>  arch/arm/kernel/head-nommu.S   |  5 ----
>  arch/arm/mach-berlin/platsmp.c |  3 ++-
>  arch/arm/mm/dump.c             |  5 ++--
>  arch/arm/mm/init.c             |  9 ++++++--
>  arch/arm/mm/mm.h               |  5 ++--
>  arch/arm/mm/nommu.c            | 52 ++++++++++++++++++++++++++++++++++++++++--
>  7 files changed, 67 insertions(+), 14 deletions(-)
>