From: Peter Zijlstra <peterz@infradead.org>
To: kan.liang@intel.com
Cc: mingo@redhat.com, eranian@google.com,
linux-kernel@vger.kernel.org, alexander.shishkin@linux.intel.com,
acme@redhat.com, jolsa@redhat.com, torvalds@linux-foundation.org,
tglx@linutronix.de, vincent.weaver@maine.edu, ak@linux.intel.com
Subject: Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter
Date: Mon, 22 May 2017 14:22:53 +0200 [thread overview]
Message-ID: <20170522122253.z2dhuopiajseqvu7@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20170522091916.3gydvflk4fnqkzw5@hirez.programming.kicks-ass.net>
On Mon, May 22, 2017 at 11:19:16AM +0200, Peter Zijlstra wrote:
> On Fri, May 19, 2017 at 10:06:21AM -0700, kan.liang@intel.com wrote:
> > @@ -934,6 +938,21 @@ int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
> > for (i = 0; i < n; i++) {
> > e = cpuc->event_list[i];
> > e->hw.flags |= PERF_X86_EVENT_COMMITTED;
> > +
> > + /*
> > + * 0x0300 is pseudo-encoding for REF_CPU_CYCLES.
> > + * It indicates that fixed counter 2 should be used.
> > + *
> > + * If fixed counter 2 is occupied and a GP counter
> > + * is assigned, an alternative event which can be
> > + * counted in GP counter will be used to replace
> > + * the pseudo-encoding REF_CPU_CYCLES event.
> > + */
> > + if (((e->hw.config & X86_RAW_EVENT_MASK) == 0x0300) &&
> > + (assign[i] < INTEL_PMC_IDX_FIXED) &&
> > + x86_pmu.ref_cycles_rep)
> > + x86_pmu.ref_cycles_rep(e);
> > +
> > if (x86_pmu.commit_scheduling)
> > x86_pmu.commit_scheduling(cpuc, i, assign[i]);
> > }
>
> This looks dodgy, this is the branch were we managed to schedule all
> events. Why would we need to consider anything here?
>
> I was expecting a retry if there are still unscheduled events and one of
> the events was our 0x0300 event. In that case you have to reset the
> event and retry the whole scheduling thing.
Ah, I see what you've done. That Changelog could use a lot of help, it's
barely readable.
next prev parent reply other threads:[~2017-05-22 12:23 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-19 17:06 [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter kan.liang
2017-05-19 17:06 ` [PATCH 2/2] perf/x86/intel, watchdog: Switch NMI watchdog to ref cycles on x86 kan.liang
2017-05-22 12:03 ` Peter Zijlstra
2017-05-22 12:04 ` Peter Zijlstra
2017-05-22 16:58 ` Liang, Kan
2017-05-22 19:24 ` Peter Zijlstra
2017-05-22 18:20 ` Stephane Eranian
2017-05-22 20:01 ` Andi Kleen
2017-05-22 8:30 ` [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Peter Zijlstra
2017-05-22 18:15 ` Stephane Eranian
2017-05-22 9:19 ` Peter Zijlstra
2017-05-22 12:22 ` Peter Zijlstra [this message]
2017-05-22 16:59 ` Liang, Kan
2017-05-22 16:55 ` Liang, Kan
2017-05-22 19:23 ` Peter Zijlstra
2017-05-22 19:28 ` Stephane Eranian
2017-05-22 21:51 ` Liang, Kan
2017-05-23 6:39 ` Peter Zijlstra
2017-05-23 6:42 ` Stephane Eranian
2017-05-24 15:45 ` Andi Kleen
2017-05-24 16:01 ` Vince Weaver
2017-05-24 16:55 ` Andi Kleen
2017-05-28 20:31 ` Stephane Eranian
2017-05-30 9:25 ` Peter Zijlstra
2017-05-30 13:51 ` Andi Kleen
2017-05-30 16:28 ` Peter Zijlstra
2017-05-30 16:41 ` Stephane Eranian
2017-05-30 17:22 ` Andi Kleen
2017-05-30 17:40 ` Peter Zijlstra
2017-05-30 17:51 ` Andi Kleen
2017-05-30 18:59 ` Peter Zijlstra
2017-05-30 19:40 ` Andi Kleen
2017-05-30 16:39 ` Stephane Eranian
2017-05-30 16:55 ` Thomas Gleixner
2017-05-30 17:25 ` Peter Zijlstra
2017-05-31 20:57 ` Vince Weaver
2017-05-28 2:56 ` kbuild test robot
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