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* [PATCH 0/5] Add SoM1 support
@ 2017-06-29 11:44 Claudiu Beznea
  2017-06-29 11:44 ` [PATCH 1/5] ARM: dts: at91: sama5d2: add QSPI nodes Claudiu Beznea
                   ` (4 more replies)
  0 siblings, 5 replies; 15+ messages in thread
From: Claudiu Beznea @ 2017-06-29 11:44 UTC (permalink / raw)
  To: nicolas.ferre, alexandre.belloni, robh+dt, mark.rutland, linux, sza
  Cc: linux-arm-kernel, devicetree, linux-kernel, cristian.birsan,
	Claudiu Beznea

Hi all,

This series adds support for sama5d2 SoM1 devices.

The at91-sama5d27_som1.dtsi add specific bindings for SoM1 board.
The at91-sama5d27_som1_ek.dts add specific bindings for SoM1 EK board.

The sama5d27_som1_ek uses a EEPROM binding, "start-offset", which is
introduced in patch series: "[RFC PATCH 0/3] Add at24 functionality to
read form different EEPROM offsets".

Thank you,
Claudiu

Claudiu Beznea (2):
  ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support
  ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support

Cristian Birsan (1):
  drivers: soc: atmel: Add basic support for new sama5d2 SiPs

Cyrille Pitchen (1):
  ARM: dts: at91: sama5d2: add QSPI nodes

Songjun Wu (1):
  ARM: dts: at91: sama5d2: add isc node

 arch/arm/boot/dts/Makefile                  |   1 +
 arch/arm/boot/dts/at91-sama5d27_som1.dtsi   | 178 +++++++++
 arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 551 ++++++++++++++++++++++++++++
 arch/arm/boot/dts/sama5d2.dtsi              |  38 ++
 drivers/soc/atmel/soc.c                     |   8 +
 drivers/soc/atmel/soc.h                     |   4 +
 6 files changed, 780 insertions(+)
 create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1.dtsi
 create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1_ek.dts

-- 
2.7.4

^ permalink raw reply	[flat|nested] 15+ messages in thread

* [PATCH 1/5] ARM: dts: at91: sama5d2: add QSPI nodes
  2017-06-29 11:44 [PATCH 0/5] Add SoM1 support Claudiu Beznea
@ 2017-06-29 11:44 ` Claudiu Beznea
  2017-06-29 11:44 ` [PATCH 2/5] ARM: dts: at91: sama5d2: add isc node Claudiu Beznea
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 15+ messages in thread
From: Claudiu Beznea @ 2017-06-29 11:44 UTC (permalink / raw)
  To: nicolas.ferre, alexandre.belloni, robh+dt, mark.rutland, linux, sza
  Cc: linux-arm-kernel, devicetree, linux-kernel, cristian.birsan,
	Cyrille Pitchen, Claudiu Beznea

From: Cyrille Pitchen <cyrille.pitchen@atmel.com>

This patch adds DT nodes for sama5d2 QSPI controllers.

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
[claudiu.beznea@microchip.com: change subject to match the desired prefix]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
 arch/arm/boot/dts/sama5d2.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index cc06da3..71e9d83 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -954,6 +954,28 @@
 				};
 			};
 
+			qspi0: spi@f0020000 {
+				compatible = "atmel,sama5d2-qspi";
+				reg = <0xf0020000 0x100>, <0xd0000000 0x08000000>;
+				reg-names = "qspi_base", "qspi_mmap";
+				interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>;
+				clocks = <&qspi0_clk>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			qspi1: spi@f0024000 {
+				compatible = "atmel,sama5d2-qspi";
+				reg = <0xf0024000 0x100>, <0xd8000000 0x08000000>;
+				reg-names = "qspi_base", "qspi_mmap";
+				interrupts = <53 IRQ_TYPE_LEVEL_HIGH 7>;
+				clocks = <&qspi1_clk>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
 			sha@f0028000 {
 				compatible = "atmel,at91sam9g46-sha";
 				reg = <0xf0028000 0x100>;
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 2/5] ARM: dts: at91: sama5d2: add isc node
  2017-06-29 11:44 [PATCH 0/5] Add SoM1 support Claudiu Beznea
  2017-06-29 11:44 ` [PATCH 1/5] ARM: dts: at91: sama5d2: add QSPI nodes Claudiu Beznea
@ 2017-06-29 11:44 ` Claudiu Beznea
  2017-06-29 11:44 ` [PATCH 3/5] drivers: soc: atmel: Add basic support for new sama5d2 SiPs Claudiu Beznea
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 15+ messages in thread
From: Claudiu Beznea @ 2017-06-29 11:44 UTC (permalink / raw)
  To: nicolas.ferre, alexandre.belloni, robh+dt, mark.rutland, linux, sza
  Cc: linux-arm-kernel, devicetree, linux-kernel, cristian.birsan,
	Songjun Wu, Claudiu Beznea

From: Songjun Wu <songjun.wu@microchip.com>

Add isc node, it conflicts with pdmic and uart3.

Signed-off-by: Songjun Wu <songjun.wu@microchip.com>
[claudiu.beznea@microchip.com: place isc node after hlcdc node]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
 arch/arm/boot/dts/sama5d2.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 71e9d83..9d13b55 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -416,6 +416,17 @@
 				};
 			};
 
+			isc: isc@f0008000 {
+				compatible = "atmel,sama5d2-isc";
+				reg = <0xf0008000 0x4000>;
+				interrupts = <46 IRQ_TYPE_LEVEL_HIGH 5>;
+				clocks = <&isc_clk>, <&iscck>, <&isc_gclk>;
+				clock-names = "hclock", "iscck", "gck";
+				#clock-cells = <0>;
+				clock-output-names = "isc-mck";
+				status = "disabled";
+			};
+
 			ramc0: ramc@f000c000 {
 				compatible = "atmel,sama5d3-ddramc";
 				reg = <0xf000c000 0x200>;
@@ -925,6 +936,11 @@
 						atmel,clk-output-range = <0 83000000>;
 					};
 
+					isc_gclk: isc_gclk {
+						#clock-cells = <0>;
+						reg = <46>;
+					};
+
 					pdmic_gclk: pdmic_gclk {
 						#clock-cells = <0>;
 						reg = <48>;
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 3/5] drivers: soc: atmel: Add basic support for new sama5d2 SiPs
  2017-06-29 11:44 [PATCH 0/5] Add SoM1 support Claudiu Beznea
  2017-06-29 11:44 ` [PATCH 1/5] ARM: dts: at91: sama5d2: add QSPI nodes Claudiu Beznea
  2017-06-29 11:44 ` [PATCH 2/5] ARM: dts: at91: sama5d2: add isc node Claudiu Beznea
@ 2017-06-29 11:44 ` Claudiu Beznea
  2017-06-29 11:44 ` [PATCH 4/5] ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support Claudiu Beznea
  2017-06-29 11:44 ` [PATCH 5/5] ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support Claudiu Beznea
  4 siblings, 0 replies; 15+ messages in thread
From: Claudiu Beznea @ 2017-06-29 11:44 UTC (permalink / raw)
  To: nicolas.ferre, alexandre.belloni, robh+dt, mark.rutland, linux, sza
  Cc: linux-arm-kernel, devicetree, linux-kernel, cristian.birsan,
	Claudiu Beznea

From: Cristian Birsan <cristian.birsan@microchip.com>

Add basic support for new sama5d2 System in a Package chips.

Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
[claudiu.beznea@microchip.com: use MiB instead of MB]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
 drivers/soc/atmel/soc.c | 8 ++++++++
 drivers/soc/atmel/soc.h | 4 ++++
 2 files changed, 12 insertions(+)

diff --git a/drivers/soc/atmel/soc.c b/drivers/soc/atmel/soc.c
index c1363c8..af053af 100644
--- a/drivers/soc/atmel/soc.c
+++ b/drivers/soc/atmel/soc.c
@@ -72,6 +72,8 @@ static const struct at91_soc __initconst socs[] = {
 		 "sama5d21", "sama5d2"),
 	AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D22CU_EXID_MATCH,
 		 "sama5d22", "sama5d2"),
+	AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D225C_D1M_EXID_MATCH,
+		 "sama5d225c 16MiB SiP", "sama5d2"),
 	AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D23CU_EXID_MATCH,
 		 "sama5d23", "sama5d2"),
 	AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D24CX_EXID_MATCH,
@@ -84,10 +86,16 @@ static const struct at91_soc __initconst socs[] = {
 		 "sama5d27", "sama5d2"),
 	AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27CN_EXID_MATCH,
 		 "sama5d27", "sama5d2"),
+	AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27C_D1G_EXID_MATCH,
+		 "sama5d27c 128MiB SiP", "sama5d2"),
+	AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27C_D5M_EXID_MATCH,
+		 "sama5d27c 64MiB SiP", "sama5d2"),
 	AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CU_EXID_MATCH,
 		 "sama5d28", "sama5d2"),
 	AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CN_EXID_MATCH,
 		 "sama5d28", "sama5d2"),
+	AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28C_D1G_EXID_MATCH,
+		 "sama5d28c 128MiB SiP", "sama5d2"),
 	AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D31_EXID_MATCH,
 		 "sama5d31", "sama5d3"),
 	AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D33_EXID_MATCH,
diff --git a/drivers/soc/atmel/soc.h b/drivers/soc/atmel/soc.h
index a90bd5b..94cd5d1 100644
--- a/drivers/soc/atmel/soc.h
+++ b/drivers/soc/atmel/soc.h
@@ -64,14 +64,18 @@ at91_soc_init(const struct at91_soc *socs);
 
 #define SAMA5D2_CIDR_MATCH		0x0a5c08c0
 #define SAMA5D21CU_EXID_MATCH		0x0000005a
+#define SAMA5D225C_D1M_EXID_MATCH	0x00000053
 #define SAMA5D22CU_EXID_MATCH		0x00000059
 #define SAMA5D22CN_EXID_MATCH		0x00000069
 #define SAMA5D23CU_EXID_MATCH		0x00000058
 #define SAMA5D24CX_EXID_MATCH		0x00000004
 #define SAMA5D24CU_EXID_MATCH		0x00000014
 #define SAMA5D26CU_EXID_MATCH		0x00000012
+#define SAMA5D27C_D1G_EXID_MATCH	0x00000033
+#define SAMA5D27C_D5M_EXID_MATCH	0x00000032
 #define SAMA5D27CU_EXID_MATCH		0x00000011
 #define SAMA5D27CN_EXID_MATCH		0x00000021
+#define SAMA5D28C_D1G_EXID_MATCH	0x00000013
 #define SAMA5D28CU_EXID_MATCH		0x00000010
 #define SAMA5D28CN_EXID_MATCH		0x00000020
 
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 4/5] ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support
  2017-06-29 11:44 [PATCH 0/5] Add SoM1 support Claudiu Beznea
                   ` (2 preceding siblings ...)
  2017-06-29 11:44 ` [PATCH 3/5] drivers: soc: atmel: Add basic support for new sama5d2 SiPs Claudiu Beznea
@ 2017-06-29 11:44 ` Claudiu Beznea
  2017-06-29 14:58   ` Ludovic Desroches
  2017-06-29 11:44 ` [PATCH 5/5] ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support Claudiu Beznea
  4 siblings, 1 reply; 15+ messages in thread
From: Claudiu Beznea @ 2017-06-29 11:44 UTC (permalink / raw)
  To: nicolas.ferre, alexandre.belloni, robh+dt, mark.rutland, linux, sza
  Cc: linux-arm-kernel, devicetree, linux-kernel, cristian.birsan,
	Claudiu Beznea

Add specific DTS file and bindings for sama5d27 SoM1 board.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
---
 arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 178 ++++++++++++++++++++++++++++++
 1 file changed, 178 insertions(+)
 create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1.dtsi

diff --git a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
new file mode 100644
index 0000000..b3af4d4
--- /dev/null
+++ b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
@@ -0,0 +1,178 @@
+/*
+ * at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
+ *
+ *  Copyright (c) 2017, Microchip Technology Inc.
+ *                2017 Cristian Birsan <cristian.birsan@microchip.com>
+ *                2017 Claudiu Beznea <claudiu.beznea@microchip.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include "sama5d2.dtsi"
+#include "sama5d2-pinfunc.h"
+
+/ {
+	model = "Atmel SAMA5D27 SoM1";
+	compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
+
+	clocks {
+		slow_xtal {
+			clock-frequency = <32768>;
+		};
+
+		main_xtal {
+			clock-frequency = <24000000>;
+		};
+	};
+
+	ahb {
+		apb {
+			qspi1: spi@f0024000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_qspi1_default>;
+				flash@0 {
+					#address-cells = <1>;
+					#size-cells = <1>;
+					compatible = "jedec,spi-nor";
+					reg = <0>;
+					spi-max-frequency = <83000000>;
+					m25p,fast-read;
+
+					at91bootstrap@00000000 {
+						label = "at91bootstrap";
+						reg = <0x00000000 0x00010000>;
+					};
+
+					bootloaderenv@00010000 {
+						label = "bootloader env";
+						reg = <0x00010000 0x00010000>;
+					};
+
+					bootloader@00020000 {
+						label = "bootloader";
+						reg = <0x00020000 0x00050000>;
+					};
+
+					dtb@00070000 {
+						label = "device tree";
+						reg = <0x00070000 0x00010000>;
+					};
+
+					kernel@00080000 {
+						label = "kernel";
+						reg = <0x00080000 0x00380000>;
+					};
+				};
+			};
+
+			macb0: ethernet@f8008000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_macb0_default>;
+				phy-mode = "rmii";
+
+				ethernet-phy@1 {
+					reg = <0x1>;
+					interrupt-parent = <&pioA>;
+					interrupts = <73 IRQ_TYPE_LEVEL_LOW>;
+					pinctrl-names = "default";
+					pinctrl-0 = <&pinctrl_macb0_phy_irq>;
+				};
+			};
+
+			i2c0: i2c@f8028000 {
+				dmas = <0>, <0>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_i2c0_default>;
+				i2c-sda-hold-time-ns = <350>;
+				status = "disabled";
+
+				24aa@50 {
+					compatible = "24mac602";
+					reg = <0x50>;
+					pagesize = <8>;
+					start-offset = /bits/ 8 <0xf8>;
+					read-only;
+				};
+			};
+
+			pinctrl@fc038000 {
+
+				pinctrl_i2c0_default: i2c0_default {
+					pinmux = <PIN_PD21__TWD0>,
+						 <PIN_PD22__TWCK0>;
+					bias-disable;
+				};
+
+				pinctrl_macb0_default: macb0_default {
+					pinmux = <PIN_PD9__GTXCK>,
+						 <PIN_PD10__GTXEN>,
+						 <PIN_PD11__GRXDV>,
+						 <PIN_PD12__GRXER>,
+						 <PIN_PD13__GRX0>,
+						 <PIN_PD14__GRX1>,
+						 <PIN_PD15__GTX0>,
+						 <PIN_PD16__GTX1>,
+						 <PIN_PD17__GMDC>,
+						 <PIN_PD18__GMDIO>;
+					bias-disable;
+				};
+
+				pinctrl_macb0_phy_irq: macb0_phy_irq {
+					pinmux = <PIN_PD31__GPIO>;
+					bias-disable;
+				};
+
+				pinctrl_qspi1_default: qspi1_default {
+					sck_cs {
+						pinmux = <PIN_PB5__QSPI1_SCK>,
+							 <PIN_PB6__QSPI1_CS>;
+						bias-disable;
+					};
+
+					data {
+						pinmux = <PIN_PB7__QSPI1_IO0>,
+							 <PIN_PB8__QSPI1_IO1>,
+							 <PIN_PB9__QSPI1_IO2>,
+							 <PIN_PB10__QSPI1_IO3>;
+						bias-pull-up;
+					};
+				};
+			};
+		};
+	};
+};
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* [PATCH 5/5] ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support
  2017-06-29 11:44 [PATCH 0/5] Add SoM1 support Claudiu Beznea
                   ` (3 preceding siblings ...)
  2017-06-29 11:44 ` [PATCH 4/5] ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support Claudiu Beznea
@ 2017-06-29 11:44 ` Claudiu Beznea
  2017-06-29 11:59   ` Baruch Siach
  2017-06-29 15:04   ` Ludovic Desroches
  4 siblings, 2 replies; 15+ messages in thread
From: Claudiu Beznea @ 2017-06-29 11:44 UTC (permalink / raw)
  To: nicolas.ferre, alexandre.belloni, robh+dt, mark.rutland, linux, sza
  Cc: linux-arm-kernel, devicetree, linux-kernel, cristian.birsan,
	Claudiu Beznea

Add specifig DTS files and bindings for sama5d27 SoM1 EK board.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
---
 arch/arm/boot/dts/Makefile                  |   1 +
 arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 551 ++++++++++++++++++++++++++++
 2 files changed, 552 insertions(+)
 create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1_ek.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 9449493..3396f73 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -46,6 +46,7 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
 	at91sam9x35ek.dtb
 dtb-$(CONFIG_SOC_SAM_V7) += \
 	at91-kizbox2.dtb \
+	at91-sama5d27_som1_ek.dtb \
 	at91-sama5d2_xplained.dtb \
 	at91-sama5d3_xplained.dtb \
 	at91-tse850-3.dtb \
diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
new file mode 100644
index 0000000..a87125e
--- /dev/null
+++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
@@ -0,0 +1,551 @@
+/*
+ * at91-sama5d27_som1_ek.dts - Device Tree file for SAMA5D27-SOM1-EK board
+ *
+ *  Copyright (c) 2017, Microchip Technology Inc.
+ *                2016 Nicolas Ferre <nicolas.ferre@atmel.com>
+ *                2017 Cristian Birsan <cristian.birsan@microchip.com>
+ *                2017 Claudiu Beznea <claudiu.beznea@microchip.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+/dts-v1/;
+#include "at91-sama5d27_som1.dtsi"
+#include <dt-bindings/mfd/atmel-flexcom.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	model = "Atmel SAMA5D27 SOM1 EK";
+	compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory {
+		reg = <0x20000000 0x20000>;
+	};
+
+	ahb {
+		usb0: gadget@00300000 {
+			atmel,vbus-gpio = <&pioA 116 GPIO_ACTIVE_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_usba_vbus>;
+			status = "okay";
+		};
+
+		usb1: ohci@00400000 {
+			num-ports = <3>;
+			atmel,vbus-gpio = <&pioA 10 GPIO_ACTIVE_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_usb_default>;
+			status = "okay";
+		};
+
+		usb2: ehci@00500000 {
+			status = "okay";
+		};
+
+		sdmmc0: sdio-host@a0000000 {
+			bus-width = <8>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_sdmmc0_default>;
+			status = "okay";
+		};
+
+		sdmmc1: sdio-host@b0000000 {
+			bus-width = <4>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_sdmmc1_default>;
+			status = "okay";
+		};
+
+		apb {
+			isc: isc@f0008000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_isc_base &pinctrl_isc_data_8bit &pinctrl_isc_data_9_10 &pinctrl_isc_data_11_12>;
+				status = "okay";
+			};
+
+			spi0: spi@f8000000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_spi0_default>;
+				status = "okay";
+			};
+
+			macb0: ethernet@f8008000 {
+				status = "okay";
+			};
+
+			uart1: serial@f8020000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_uart1_default>;
+				atmel,use-dma-rx;
+				atmel,use-dma-tx;
+				status = "okay";
+			};
+
+			uart2: serial@f8024000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_mikrobus2_uart>;
+				atmel,use-dma-rx;
+				atmel-use-dma-tx;
+				status = "okay";
+			};
+
+			pwm0: pwm@f802c000 {
+				status = "okay";
+			};
+
+			flx1: flexcom@f8038000 {
+				atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
+				status = "disabled";
+
+				i2c2: i2c@600 {
+					compatible = "atmel,sama5d2-i2c";
+					reg = <0x600 0x200>;
+					interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>;
+					dmas = <0>, <0>;
+					dma-names = "tx", "rx";
+					#address-cells = <1>;
+					#size-cells = <0>;
+					clocks = <&flx1_clk>;
+					pinctrl-names = "default";
+					pinctrl-0 = <&pinctrl_mikrobus_i2c>;
+					atmel,fifo-size = <16>;
+					status = "disabled";
+				};
+			};
+
+			shdwc@f8048010 {
+				atmel,shdwc-debouncer = <976>;
+				atmel,wakeup-rtc-timer;
+
+				input@0 {
+					reg = <0>;
+					atmel,wakeup-type = "low";
+				};
+			};
+
+			watchdog@f8048040 {
+				status = "okay";
+			};
+
+			can0: can@f8054000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_can0_default>;
+			};
+
+			uart3: serial@fc008000 {
+				atmel,use-dma-rx;
+				atmel,use-dma-tx;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_uart3_default>;
+				status = "disabled";
+			};
+
+			uart4: serial@fc00c000 {
+				atmel,use-dma-rx;
+				atmel,use-dma-tx;
+				pinctrl-name = "default";
+				pinctrl-0 = <&pinctrl_mikrobus1_uart>;
+				status = "okay";
+			};
+
+			flx3: flexcom@fc014000 {
+				atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>;
+				status = "disabled";
+
+				uart7: serial@200 {
+					compatible = "atmel,at91sam9260-usart";
+					reg = <0x200 0x200>;
+					interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
+					clocks = <&flx3_clk>;
+					clock-names = "usart";
+					pinctrl-names = "default";
+					pinctrl-0 = <&pinctrl_flx3_default>;
+					atmel,fifo-size = <32>;
+					status = "disabled";
+				};
+
+				spi2: spi@400 {
+					compatible = "atmel,at91rm9200-spi";
+					reg = <0x400 0x200>;
+					interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
+					clocks = <&flx3_clk>;
+					clock-names = "spi_clk";
+					pinctrl-names = "default";
+					pinctrl-0 = <&pinctrl_flx3_default>;
+					atmel,fifo-size = <16>;
+					status = "disabled";
+				};
+			};
+
+			flx4: flexcom@fc018000 {
+				atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>;
+				status = "okay";
+
+				uart6: serial@200 {
+					compatible = "atmel,at91sam9260-usart";
+					reg = <0x200 0x200>;
+					interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
+					clocks = <&flx4_clk>;
+					clock-names = "usart";
+					pinctrl-names = "default";
+					pinctrl-0 = <&pinctrl_flx4_default>;
+					atmel,fifo-size = <32>;
+					status = "disabled";
+				};
+
+				spi3: spi@400 {
+					compatible = "atmel,at91rm9200-spi";
+					reg = <0x400 0x200>;
+					interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
+					clocks = <&flx4_clk>;
+					clock-names = "spi_clk";
+					pinctrl-names = "default";
+					pinctrl-0 = <&pinctrl_mikrobus_spi &pinctrl_mikrobus1_spi_cs &pinctrl_mikrobus2_spi_cs>;
+					atmel,fifo-size = <16>;
+					status = "okay";
+				};
+
+				i2c3: i2c@600 {
+					compatible = "atmel,sama5d2-i2c";
+					reg = <0x600 0x200>;
+					interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
+					dmas = <0>, <0>;
+					dma-names = "tx", "rx";
+					#address-cells = <1>;
+					#size-cells = <0>;
+					clocks = <&flx4_clk>;
+					pinctrl-names = "default";
+					pinctrl-0 = <&pinctrl_flx4_default>;
+					atmel,fifo-size = <16>;
+					status = "disabled";
+				};
+			};
+
+			i2c1: i2c@fc028000 {
+				dmas = <0>, <0>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_i2c1_default>;
+				status = "okay";
+			};
+
+			pinctrl@fc038000 {
+
+				pinctrl_can0_default: can0_default {
+					pinmux = <PIN_PC10__CANTX0>,
+						 <PIN_PC11__CANRX0>;
+					bias-disable;
+				};
+
+				pinctrl_can1_default: can1_default {
+					pinmux = <PIN_PC26__CANTX1>,
+						 <PIN_PC27__CANRX1>;
+					bias-disable;
+				};
+
+				pinctrl_flx3_default: flx3_default {
+					pinmux = <PIN_PC20__FLEXCOM3_IO0>,
+						 <PIN_PC19__FLEXCOM3_IO1>,
+						 <PIN_PC18__FLEXCOM3_IO2>,
+						 <PIN_PC21__FLEXCOM3_IO3>,
+						 <PIN_PC22__FLEXCOM3_IO4>;
+					bias-disable;
+				};
+
+				pinctrl_i2c1_default: i2c1_default {
+					pinmux = <PIN_PD4__TWD1>,
+						 <PIN_PD5__TWCK1>;
+					bias-disable;
+				};
+
+				pinctrl_isc_base: isc_base {
+					pinmux = <PIN_PC21__ISC_PCK>,
+						 <PIN_PC22__ISC_VSYNC>,
+						 <PIN_PC23__ISC_HSYNC>,
+						 <PIN_PC24__ISC_MCK>;
+					bias-disable;
+				};
+
+				pinctrl_isc_data_8bit: isc_data_8bit {
+					pinmux = <PIN_PC20__ISC_D11>,
+						 <PIN_PC19__ISC_D10>,
+						 <PIN_PC18__ISC_D9>,
+						 <PIN_PC17__ISC_D8>,
+						 <PIN_PC16__ISC_D7>,
+						 <PIN_PC15__ISC_D6>,
+						 <PIN_PC14__ISC_D5>,
+						 <PIN_PC13__ISC_D4>;
+					bias-disable;
+				};
+
+				pinctrl_isc_data_9_10: isc_data_9_10 {
+					pinmux = <PIN_PC12__ISC_D3>,
+						 <PIN_PC11__ISC_D2>;
+					bias-disable;
+				};
+
+				pinctrl_isc_data_11_12: isc_data_11_12 {
+					pinmux = <PIN_PC10__ISC_D1>,
+						 <PIN_PC9__ISC_D0>;
+					bias-disable;
+				};
+
+				pinctrl_key_gpio_default: key_gpio_default {
+					pinmux = <PIN_PA29__GPIO>;
+					bias-pull-up;
+				};
+
+				pinctrl_led_gpio_default: led_gpio_default {
+					pinmux = <PIN_PA27__GPIO>,
+						 <PIN_PB1__GPIO>,
+						 <PIN_PA31__GPIO>;
+					bias-pull-up;
+				};
+
+				pinctrl_sdmmc0_default: sdmmc0_default {
+					cmd_data {
+						pinmux = <PIN_PA1__SDMMC0_CMD>,
+							 <PIN_PA2__SDMMC0_DAT0>,
+							 <PIN_PA3__SDMMC0_DAT1>,
+							 <PIN_PA4__SDMMC0_DAT2>,
+							 <PIN_PA5__SDMMC0_DAT3>,
+							 <PIN_PA6__SDMMC0_DAT4>,
+							 <PIN_PA7__SDMMC0_DAT5>,
+							 <PIN_PA8__SDMMC0_DAT6>,
+							 <PIN_PA9__SDMMC0_DAT7>;
+						bias-pull-up;
+					};
+
+					ck_cd_vddsel {
+						pinmux = <PIN_PA0__SDMMC0_CK>,
+							 <PIN_PA11__SDMMC0_VDDSEL>,
+							 <PIN_PA13__SDMMC0_CD>;
+						bias-disable;
+					};
+				};
+
+				pinctrl_sdmmc1_default: sdmmc1_default {
+					cmd_data {
+						pinmux = <PIN_PA28__SDMMC1_CMD>,
+							 <PIN_PA18__SDMMC1_DAT0>,
+							 <PIN_PA19__SDMMC1_DAT1>,
+							 <PIN_PA20__SDMMC1_DAT2>,
+							 <PIN_PA21__SDMMC1_DAT3>;
+						bias-pull-up;
+					};
+
+					conf-ck_cd {
+						pinmux = <PIN_PA22__SDMMC1_CK>,
+							 <PIN_PA30__SDMMC1_CD>;
+						bias-disable;
+					};
+				};
+
+				pinctrl_sensor_power: sensor_power {
+					pinmux = <PIN_PB12__GPIO>;
+					bias-disable;
+				};
+
+				pinctrl_sensor_reset: sensor_reset {
+					pinmux = <PIN_PB11__GPIO>;
+					bias-disable;
+				};
+
+				pinctrl_spi0_default: spi0_default {
+					pinmux = <PIN_PA14__SPI0_SPCK>,
+						 <PIN_PA15__SPI0_MOSI>,
+						 <PIN_PA16__SPI0_MISO>,
+						 <PIN_PA17__SPI0_NPCS0>;
+					bias-disable;
+				};
+
+				pinctrl_uart1_default: uart1_default {
+					pinmux = <PIN_PD2__URXD1>,
+						 <PIN_PD3__UTXD1>;
+					bias-disable;
+				};
+
+				pinctrl_uart3_default: uart3_default {
+					pinmux = <PIN_PC12__URXD3>,
+						 <PIN_PC13__UTXD3>;
+					bias-disable;
+				};
+
+				pinctrl_usb_default: usb_default {
+					pinmux = <PIN_PA10__GPIO>,
+						 <PIN_PD19__GPIO>;
+					bias-disable;
+				};
+
+				pinctrl_usba_vbus: usba_vbus {
+					pinmux = <PIN_PD20__GPIO>;
+					bias-disable;
+				};
+
+				pinctrl_mikrobus1_an: mikrobus1_an {
+					pinmux = <PIN_PD25__GPIO>;
+					bias-disable;
+				};
+
+				pinctrl_mikrobus2_an: mikrobus2_an {
+					pinmux = <PIN_PD26__GPIO>;
+					bias-disable;
+				};
+
+				pinctrl_mikrobus1_rst: mikrobus1_rst {
+					pinmux = <PIN_PB2__GPIO>;
+					bias-disable;
+				};
+
+				pinctrl_mikrobus2_rst: mikrobus2_rst {
+					pinmux = <PIN_PA26__GPIO>;
+					bias-disable;
+				};
+
+				pinctrl_mikrobus1_spi_cs: mikrobus1_spi_cs {
+					pinmux = <PIN_PD0__FLEXCOM4_IO4>;
+					bias-disable;
+				};
+
+				pinctrl_mikrobus2_spi_cs: mikrobus2_spi_cs {
+					pinmux = <PIN_PC31__FLEXCOM4_IO3>;
+					bias-disable;
+				};
+
+				pinctrl_mikrobus_spi: mikrobus_spi {
+					pinmux = <PIN_PC28__FLEXCOM4_IO0>,
+						 <PIN_PC29__FLEXCOM4_IO1>,
+						 <PIN_PC30__FLEXCOM4_IO2>;
+					bias-disable;
+				};
+
+				pinctrl_mikrobus1_pwm: mikrobus1_pwm {
+					pinmux = <PIN_PB1__PWML1>;
+					bias-disable;
+				};
+
+				pinctrl_mikrobus2_pwm: mikrobus2_pwm {
+					pinmux = <PIN_PA31__PWML0>;
+					bias-disable;
+				};
+
+				pinctrl_mikrobus1_int: mikrobus1_int {
+					pinmux = <PIN_PB0__GPIO>;
+					bias-disable;
+				};
+
+				pinctrl_mikrobus2_int: mikrobus2_int {
+					pinmux = <PIN_PA25__GPIO>;
+					bias-disable;
+				};
+
+				pinctrl_mikrobus1_uart: mikrobus1_uart {
+					pinmux = <PIN_PB3__URXD4>,
+						 <PIN_PB4__UTXD4>;
+					bias-disable;
+				};
+
+				pinctrl_mikrobus2_uart: mikrobus2_uart {
+					pinmux = <PIN_PD23__URXD2>,
+						 <PIN_PD24__UTXD2>;
+					bias-disable;
+				};
+
+				pinctrl_mikrobus_i2c: mikrobus1_i2c {
+					pinmux = <PIN_PA24__FLEXCOM1_IO0>,
+						 <PIN_PA23__FLEXCOM1_IO1>;
+					bias-disable;
+				};
+
+				pinctrl_flx4_default: flx4_uart_default {
+					pinmux = <PIN_PC28__FLEXCOM4_IO0>,
+						 <PIN_PC29__FLEXCOM4_IO1>,
+						 <PIN_PC30__FLEXCOM4_IO2>,
+						 <PIN_PC31__FLEXCOM4_IO3>,
+						 <PIN_PD0__FLEXCOM4_IO4>;
+					bias-disable;
+				};
+			};
+
+			can1: can@fc050000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_can1_default>;
+				status = "okay";
+			};
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_key_gpio_default>;
+
+		bp1 {
+			label = "USER";
+			gpios = <&pioA 29 GPIO_ACTIVE_LOW>;
+			linux,code = <0x104>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_led_gpio_default>;
+		status = "okay";
+
+		red {
+			label = "red";
+			gpios = <&pioA 27 GPIO_ACTIVE_LOW>;
+		};
+
+		green {
+			label = "green";
+			gpios = <&pioA 33 GPIO_ACTIVE_LOW>;
+		};
+
+		blue {
+			label = "blue";
+			gpios = <&pioA 31 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "heartbeat";
+		};
+	};
+};
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 15+ messages in thread

* Re: [PATCH 5/5] ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support
  2017-06-29 11:44 ` [PATCH 5/5] ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support Claudiu Beznea
@ 2017-06-29 11:59   ` Baruch Siach
  2017-06-29 12:16     ` Alexandre Belloni
  2017-06-29 15:04   ` Ludovic Desroches
  1 sibling, 1 reply; 15+ messages in thread
From: Baruch Siach @ 2017-06-29 11:59 UTC (permalink / raw)
  To: Claudiu Beznea
  Cc: nicolas.ferre, alexandre.belloni, robh+dt, mark.rutland, linux,
	sza, devicetree, cristian.birsan, linux-kernel, linux-arm-kernel

Hi Claudiu,

On Thu, Jun 29, 2017 at 02:44:34PM +0300, Claudiu Beznea wrote:
> Add specifig DTS files and bindings for sama5d27 SoM1 EK board.

Is there any publicly available information on this SoM?

One more comment below.

> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
> ---

[snip]

> +	memory {
> +		reg = <0x20000000 0x20000>;

Are you sure this SoM has 132KB RAM?

Since you seem to rely on the bootloader to fill in the right size value, you 
can just drop this node and rely on sama5d2.dtsi that provides a stub node.

> +	};

baruch

-- 
     http://baruch.siach.name/blog/                  ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch@tkos.co.il - tel: +972.52.368.4656, http://www.tkos.co.il -

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH 5/5] ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support
  2017-06-29 11:59   ` Baruch Siach
@ 2017-06-29 12:16     ` Alexandre Belloni
  2017-06-30 12:28       ` m18063
  0 siblings, 1 reply; 15+ messages in thread
From: Alexandre Belloni @ 2017-06-29 12:16 UTC (permalink / raw)
  To: Baruch Siach
  Cc: Claudiu Beznea, nicolas.ferre, robh+dt, mark.rutland, linux, sza,
	devicetree, cristian.birsan, linux-kernel, linux-arm-kernel

On 29/06/2017 at 14:59:31 +0300, Baruch Siach wrote:
> Hi Claudiu,
> 
> On Thu, Jun 29, 2017 at 02:44:34PM +0300, Claudiu Beznea wrote:
> > Add specifig DTS files and bindings for sama5d27 SoM1 EK board.
> 
> Is there any publicly available information on this SoM?
> 
> One more comment below.
> 
> > Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> > Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
> > ---
> 
> [snip]
> 
> > +	memory {
> > +		reg = <0x20000000 0x20000>;
> 
> Are you sure this SoM has 132KB RAM?
> 
> Since you seem to rely on the bootloader to fill in the right size value, you 
> can just drop this node and rely on sama5d2.dtsi that provides a stub node.
> 

Yeah, that is what I would do too.


-- 
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH 4/5] ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support
  2017-06-29 11:44 ` [PATCH 4/5] ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support Claudiu Beznea
@ 2017-06-29 14:58   ` Ludovic Desroches
  2017-06-30 12:38     ` m18063
  0 siblings, 1 reply; 15+ messages in thread
From: Ludovic Desroches @ 2017-06-29 14:58 UTC (permalink / raw)
  To: Claudiu Beznea
  Cc: nicolas.ferre, alexandre.belloni, robh+dt, mark.rutland, linux,
	sza, devicetree, cristian.birsan, linux-kernel, linux-arm-kernel

On Thu, Jun 29, 2017 at 02:44:33PM +0300, Claudiu Beznea wrote:
> Add specific DTS file and bindings for sama5d27 SoM1 board.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
> ---
>  arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 178 ++++++++++++++++++++++++++++++
>  1 file changed, 178 insertions(+)
>  create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1.dtsi
> 
> diff --git a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
> new file mode 100644
> index 0000000..b3af4d4
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
> @@ -0,0 +1,178 @@
> +/*
> + * at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
> + *
> + *  Copyright (c) 2017, Microchip Technology Inc.
> + *                2017 Cristian Birsan <cristian.birsan@microchip.com>
> + *                2017 Claudiu Beznea <claudiu.beznea@microchip.com>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + *  a) This file is free software; you can redistribute it and/or
> + *     modify it under the terms of the GNU General Public License as
> + *     published by the Free Software Foundation; either version 2 of the
> + *     License, or (at your option) any later version.
> + *
> + *     This file is distributed in the hope that it will be useful,
> + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
> + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + *     GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + *  b) Permission is hereby granted, free of charge, to any person
> + *     obtaining a copy of this software and associated documentation
> + *     files (the "Software"), to deal in the Software without
> + *     restriction, including without limitation the rights to use,
> + *     copy, modify, merge, publish, distribute, sublicense, and/or
> + *     sell copies of the Software, and to permit persons to whom the
> + *     Software is furnished to do so, subject to the following
> + *     conditions:
> + *
> + *     The above copyright notice and this permission notice shall be
> + *     included in all copies or substantial portions of the Software.
> + *
> + *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + *     OTHER DEALINGS IN THE SOFTWARE.
> + */
> +#include "sama5d2.dtsi"
> +#include "sama5d2-pinfunc.h"
> +
> +/ {
> +	model = "Atmel SAMA5D27 SoM1";
> +	compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
> +
> +	clocks {
> +		slow_xtal {
> +			clock-frequency = <32768>;
> +		};
> +
> +		main_xtal {
> +			clock-frequency = <24000000>;
> +		};
> +	};
> +
> +	ahb {
> +		apb {
> +			qspi1: spi@f0024000 {
> +				pinctrl-names = "default";
> +				pinctrl-0 = <&pinctrl_qspi1_default>;
> +				flash@0 {
> +					#address-cells = <1>;
> +					#size-cells = <1>;
> +					compatible = "jedec,spi-nor";
> +					reg = <0>;
> +					spi-max-frequency = <83000000>;
> +					m25p,fast-read;
> +
> +					at91bootstrap@00000000 {
> +						label = "at91bootstrap";
> +						reg = <0x00000000 0x00010000>;
> +					};
> +
> +					bootloaderenv@00010000 {
> +						label = "bootloader env";
> +						reg = <0x00010000 0x00010000>;
> +					};
> +
> +					bootloader@00020000 {
> +						label = "bootloader";
> +						reg = <0x00020000 0x00050000>;
> +					};
> +
> +					dtb@00070000 {
> +						label = "device tree";
> +						reg = <0x00070000 0x00010000>;
> +					};
> +
> +					kernel@00080000 {
> +						label = "kernel";
> +						reg = <0x00080000 0x00380000>;
> +					};

I am wondering if it's a good idea to give the flash map here. If we
take a kernel generated by a sama5_defconfig, it is about 3.8 MB.

> +				};
> +			};
> +
> +			macb0: ethernet@f8008000 {
> +				pinctrl-names = "default";
> +				pinctrl-0 = <&pinctrl_macb0_default>;
> +				phy-mode = "rmii";
> +
> +				ethernet-phy@1 {
> +					reg = <0x1>;
> +					interrupt-parent = <&pioA>;
> +					interrupts = <73 IRQ_TYPE_LEVEL_LOW>;

Are you sure about this value? pinctrl tells PD31 so 127. By the way, it
is better to use macros: PIN_PD31.

Regards

Ludovic

> +					pinctrl-names = "default";
> +					pinctrl-0 = <&pinctrl_macb0_phy_irq>;
> +				};
> +			};
> +
> +			i2c0: i2c@f8028000 {
> +				dmas = <0>, <0>;
> +				pinctrl-names = "default";
> +				pinctrl-0 = <&pinctrl_i2c0_default>;
> +				i2c-sda-hold-time-ns = <350>;
> +				status = "disabled";
> +
> +				24aa@50 {
> +					compatible = "24mac602";
> +					reg = <0x50>;
> +					pagesize = <8>;
> +					start-offset = /bits/ 8 <0xf8>;
> +					read-only;
> +				};
> +			};
> +
> +			pinctrl@fc038000 {
> +
> +				pinctrl_i2c0_default: i2c0_default {
> +					pinmux = <PIN_PD21__TWD0>,
> +						 <PIN_PD22__TWCK0>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_macb0_default: macb0_default {
> +					pinmux = <PIN_PD9__GTXCK>,
> +						 <PIN_PD10__GTXEN>,
> +						 <PIN_PD11__GRXDV>,
> +						 <PIN_PD12__GRXER>,
> +						 <PIN_PD13__GRX0>,
> +						 <PIN_PD14__GRX1>,
> +						 <PIN_PD15__GTX0>,
> +						 <PIN_PD16__GTX1>,
> +						 <PIN_PD17__GMDC>,
> +						 <PIN_PD18__GMDIO>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_macb0_phy_irq: macb0_phy_irq {
> +					pinmux = <PIN_PD31__GPIO>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_qspi1_default: qspi1_default {
> +					sck_cs {
> +						pinmux = <PIN_PB5__QSPI1_SCK>,
> +							 <PIN_PB6__QSPI1_CS>;
> +						bias-disable;
> +					};
> +
> +					data {
> +						pinmux = <PIN_PB7__QSPI1_IO0>,
> +							 <PIN_PB8__QSPI1_IO1>,
> +							 <PIN_PB9__QSPI1_IO2>,
> +							 <PIN_PB10__QSPI1_IO3>;
> +						bias-pull-up;
> +					};
> +				};
> +			};
> +		};
> +	};
> +};
> -- 
> 2.7.4
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH 5/5] ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support
  2017-06-29 11:44 ` [PATCH 5/5] ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support Claudiu Beznea
  2017-06-29 11:59   ` Baruch Siach
@ 2017-06-29 15:04   ` Ludovic Desroches
  2017-06-30 12:32     ` m18063
  1 sibling, 1 reply; 15+ messages in thread
From: Ludovic Desroches @ 2017-06-29 15:04 UTC (permalink / raw)
  To: Claudiu Beznea
  Cc: nicolas.ferre, alexandre.belloni, robh+dt, mark.rutland, linux,
	sza, devicetree, cristian.birsan, linux-kernel, linux-arm-kernel

On Thu, Jun 29, 2017 at 02:44:34PM +0300, Claudiu Beznea wrote:
> Add specifig DTS files and bindings for sama5d27 SoM1 EK board.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
> ---
>  arch/arm/boot/dts/Makefile                  |   1 +
>  arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 551 ++++++++++++++++++++++++++++
>  2 files changed, 552 insertions(+)
>  create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 9449493..3396f73 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -46,6 +46,7 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
>  	at91sam9x35ek.dtb
>  dtb-$(CONFIG_SOC_SAM_V7) += \
>  	at91-kizbox2.dtb \
> +	at91-sama5d27_som1_ek.dtb \
>  	at91-sama5d2_xplained.dtb \
>  	at91-sama5d3_xplained.dtb \
>  	at91-tse850-3.dtb \
> diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
> new file mode 100644
> index 0000000..a87125e
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
> @@ -0,0 +1,551 @@
> +/*
> + * at91-sama5d27_som1_ek.dts - Device Tree file for SAMA5D27-SOM1-EK board
> + *
> + *  Copyright (c) 2017, Microchip Technology Inc.
> + *                2016 Nicolas Ferre <nicolas.ferre@atmel.com>
> + *                2017 Cristian Birsan <cristian.birsan@microchip.com>
> + *                2017 Claudiu Beznea <claudiu.beznea@microchip.com>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + *  a) This file is free software; you can redistribute it and/or
> + *     modify it under the terms of the GNU General Public License as
> + *     published by the Free Software Foundation; either version 2 of the
> + *     License, or (at your option) any later version.
> + *
> + *     This file is distributed in the hope that it will be useful,
> + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
> + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + *     GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + *  b) Permission is hereby granted, free of charge, to any person
> + *     obtaining a copy of this software and associated documentation
> + *     files (the "Software"), to deal in the Software without
> + *     restriction, including without limitation the rights to use,
> + *     copy, modify, merge, publish, distribute, sublicense, and/or
> + *     sell copies of the Software, and to permit persons to whom the
> + *     Software is furnished to do so, subject to the following
> + *     conditions:
> + *
> + *     The above copyright notice and this permission notice shall be
> + *     included in all copies or substantial portions of the Software.
> + *
> + *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + *     OTHER DEALINGS IN THE SOFTWARE.
> + */
> +/dts-v1/;
> +#include "at91-sama5d27_som1.dtsi"
> +#include <dt-bindings/mfd/atmel-flexcom.h>
> +#include <dt-bindings/gpio/gpio.h>
> +
> +/ {
> +	model = "Atmel SAMA5D27 SOM1 EK";
> +	compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
> +
> +	chosen {
> +		stdout-path = "serial0:115200n8";
> +	};
> +
> +	memory {
> +		reg = <0x20000000 0x20000>;
> +	};
> +
> +	ahb {
> +		usb0: gadget@00300000 {
> +			atmel,vbus-gpio = <&pioA 116 GPIO_ACTIVE_HIGH>;

Even if it is not done in other dts file (I plan to send patches to fix
it), prefer macros to avoid errors: PIN_PD20.

> +			pinctrl-names = "default";
> +			pinctrl-0 = <&pinctrl_usba_vbus>;
> +			status = "okay";
> +		};
> +
> +		usb1: ohci@00400000 {
> +			num-ports = <3>;
> +			atmel,vbus-gpio = <&pioA 10 GPIO_ACTIVE_HIGH>;

Ditto

> +			pinctrl-names = "default";
> +			pinctrl-0 = <&pinctrl_usb_default>;
> +			status = "okay";
> +		};
> +
> +		usb2: ehci@00500000 {
> +			status = "okay";
> +		};
> +
> +		sdmmc0: sdio-host@a0000000 {
> +			bus-width = <8>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&pinctrl_sdmmc0_default>;
> +			status = "okay";
> +		};
> +
> +		sdmmc1: sdio-host@b0000000 {
> +			bus-width = <4>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&pinctrl_sdmmc1_default>;
> +			status = "okay";
> +		};
> +
> +		apb {
> +			isc: isc@f0008000 {
> +				pinctrl-names = "default";
> +				pinctrl-0 = <&pinctrl_isc_base &pinctrl_isc_data_8bit &pinctrl_isc_data_9_10 &pinctrl_isc_data_11_12>;
> +				status = "okay";
> +			};
> +
> +			spi0: spi@f8000000 {
> +				pinctrl-names = "default";
> +				pinctrl-0 = <&pinctrl_spi0_default>;
> +				status = "okay";
> +			};
> +
> +			macb0: ethernet@f8008000 {
> +				status = "okay";
> +			};
> +
> +			uart1: serial@f8020000 {
> +				pinctrl-names = "default";
> +				pinctrl-0 = <&pinctrl_uart1_default>;
> +				atmel,use-dma-rx;
> +				atmel,use-dma-tx;
> +				status = "okay";
> +			};
> +
> +			uart2: serial@f8024000 {
> +				pinctrl-names = "default";
> +				pinctrl-0 = <&pinctrl_mikrobus2_uart>;
> +				atmel,use-dma-rx;
> +				atmel-use-dma-tx;
> +				status = "okay";
> +			};
> +
> +			pwm0: pwm@f802c000 {
> +				status = "okay";
> +			};
> +
> +			flx1: flexcom@f8038000 {
> +				atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
> +				status = "disabled";
> +
> +				i2c2: i2c@600 {
> +					compatible = "atmel,sama5d2-i2c";
> +					reg = <0x600 0x200>;
> +					interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>;
> +					dmas = <0>, <0>;
> +					dma-names = "tx", "rx";
> +					#address-cells = <1>;
> +					#size-cells = <0>;
> +					clocks = <&flx1_clk>;
> +					pinctrl-names = "default";
> +					pinctrl-0 = <&pinctrl_mikrobus_i2c>;
> +					atmel,fifo-size = <16>;
> +					status = "disabled";
> +				};
> +			};
> +
> +			shdwc@f8048010 {
> +				atmel,shdwc-debouncer = <976>;
> +				atmel,wakeup-rtc-timer;
> +
> +				input@0 {
> +					reg = <0>;
> +					atmel,wakeup-type = "low";
> +				};
> +			};
> +
> +			watchdog@f8048040 {
> +				status = "okay";
> +			};
> +
> +			can0: can@f8054000 {
> +				pinctrl-names = "default";
> +				pinctrl-0 = <&pinctrl_can0_default>;
> +			};
> +
> +			uart3: serial@fc008000 {
> +				atmel,use-dma-rx;
> +				atmel,use-dma-tx;
> +				pinctrl-names = "default";
> +				pinctrl-0 = <&pinctrl_uart3_default>;
> +				status = "disabled";
> +			};
> +
> +			uart4: serial@fc00c000 {
> +				atmel,use-dma-rx;
> +				atmel,use-dma-tx;
> +				pinctrl-name = "default";
> +				pinctrl-0 = <&pinctrl_mikrobus1_uart>;
> +				status = "okay";
> +			};
> +
> +			flx3: flexcom@fc014000 {
> +				atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>;
> +				status = "disabled";
> +
> +				uart7: serial@200 {
> +					compatible = "atmel,at91sam9260-usart";
> +					reg = <0x200 0x200>;
> +					interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
> +					clocks = <&flx3_clk>;
> +					clock-names = "usart";
> +					pinctrl-names = "default";
> +					pinctrl-0 = <&pinctrl_flx3_default>;
> +					atmel,fifo-size = <32>;
> +					status = "disabled";
> +				};
> +
> +				spi2: spi@400 {
> +					compatible = "atmel,at91rm9200-spi";
> +					reg = <0x400 0x200>;
> +					interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
> +					clocks = <&flx3_clk>;
> +					clock-names = "spi_clk";
> +					pinctrl-names = "default";
> +					pinctrl-0 = <&pinctrl_flx3_default>;
> +					atmel,fifo-size = <16>;
> +					status = "disabled";
> +				};
> +			};
> +
> +			flx4: flexcom@fc018000 {
> +				atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>;
> +				status = "okay";
> +
> +				uart6: serial@200 {
> +					compatible = "atmel,at91sam9260-usart";
> +					reg = <0x200 0x200>;
> +					interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
> +					clocks = <&flx4_clk>;
> +					clock-names = "usart";
> +					pinctrl-names = "default";
> +					pinctrl-0 = <&pinctrl_flx4_default>;
> +					atmel,fifo-size = <32>;
> +					status = "disabled";
> +				};
> +
> +				spi3: spi@400 {
> +					compatible = "atmel,at91rm9200-spi";
> +					reg = <0x400 0x200>;
> +					interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
> +					clocks = <&flx4_clk>;
> +					clock-names = "spi_clk";
> +					pinctrl-names = "default";
> +					pinctrl-0 = <&pinctrl_mikrobus_spi &pinctrl_mikrobus1_spi_cs &pinctrl_mikrobus2_spi_cs>;
> +					atmel,fifo-size = <16>;
> +					status = "okay";
> +				};
> +
> +				i2c3: i2c@600 {
> +					compatible = "atmel,sama5d2-i2c";
> +					reg = <0x600 0x200>;
> +					interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
> +					dmas = <0>, <0>;
> +					dma-names = "tx", "rx";
> +					#address-cells = <1>;
> +					#size-cells = <0>;
> +					clocks = <&flx4_clk>;
> +					pinctrl-names = "default";
> +					pinctrl-0 = <&pinctrl_flx4_default>;
> +					atmel,fifo-size = <16>;
> +					status = "disabled";
> +				};
> +			};
> +
> +			i2c1: i2c@fc028000 {
> +				dmas = <0>, <0>;
> +				pinctrl-names = "default";
> +				pinctrl-0 = <&pinctrl_i2c1_default>;
> +				status = "okay";
> +			};
> +
> +			pinctrl@fc038000 {
> +
> +				pinctrl_can0_default: can0_default {
> +					pinmux = <PIN_PC10__CANTX0>,
> +						 <PIN_PC11__CANRX0>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_can1_default: can1_default {
> +					pinmux = <PIN_PC26__CANTX1>,
> +						 <PIN_PC27__CANRX1>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_flx3_default: flx3_default {
> +					pinmux = <PIN_PC20__FLEXCOM3_IO0>,
> +						 <PIN_PC19__FLEXCOM3_IO1>,
> +						 <PIN_PC18__FLEXCOM3_IO2>,
> +						 <PIN_PC21__FLEXCOM3_IO3>,
> +						 <PIN_PC22__FLEXCOM3_IO4>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_i2c1_default: i2c1_default {
> +					pinmux = <PIN_PD4__TWD1>,
> +						 <PIN_PD5__TWCK1>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_isc_base: isc_base {
> +					pinmux = <PIN_PC21__ISC_PCK>,
> +						 <PIN_PC22__ISC_VSYNC>,
> +						 <PIN_PC23__ISC_HSYNC>,
> +						 <PIN_PC24__ISC_MCK>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_isc_data_8bit: isc_data_8bit {
> +					pinmux = <PIN_PC20__ISC_D11>,
> +						 <PIN_PC19__ISC_D10>,
> +						 <PIN_PC18__ISC_D9>,
> +						 <PIN_PC17__ISC_D8>,
> +						 <PIN_PC16__ISC_D7>,
> +						 <PIN_PC15__ISC_D6>,
> +						 <PIN_PC14__ISC_D5>,
> +						 <PIN_PC13__ISC_D4>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_isc_data_9_10: isc_data_9_10 {
> +					pinmux = <PIN_PC12__ISC_D3>,
> +						 <PIN_PC11__ISC_D2>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_isc_data_11_12: isc_data_11_12 {
> +					pinmux = <PIN_PC10__ISC_D1>,
> +						 <PIN_PC9__ISC_D0>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_key_gpio_default: key_gpio_default {
> +					pinmux = <PIN_PA29__GPIO>;
> +					bias-pull-up;
> +				};
> +
> +				pinctrl_led_gpio_default: led_gpio_default {
> +					pinmux = <PIN_PA27__GPIO>,
> +						 <PIN_PB1__GPIO>,
> +						 <PIN_PA31__GPIO>;
> +					bias-pull-up;
> +				};
> +
> +				pinctrl_sdmmc0_default: sdmmc0_default {
> +					cmd_data {
> +						pinmux = <PIN_PA1__SDMMC0_CMD>,
> +							 <PIN_PA2__SDMMC0_DAT0>,
> +							 <PIN_PA3__SDMMC0_DAT1>,
> +							 <PIN_PA4__SDMMC0_DAT2>,
> +							 <PIN_PA5__SDMMC0_DAT3>,
> +							 <PIN_PA6__SDMMC0_DAT4>,
> +							 <PIN_PA7__SDMMC0_DAT5>,
> +							 <PIN_PA8__SDMMC0_DAT6>,
> +							 <PIN_PA9__SDMMC0_DAT7>;
> +						bias-pull-up;
> +					};
> +
> +					ck_cd_vddsel {
> +						pinmux = <PIN_PA0__SDMMC0_CK>,
> +							 <PIN_PA11__SDMMC0_VDDSEL>,
> +							 <PIN_PA13__SDMMC0_CD>;
> +						bias-disable;
> +					};
> +				};
> +
> +				pinctrl_sdmmc1_default: sdmmc1_default {
> +					cmd_data {
> +						pinmux = <PIN_PA28__SDMMC1_CMD>,
> +							 <PIN_PA18__SDMMC1_DAT0>,
> +							 <PIN_PA19__SDMMC1_DAT1>,
> +							 <PIN_PA20__SDMMC1_DAT2>,
> +							 <PIN_PA21__SDMMC1_DAT3>;
> +						bias-pull-up;
> +					};
> +
> +					conf-ck_cd {
> +						pinmux = <PIN_PA22__SDMMC1_CK>,
> +							 <PIN_PA30__SDMMC1_CD>;
> +						bias-disable;
> +					};
> +				};
> +
> +				pinctrl_sensor_power: sensor_power {
> +					pinmux = <PIN_PB12__GPIO>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_sensor_reset: sensor_reset {
> +					pinmux = <PIN_PB11__GPIO>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_spi0_default: spi0_default {
> +					pinmux = <PIN_PA14__SPI0_SPCK>,
> +						 <PIN_PA15__SPI0_MOSI>,
> +						 <PIN_PA16__SPI0_MISO>,
> +						 <PIN_PA17__SPI0_NPCS0>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_uart1_default: uart1_default {
> +					pinmux = <PIN_PD2__URXD1>,
> +						 <PIN_PD3__UTXD1>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_uart3_default: uart3_default {
> +					pinmux = <PIN_PC12__URXD3>,
> +						 <PIN_PC13__UTXD3>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_usb_default: usb_default {
> +					pinmux = <PIN_PA10__GPIO>,
> +						 <PIN_PD19__GPIO>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_usba_vbus: usba_vbus {
> +					pinmux = <PIN_PD20__GPIO>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_mikrobus1_an: mikrobus1_an {
> +					pinmux = <PIN_PD25__GPIO>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_mikrobus2_an: mikrobus2_an {
> +					pinmux = <PIN_PD26__GPIO>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_mikrobus1_rst: mikrobus1_rst {
> +					pinmux = <PIN_PB2__GPIO>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_mikrobus2_rst: mikrobus2_rst {
> +					pinmux = <PIN_PA26__GPIO>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_mikrobus1_spi_cs: mikrobus1_spi_cs {
> +					pinmux = <PIN_PD0__FLEXCOM4_IO4>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_mikrobus2_spi_cs: mikrobus2_spi_cs {
> +					pinmux = <PIN_PC31__FLEXCOM4_IO3>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_mikrobus_spi: mikrobus_spi {
> +					pinmux = <PIN_PC28__FLEXCOM4_IO0>,
> +						 <PIN_PC29__FLEXCOM4_IO1>,
> +						 <PIN_PC30__FLEXCOM4_IO2>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_mikrobus1_pwm: mikrobus1_pwm {
> +					pinmux = <PIN_PB1__PWML1>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_mikrobus2_pwm: mikrobus2_pwm {
> +					pinmux = <PIN_PA31__PWML0>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_mikrobus1_int: mikrobus1_int {
> +					pinmux = <PIN_PB0__GPIO>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_mikrobus2_int: mikrobus2_int {
> +					pinmux = <PIN_PA25__GPIO>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_mikrobus1_uart: mikrobus1_uart {
> +					pinmux = <PIN_PB3__URXD4>,
> +						 <PIN_PB4__UTXD4>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_mikrobus2_uart: mikrobus2_uart {
> +					pinmux = <PIN_PD23__URXD2>,
> +						 <PIN_PD24__UTXD2>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_mikrobus_i2c: mikrobus1_i2c {
> +					pinmux = <PIN_PA24__FLEXCOM1_IO0>,
> +						 <PIN_PA23__FLEXCOM1_IO1>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_flx4_default: flx4_uart_default {
> +					pinmux = <PIN_PC28__FLEXCOM4_IO0>,
> +						 <PIN_PC29__FLEXCOM4_IO1>,
> +						 <PIN_PC30__FLEXCOM4_IO2>,
> +						 <PIN_PC31__FLEXCOM4_IO3>,
> +						 <PIN_PD0__FLEXCOM4_IO4>;
> +					bias-disable;
> +				};
> +			};
> +
> +			can1: can@fc050000 {
> +				pinctrl-names = "default";
> +				pinctrl-0 = <&pinctrl_can1_default>;
> +				status = "okay";
> +			};
> +		};
> +	};
> +
> +	gpio_keys {
> +		compatible = "gpio-keys";
> +
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_key_gpio_default>;
> +
> +		bp1 {
> +			label = "USER";
> +			gpios = <&pioA 29 GPIO_ACTIVE_LOW>;

Ditto

> +			linux,code = <0x104>;
> +		};
> +	};
> +
> +	leds {
> +		compatible = "gpio-leds";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_led_gpio_default>;
> +		status = "okay";
> +
> +		red {
> +			label = "red";
> +			gpios = <&pioA 27 GPIO_ACTIVE_LOW>;

Ditto

> +		};
> +
> +		green {
> +			label = "green";
> +			gpios = <&pioA 33 GPIO_ACTIVE_LOW>;

Ditto

> +		};
> +
> +		blue {
> +			label = "blue";
> +			gpios = <&pioA 31 GPIO_ACTIVE_LOW>;

Ditto

Regards

Ludovic

> +			linux,default-trigger = "heartbeat";
> +		};
> +	};
> +};
> -- 
> 2.7.4
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH 5/5] ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support
  2017-06-29 12:16     ` Alexandre Belloni
@ 2017-06-30 12:28       ` m18063
  0 siblings, 0 replies; 15+ messages in thread
From: m18063 @ 2017-06-30 12:28 UTC (permalink / raw)
  To: Alexandre Belloni, Baruch Siach
  Cc: nicolas.ferre, robh+dt, mark.rutland, linux, sza, devicetree,
	cristian.birsan, linux-kernel, linux-arm-kernel

Hi Baruch, Alexandre

On 29.06.2017 15:16, Alexandre Belloni wrote:
> On 29/06/2017 at 14:59:31 +0300, Baruch Siach wrote:
>> Hi Claudiu,
>>
>> On Thu, Jun 29, 2017 at 02:44:34PM +0300, Claudiu Beznea wrote:
>>> Add specifig DTS files and bindings for sama5d27 SoM1 EK board.
>>
>> Is there any publicly available information on this SoM?
>>
>> One more comment below.
>>
>>> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
>>> Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
>>> ---
>>
>> [snip]
>>
>>> +	memory {
>>> +		reg = <0x20000000 0x20000>;
>>
>> Are you sure this SoM has 132KB RAM?
Yes, here is a mistake, the size is 128MB. Sorry for the noise.
>>
>> Since you seem to rely on the bootloader to fill in the right size value, you 
>> can just drop this node and rely on sama5d2.dtsi that provides a stub node.
>>
> 
> Yeah, that is what I would do too.
Ok, I will do it so in v2.

Thank you,
Claudiu
> 
> 

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH 5/5] ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support
  2017-06-29 15:04   ` Ludovic Desroches
@ 2017-06-30 12:32     ` m18063
  0 siblings, 0 replies; 15+ messages in thread
From: m18063 @ 2017-06-30 12:32 UTC (permalink / raw)
  To: nicolas.ferre, alexandre.belloni, robh+dt, mark.rutland, linux,
	sza, devicetree, cristian.birsan, linux-kernel, linux-arm-kernel

Hi Ludovic,

On 29.06.2017 18:04, Ludovic Desroches wrote:
> On Thu, Jun 29, 2017 at 02:44:34PM +0300, Claudiu Beznea wrote:
>> Add specifig DTS files and bindings for sama5d27 SoM1 EK board.
>>
>> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
>> Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
>> ---
>>  arch/arm/boot/dts/Makefile                  |   1 +
>>  arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 551 ++++++++++++++++++++++++++++
>>  2 files changed, 552 insertions(+)
>>  create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
>>
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index 9449493..3396f73 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -46,6 +46,7 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
>>  	at91sam9x35ek.dtb
>>  dtb-$(CONFIG_SOC_SAM_V7) += \
>>  	at91-kizbox2.dtb \
>> +	at91-sama5d27_som1_ek.dtb \
>>  	at91-sama5d2_xplained.dtb \
>>  	at91-sama5d3_xplained.dtb \
>>  	at91-tse850-3.dtb \
>> diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
>> new file mode 100644
>> index 0000000..a87125e
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
>> @@ -0,0 +1,551 @@
>> +/*
>> + * at91-sama5d27_som1_ek.dts - Device Tree file for SAMA5D27-SOM1-EK board
>> + *
>> + *  Copyright (c) 2017, Microchip Technology Inc.
>> + *                2016 Nicolas Ferre <nicolas.ferre@atmel.com>
>> + *                2017 Cristian Birsan <cristian.birsan@microchip.com>
>> + *                2017 Claudiu Beznea <claudiu.beznea@microchip.com>
>> + *
>> + * This file is dual-licensed: you can use it either under the terms
>> + * of the GPL or the X11 license, at your option. Note that this dual
>> + * licensing only applies to this file, and not this project as a
>> + * whole.
>> + *
>> + *  a) This file is free software; you can redistribute it and/or
>> + *     modify it under the terms of the GNU General Public License as
>> + *     published by the Free Software Foundation; either version 2 of the
>> + *     License, or (at your option) any later version.
>> + *
>> + *     This file is distributed in the hope that it will be useful,
>> + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + *     GNU General Public License for more details.
>> + *
>> + * Or, alternatively,
>> + *
>> + *  b) Permission is hereby granted, free of charge, to any person
>> + *     obtaining a copy of this software and associated documentation
>> + *     files (the "Software"), to deal in the Software without
>> + *     restriction, including without limitation the rights to use,
>> + *     copy, modify, merge, publish, distribute, sublicense, and/or
>> + *     sell copies of the Software, and to permit persons to whom the
>> + *     Software is furnished to do so, subject to the following
>> + *     conditions:
>> + *
>> + *     The above copyright notice and this permission notice shall be
>> + *     included in all copies or substantial portions of the Software.
>> + *
>> + *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>> + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>> + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>> + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>> + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
>> + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> + *     OTHER DEALINGS IN THE SOFTWARE.
>> + */
>> +/dts-v1/;
>> +#include "at91-sama5d27_som1.dtsi"
>> +#include <dt-bindings/mfd/atmel-flexcom.h>
>> +#include <dt-bindings/gpio/gpio.h>
>> +
>> +/ {
>> +	model = "Atmel SAMA5D27 SOM1 EK";
>> +	compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
>> +
>> +	chosen {
>> +		stdout-path = "serial0:115200n8";
>> +	};
>> +
>> +	memory {
>> +		reg = <0x20000000 0x20000>;
>> +	};
>> +
>> +	ahb {
>> +		usb0: gadget@00300000 {
>> +			atmel,vbus-gpio = <&pioA 116 GPIO_ACTIVE_HIGH>;
> 
> Even if it is not done in other dts file (I plan to send patches to fix
> it), prefer macros to avoid errors: PIN_PD20.
Indeed, it is better to use directly the pin macros. I will do the necessary
changes in v2.

Thank you,
Claudiu
> 
>> +			pinctrl-names = "default";
>> +			pinctrl-0 = <&pinctrl_usba_vbus>;
>> +			status = "okay";
>> +		};
>> +
>> +		usb1: ohci@00400000 {
>> +			num-ports = <3>;
>> +			atmel,vbus-gpio = <&pioA 10 GPIO_ACTIVE_HIGH>;
> 
> Ditto
Ditto
> 
>> +			pinctrl-names = "default";
>> +			pinctrl-0 = <&pinctrl_usb_default>;
>> +			status = "okay";
>> +		};
>> +
>> +		usb2: ehci@00500000 {
>> +			status = "okay";
>> +		};
>> +
>> +		sdmmc0: sdio-host@a0000000 {
>> +			bus-width = <8>;
>> +			pinctrl-names = "default";
>> +			pinctrl-0 = <&pinctrl_sdmmc0_default>;
>> +			status = "okay";
>> +		};
>> +
>> +		sdmmc1: sdio-host@b0000000 {
>> +			bus-width = <4>;
>> +			pinctrl-names = "default";
>> +			pinctrl-0 = <&pinctrl_sdmmc1_default>;
>> +			status = "okay";
>> +		};
>> +
>> +		apb {
>> +			isc: isc@f0008000 {
>> +				pinctrl-names = "default";
>> +				pinctrl-0 = <&pinctrl_isc_base &pinctrl_isc_data_8bit &pinctrl_isc_data_9_10 &pinctrl_isc_data_11_12>;
>> +				status = "okay";
>> +			};
>> +
>> +			spi0: spi@f8000000 {
>> +				pinctrl-names = "default";
>> +				pinctrl-0 = <&pinctrl_spi0_default>;
>> +				status = "okay";
>> +			};
>> +
>> +			macb0: ethernet@f8008000 {
>> +				status = "okay";
>> +			};
>> +
>> +			uart1: serial@f8020000 {
>> +				pinctrl-names = "default";
>> +				pinctrl-0 = <&pinctrl_uart1_default>;
>> +				atmel,use-dma-rx;
>> +				atmel,use-dma-tx;
>> +				status = "okay";
>> +			};
>> +
>> +			uart2: serial@f8024000 {
>> +				pinctrl-names = "default";
>> +				pinctrl-0 = <&pinctrl_mikrobus2_uart>;
>> +				atmel,use-dma-rx;
>> +				atmel-use-dma-tx;
>> +				status = "okay";
>> +			};
>> +
>> +			pwm0: pwm@f802c000 {
>> +				status = "okay";
>> +			};
>> +
>> +			flx1: flexcom@f8038000 {
>> +				atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
>> +				status = "disabled";
>> +
>> +				i2c2: i2c@600 {
>> +					compatible = "atmel,sama5d2-i2c";
>> +					reg = <0x600 0x200>;
>> +					interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>;
>> +					dmas = <0>, <0>;
>> +					dma-names = "tx", "rx";
>> +					#address-cells = <1>;
>> +					#size-cells = <0>;
>> +					clocks = <&flx1_clk>;
>> +					pinctrl-names = "default";
>> +					pinctrl-0 = <&pinctrl_mikrobus_i2c>;
>> +					atmel,fifo-size = <16>;
>> +					status = "disabled";
>> +				};
>> +			};
>> +
>> +			shdwc@f8048010 {
>> +				atmel,shdwc-debouncer = <976>;
>> +				atmel,wakeup-rtc-timer;
>> +
>> +				input@0 {
>> +					reg = <0>;
>> +					atmel,wakeup-type = "low";
>> +				};
>> +			};
>> +
>> +			watchdog@f8048040 {
>> +				status = "okay";
>> +			};
>> +
>> +			can0: can@f8054000 {
>> +				pinctrl-names = "default";
>> +				pinctrl-0 = <&pinctrl_can0_default>;
>> +			};
>> +
>> +			uart3: serial@fc008000 {
>> +				atmel,use-dma-rx;
>> +				atmel,use-dma-tx;
>> +				pinctrl-names = "default";
>> +				pinctrl-0 = <&pinctrl_uart3_default>;
>> +				status = "disabled";
>> +			};
>> +
>> +			uart4: serial@fc00c000 {
>> +				atmel,use-dma-rx;
>> +				atmel,use-dma-tx;
>> +				pinctrl-name = "default";
>> +				pinctrl-0 = <&pinctrl_mikrobus1_uart>;
>> +				status = "okay";
>> +			};
>> +
>> +			flx3: flexcom@fc014000 {
>> +				atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>;
>> +				status = "disabled";
>> +
>> +				uart7: serial@200 {
>> +					compatible = "atmel,at91sam9260-usart";
>> +					reg = <0x200 0x200>;
>> +					interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
>> +					clocks = <&flx3_clk>;
>> +					clock-names = "usart";
>> +					pinctrl-names = "default";
>> +					pinctrl-0 = <&pinctrl_flx3_default>;
>> +					atmel,fifo-size = <32>;
>> +					status = "disabled";
>> +				};
>> +
>> +				spi2: spi@400 {
>> +					compatible = "atmel,at91rm9200-spi";
>> +					reg = <0x400 0x200>;
>> +					interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
>> +					clocks = <&flx3_clk>;
>> +					clock-names = "spi_clk";
>> +					pinctrl-names = "default";
>> +					pinctrl-0 = <&pinctrl_flx3_default>;
>> +					atmel,fifo-size = <16>;
>> +					status = "disabled";
>> +				};
>> +			};
>> +
>> +			flx4: flexcom@fc018000 {
>> +				atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>;
>> +				status = "okay";
>> +
>> +				uart6: serial@200 {
>> +					compatible = "atmel,at91sam9260-usart";
>> +					reg = <0x200 0x200>;
>> +					interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
>> +					clocks = <&flx4_clk>;
>> +					clock-names = "usart";
>> +					pinctrl-names = "default";
>> +					pinctrl-0 = <&pinctrl_flx4_default>;
>> +					atmel,fifo-size = <32>;
>> +					status = "disabled";
>> +				};
>> +
>> +				spi3: spi@400 {
>> +					compatible = "atmel,at91rm9200-spi";
>> +					reg = <0x400 0x200>;
>> +					interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
>> +					clocks = <&flx4_clk>;
>> +					clock-names = "spi_clk";
>> +					pinctrl-names = "default";
>> +					pinctrl-0 = <&pinctrl_mikrobus_spi &pinctrl_mikrobus1_spi_cs &pinctrl_mikrobus2_spi_cs>;
>> +					atmel,fifo-size = <16>;
>> +					status = "okay";
>> +				};
>> +
>> +				i2c3: i2c@600 {
>> +					compatible = "atmel,sama5d2-i2c";
>> +					reg = <0x600 0x200>;
>> +					interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
>> +					dmas = <0>, <0>;
>> +					dma-names = "tx", "rx";
>> +					#address-cells = <1>;
>> +					#size-cells = <0>;
>> +					clocks = <&flx4_clk>;
>> +					pinctrl-names = "default";
>> +					pinctrl-0 = <&pinctrl_flx4_default>;
>> +					atmel,fifo-size = <16>;
>> +					status = "disabled";
>> +				};
>> +			};
>> +
>> +			i2c1: i2c@fc028000 {
>> +				dmas = <0>, <0>;
>> +				pinctrl-names = "default";
>> +				pinctrl-0 = <&pinctrl_i2c1_default>;
>> +				status = "okay";
>> +			};
>> +
>> +			pinctrl@fc038000 {
>> +
>> +				pinctrl_can0_default: can0_default {
>> +					pinmux = <PIN_PC10__CANTX0>,
>> +						 <PIN_PC11__CANRX0>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_can1_default: can1_default {
>> +					pinmux = <PIN_PC26__CANTX1>,
>> +						 <PIN_PC27__CANRX1>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_flx3_default: flx3_default {
>> +					pinmux = <PIN_PC20__FLEXCOM3_IO0>,
>> +						 <PIN_PC19__FLEXCOM3_IO1>,
>> +						 <PIN_PC18__FLEXCOM3_IO2>,
>> +						 <PIN_PC21__FLEXCOM3_IO3>,
>> +						 <PIN_PC22__FLEXCOM3_IO4>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_i2c1_default: i2c1_default {
>> +					pinmux = <PIN_PD4__TWD1>,
>> +						 <PIN_PD5__TWCK1>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_isc_base: isc_base {
>> +					pinmux = <PIN_PC21__ISC_PCK>,
>> +						 <PIN_PC22__ISC_VSYNC>,
>> +						 <PIN_PC23__ISC_HSYNC>,
>> +						 <PIN_PC24__ISC_MCK>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_isc_data_8bit: isc_data_8bit {
>> +					pinmux = <PIN_PC20__ISC_D11>,
>> +						 <PIN_PC19__ISC_D10>,
>> +						 <PIN_PC18__ISC_D9>,
>> +						 <PIN_PC17__ISC_D8>,
>> +						 <PIN_PC16__ISC_D7>,
>> +						 <PIN_PC15__ISC_D6>,
>> +						 <PIN_PC14__ISC_D5>,
>> +						 <PIN_PC13__ISC_D4>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_isc_data_9_10: isc_data_9_10 {
>> +					pinmux = <PIN_PC12__ISC_D3>,
>> +						 <PIN_PC11__ISC_D2>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_isc_data_11_12: isc_data_11_12 {
>> +					pinmux = <PIN_PC10__ISC_D1>,
>> +						 <PIN_PC9__ISC_D0>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_key_gpio_default: key_gpio_default {
>> +					pinmux = <PIN_PA29__GPIO>;
>> +					bias-pull-up;
>> +				};
>> +
>> +				pinctrl_led_gpio_default: led_gpio_default {
>> +					pinmux = <PIN_PA27__GPIO>,
>> +						 <PIN_PB1__GPIO>,
>> +						 <PIN_PA31__GPIO>;
>> +					bias-pull-up;
>> +				};
>> +
>> +				pinctrl_sdmmc0_default: sdmmc0_default {
>> +					cmd_data {
>> +						pinmux = <PIN_PA1__SDMMC0_CMD>,
>> +							 <PIN_PA2__SDMMC0_DAT0>,
>> +							 <PIN_PA3__SDMMC0_DAT1>,
>> +							 <PIN_PA4__SDMMC0_DAT2>,
>> +							 <PIN_PA5__SDMMC0_DAT3>,
>> +							 <PIN_PA6__SDMMC0_DAT4>,
>> +							 <PIN_PA7__SDMMC0_DAT5>,
>> +							 <PIN_PA8__SDMMC0_DAT6>,
>> +							 <PIN_PA9__SDMMC0_DAT7>;
>> +						bias-pull-up;
>> +					};
>> +
>> +					ck_cd_vddsel {
>> +						pinmux = <PIN_PA0__SDMMC0_CK>,
>> +							 <PIN_PA11__SDMMC0_VDDSEL>,
>> +							 <PIN_PA13__SDMMC0_CD>;
>> +						bias-disable;
>> +					};
>> +				};
>> +
>> +				pinctrl_sdmmc1_default: sdmmc1_default {
>> +					cmd_data {
>> +						pinmux = <PIN_PA28__SDMMC1_CMD>,
>> +							 <PIN_PA18__SDMMC1_DAT0>,
>> +							 <PIN_PA19__SDMMC1_DAT1>,
>> +							 <PIN_PA20__SDMMC1_DAT2>,
>> +							 <PIN_PA21__SDMMC1_DAT3>;
>> +						bias-pull-up;
>> +					};
>> +
>> +					conf-ck_cd {
>> +						pinmux = <PIN_PA22__SDMMC1_CK>,
>> +							 <PIN_PA30__SDMMC1_CD>;
>> +						bias-disable;
>> +					};
>> +				};
>> +
>> +				pinctrl_sensor_power: sensor_power {
>> +					pinmux = <PIN_PB12__GPIO>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_sensor_reset: sensor_reset {
>> +					pinmux = <PIN_PB11__GPIO>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_spi0_default: spi0_default {
>> +					pinmux = <PIN_PA14__SPI0_SPCK>,
>> +						 <PIN_PA15__SPI0_MOSI>,
>> +						 <PIN_PA16__SPI0_MISO>,
>> +						 <PIN_PA17__SPI0_NPCS0>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_uart1_default: uart1_default {
>> +					pinmux = <PIN_PD2__URXD1>,
>> +						 <PIN_PD3__UTXD1>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_uart3_default: uart3_default {
>> +					pinmux = <PIN_PC12__URXD3>,
>> +						 <PIN_PC13__UTXD3>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_usb_default: usb_default {
>> +					pinmux = <PIN_PA10__GPIO>,
>> +						 <PIN_PD19__GPIO>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_usba_vbus: usba_vbus {
>> +					pinmux = <PIN_PD20__GPIO>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_mikrobus1_an: mikrobus1_an {
>> +					pinmux = <PIN_PD25__GPIO>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_mikrobus2_an: mikrobus2_an {
>> +					pinmux = <PIN_PD26__GPIO>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_mikrobus1_rst: mikrobus1_rst {
>> +					pinmux = <PIN_PB2__GPIO>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_mikrobus2_rst: mikrobus2_rst {
>> +					pinmux = <PIN_PA26__GPIO>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_mikrobus1_spi_cs: mikrobus1_spi_cs {
>> +					pinmux = <PIN_PD0__FLEXCOM4_IO4>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_mikrobus2_spi_cs: mikrobus2_spi_cs {
>> +					pinmux = <PIN_PC31__FLEXCOM4_IO3>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_mikrobus_spi: mikrobus_spi {
>> +					pinmux = <PIN_PC28__FLEXCOM4_IO0>,
>> +						 <PIN_PC29__FLEXCOM4_IO1>,
>> +						 <PIN_PC30__FLEXCOM4_IO2>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_mikrobus1_pwm: mikrobus1_pwm {
>> +					pinmux = <PIN_PB1__PWML1>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_mikrobus2_pwm: mikrobus2_pwm {
>> +					pinmux = <PIN_PA31__PWML0>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_mikrobus1_int: mikrobus1_int {
>> +					pinmux = <PIN_PB0__GPIO>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_mikrobus2_int: mikrobus2_int {
>> +					pinmux = <PIN_PA25__GPIO>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_mikrobus1_uart: mikrobus1_uart {
>> +					pinmux = <PIN_PB3__URXD4>,
>> +						 <PIN_PB4__UTXD4>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_mikrobus2_uart: mikrobus2_uart {
>> +					pinmux = <PIN_PD23__URXD2>,
>> +						 <PIN_PD24__UTXD2>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_mikrobus_i2c: mikrobus1_i2c {
>> +					pinmux = <PIN_PA24__FLEXCOM1_IO0>,
>> +						 <PIN_PA23__FLEXCOM1_IO1>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_flx4_default: flx4_uart_default {
>> +					pinmux = <PIN_PC28__FLEXCOM4_IO0>,
>> +						 <PIN_PC29__FLEXCOM4_IO1>,
>> +						 <PIN_PC30__FLEXCOM4_IO2>,
>> +						 <PIN_PC31__FLEXCOM4_IO3>,
>> +						 <PIN_PD0__FLEXCOM4_IO4>;
>> +					bias-disable;
>> +				};
>> +			};
>> +
>> +			can1: can@fc050000 {
>> +				pinctrl-names = "default";
>> +				pinctrl-0 = <&pinctrl_can1_default>;
>> +				status = "okay";
>> +			};
>> +		};
>> +	};
>> +
>> +	gpio_keys {
>> +		compatible = "gpio-keys";
>> +
>> +		pinctrl-names = "default";
>> +		pinctrl-0 = <&pinctrl_key_gpio_default>;
>> +
>> +		bp1 {
>> +			label = "USER";
>> +			gpios = <&pioA 29 GPIO_ACTIVE_LOW>;
> 
> Ditto
Ditto
> 
>> +			linux,code = <0x104>;
>> +		};
>> +	};
>> +
>> +	leds {
>> +		compatible = "gpio-leds";
>> +		pinctrl-names = "default";
>> +		pinctrl-0 = <&pinctrl_led_gpio_default>;
>> +		status = "okay";
>> +
>> +		red {
>> +			label = "red";
>> +			gpios = <&pioA 27 GPIO_ACTIVE_LOW>;
> 
> Ditto
Ditto
> 
>> +		};
>> +
>> +		green {
>> +			label = "green";
>> +			gpios = <&pioA 33 GPIO_ACTIVE_LOW>;
> 
> Ditto
Ditto
> 
>> +		};
>> +
>> +		blue {
>> +			label = "blue";
>> +			gpios = <&pioA 31 GPIO_ACTIVE_LOW>;
> 
> Ditto
Ditto
> 
> Regards
> 
> Ludovic
> 
>> +			linux,default-trigger = "heartbeat";
>> +		};
>> +	};
>> +};
>> -- 
>> 2.7.4
>>
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH 4/5] ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support
  2017-06-29 14:58   ` Ludovic Desroches
@ 2017-06-30 12:38     ` m18063
  2017-06-30 12:57       ` Ludovic Desroches
  0 siblings, 1 reply; 15+ messages in thread
From: m18063 @ 2017-06-30 12:38 UTC (permalink / raw)
  To: nicolas.ferre, alexandre.belloni, robh+dt, mark.rutland, linux,
	sza, devicetree, cristian.birsan, linux-kernel, linux-arm-kernel

Hi Ludovic,

On 29.06.2017 17:58, Ludovic Desroches wrote:
> On Thu, Jun 29, 2017 at 02:44:33PM +0300, Claudiu Beznea wrote:
>> Add specific DTS file and bindings for sama5d27 SoM1 board.
>>
>> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
>> Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
>> ---
>>  arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 178 ++++++++++++++++++++++++++++++
>>  1 file changed, 178 insertions(+)
>>  create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1.dtsi
>>
>> diff --git a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
>> new file mode 100644
>> index 0000000..b3af4d4
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
>> @@ -0,0 +1,178 @@
>> +/*
>> + * at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
>> + *
>> + *  Copyright (c) 2017, Microchip Technology Inc.
>> + *                2017 Cristian Birsan <cristian.birsan@microchip.com>
>> + *                2017 Claudiu Beznea <claudiu.beznea@microchip.com>
>> + *
>> + * This file is dual-licensed: you can use it either under the terms
>> + * of the GPL or the X11 license, at your option. Note that this dual
>> + * licensing only applies to this file, and not this project as a
>> + * whole.
>> + *
>> + *  a) This file is free software; you can redistribute it and/or
>> + *     modify it under the terms of the GNU General Public License as
>> + *     published by the Free Software Foundation; either version 2 of the
>> + *     License, or (at your option) any later version.
>> + *
>> + *     This file is distributed in the hope that it will be useful,
>> + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + *     GNU General Public License for more details.
>> + *
>> + * Or, alternatively,
>> + *
>> + *  b) Permission is hereby granted, free of charge, to any person
>> + *     obtaining a copy of this software and associated documentation
>> + *     files (the "Software"), to deal in the Software without
>> + *     restriction, including without limitation the rights to use,
>> + *     copy, modify, merge, publish, distribute, sublicense, and/or
>> + *     sell copies of the Software, and to permit persons to whom the
>> + *     Software is furnished to do so, subject to the following
>> + *     conditions:
>> + *
>> + *     The above copyright notice and this permission notice shall be
>> + *     included in all copies or substantial portions of the Software.
>> + *
>> + *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>> + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>> + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>> + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>> + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
>> + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> + *     OTHER DEALINGS IN THE SOFTWARE.
>> + */
>> +#include "sama5d2.dtsi"
>> +#include "sama5d2-pinfunc.h"
>> +
>> +/ {
>> +	model = "Atmel SAMA5D27 SoM1";
>> +	compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
>> +
>> +	clocks {
>> +		slow_xtal {
>> +			clock-frequency = <32768>;
>> +		};
>> +
>> +		main_xtal {
>> +			clock-frequency = <24000000>;
>> +		};
>> +	};
>> +
>> +	ahb {
>> +		apb {
>> +			qspi1: spi@f0024000 {
>> +				pinctrl-names = "default";
>> +				pinctrl-0 = <&pinctrl_qspi1_default>;
>> +				flash@0 {
>> +					#address-cells = <1>;
>> +					#size-cells = <1>;
>> +					compatible = "jedec,spi-nor";
>> +					reg = <0>;
>> +					spi-max-frequency = <83000000>;
>> +					m25p,fast-read;
>> +
>> +					at91bootstrap@00000000 {
>> +						label = "at91bootstrap";
>> +						reg = <0x00000000 0x00010000>;
>> +					};
>> +
>> +					bootloaderenv@00010000 {
>> +						label = "bootloader env";
>> +						reg = <0x00010000 0x00010000>;
>> +					};
>> +
>> +					bootloader@00020000 {
>> +						label = "bootloader";
>> +						reg = <0x00020000 0x00050000>;
>> +					};
>> +
>> +					dtb@00070000 {
>> +						label = "device tree";
>> +						reg = <0x00070000 0x00010000>;
>> +					};
>> +
>> +					kernel@00080000 {
>> +						label = "kernel";
>> +						reg = <0x00080000 0x00380000>;
>> +					};
> 
> I am wondering if it's a good idea to give the flash map here. If we
> take a kernel generated by a sama5_defconfig, it is about 3.8 MB.
The flash size here is 8MB. With kernel image of 3.8M, bootloader of 18KB,
u-boot of 2.2MB, dtb of 31K it will still fit.
> 
>> +				};
>> +			};
>> +
>> +			macb0: ethernet@f8008000 {
>> +				pinctrl-names = "default";
>> +				pinctrl-0 = <&pinctrl_macb0_default>;
>> +				phy-mode = "rmii";
>> +
>> +				ethernet-phy@1 {
>> +					reg = <0x1>;
>> +					interrupt-parent = <&pioA>;
>> +					interrupts = <73 IRQ_TYPE_LEVEL_LOW>;
> 
> Are you sure about this value? pinctrl tells PD31 so 127. By the way, it
> is better to use macros: PIN_PD31.
Yes, here is a mistake. It has to be PIN_PD31. I will fix it in v2.

Thank you,
Claudiu
> 
> Regards
> 
> Ludovic
> 
>> +					pinctrl-names = "default";
>> +					pinctrl-0 = <&pinctrl_macb0_phy_irq>;
>> +				};
>> +			};
>> +
>> +			i2c0: i2c@f8028000 {
>> +				dmas = <0>, <0>;
>> +				pinctrl-names = "default";
>> +				pinctrl-0 = <&pinctrl_i2c0_default>;
>> +				i2c-sda-hold-time-ns = <350>;
>> +				status = "disabled";
>> +
>> +				24aa@50 {
>> +					compatible = "24mac602";
>> +					reg = <0x50>;
>> +					pagesize = <8>;
>> +					start-offset = /bits/ 8 <0xf8>;
>> +					read-only;
>> +				};
>> +			};
>> +
>> +			pinctrl@fc038000 {
>> +
>> +				pinctrl_i2c0_default: i2c0_default {
>> +					pinmux = <PIN_PD21__TWD0>,
>> +						 <PIN_PD22__TWCK0>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_macb0_default: macb0_default {
>> +					pinmux = <PIN_PD9__GTXCK>,
>> +						 <PIN_PD10__GTXEN>,
>> +						 <PIN_PD11__GRXDV>,
>> +						 <PIN_PD12__GRXER>,
>> +						 <PIN_PD13__GRX0>,
>> +						 <PIN_PD14__GRX1>,
>> +						 <PIN_PD15__GTX0>,
>> +						 <PIN_PD16__GTX1>,
>> +						 <PIN_PD17__GMDC>,
>> +						 <PIN_PD18__GMDIO>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_macb0_phy_irq: macb0_phy_irq {
>> +					pinmux = <PIN_PD31__GPIO>;
>> +					bias-disable;
>> +				};
>> +
>> +				pinctrl_qspi1_default: qspi1_default {
>> +					sck_cs {
>> +						pinmux = <PIN_PB5__QSPI1_SCK>,
>> +							 <PIN_PB6__QSPI1_CS>;
>> +						bias-disable;
>> +					};
>> +
>> +					data {
>> +						pinmux = <PIN_PB7__QSPI1_IO0>,
>> +							 <PIN_PB8__QSPI1_IO1>,
>> +							 <PIN_PB9__QSPI1_IO2>,
>> +							 <PIN_PB10__QSPI1_IO3>;
>> +						bias-pull-up;
>> +					};
>> +				};
>> +			};
>> +		};
>> +	};
>> +};
>> -- 
>> 2.7.4
>>
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH 4/5] ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support
  2017-06-30 12:38     ` m18063
@ 2017-06-30 12:57       ` Ludovic Desroches
  2017-06-30 13:01         ` m18063
  0 siblings, 1 reply; 15+ messages in thread
From: Ludovic Desroches @ 2017-06-30 12:57 UTC (permalink / raw)
  To: m18063
  Cc: nicolas.ferre, alexandre.belloni, robh+dt, mark.rutland, linux,
	sza, devicetree, cristian.birsan, linux-kernel, linux-arm-kernel

On Fri, Jun 30, 2017 at 03:38:22PM +0300, m18063 wrote:
> Hi Ludovic,
> 
> On 29.06.2017 17:58, Ludovic Desroches wrote:
> > On Thu, Jun 29, 2017 at 02:44:33PM +0300, Claudiu Beznea wrote:
> >> Add specific DTS file and bindings for sama5d27 SoM1 board.
> >>
> >> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> >> Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
> >> ---
> >>  arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 178 ++++++++++++++++++++++++++++++
> >>  1 file changed, 178 insertions(+)
> >>  create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1.dtsi
> >>
> >> diff --git a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
> >> new file mode 100644
> >> index 0000000..b3af4d4
> >> --- /dev/null
> >> +++ b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
> >> @@ -0,0 +1,178 @@
> >> +/*
> >> + * at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
> >> + *
> >> + *  Copyright (c) 2017, Microchip Technology Inc.
> >> + *                2017 Cristian Birsan <cristian.birsan@microchip.com>
> >> + *                2017 Claudiu Beznea <claudiu.beznea@microchip.com>
> >> + *
> >> + * This file is dual-licensed: you can use it either under the terms
> >> + * of the GPL or the X11 license, at your option. Note that this dual
> >> + * licensing only applies to this file, and not this project as a
> >> + * whole.
> >> + *
> >> + *  a) This file is free software; you can redistribute it and/or
> >> + *     modify it under the terms of the GNU General Public License as
> >> + *     published by the Free Software Foundation; either version 2 of the
> >> + *     License, or (at your option) any later version.
> >> + *
> >> + *     This file is distributed in the hope that it will be useful,
> >> + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
> >> + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> >> + *     GNU General Public License for more details.
> >> + *
> >> + * Or, alternatively,
> >> + *
> >> + *  b) Permission is hereby granted, free of charge, to any person
> >> + *     obtaining a copy of this software and associated documentation
> >> + *     files (the "Software"), to deal in the Software without
> >> + *     restriction, including without limitation the rights to use,
> >> + *     copy, modify, merge, publish, distribute, sublicense, and/or
> >> + *     sell copies of the Software, and to permit persons to whom the
> >> + *     Software is furnished to do so, subject to the following
> >> + *     conditions:
> >> + *
> >> + *     The above copyright notice and this permission notice shall be
> >> + *     included in all copies or substantial portions of the Software.
> >> + *
> >> + *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> >> + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> >> + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> >> + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> >> + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> >> + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> >> + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> >> + *     OTHER DEALINGS IN THE SOFTWARE.
> >> + */
> >> +#include "sama5d2.dtsi"
> >> +#include "sama5d2-pinfunc.h"
> >> +
> >> +/ {
> >> +	model = "Atmel SAMA5D27 SoM1";
> >> +	compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
> >> +
> >> +	clocks {
> >> +		slow_xtal {
> >> +			clock-frequency = <32768>;
> >> +		};
> >> +
> >> +		main_xtal {
> >> +			clock-frequency = <24000000>;
> >> +		};
> >> +	};
> >> +
> >> +	ahb {
> >> +		apb {
> >> +			qspi1: spi@f0024000 {
> >> +				pinctrl-names = "default";
> >> +				pinctrl-0 = <&pinctrl_qspi1_default>;
> >> +				flash@0 {
> >> +					#address-cells = <1>;
> >> +					#size-cells = <1>;
> >> +					compatible = "jedec,spi-nor";
> >> +					reg = <0>;
> >> +					spi-max-frequency = <83000000>;
> >> +					m25p,fast-read;
> >> +
> >> +					at91bootstrap@00000000 {
> >> +						label = "at91bootstrap";
> >> +						reg = <0x00000000 0x00010000>;
> >> +					};
> >> +
> >> +					bootloaderenv@00010000 {
> >> +						label = "bootloader env";
> >> +						reg = <0x00010000 0x00010000>;
> >> +					};
> >> +
> >> +					bootloader@00020000 {
> >> +						label = "bootloader";
> >> +						reg = <0x00020000 0x00050000>;
> >> +					};
> >> +
> >> +					dtb@00070000 {
> >> +						label = "device tree";
> >> +						reg = <0x00070000 0x00010000>;
> >> +					};
> >> +
> >> +					kernel@00080000 {
> >> +						label = "kernel";
> >> +						reg = <0x00080000 0x00380000>;
> >> +					};
> > 
> > I am wondering if it's a good idea to give the flash map here. If we
> > take a kernel generated by a sama5_defconfig, it is about 3.8 MB.
> The flash size here is 8MB. With kernel image of 3.8M, bootloader of 18KB,
> u-boot of 2.2MB, dtb of 31K it will still fit.

Right it can fit, I mean the description gives about 3.5 MB for the kernel so
you can extend it.

Regards

Ludovic

> > 
> >> +				};
> >> +			};
> >> +
> >> +			macb0: ethernet@f8008000 {
> >> +				pinctrl-names = "default";
> >> +				pinctrl-0 = <&pinctrl_macb0_default>;
> >> +				phy-mode = "rmii";
> >> +
> >> +				ethernet-phy@1 {
> >> +					reg = <0x1>;
> >> +					interrupt-parent = <&pioA>;
> >> +					interrupts = <73 IRQ_TYPE_LEVEL_LOW>;
> > 
> > Are you sure about this value? pinctrl tells PD31 so 127. By the way, it
> > is better to use macros: PIN_PD31.
> Yes, here is a mistake. It has to be PIN_PD31. I will fix it in v2.
> 
> Thank you,
> Claudiu
> > 
> > Regards
> > 
> > Ludovic
> > 
> >> +					pinctrl-names = "default";
> >> +					pinctrl-0 = <&pinctrl_macb0_phy_irq>;
> >> +				};
> >> +			};
> >> +
> >> +			i2c0: i2c@f8028000 {
> >> +				dmas = <0>, <0>;
> >> +				pinctrl-names = "default";
> >> +				pinctrl-0 = <&pinctrl_i2c0_default>;
> >> +				i2c-sda-hold-time-ns = <350>;
> >> +				status = "disabled";
> >> +
> >> +				24aa@50 {
> >> +					compatible = "24mac602";
> >> +					reg = <0x50>;
> >> +					pagesize = <8>;
> >> +					start-offset = /bits/ 8 <0xf8>;
> >> +					read-only;
> >> +				};
> >> +			};
> >> +
> >> +			pinctrl@fc038000 {
> >> +
> >> +				pinctrl_i2c0_default: i2c0_default {
> >> +					pinmux = <PIN_PD21__TWD0>,
> >> +						 <PIN_PD22__TWCK0>;
> >> +					bias-disable;
> >> +				};
> >> +
> >> +				pinctrl_macb0_default: macb0_default {
> >> +					pinmux = <PIN_PD9__GTXCK>,
> >> +						 <PIN_PD10__GTXEN>,
> >> +						 <PIN_PD11__GRXDV>,
> >> +						 <PIN_PD12__GRXER>,
> >> +						 <PIN_PD13__GRX0>,
> >> +						 <PIN_PD14__GRX1>,
> >> +						 <PIN_PD15__GTX0>,
> >> +						 <PIN_PD16__GTX1>,
> >> +						 <PIN_PD17__GMDC>,
> >> +						 <PIN_PD18__GMDIO>;
> >> +					bias-disable;
> >> +				};
> >> +
> >> +				pinctrl_macb0_phy_irq: macb0_phy_irq {
> >> +					pinmux = <PIN_PD31__GPIO>;
> >> +					bias-disable;
> >> +				};
> >> +
> >> +				pinctrl_qspi1_default: qspi1_default {
> >> +					sck_cs {
> >> +						pinmux = <PIN_PB5__QSPI1_SCK>,
> >> +							 <PIN_PB6__QSPI1_CS>;
> >> +						bias-disable;
> >> +					};
> >> +
> >> +					data {
> >> +						pinmux = <PIN_PB7__QSPI1_IO0>,
> >> +							 <PIN_PB8__QSPI1_IO1>,
> >> +							 <PIN_PB9__QSPI1_IO2>,
> >> +							 <PIN_PB10__QSPI1_IO3>;
> >> +						bias-pull-up;
> >> +					};
> >> +				};
> >> +			};
> >> +		};
> >> +	};
> >> +};
> >> -- 
> >> 2.7.4
> >>
> >>
> >> _______________________________________________
> >> linux-arm-kernel mailing list
> >> linux-arm-kernel@lists.infradead.org
> >> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH 4/5] ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support
  2017-06-30 12:57       ` Ludovic Desroches
@ 2017-06-30 13:01         ` m18063
  0 siblings, 0 replies; 15+ messages in thread
From: m18063 @ 2017-06-30 13:01 UTC (permalink / raw)
  To: nicolas.ferre, alexandre.belloni, robh+dt, mark.rutland, linux,
	sza, devicetree, cristian.birsan, linux-kernel, linux-arm-kernel



On 30.06.2017 15:57, Ludovic Desroches wrote:
> On Fri, Jun 30, 2017 at 03:38:22PM +0300, m18063 wrote:
>> Hi Ludovic,
>>
>> On 29.06.2017 17:58, Ludovic Desroches wrote:
>>> On Thu, Jun 29, 2017 at 02:44:33PM +0300, Claudiu Beznea wrote:
>>>> Add specific DTS file and bindings for sama5d27 SoM1 board.
>>>>
>>>> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
>>>> Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
>>>> ---
>>>>  arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 178 ++++++++++++++++++++++++++++++
>>>>  1 file changed, 178 insertions(+)
>>>>  create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1.dtsi
>>>>
>>>> diff --git a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
>>>> new file mode 100644
>>>> index 0000000..b3af4d4
>>>> --- /dev/null
>>>> +++ b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
>>>> @@ -0,0 +1,178 @@
>>>> +/*
>>>> + * at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
>>>> + *
>>>> + *  Copyright (c) 2017, Microchip Technology Inc.
>>>> + *                2017 Cristian Birsan <cristian.birsan@microchip.com>
>>>> + *                2017 Claudiu Beznea <claudiu.beznea@microchip.com>
>>>> + *
>>>> + * This file is dual-licensed: you can use it either under the terms
>>>> + * of the GPL or the X11 license, at your option. Note that this dual
>>>> + * licensing only applies to this file, and not this project as a
>>>> + * whole.
>>>> + *
>>>> + *  a) This file is free software; you can redistribute it and/or
>>>> + *     modify it under the terms of the GNU General Public License as
>>>> + *     published by the Free Software Foundation; either version 2 of the
>>>> + *     License, or (at your option) any later version.
>>>> + *
>>>> + *     This file is distributed in the hope that it will be useful,
>>>> + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
>>>> + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>>>> + *     GNU General Public License for more details.
>>>> + *
>>>> + * Or, alternatively,
>>>> + *
>>>> + *  b) Permission is hereby granted, free of charge, to any person
>>>> + *     obtaining a copy of this software and associated documentation
>>>> + *     files (the "Software"), to deal in the Software without
>>>> + *     restriction, including without limitation the rights to use,
>>>> + *     copy, modify, merge, publish, distribute, sublicense, and/or
>>>> + *     sell copies of the Software, and to permit persons to whom the
>>>> + *     Software is furnished to do so, subject to the following
>>>> + *     conditions:
>>>> + *
>>>> + *     The above copyright notice and this permission notice shall be
>>>> + *     included in all copies or substantial portions of the Software.
>>>> + *
>>>> + *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>>>> + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>>>> + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>>>> + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>>>> + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
>>>> + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>>>> + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>>>> + *     OTHER DEALINGS IN THE SOFTWARE.
>>>> + */
>>>> +#include "sama5d2.dtsi"
>>>> +#include "sama5d2-pinfunc.h"
>>>> +
>>>> +/ {
>>>> +	model = "Atmel SAMA5D27 SoM1";
>>>> +	compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
>>>> +
>>>> +	clocks {
>>>> +		slow_xtal {
>>>> +			clock-frequency = <32768>;
>>>> +		};
>>>> +
>>>> +		main_xtal {
>>>> +			clock-frequency = <24000000>;
>>>> +		};
>>>> +	};
>>>> +
>>>> +	ahb {
>>>> +		apb {
>>>> +			qspi1: spi@f0024000 {
>>>> +				pinctrl-names = "default";
>>>> +				pinctrl-0 = <&pinctrl_qspi1_default>;
>>>> +				flash@0 {
>>>> +					#address-cells = <1>;
>>>> +					#size-cells = <1>;
>>>> +					compatible = "jedec,spi-nor";
>>>> +					reg = <0>;
>>>> +					spi-max-frequency = <83000000>;
>>>> +					m25p,fast-read;
>>>> +
>>>> +					at91bootstrap@00000000 {
>>>> +						label = "at91bootstrap";
>>>> +						reg = <0x00000000 0x00010000>;
>>>> +					};
>>>> +
>>>> +					bootloaderenv@00010000 {
>>>> +						label = "bootloader env";
>>>> +						reg = <0x00010000 0x00010000>;
>>>> +					};
>>>> +
>>>> +					bootloader@00020000 {
>>>> +						label = "bootloader";
>>>> +						reg = <0x00020000 0x00050000>;
>>>> +					};
>>>> +
>>>> +					dtb@00070000 {
>>>> +						label = "device tree";
>>>> +						reg = <0x00070000 0x00010000>;
>>>> +					};
>>>> +
>>>> +					kernel@00080000 {
>>>> +						label = "kernel";
>>>> +						reg = <0x00080000 0x00380000>;
>>>> +					};
>>>
>>> I am wondering if it's a good idea to give the flash map here. If we
>>> take a kernel generated by a sama5_defconfig, it is about 3.8 MB.
>> The flash size here is 8MB. With kernel image of 3.8M, bootloader of 18KB,
>> u-boot of 2.2MB, dtb of 31K it will still fit.
> 
> Right it can fit, I mean the description gives about 3.5 MB for the kernel so
> you can extend it.
You're right. It should be changed. I will do it in v2.
> 
> Regards
> 
> Ludovic
> 
>>>
>>>> +				};
>>>> +			};
>>>> +
>>>> +			macb0: ethernet@f8008000 {
>>>> +				pinctrl-names = "default";
>>>> +				pinctrl-0 = <&pinctrl_macb0_default>;
>>>> +				phy-mode = "rmii";
>>>> +
>>>> +				ethernet-phy@1 {
>>>> +					reg = <0x1>;
>>>> +					interrupt-parent = <&pioA>;
>>>> +					interrupts = <73 IRQ_TYPE_LEVEL_LOW>;
>>>
>>> Are you sure about this value? pinctrl tells PD31 so 127. By the way, it
>>> is better to use macros: PIN_PD31.
>> Yes, here is a mistake. It has to be PIN_PD31. I will fix it in v2.
>>
>> Thank you,
>> Claudiu
>>>
>>> Regards
>>>
>>> Ludovic
>>>
>>>> +					pinctrl-names = "default";
>>>> +					pinctrl-0 = <&pinctrl_macb0_phy_irq>;
>>>> +				};
>>>> +			};
>>>> +
>>>> +			i2c0: i2c@f8028000 {
>>>> +				dmas = <0>, <0>;
>>>> +				pinctrl-names = "default";
>>>> +				pinctrl-0 = <&pinctrl_i2c0_default>;
>>>> +				i2c-sda-hold-time-ns = <350>;
>>>> +				status = "disabled";
>>>> +
>>>> +				24aa@50 {
>>>> +					compatible = "24mac602";
>>>> +					reg = <0x50>;
>>>> +					pagesize = <8>;
>>>> +					start-offset = /bits/ 8 <0xf8>;
>>>> +					read-only;
>>>> +				};
>>>> +			};
>>>> +
>>>> +			pinctrl@fc038000 {
>>>> +
>>>> +				pinctrl_i2c0_default: i2c0_default {
>>>> +					pinmux = <PIN_PD21__TWD0>,
>>>> +						 <PIN_PD22__TWCK0>;
>>>> +					bias-disable;
>>>> +				};
>>>> +
>>>> +				pinctrl_macb0_default: macb0_default {
>>>> +					pinmux = <PIN_PD9__GTXCK>,
>>>> +						 <PIN_PD10__GTXEN>,
>>>> +						 <PIN_PD11__GRXDV>,
>>>> +						 <PIN_PD12__GRXER>,
>>>> +						 <PIN_PD13__GRX0>,
>>>> +						 <PIN_PD14__GRX1>,
>>>> +						 <PIN_PD15__GTX0>,
>>>> +						 <PIN_PD16__GTX1>,
>>>> +						 <PIN_PD17__GMDC>,
>>>> +						 <PIN_PD18__GMDIO>;
>>>> +					bias-disable;
>>>> +				};
>>>> +
>>>> +				pinctrl_macb0_phy_irq: macb0_phy_irq {
>>>> +					pinmux = <PIN_PD31__GPIO>;
>>>> +					bias-disable;
>>>> +				};
>>>> +
>>>> +				pinctrl_qspi1_default: qspi1_default {
>>>> +					sck_cs {
>>>> +						pinmux = <PIN_PB5__QSPI1_SCK>,
>>>> +							 <PIN_PB6__QSPI1_CS>;
>>>> +						bias-disable;
>>>> +					};
>>>> +
>>>> +					data {
>>>> +						pinmux = <PIN_PB7__QSPI1_IO0>,
>>>> +							 <PIN_PB8__QSPI1_IO1>,
>>>> +							 <PIN_PB9__QSPI1_IO2>,
>>>> +							 <PIN_PB10__QSPI1_IO3>;
>>>> +						bias-pull-up;
>>>> +					};
>>>> +				};
>>>> +			};
>>>> +		};
>>>> +	};
>>>> +};
>>>> -- 
>>>> 2.7.4
>>>>
>>>>
>>>> _______________________________________________
>>>> linux-arm-kernel mailing list
>>>> linux-arm-kernel@lists.infradead.org
>>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 15+ messages in thread

end of thread, other threads:[~2017-06-30 13:01 UTC | newest]

Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-06-29 11:44 [PATCH 0/5] Add SoM1 support Claudiu Beznea
2017-06-29 11:44 ` [PATCH 1/5] ARM: dts: at91: sama5d2: add QSPI nodes Claudiu Beznea
2017-06-29 11:44 ` [PATCH 2/5] ARM: dts: at91: sama5d2: add isc node Claudiu Beznea
2017-06-29 11:44 ` [PATCH 3/5] drivers: soc: atmel: Add basic support for new sama5d2 SiPs Claudiu Beznea
2017-06-29 11:44 ` [PATCH 4/5] ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support Claudiu Beznea
2017-06-29 14:58   ` Ludovic Desroches
2017-06-30 12:38     ` m18063
2017-06-30 12:57       ` Ludovic Desroches
2017-06-30 13:01         ` m18063
2017-06-29 11:44 ` [PATCH 5/5] ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support Claudiu Beznea
2017-06-29 11:59   ` Baruch Siach
2017-06-29 12:16     ` Alexandre Belloni
2017-06-30 12:28       ` m18063
2017-06-29 15:04   ` Ludovic Desroches
2017-06-30 12:32     ` m18063

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