From: Alexandre Belloni <alexandre.belloni@free-electrons.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org,
Alexandre Belloni <alexandre.belloni@free-electrons.com>
Subject: [PATCH 10/13] MIPS: mscc: add ocelot dtsi
Date: Tue, 28 Nov 2017 16:26:40 +0100 [thread overview]
Message-ID: <20171128152643.20463-11-alexandre.belloni@free-electrons.com> (raw)
In-Reply-To: <20171128152643.20463-1-alexandre.belloni@free-electrons.com>
Add a device tree include file for the Microsemi Ocelot SoC.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/mscc/Makefile | 4 ++
arch/mips/boot/dts/mscc/ocelot.dtsi | 118 ++++++++++++++++++++++++++++++++++++
3 files changed, 123 insertions(+)
create mode 100644 arch/mips/boot/dts/mscc/Makefile
create mode 100644 arch/mips/boot/dts/mscc/ocelot.dtsi
diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index e2c6f131c8eb..1e79cab8e269 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -4,6 +4,7 @@ subdir-y += cavium-octeon
subdir-y += img
subdir-y += ingenic
subdir-y += lantiq
+subdir-y += mscc
subdir-y += mti
subdir-y += netlogic
subdir-y += ni
diff --git a/arch/mips/boot/dts/mscc/Makefile b/arch/mips/boot/dts/mscc/Makefile
new file mode 100644
index 000000000000..f0a155a74e02
--- /dev/null
+++ b/arch/mips/boot/dts/mscc/Makefile
@@ -0,0 +1,4 @@
+obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+
+# Force kbuild to make empty built-in.o if necessary
+obj- += dummy.o
diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi b/arch/mips/boot/dts/mscc/ocelot.dtsi
new file mode 100644
index 000000000000..ddbb3449fa92
--- /dev/null
+++ b/arch/mips/boot/dts/mscc/ocelot.dtsi
@@ -0,0 +1,118 @@
+/*
+ * Copyright (c) 2017 Microsemi Corporation
+ *
+ * SPDX-License-Identifier: (GPL-2.0 OR MIT)
+ */
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "mscc,ocelot";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mips-hpt-frequency = <250000000>;
+
+ cpu@0 {
+ compatible = "mscc,ocelot";
+ device_type = "cpu";
+ reg = <0>;
+ };
+ };
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ cpuintc: interrupt-controller@0 {
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ compatible = "mti,cpu-interrupt-controller";
+ };
+
+ ahb_clk: ahb-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <250000000>;
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ interrupt-parent = <&intc>;
+
+ cpu_ctrl: syscon@70000000 {
+ compatible = "syscon";
+ reg = <0x70000000 0x2c>;
+ };
+
+ intc: interrupt-controller@70000070 {
+ compatible = "mscc,ocelot-icpu-intr";
+ reg = <0x70000070 0x70>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ interrupt-parent = <&cpuintc>;
+ interrupts = <2>;
+ };
+
+ uart0: serial@70100000 {
+ pinctrl-0 = <&uart_pins>;
+ pinctrl-names = "default";
+ compatible = "ns16550a";
+ reg = <0x70100000 0x20>;
+ interrupts = <6>;
+ clocks = <&ahb_clk>;
+ reg-io-width = <4>;
+ reg-shift = <2>;
+
+ status = "disabled";
+ };
+
+ uart2: serial@70100800 {
+ pinctrl-0 = <&uart2_pins>;
+ pinctrl-names = "default";
+ compatible = "ns16550a";
+ reg = <0x70100800 0x20>;
+ interrupts = <7>;
+ clocks = <&ahb_clk>;
+ reg-io-width = <4>;
+ reg-shift = <2>;
+
+ status = "disabled";
+ };
+
+ chip_regs: syscon@71070000 {
+ compatible = "simple-mfd", "syscon";
+ reg = <0x71070000 0x1c>;
+
+ reset {
+ compatible = "mscc,ocelot-chip-reset";
+ mscc,cpucontrol = <&cpu_ctrl>;
+ };
+ };
+
+ gpio: pinctrl@71070034 {
+ compatible = "mscc,ocelot-pinctrl";
+ reg = <0x71070034 0x28>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&gpio 0 0 22>;
+
+ uart_pins: uart-pins {
+ pins = "GPIO_6", "GPIO_7";
+ function = "uart";
+ };
+
+ uart2_pins: uart2-pins {
+ pins = "GPIO_12", "GPIO_13";
+ function = "uart2";
+ };
+ };
+ };
+};
--
2.15.0
next prev parent reply other threads:[~2017-11-28 15:30 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-28 15:26 [PATCH 00/13] MIPS: add support for the Microsemi MIPS SoCs Alexandre Belloni
2017-11-28 15:26 ` [PATCH 01/13] dt-bindings: Add vendor prefix for Microsemi Corporation Alexandre Belloni
2017-11-28 16:10 ` James Hogan
2017-11-28 16:22 ` Alexandre Belloni
2017-12-01 1:14 ` Rob Herring
2017-11-28 15:26 ` [PATCH 02/13] dt-bindings: interrupt-controller: Add binding for the Microsemi Ocelot interrupt controller Alexandre Belloni
2017-12-01 1:15 ` Rob Herring
2017-11-28 15:26 ` [PATCH 03/13] irqchip: Add a driver for the Microsemi Ocelot controller Alexandre Belloni
2017-11-28 15:26 ` [PATCH 04/13] dt-bindings: pinctrl: Add bindings for Microsemi Ocelot Alexandre Belloni
2017-12-01 1:16 ` Rob Herring
2017-11-28 15:26 ` [PATCH 05/13] pinctrl: Add Microsemi Ocelot SoC driver Alexandre Belloni
2017-11-28 15:26 ` [PATCH 06/13] dt-bindings: power: reset: Document ocelot-reset binding Alexandre Belloni
2017-12-01 1:54 ` Rob Herring
2017-11-28 15:26 ` [PATCH 07/13] power: reset: Add a driver for the Microsemi Ocelot reset Alexandre Belloni
2017-11-28 15:26 ` [PATCH 08/13] dt-bindings: mips: Add bindings for Microsemi SoCs Alexandre Belloni
2017-11-28 19:14 ` Florian Fainelli
2017-11-28 15:26 ` [PATCH 09/13] MIPS: mscc: Add initial support for Microsemi MIPS SoCs Alexandre Belloni
2017-11-28 16:01 ` James Hogan
2017-11-28 16:53 ` Alexandre Belloni
2017-11-28 17:31 ` James Hogan
2017-11-28 19:50 ` Paul Burton
2017-11-29 16:38 ` Alexandre Belloni
2018-01-17 23:58 ` James Hogan
2018-03-02 15:22 ` Alexandre Belloni
2017-11-28 15:26 ` Alexandre Belloni [this message]
2017-11-28 18:40 ` [PATCH 10/13] MIPS: mscc: add ocelot dtsi Florian Fainelli
2017-11-28 15:26 ` [PATCH 11/13] MIPS: mscc: add ocelot PCB123 device tree Alexandre Belloni
2017-11-28 15:26 ` [PATCH 12/13] MIPS: defconfigs: add a defconfig for Microsemi SoCs Alexandre Belloni
2017-11-28 15:26 ` [PATCH 13/13] MAINTAINERS: Add entry for Microsemi MIPS SoCs Alexandre Belloni
2017-11-28 15:34 ` Joe Perches
2017-11-28 15:44 ` Alexandre Belloni
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