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From: Rob Clark <robdclark@gmail.com>
To: iommu@lists.linux-foundation.org,
	dri-devel@lists.freedesktop.org, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>
Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Sibi Sankar <sibis@codeaurora.org>,
	Vivek Gautam <vivek.gautam@codeaurora.org>,
	Stephen Boyd <swboyd@chromium.org>,
	Akhil P Oommen <akhilpo@codeaurora.org>,
	Rob Clark <robdclark@chromium.org>,
	Jordan Crouse <jcrouse@codeaurora.org>,
	linux-kernel@vger.kernel.org (open list)
Subject: [PATCH v17 02/20] drm/msm: Add private interface for adreno-smmu
Date: Sat,  5 Sep 2020 13:04:08 -0700	[thread overview]
Message-ID: <20200905200454.240929-3-robdclark@gmail.com> (raw)
In-Reply-To: <20200905200454.240929-1-robdclark@gmail.com>

From: Rob Clark <robdclark@chromium.org>

This interface will be used for drm/msm to coordinate with the
qcom_adreno_smmu_impl to enable/disable TTBR0 translation.

Once TTBR0 translation is enabled, the GPU's CP (Command Processor)
will directly switch TTBR0 pgtables (and do the necessary TLB inv)
synchronized to the GPU's operation.  But help from the SMMU driver
is needed to initially bootstrap TTBR0 translation, which cannot be
done from the GPU.

Since this is a very special case, a private interface is used to
avoid adding highly driver specific things to the public iommu
interface.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
 include/linux/adreno-smmu-priv.h | 36 ++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)
 create mode 100644 include/linux/adreno-smmu-priv.h

diff --git a/include/linux/adreno-smmu-priv.h b/include/linux/adreno-smmu-priv.h
new file mode 100644
index 000000000000..a889f28afb42
--- /dev/null
+++ b/include/linux/adreno-smmu-priv.h
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2020 Google, Inc
+ */
+
+#ifndef __ADRENO_SMMU_PRIV_H
+#define __ADRENO_SMMU_PRIV_H
+
+#include <linux/io-pgtable.h>
+
+/**
+ * struct adreno_smmu_priv - private interface between adreno-smmu and GPU
+ *
+ * @cookie:        An opque token provided by adreno-smmu and passed
+ *                 back into the callbacks
+ * @get_ttbr1_cfg: Get the TTBR1 config for the GPUs context-bank
+ * @set_ttbr0_cfg: Set the TTBR0 config for the GPUs context bank.  A
+ *                 NULL config disables TTBR0 translation, otherwise
+ *                 TTBR0 translation is enabled with the specified cfg
+ *
+ * The GPU driver (drm/msm) and adreno-smmu work together for controlling
+ * the GPU's SMMU instance.  This is by necessity, as the GPU is directly
+ * updating the SMMU for context switches, while on the other hand we do
+ * not want to duplicate all of the initial setup logic from arm-smmu.
+ *
+ * This private interface is used for the two drivers to coordinate.  The
+ * cookie and callback functions are populated when the GPU driver attaches
+ * it's domain.
+ */
+struct adreno_smmu_priv {
+    const void *cookie;
+    const struct io_pgtable_cfg *(*get_ttbr1_cfg)(const void *cookie);
+    int (*set_ttbr0_cfg)(const void *cookie, const struct io_pgtable_cfg *cfg);
+};
+
+#endif /* __ADRENO_SMMU_PRIV_H */
\ No newline at end of file
-- 
2.26.2


  parent reply	other threads:[~2020-09-05 20:04 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-05 20:04 [PATCH v17 00/20] iommu/arm-smmu + drm/msm: per-process GPU pgtables Rob Clark
2020-09-05 20:04 ` [PATCH v17 01/20] drm/msm: Remove dangling submitqueue references Rob Clark
2020-09-05 20:04 ` Rob Clark [this message]
2020-09-05 20:04 ` [PATCH v17 03/20] drm/msm/gpu: Add dev_to_gpu() helper Rob Clark
2020-09-05 20:04 ` [PATCH v17 04/20] drm/msm: Set adreno_smmu as gpu's drvdata Rob Clark
2020-09-05 20:04 ` [PATCH v17 05/20] drm/msm: Add a context pointer to the submitqueue Rob Clark
2020-09-05 20:04 ` [PATCH v17 06/20] drm/msm: Drop context arg to gpu->submit() Rob Clark
2020-09-05 20:04 ` [PATCH v17 07/20] drm/msm: Set the global virtual address range from the IOMMU domain Rob Clark
2020-09-05 20:04 ` [PATCH v17 08/20] drm/msm: Add support to create a local pagetable Rob Clark
2020-09-05 20:04 ` [PATCH v17 09/20] drm/msm: Add support for private address space instances Rob Clark
2020-09-05 20:04 ` [PATCH v17 10/20] drm/msm/a6xx: Add support for per-instance pagetables Rob Clark
2020-09-05 20:04 ` [PATCH v17 11/20] drm/msm: Show process names in gem_describe Rob Clark
2020-09-05 20:04 ` [PATCH v17 12/20] iommu/arm-smmu: Pass io-pgtable config to implementation specific function Rob Clark
2020-09-05 20:04 ` [PATCH v17 13/20] iommu/arm-smmu: Add support for split pagetables Rob Clark
2020-09-05 20:04 ` [PATCH v17 14/20] iommu/arm-smmu: Prepare for the adreno-smmu implementation Rob Clark
2020-09-05 20:04 ` [PATCH v17 15/20] iommu/arm-smmu: Constify some helpers Rob Clark
2020-09-05 20:04 ` [PATCH v17 16/20] iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU Rob Clark
2020-09-05 20:04 ` [PATCH v17 17/20] iommu/arm-smmu: Add a way for implementations to influence SCTLR Rob Clark
2020-09-05 20:04 ` [PATCH v17 18/20] dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU Rob Clark
2020-09-05 20:04 ` [PATCH v17 19/20] arm: dts: qcom: sm845: Set the compatible string for the " Rob Clark
2020-09-05 20:04 ` [PATCH v17 20/20] arm: dts: qcom: sc7180: " Rob Clark
2020-09-21 21:30 ` [PATCH v17 00/20] iommu/arm-smmu + drm/msm: per-process GPU pgtables Will Deacon
2020-09-22  1:27   ` Rob Clark
2020-09-22  2:53   ` Jordan Crouse

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