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From: Rob Clark <robdclark@gmail.com>
To: iommu@lists.linux-foundation.org,
	dri-devel@lists.freedesktop.org, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>
Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Sibi Sankar <sibis@codeaurora.org>,
	Vivek Gautam <vivek.gautam@codeaurora.org>,
	Stephen Boyd <swboyd@chromium.org>,
	Akhil P Oommen <akhilpo@codeaurora.org>,
	Jordan Crouse <jcrouse@codeaurora.org>,
	Rob Clark <robdclark@chromium.org>,
	Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	Jonathan Marek <jonathan@marek.ca>,
	Brian Masney <masneyb@onstation.org>,
	Fabio Estevam <festevam@gmail.com>,
	linux-kernel@vger.kernel.org (open list)
Subject: [PATCH v17 07/20] drm/msm: Set the global virtual address range from the IOMMU domain
Date: Sat,  5 Sep 2020 13:04:13 -0700	[thread overview]
Message-ID: <20200905200454.240929-8-robdclark@gmail.com> (raw)
In-Reply-To: <20200905200454.240929-1-robdclark@gmail.com>

From: Jordan Crouse <jcrouse@codeaurora.org>

Use the aperture settings from the IOMMU domain to set up the virtual
address range for the GPU. This allows us to transparently deal with
IOMMU side features (like split pagetables).

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
 drivers/gpu/drm/msm/adreno/adreno_gpu.c | 13 +++++++++++--
 drivers/gpu/drm/msm/msm_iommu.c         |  7 +++++++
 2 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index a712e1cfcba8..b703e5308b01 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -192,9 +192,18 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu,
 	struct iommu_domain *iommu = iommu_domain_alloc(&platform_bus_type);
 	struct msm_mmu *mmu = msm_iommu_new(&pdev->dev, iommu);
 	struct msm_gem_address_space *aspace;
+	u64 start, size;
 
-	aspace = msm_gem_address_space_create(mmu, "gpu", SZ_16M,
-		0xffffffff - SZ_16M);
+	/*
+	 * Use the aperture start or SZ_16M, whichever is greater. This will
+	 * ensure that we align with the allocated pagetable range while still
+	 * allowing room in the lower 32 bits for GMEM and whatnot
+	 */
+	start = max_t(u64, SZ_16M, iommu->geometry.aperture_start);
+	size = iommu->geometry.aperture_end - start + 1;
+
+	aspace = msm_gem_address_space_create(mmu, "gpu",
+		start & GENMASK(48, 0), size);
 
 	if (IS_ERR(aspace) && !IS_ERR(mmu))
 		mmu->funcs->destroy(mmu);
diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c
index 3a381a9674c9..1b6635504069 100644
--- a/drivers/gpu/drm/msm/msm_iommu.c
+++ b/drivers/gpu/drm/msm/msm_iommu.c
@@ -36,6 +36,10 @@ static int msm_iommu_map(struct msm_mmu *mmu, uint64_t iova,
 	struct msm_iommu *iommu = to_msm_iommu(mmu);
 	size_t ret;
 
+	/* The arm-smmu driver expects the addresses to be sign extended */
+	if (iova & BIT_ULL(48))
+		iova |= GENMASK_ULL(63, 49);
+
 	ret = iommu_map_sg(iommu->domain, iova, sgt->sgl, sgt->nents, prot);
 	WARN_ON(!ret);
 
@@ -46,6 +50,9 @@ static int msm_iommu_unmap(struct msm_mmu *mmu, uint64_t iova, size_t len)
 {
 	struct msm_iommu *iommu = to_msm_iommu(mmu);
 
+	if (iova & BIT_ULL(48))
+		iova |= GENMASK_ULL(63, 49);
+
 	iommu_unmap(iommu->domain, iova, len);
 
 	return 0;
-- 
2.26.2


  parent reply	other threads:[~2020-09-05 20:04 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-05 20:04 [PATCH v17 00/20] iommu/arm-smmu + drm/msm: per-process GPU pgtables Rob Clark
2020-09-05 20:04 ` [PATCH v17 01/20] drm/msm: Remove dangling submitqueue references Rob Clark
2020-09-05 20:04 ` [PATCH v17 02/20] drm/msm: Add private interface for adreno-smmu Rob Clark
2020-09-05 20:04 ` [PATCH v17 03/20] drm/msm/gpu: Add dev_to_gpu() helper Rob Clark
2020-09-05 20:04 ` [PATCH v17 04/20] drm/msm: Set adreno_smmu as gpu's drvdata Rob Clark
2020-09-05 20:04 ` [PATCH v17 05/20] drm/msm: Add a context pointer to the submitqueue Rob Clark
2020-09-05 20:04 ` [PATCH v17 06/20] drm/msm: Drop context arg to gpu->submit() Rob Clark
2020-09-05 20:04 ` Rob Clark [this message]
2020-09-05 20:04 ` [PATCH v17 08/20] drm/msm: Add support to create a local pagetable Rob Clark
2020-09-05 20:04 ` [PATCH v17 09/20] drm/msm: Add support for private address space instances Rob Clark
2020-09-05 20:04 ` [PATCH v17 10/20] drm/msm/a6xx: Add support for per-instance pagetables Rob Clark
2020-09-05 20:04 ` [PATCH v17 11/20] drm/msm: Show process names in gem_describe Rob Clark
2020-09-05 20:04 ` [PATCH v17 12/20] iommu/arm-smmu: Pass io-pgtable config to implementation specific function Rob Clark
2020-09-05 20:04 ` [PATCH v17 13/20] iommu/arm-smmu: Add support for split pagetables Rob Clark
2020-09-05 20:04 ` [PATCH v17 14/20] iommu/arm-smmu: Prepare for the adreno-smmu implementation Rob Clark
2020-09-05 20:04 ` [PATCH v17 15/20] iommu/arm-smmu: Constify some helpers Rob Clark
2020-09-05 20:04 ` [PATCH v17 16/20] iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU Rob Clark
2020-09-05 20:04 ` [PATCH v17 17/20] iommu/arm-smmu: Add a way for implementations to influence SCTLR Rob Clark
2020-09-05 20:04 ` [PATCH v17 18/20] dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU Rob Clark
2020-09-05 20:04 ` [PATCH v17 19/20] arm: dts: qcom: sm845: Set the compatible string for the " Rob Clark
2020-09-05 20:04 ` [PATCH v17 20/20] arm: dts: qcom: sc7180: " Rob Clark
2020-09-21 21:30 ` [PATCH v17 00/20] iommu/arm-smmu + drm/msm: per-process GPU pgtables Will Deacon
2020-09-22  1:27   ` Rob Clark
2020-09-22  2:53   ` Jordan Crouse

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