From: Borislav Petkov <bp@alien8.de>
To: "Luck, Tony" <tony.luck@intel.com>
Cc: Jim Mattson <jmattson@google.com>, Qian Cai <cai@redhat.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-tip-commits@vger.kernel.org"
<linux-tip-commits@vger.kernel.org>, x86 <x86@kernel.org>,
Paolo Bonzini <pbonzini@redhat.com>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>
Subject: Re: [PATCH] x86/mce: Check for hypervisor before enabling additional error logging
Date: Tue, 10 Nov 2020 07:31:51 +0100 [thread overview]
Message-ID: <20201110063151.GB7290@nazgul.tnic> (raw)
In-Reply-To: <20201109232402.GA25492@agluck-desk2.amr.corp.intel.com>
On Mon, Nov 09, 2020 at 03:24:02PM -0800, Luck, Tony wrote:
> Booting as a guest under KVM results in error messages about
> unchecked MSR access:
>
> [ 6.814328][ T0] unchecked MSR access error: RDMSR from 0x17f at rIP: 0xffffffff84483f16 (mce_intel_feature_init+0x156/0x270)
>
> because KVM doesn't provide emulation for random model specific registers.
>
> Check for X86_FEATURE_HYPERVISOR and skip trying to enable the mode (a
> guest shouldn't be concerned with corrected errors anyway).
>
> Reported-by: Qian Cai <cai@redhat.com>
> Fixes: 68299a42f842 ("x86/mce: Enable additional error logging on certain Intel CPUs")
> Signed-off-by: Tony Luck <tony.luck@intel.com>
> ---
> arch/x86/kernel/cpu/mce/intel.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/x86/kernel/cpu/mce/intel.c b/arch/x86/kernel/cpu/mce/intel.c
> index b47883e364b4..7f7d863400b7 100644
> --- a/arch/x86/kernel/cpu/mce/intel.c
> +++ b/arch/x86/kernel/cpu/mce/intel.c
> @@ -517,6 +517,9 @@ static void intel_imc_init(struct cpuinfo_x86 *c)
> {
> u64 error_control;
>
> + if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
> + return;
> +
Frankly, I'm tired of wagging the dog because the tail can't. If
qemu/kvm can't emulate a CPU model fully then it should ignore those
unknown MSR accesses by default, i.e., that "ignore_msrs" functionality
should be on by default I'd say...
We certainly can't be sprinkling this check everytime the kernel tries
to do something as basic as read an MSR.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
next prev parent reply other threads:[~2020-11-10 6:32 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <fcb21490-84a1-8b99-b494-3a6ac2a0e16a@skynet.be>
[not found] ` <20201029100655.GA31903@zn.tnic>
[not found] ` <20201029151518.GA23990@agluck-desk2.amr.corp.intel.com>
[not found] ` <20201029194118.GC31903@zn.tnic>
[not found] ` <87ft5wo8zn.fsf@nanos.tec.linutronix.de>
[not found] ` <20201030091056.GA6532@zn.tnic>
[not found] ` <20201030190400.GA13797@agluck-desk2.amr.corp.intel.com>
2020-10-30 19:08 ` [PATCH] x86/mce: Enable additional error logging on certain Intel CPUs Luck, Tony
2020-11-02 11:12 ` Borislav Petkov
2020-11-02 11:18 ` [tip: ras/core] " tip-bot2 for Tony Luck
2020-11-09 21:55 ` Qian Cai
2020-11-09 22:09 ` Luck, Tony
2020-11-09 22:36 ` Jim Mattson
2020-11-09 22:57 ` Luck, Tony
2020-11-09 23:24 ` [PATCH] x86/mce: Check for hypervisor before enabling additional error logging Luck, Tony
2020-11-10 6:31 ` Borislav Petkov [this message]
2020-11-10 8:50 ` Paolo Bonzini
2020-11-10 9:56 ` Borislav Petkov
2020-11-10 10:40 ` Paolo Bonzini
2020-11-10 15:50 ` Borislav Petkov
2020-11-10 16:08 ` Paolo Bonzini
2020-11-10 17:52 ` Luck, Tony
2020-11-10 20:37 ` Paolo Bonzini
2020-11-11 0:39 ` [PATCH v2] x86/mce: Use "safe" MSR functions when " Luck, Tony
2020-11-16 16:44 ` [tip: ras/core] " tip-bot2 for Tony Luck
2020-11-09 23:26 ` [tip: ras/core] x86/mce: Enable additional error logging on certain Intel CPUs Jim Mattson
2020-11-09 23:36 ` Luck, Tony
2020-11-10 9:10 ` Paolo Bonzini
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