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From: Borislav Petkov <bp@alien8.de>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Luck, Tony" <tony.luck@intel.com>,
	Jim Mattson <jmattson@google.com>, Qian Cai <cai@redhat.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-tip-commits@vger.kernel.org" 
	<linux-tip-commits@vger.kernel.org>, x86 <x86@kernel.org>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>
Subject: Re: [PATCH] x86/mce: Check for hypervisor before enabling additional error logging
Date: Tue, 10 Nov 2020 16:50:13 +0100	[thread overview]
Message-ID: <20201110155013.GE9857@nazgul.tnic> (raw)
In-Reply-To: <b8de7f7b-7aa1-d98b-74be-62d7c055542b@redhat.com>

On Tue, Nov 10, 2020 at 11:40:34AM +0100, Paolo Bonzini wrote:
> However, f/m/s mean nothing when running virtualized.  First, trying to
> derive any non-architectural property from the f/m/s is going to fail.
> Second, even the host can be anything as long as it's newer than the f/m/s
> that the VM reports (i.e. you can get a Sandy Bridge model and model name
> even if running on Skylake).

Yah, that's why I said "then comes virt and throws all assumptions out."

> See above: how can the hypervisor know a safe value for all MSRs, possibly
> including the undocumented ones?

Not all - just the ones which belong to a model. I was thinking of
having a mapping between f/m/s and a list of MSRs which those models
have - even non-architectural ones - but that's a waste of energy. Why?
Because using the *msr_safe() variants will give you the same thing
without doing any of the MSR lists in KVM and any of that jumping thru
hoops.

Which means, the kernel MSR accessors should be doing _safe(), i.e.,
exception handling, by default. And the non-safe ones - rdmsrl, wrmsrl,
etc, should all be used only in very seldom cases. Hmm, yeah, that would
probably solve this class of problems once and for all.

> If it makes sense to emulate certain non-architectural MSRs we can add them.

See above - probably not worth the effort.

I'll take a look at how ugly it would become to make the majority of MSR
accesses safe.

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

  reply	other threads:[~2020-11-10 15:50 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <fcb21490-84a1-8b99-b494-3a6ac2a0e16a@skynet.be>
     [not found] ` <20201029100655.GA31903@zn.tnic>
     [not found]   ` <20201029151518.GA23990@agluck-desk2.amr.corp.intel.com>
     [not found]     ` <20201029194118.GC31903@zn.tnic>
     [not found]       ` <87ft5wo8zn.fsf@nanos.tec.linutronix.de>
     [not found]         ` <20201030091056.GA6532@zn.tnic>
     [not found]           ` <20201030190400.GA13797@agluck-desk2.amr.corp.intel.com>
2020-10-30 19:08             ` [PATCH] x86/mce: Enable additional error logging on certain Intel CPUs Luck, Tony
2020-11-02 11:12               ` Borislav Petkov
2020-11-02 11:18               ` [tip: ras/core] " tip-bot2 for Tony Luck
2020-11-09 21:55                 ` Qian Cai
2020-11-09 22:09                   ` Luck, Tony
2020-11-09 22:36                     ` Jim Mattson
2020-11-09 22:57                       ` Luck, Tony
2020-11-09 23:24                         ` [PATCH] x86/mce: Check for hypervisor before enabling additional error logging Luck, Tony
2020-11-10  6:31                           ` Borislav Petkov
2020-11-10  8:50                             ` Paolo Bonzini
2020-11-10  9:56                               ` Borislav Petkov
2020-11-10 10:40                                 ` Paolo Bonzini
2020-11-10 15:50                                   ` Borislav Petkov [this message]
2020-11-10 16:08                                     ` Paolo Bonzini
2020-11-10 17:52                                       ` Luck, Tony
2020-11-10 20:37                                         ` Paolo Bonzini
2020-11-11  0:39                                           ` [PATCH v2] x86/mce: Use "safe" MSR functions when " Luck, Tony
2020-11-16 16:44                                             ` [tip: ras/core] " tip-bot2 for Tony Luck
2020-11-09 23:26                         ` [tip: ras/core] x86/mce: Enable additional error logging on certain Intel CPUs Jim Mattson
2020-11-09 23:36                           ` Luck, Tony
2020-11-10  9:10                             ` Paolo Bonzini

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