From: "Pali Rohár" <pali@kernel.org>
To: Marc Zyngier <maz@kernel.org>, Jianjun Wang <jianjun.wang@mediatek.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Ryder Lee <ryder.lee@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Matthias Brugger <matthias.bgg@gmail.com>,
linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Sj Huang <sj.huang@mediatek.com>,
youlin.pei@mediatek.com, chuanjia.liu@mediatek.com,
qizhong.cheng@mediatek.com, sin_jieyang@mediatek.com,
drinkcat@chromium.org, Rex-BC.Chen@mediatek.com,
anson.chuang@mediatek.com
Subject: Re: [v8,5/7] PCI: mediatek-gen3: Add MSI support
Date: Thu, 11 Mar 2021 01:05:55 +0100 [thread overview]
Message-ID: <20210311000555.epypouwxdbql2aqx@pali> (raw)
In-Reply-To: <20210224061132.26526-6-jianjun.wang@mediatek.com>
On Wednesday 24 February 2021 14:11:30 Jianjun Wang wrote:
> +static int mtk_msi_bottom_domain_alloc(struct irq_domain *domain,
> + unsigned int virq, unsigned int nr_irqs,
> + void *arg)
> +{
> + struct mtk_pcie_port *port = domain->host_data;
> + struct mtk_msi_set *msi_set;
> + int i, hwirq, set_idx;
> +
> + mutex_lock(&port->lock);
> +
> + hwirq = bitmap_find_free_region(port->msi_irq_in_use, PCIE_MSI_IRQS_NUM,
> + order_base_2(nr_irqs));
> +
> + mutex_unlock(&port->lock);
> +
> + if (hwirq < 0)
> + return -ENOSPC;
> +
> + set_idx = hwirq / PCIE_MSI_IRQS_PER_SET;
> + msi_set = &port->msi_sets[set_idx];
> +
> + for (i = 0; i < nr_irqs; i++)
> + irq_domain_set_info(domain, virq + i, hwirq + i,
> + &mtk_msi_bottom_irq_chip, msi_set,
> + handle_edge_irq, NULL, NULL);
> +
> + return 0;
> +}
> +
> +static void mtk_msi_bottom_domain_free(struct irq_domain *domain,
> + unsigned int virq, unsigned int nr_irqs)
> +{
> + struct mtk_pcie_port *port = domain->host_data;
> + struct irq_data *data = irq_domain_get_irq_data(domain, virq);
> +
> + mutex_lock(&port->lock);
> +
> + bitmap_clear(port->msi_irq_in_use, data->hwirq, nr_irqs);
Marc, should not be there bitmap_release_region() with order_base_2()?
bitmap_release_region(port->msi_irq_in_use, data->hwirq, order_base_2(nr_irqs));
Because mtk_msi_bottom_domain_alloc() is allocating
order_base_2(nr_irqs) interrupts, not only nr_irqs.
> +
> + mutex_unlock(&port->lock);
> +
> + irq_domain_free_irqs_common(domain, virq, nr_irqs);
> +}
next prev parent reply other threads:[~2021-03-11 0:07 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-24 6:11 [v8,0/7] PCI: mediatek: Add new generation controller support Jianjun Wang
2021-02-24 6:11 ` [v8,1/7] dt-bindings: PCI: mediatek-gen3: Add YAML schema Jianjun Wang
2021-03-06 20:09 ` Rob Herring
2021-02-24 6:11 ` [v8,2/7] PCI: Export pci_pio_to_address() for module use Jianjun Wang
2021-02-24 6:11 ` [v8,3/7] PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192 Jianjun Wang
2021-02-24 13:36 ` Krzysztof Wilczyński
2021-02-25 3:07 ` Jianjun Wang
2021-03-11 12:38 ` Pali Rohár
2021-03-13 7:43 ` Jianjun Wang
2021-03-18 0:02 ` Pali Rohár
2021-03-18 5:48 ` Jianjun Wang
2021-03-19 18:53 ` Pali Rohár
2021-03-23 1:31 ` Jianjun Wang
2021-03-23 14:51 ` Pali Rohár
2021-03-29 22:58 ` Pali Rohár
2021-02-24 6:11 ` [v8,4/7] PCI: mediatek-gen3: Add INTx support Jianjun Wang
2021-02-24 14:24 ` Krzysztof Wilczyński
2021-02-25 3:10 ` Jianjun Wang
2021-03-09 11:10 ` Marc Zyngier
2021-03-10 3:05 ` Jianjun Wang
2021-02-24 6:11 ` [v8,5/7] PCI: mediatek-gen3: Add MSI support Jianjun Wang
2021-02-24 14:31 ` Krzysztof Wilczyński
2021-02-25 3:09 ` Jianjun Wang
2021-03-09 11:23 ` Marc Zyngier
2021-03-10 6:48 ` Jianjun Wang
[not found] ` <87a6rbxs4w.wl-maz@kernel.org>
2021-03-11 9:47 ` Jianjun Wang
2021-03-11 0:05 ` Pali Rohár [this message]
2021-03-11 8:19 ` Marc Zyngier
2021-03-11 9:50 ` Jianjun Wang
2021-02-24 6:11 ` [v8,6/7] PCI: mediatek-gen3: Add system PM support Jianjun Wang
2021-02-24 14:10 ` Krzysztof Wilczyński
2021-02-25 3:34 ` Jianjun Wang
2021-02-25 22:00 ` Krzysztof Wilczyński
2021-02-26 10:06 ` Jianjun Wang
2021-02-24 6:11 ` [v8,7/7] MAINTAINERS: Add Jianjun Wang as MediaTek PCI co-maintainer Jianjun Wang
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