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From: "David E. Box" <david.e.box@linux.intel.com>
To: irenic.rajneesh@gmail.com, hdegoede@redhat.com,
	david.e.box@linux.intel.com, mgross@linux.intel.com,
	gayatri.kammela@intel.com
Cc: platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH 0/9] intel_pmc_core: Add sub-state requirements and mode latching support
Date: Wed, 31 Mar 2021 20:05:49 -0700	[thread overview]
Message-ID: <20210401030558.2301621-1-david.e.box@linux.intel.com> (raw)

- Patch 1 and 2 remove the use of the global struct pmc_dev
- Patches 3-7 add support for reading low power mode sub-state
  requirements, latching sub-state status on different low power mode
  events, and displaying the sub-state residency in microseconds
- Patch 8 adds missing LTR IPs for TGL
- Patch 9 adds support for ADL-P which is based on TGL

Applied on top of latest 5.12-rc2 based hans-review/review-hans

David E. Box (4):
  platform/x86: intel_pmc_core: Don't use global pmcdev in quirks
  platform/x86: intel_pmc_core: Remove global struct pmc_dev
  platform/x86: intel_pmc_core: Add option to set/clear LPM mode
  platform/x86: intel_pmc_core: Add support for Alder Lake PCH-P

Gayatri Kammela (5):
  platform/x86: intel_pmc_core: Handle sub-states generically
  platform/x86: intel_pmc_core: Show LPM residency in microseconds
  platform/x86: intel_pmc_core: Get LPM requirements for Tiger Lake
  platform/x86: intel_pmc_core: Add requirements file to debugfs
  platform/x86: intel_pmc_core: Add LTR registers for Tiger Lake

 drivers/platform/x86/intel_pmc_core.c | 359 +++++++++++++++++++++++---
 drivers/platform/x86/intel_pmc_core.h |  47 +++-
 2 files changed, 370 insertions(+), 36 deletions(-)

-- 
2.25.1


             reply	other threads:[~2021-04-01  3:07 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-01  3:05 David E. Box [this message]
2021-04-01  3:05 ` [PATCH 1/9] platform/x86: intel_pmc_core: Don't use global pmcdev in quirks David E. Box
2021-04-07 14:23   ` Hans de Goede
2021-04-07 14:58   ` Rajneesh Bhardwaj
2021-04-01  3:05 ` [PATCH 2/9] platform/x86: intel_pmc_core: Remove global struct pmc_dev David E. Box
2021-04-07 14:23   ` Hans de Goede
2021-04-07 15:02   ` Rajneesh Bhardwaj
2021-04-01  3:05 ` [PATCH 3/9] platform/x86: intel_pmc_core: Handle sub-states generically David E. Box
2021-04-07 14:23   ` Hans de Goede
2021-04-07 15:22   ` Rajneesh Bhardwaj
2021-04-01  3:05 ` [PATCH 4/9] platform/x86: intel_pmc_core: Show LPM residency in microseconds David E. Box
2021-04-07 14:23   ` Hans de Goede
2021-04-07 15:24   ` Rajneesh Bhardwaj
2021-04-01  3:05 ` [PATCH 5/9] platform/x86: intel_pmc_core: Get LPM requirements for Tiger Lake David E. Box
2021-04-07 14:27   ` Hans de Goede
2021-04-07 15:38   ` Rajneesh Bhardwaj
2021-04-01  3:05 ` [PATCH 6/9] platform/x86: intel_pmc_core: Add requirements file to debugfs David E. Box
2021-04-07 14:28   ` Hans de Goede
2021-04-07 15:45   ` Rajneesh Bhardwaj
2021-04-07 17:47     ` David E. Box
2021-04-01  3:05 ` [PATCH 7/9] platform/x86: intel_pmc_core: Add option to set/clear LPM mode David E. Box
2021-04-07 14:37   ` Hans de Goede
2021-04-07 17:19     ` David E. Box
2021-04-01  3:05 ` [PATCH 8/9] platform/x86: intel_pmc_core: Add LTR registers for Tiger Lake David E. Box
2021-04-07 14:48   ` Hans de Goede
2021-04-07 15:48   ` Rajneesh Bhardwaj
2021-04-07 15:50     ` Rajneesh Bhardwaj
2021-04-01  3:05 ` [PATCH 9/9] platform/x86: intel_pmc_core: Add support for Alder Lake PCH-P David E. Box
2021-04-07 14:48   ` Hans de Goede
2021-04-07 15:49   ` Rajneesh Bhardwaj
2021-04-07 14:49 ` [PATCH 0/9] intel_pmc_core: Add sub-state requirements and mode latching support Hans de Goede

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