From: Hans de Goede <hdegoede@redhat.com>
To: "David E. Box" <david.e.box@linux.intel.com>,
irenic.rajneesh@gmail.com, mgross@linux.intel.com,
gayatri.kammela@intel.com
Cc: platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/9] intel_pmc_core: Add sub-state requirements and mode latching support
Date: Wed, 7 Apr 2021 16:49:41 +0200 [thread overview]
Message-ID: <a5d476c8-5c38-b8fc-a0da-65a28c5a14e3@redhat.com> (raw)
In-Reply-To: <20210401030558.2301621-1-david.e.box@linux.intel.com>
Hi,
On 4/1/21 5:05 AM, David E. Box wrote:
> - Patch 1 and 2 remove the use of the global struct pmc_dev
> - Patches 3-7 add support for reading low power mode sub-state
> requirements, latching sub-state status on different low power mode
> events, and displaying the sub-state residency in microseconds
> - Patch 8 adds missing LTR IPs for TGL
> - Patch 9 adds support for ADL-P which is based on TGL
>
> Applied on top of latest 5.12-rc2 based hans-review/review-hans
Thnak you for this series, this mostly is fine, a few small remarks
on patch 5/9 and 7/9 if you can send a v2 addressing those, then
this is ready for merging.
Regards,
Hans
>
> David E. Box (4):
> platform/x86: intel_pmc_core: Don't use global pmcdev in quirks
> platform/x86: intel_pmc_core: Remove global struct pmc_dev
> platform/x86: intel_pmc_core: Add option to set/clear LPM mode
> platform/x86: intel_pmc_core: Add support for Alder Lake PCH-P
>
> Gayatri Kammela (5):
> platform/x86: intel_pmc_core: Handle sub-states generically
> platform/x86: intel_pmc_core: Show LPM residency in microseconds
> platform/x86: intel_pmc_core: Get LPM requirements for Tiger Lake
> platform/x86: intel_pmc_core: Add requirements file to debugfs
> platform/x86: intel_pmc_core: Add LTR registers for Tiger Lake
>
> drivers/platform/x86/intel_pmc_core.c | 359 +++++++++++++++++++++++---
> drivers/platform/x86/intel_pmc_core.h | 47 +++-
> 2 files changed, 370 insertions(+), 36 deletions(-)
>
prev parent reply other threads:[~2021-04-07 14:50 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-01 3:05 [PATCH 0/9] intel_pmc_core: Add sub-state requirements and mode latching support David E. Box
2021-04-01 3:05 ` [PATCH 1/9] platform/x86: intel_pmc_core: Don't use global pmcdev in quirks David E. Box
2021-04-07 14:23 ` Hans de Goede
2021-04-07 14:58 ` Rajneesh Bhardwaj
2021-04-01 3:05 ` [PATCH 2/9] platform/x86: intel_pmc_core: Remove global struct pmc_dev David E. Box
2021-04-07 14:23 ` Hans de Goede
2021-04-07 15:02 ` Rajneesh Bhardwaj
2021-04-01 3:05 ` [PATCH 3/9] platform/x86: intel_pmc_core: Handle sub-states generically David E. Box
2021-04-07 14:23 ` Hans de Goede
2021-04-07 15:22 ` Rajneesh Bhardwaj
2021-04-01 3:05 ` [PATCH 4/9] platform/x86: intel_pmc_core: Show LPM residency in microseconds David E. Box
2021-04-07 14:23 ` Hans de Goede
2021-04-07 15:24 ` Rajneesh Bhardwaj
2021-04-01 3:05 ` [PATCH 5/9] platform/x86: intel_pmc_core: Get LPM requirements for Tiger Lake David E. Box
2021-04-07 14:27 ` Hans de Goede
2021-04-07 15:38 ` Rajneesh Bhardwaj
2021-04-01 3:05 ` [PATCH 6/9] platform/x86: intel_pmc_core: Add requirements file to debugfs David E. Box
2021-04-07 14:28 ` Hans de Goede
2021-04-07 15:45 ` Rajneesh Bhardwaj
2021-04-07 17:47 ` David E. Box
2021-04-01 3:05 ` [PATCH 7/9] platform/x86: intel_pmc_core: Add option to set/clear LPM mode David E. Box
2021-04-07 14:37 ` Hans de Goede
2021-04-07 17:19 ` David E. Box
2021-04-01 3:05 ` [PATCH 8/9] platform/x86: intel_pmc_core: Add LTR registers for Tiger Lake David E. Box
2021-04-07 14:48 ` Hans de Goede
2021-04-07 15:48 ` Rajneesh Bhardwaj
2021-04-07 15:50 ` Rajneesh Bhardwaj
2021-04-01 3:05 ` [PATCH 9/9] platform/x86: intel_pmc_core: Add support for Alder Lake PCH-P David E. Box
2021-04-07 14:48 ` Hans de Goede
2021-04-07 15:49 ` Rajneesh Bhardwaj
2021-04-07 14:49 ` Hans de Goede [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=a5d476c8-5c38-b8fc-a0da-65a28c5a14e3@redhat.com \
--to=hdegoede@redhat.com \
--cc=david.e.box@linux.intel.com \
--cc=gayatri.kammela@intel.com \
--cc=irenic.rajneesh@gmail.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mgross@linux.intel.com \
--cc=platform-driver-x86@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).