From: Prasanna Vengateshan <prasanna.vengateshan@microchip.com>
To: <andrew@lunn.ch>, <netdev@vger.kernel.org>, <olteanv@gmail.com>,
<robh+dt@kernel.org>
Cc: <UNGLinuxDriver@microchip.com>, <Woojung.Huh@microchip.com>,
<hkallweit1@gmail.com>, <linux@armlinux.org.uk>,
<davem@davemloft.net>, <kuba@kernel.org>,
<linux-kernel@vger.kernel.org>, <vivien.didelot@gmail.com>,
<f.fainelli@gmail.com>, <devicetree@vger.kernel.org>
Subject: [PATCH v3 net-next 10/10] net: dsa: microchip: add support for vlan operations
Date: Fri, 23 Jul 2021 23:01:08 +0530 [thread overview]
Message-ID: <20210723173108.459770-11-prasanna.vengateshan@microchip.com> (raw)
In-Reply-To: <20210723173108.459770-1-prasanna.vengateshan@microchip.com>
Support for VLAN add, del, prepare and filtering operations.
The VLAN aware is a global setting. Mixed vlan filterings
are not supported. vlan_filtering_is_global is made as true
in lan937x_setup function.
Signed-off-by: Prasanna Vengateshan <prasanna.vengateshan@microchip.com>
---
drivers/net/dsa/microchip/lan937x_main.c | 198 +++++++++++++++++++++++
1 file changed, 198 insertions(+)
diff --git a/drivers/net/dsa/microchip/lan937x_main.c b/drivers/net/dsa/microchip/lan937x_main.c
index fb780678ef8d..963b066a8ad1 100644
--- a/drivers/net/dsa/microchip/lan937x_main.c
+++ b/drivers/net/dsa/microchip/lan937x_main.c
@@ -15,6 +15,14 @@
#include "ksz_common.h"
#include "lan937x_dev.h"
+static int lan937x_wait_vlan_ctrl_ready(struct ksz_device *dev)
+{
+ unsigned int val;
+
+ return regmap_read_poll_timeout(dev->regmap[0], REG_SW_VLAN_CTRL, val,
+ !(val & VLAN_START), 10, 1000);
+}
+
static u8 lan937x_get_fid(u16 vid)
{
if (vid > ALU_FID_SIZE)
@@ -23,6 +31,97 @@ static u8 lan937x_get_fid(u16 vid)
return vid;
}
+static int lan937x_get_vlan_table(struct ksz_device *dev, u16 vid,
+ struct lan937x_vlan *vlan_entry)
+{
+ u32 data;
+ int ret;
+
+ mutex_lock(&dev->vlan_mutex);
+
+ ret = ksz_write16(dev, REG_SW_VLAN_ENTRY_INDEX__2, vid & VLAN_INDEX_M);
+ if (ret < 0)
+ goto exit;
+
+ ret = ksz_write8(dev, REG_SW_VLAN_CTRL, VLAN_READ | VLAN_START);
+ if (ret < 0)
+ goto exit;
+
+ /* wait to be cleared */
+ ret = lan937x_wait_vlan_ctrl_ready(dev);
+ if (ret < 0)
+ goto exit;
+
+ ret = ksz_read32(dev, REG_SW_VLAN_ENTRY__4, &data);
+ if (ret < 0)
+ goto exit;
+
+ vlan_entry->valid = !!(data & VLAN_VALID);
+ vlan_entry->fid = data & VLAN_FID_M;
+
+ ret = ksz_read32(dev, REG_SW_VLAN_ENTRY_UNTAG__4,
+ &vlan_entry->untag_prtmap);
+ if (ret < 0)
+ goto exit;
+
+ ret = ksz_read32(dev, REG_SW_VLAN_ENTRY_PORTS__4,
+ &vlan_entry->fwd_map);
+ if (ret < 0)
+ goto exit;
+
+ ret = ksz_write8(dev, REG_SW_VLAN_CTRL, 0);
+ if (ret < 0)
+ goto exit;
+
+exit:
+ mutex_unlock(&dev->vlan_mutex);
+
+ return ret;
+}
+
+static int lan937x_set_vlan_table(struct ksz_device *dev, u16 vid,
+ struct lan937x_vlan *vlan_entry)
+{
+ u32 data;
+ int ret;
+
+ mutex_lock(&dev->vlan_mutex);
+
+ data = vlan_entry->valid ? VLAN_VALID : 0;
+ data |= vlan_entry->fid;
+
+ ret = ksz_write32(dev, REG_SW_VLAN_ENTRY__4, data);
+ if (ret < 0)
+ goto exit;
+
+ ret = ksz_write32(dev, REG_SW_VLAN_ENTRY_UNTAG__4,
+ vlan_entry->untag_prtmap);
+ if (ret < 0)
+ goto exit;
+
+ ret = ksz_write32(dev, REG_SW_VLAN_ENTRY_PORTS__4, vlan_entry->fwd_map);
+ if (ret < 0)
+ goto exit;
+
+ ret = ksz_write16(dev, REG_SW_VLAN_ENTRY_INDEX__2, vid & VLAN_INDEX_M);
+ if (ret < 0)
+ goto exit;
+
+ ret = ksz_write8(dev, REG_SW_VLAN_CTRL, VLAN_START | VLAN_WRITE);
+ if (ret < 0)
+ goto exit;
+
+ /* wait to be cleared */
+ ret = lan937x_wait_vlan_ctrl_ready(dev);
+ if (ret < 0)
+ goto exit;
+
+exit:
+ mutex_unlock(&dev->vlan_mutex);
+
+ return ret;
+}
+
static int lan937x_read_table(struct ksz_device *dev, u32 *table)
{
int ret;
@@ -197,6 +296,102 @@ static void lan937x_port_stp_state_set(struct dsa_switch *ds, int port,
mutex_unlock(&dev->dev_mutex);
}
+static int lan937x_port_vlan_filtering(struct dsa_switch *ds, int port,
+ bool flag,
+ struct netlink_ext_ack *extack)
+{
+ struct ksz_device *dev = ds->priv;
+ int ret;
+
+ ret = lan937x_cfg(dev, REG_SW_LUE_CTRL_0, SW_VLAN_ENABLE,
+ flag);
+
+ return ret;
+}
+
+static int lan937x_port_vlan_add(struct dsa_switch *ds, int port,
+ const struct switchdev_obj_port_vlan *vlan,
+ struct netlink_ext_ack *extack)
+{
+ bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
+ struct ksz_device *dev = ds->priv;
+ struct lan937x_vlan vlan_entry;
+ int ret;
+
+ ret = lan937x_get_vlan_table(dev, vlan->vid, &vlan_entry);
+ if (ret < 0) {
+ NL_SET_ERR_MSG_MOD(extack, "Failed to get vlan table\n");
+ return ret;
+ }
+
+ vlan_entry.fid = lan937x_get_fid(vlan->vid);
+ vlan_entry.valid = true;
+
+ /* set/clear switch port when updating vlan table registers */
+ if (untagged)
+ vlan_entry.untag_prtmap |= BIT(port);
+ else
+ vlan_entry.untag_prtmap &= ~BIT(port);
+
+ vlan_entry.fwd_map |= BIT(port);
+
+ ret = lan937x_set_vlan_table(dev, vlan->vid, &vlan_entry);
+ if (ret < 0) {
+ NL_SET_ERR_MSG_MOD(extack, "Failed to set vlan table\n");
+ return ret;
+ }
+
+ /* change PVID */
+ if (vlan->flags & BRIDGE_VLAN_INFO_PVID) {
+ ret = lan937x_pwrite16(dev, port, REG_PORT_DEFAULT_VID,
+ vlan->vid);
+ if (ret < 0) {
+ NL_SET_ERR_MSG_MOD(extack, "Failed to set pvid\n");
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static int lan937x_port_vlan_del(struct dsa_switch *ds, int port,
+ const struct switchdev_obj_port_vlan *vlan)
+{
+ bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
+ struct ksz_device *dev = ds->priv;
+ struct lan937x_vlan vlan_entry;
+ u16 pvid;
+ int ret;
+
+ lan937x_pread16(dev, port, REG_PORT_DEFAULT_VID, &pvid);
+ pvid &= 0xFFF;
+
+ ret = lan937x_get_vlan_table(dev, vlan->vid, &vlan_entry);
+ if (ret < 0) {
+ dev_err(dev->dev, "Failed to get vlan table\n");
+ return ret;
+ }
+ /* clear port fwd map */
+ vlan_entry.fwd_map &= ~BIT(port);
+
+ if (untagged)
+ vlan_entry.untag_prtmap &= ~BIT(port);
+
+ ret = lan937x_set_vlan_table(dev, vlan->vid, &vlan_entry);
+ if (ret < 0) {
+ dev_err(dev->dev, "Failed to set vlan table\n");
+ return ret;
+ }
+
+ ret = lan937x_pwrite16(dev, port, REG_PORT_DEFAULT_VID, pvid);
+ if (ret < 0) {
+ dev_err(dev->dev, "Failed to set pvid\n");
+ return ret;
+ }
+
+ return 0;
+}
+
static int lan937x_port_fdb_add(struct dsa_switch *ds, int port,
const unsigned char *addr, u16 vid)
{
@@ -1007,6 +1202,9 @@ const struct dsa_switch_ops lan937x_switch_ops = {
.port_bridge_leave = ksz_port_bridge_leave,
.port_stp_state_set = lan937x_port_stp_state_set,
.port_fast_age = ksz_port_fast_age,
+ .port_vlan_filtering = lan937x_port_vlan_filtering,
+ .port_vlan_add = lan937x_port_vlan_add,
+ .port_vlan_del = lan937x_port_vlan_del,
.port_fdb_dump = lan937x_port_fdb_dump,
.port_fdb_add = lan937x_port_fdb_add,
.port_fdb_del = lan937x_port_fdb_del,
--
2.27.0
next prev parent reply other threads:[~2021-07-23 17:32 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-23 17:30 [PATCH v3 net-next 00/10] net: dsa: microchip: DSA driver support for LAN937x switch Prasanna Vengateshan
2021-07-23 17:30 ` [PATCH v3 net-next 01/10] dt-bindings: net: dsa: dt bindings for microchip lan937x Prasanna Vengateshan
2021-07-26 22:49 ` Rob Herring
2021-07-23 17:31 ` [PATCH v3 net-next 02/10] net: dsa: move mib->cnt_ptr reset code to ksz_common.c Prasanna Vengateshan
2021-07-23 18:53 ` Vladimir Oltean
2021-07-23 17:31 ` [PATCH v3 net-next 03/10] net: phy: Add support for LAN937x T1 phy driver Prasanna Vengateshan
2021-08-11 17:52 ` Prasanna Vengateshan
2021-07-23 17:31 ` [PATCH v3 net-next 04/10] net: dsa: tag_ksz: add tag handling for Microchip LAN937x Prasanna Vengateshan
2021-07-23 19:23 ` Vladimir Oltean
2021-07-23 17:31 ` [PATCH v3 net-next 05/10] net: dsa: microchip: add DSA support for microchip lan937x Prasanna Vengateshan
2021-07-31 15:04 ` Vladimir Oltean
2021-07-31 22:05 ` Andrew Lunn
2021-08-02 21:33 ` Vladimir Oltean
2021-08-03 14:43 ` Andrew Lunn
2021-08-03 15:05 ` Vladimir Oltean
2021-08-02 10:45 ` Prasanna Vengateshan
2021-08-02 12:15 ` Vladimir Oltean
2021-08-02 13:13 ` Andrew Lunn
2021-08-02 13:59 ` Vladimir Oltean
2021-08-02 20:47 ` Andrew Lunn
2021-08-03 16:54 ` Prasanna Vengateshan
2021-08-03 23:54 ` Vladimir Oltean
2021-08-04 9:59 ` Russell King (Oracle)
2021-08-04 10:46 ` Vladimir Oltean
2021-08-04 14:28 ` Prasanna Vengateshan
2021-08-04 14:51 ` Vladimir Oltean
2021-08-07 15:40 ` Andrew Lunn
2021-08-07 17:00 ` Vladimir Oltean
2021-08-11 17:44 ` Prasanna Vengateshan
2021-08-11 18:23 ` Andrew Lunn
2021-08-11 20:14 ` Russell King (Oracle)
2021-08-11 20:20 ` Vladimir Oltean
2021-08-11 20:22 ` Andrew Lunn
2021-07-23 17:31 ` [PATCH v3 net-next 06/10] net: dsa: microchip: add support for phylink management Prasanna Vengateshan
2021-07-31 15:27 ` Vladimir Oltean
2021-08-03 17:04 ` Prasanna Vengateshan
2021-07-23 17:31 ` [PATCH v3 net-next 07/10] net: dsa: microchip: add support for ethtool port counters Prasanna Vengateshan
2021-07-23 17:31 ` [PATCH v3 net-next 08/10] net: dsa: microchip: add support for port mirror operations Prasanna Vengateshan
2021-07-31 15:24 ` Vladimir Oltean
2021-07-23 17:31 ` [PATCH v3 net-next 09/10] net: dsa: microchip: add support for fdb and mdb management Prasanna Vengateshan
2021-07-31 15:19 ` Vladimir Oltean
2021-07-23 17:31 ` Prasanna Vengateshan [this message]
2021-07-31 15:08 ` [PATCH v3 net-next 10/10] net: dsa: microchip: add support for vlan operations Vladimir Oltean
2021-08-02 10:48 ` Prasanna Vengateshan
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