linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Andrew Lunn <andrew@lunn.ch>
To: Vladimir Oltean <olteanv@gmail.com>
Cc: Prasanna Vengateshan <prasanna.vengateshan@microchip.com>,
	netdev@vger.kernel.org, robh+dt@kernel.org,
	UNGLinuxDriver@microchip.com, Woojung.Huh@microchip.com,
	hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net,
	kuba@kernel.org, linux-kernel@vger.kernel.org,
	vivien.didelot@gmail.com, f.fainelli@gmail.com,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v3 net-next 05/10] net: dsa: microchip: add DSA support for microchip lan937x
Date: Sun, 1 Aug 2021 00:05:16 +0200	[thread overview]
Message-ID: <YQXJHA+z+hXjxe6+@lunn.ch> (raw)
In-Reply-To: <20210731150416.upe5nwkwvwajhwgg@skbuf>

> > +void lan937x_mac_config(struct ksz_device *dev, int port,
> > +			phy_interface_t interface)
> > +{
> > +	u8 data8;
> > +
> > +	lan937x_pread8(dev, port, REG_PORT_XMII_CTRL_1, &data8);
> > +
> > +	/* clear MII selection & set it based on interface later */
> > +	data8 &= ~PORT_MII_SEL_M;
> > +
> > +	/* configure MAC based on interface */
> > +	switch (interface) {
> > +	case PHY_INTERFACE_MODE_MII:
> > +		lan937x_config_gbit(dev, false, &data8);
> > +		data8 |= PORT_MII_SEL;
> > +		break;
> > +	case PHY_INTERFACE_MODE_RMII:
> > +		lan937x_config_gbit(dev, false, &data8);
> > +		data8 |= PORT_RMII_SEL;
> > +		break;
> > +	case PHY_INTERFACE_MODE_RGMII:
> > +	case PHY_INTERFACE_MODE_RGMII_ID:
> > +	case PHY_INTERFACE_MODE_RGMII_TXID:
> > +	case PHY_INTERFACE_MODE_RGMII_RXID:
> > +		lan937x_config_gbit(dev, true, &data8);
> > +		data8 |= PORT_RGMII_SEL;
> > +
> > +		/* Add RGMII internal delay for cpu port*/
> > +		if (dsa_is_cpu_port(dev->ds, port)) {
> 
> Why only for the CPU port? I would like Andrew/Florian to have a look
> here, I guess the assumption is that if the port has a phy-handle, the
> RGMII delays should be dealt with by the PHY, but the logic seems to be
> "is a CPU port <=> has a phy-handle / isn't a CPU port <=> doesn't have
> a phy-handle"? What if it's a fixed-link port connected to a downstream
> switch, for which this one is a DSA master?

The marvell driver applies delays unconditionally. And as far as i
remember, it is only used in the use case you suggest, a DSA link,
which is using RGMII. For marvell switches, that is pretty unusual,
most boards use 1000BaseX or higher SERDES speeds for links between
switches.

I'm not sure if we have the case of an external PHY using RGMII. I
suspect it might actually be broken, because i think both the MAC and
the PHY might add the same delay. For phylib in general, if the MAC
applies the delays, it needs to manipulate the value passed to the PHY
so it also does not add delays. And i'm not sure DSA does that.

So limiting RGMII delays to only the CPU port is not
unreasonable. However, i suspect you are correct about chained
switches not working.

We might need to look at this at a higher level, when the PHY is
connected to the MAC and what mode gets passed to it.
 
> > +			if (interface == PHY_INTERFACE_MODE_RGMII_ID ||
> > +			    interface == PHY_INTERFACE_MODE_RGMII_RXID)
> > +				data8 |= PORT_RGMII_ID_IG_ENABLE;
> > +
> > +			if (interface == PHY_INTERFACE_MODE_RGMII_ID ||
> > +			    interface == PHY_INTERFACE_MODE_RGMII_TXID)
> > +				data8 |= PORT_RGMII_ID_EG_ENABLE;
> > +		}
> > +		break;
> > +	default:
> > +		dev_err(dev->dev, "Unsupported interface '%s' for port %d\n",
> > +			phy_modes(interface), port);
> > +		return;
> > +	}
> > +
> > +	/* Write the updated value */
> > +	lan937x_pwrite8(dev, port, REG_PORT_XMII_CTRL_1, data8);
> > +}
> 
> > +static int lan937x_mdio_register(struct dsa_switch *ds)
> > +{
> > +	struct ksz_device *dev = ds->priv;
> > +	int ret;
> > +
> > +	dev->mdio_np = of_get_child_by_name(ds->dev->of_node, "mdio");
> 
> So you support both the cases where an internal PHY is described using
> OF bindings, and where the internal PHY is implicitly accessed using the
> slave_mii_bus of the switch, at a PHY address equal to the port number,
> and with no phy-handle or fixed-link device tree property for that port?
> 
> Do you need both alternatives? The first is already more flexible than
> the second.

The first is also much more verbose in DT, and the second generally
just works without any DT. What can be tricky with the second is
getting PHY interrupts to work, but it is possible, the mv88e6xxx does
it.

	Andrew

  reply	other threads:[~2021-07-31 22:05 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-23 17:30 [PATCH v3 net-next 00/10] net: dsa: microchip: DSA driver support for LAN937x switch Prasanna Vengateshan
2021-07-23 17:30 ` [PATCH v3 net-next 01/10] dt-bindings: net: dsa: dt bindings for microchip lan937x Prasanna Vengateshan
2021-07-26 22:49   ` Rob Herring
2021-07-23 17:31 ` [PATCH v3 net-next 02/10] net: dsa: move mib->cnt_ptr reset code to ksz_common.c Prasanna Vengateshan
2021-07-23 18:53   ` Vladimir Oltean
2021-07-23 17:31 ` [PATCH v3 net-next 03/10] net: phy: Add support for LAN937x T1 phy driver Prasanna Vengateshan
2021-08-11 17:52   ` Prasanna Vengateshan
2021-07-23 17:31 ` [PATCH v3 net-next 04/10] net: dsa: tag_ksz: add tag handling for Microchip LAN937x Prasanna Vengateshan
2021-07-23 19:23   ` Vladimir Oltean
2021-07-23 17:31 ` [PATCH v3 net-next 05/10] net: dsa: microchip: add DSA support for microchip lan937x Prasanna Vengateshan
2021-07-31 15:04   ` Vladimir Oltean
2021-07-31 22:05     ` Andrew Lunn [this message]
2021-08-02 21:33       ` Vladimir Oltean
2021-08-03 14:43         ` Andrew Lunn
2021-08-03 15:05           ` Vladimir Oltean
2021-08-02 10:45     ` Prasanna Vengateshan
2021-08-02 12:15       ` Vladimir Oltean
2021-08-02 13:13         ` Andrew Lunn
2021-08-02 13:59           ` Vladimir Oltean
2021-08-02 20:47             ` Andrew Lunn
2021-08-03 16:54             ` Prasanna Vengateshan
2021-08-03 23:54               ` Vladimir Oltean
2021-08-04  9:59                 ` Russell King (Oracle)
2021-08-04 10:46                   ` Vladimir Oltean
2021-08-04 14:28                     ` Prasanna Vengateshan
2021-08-04 14:51                       ` Vladimir Oltean
2021-08-07 15:40                     ` Andrew Lunn
2021-08-07 17:00                       ` Vladimir Oltean
2021-08-11 17:44                       ` Prasanna Vengateshan
2021-08-11 18:23                         ` Andrew Lunn
2021-08-11 20:14                           ` Russell King (Oracle)
2021-08-11 20:20                             ` Vladimir Oltean
2021-08-11 20:22                               ` Andrew Lunn
2021-07-23 17:31 ` [PATCH v3 net-next 06/10] net: dsa: microchip: add support for phylink management Prasanna Vengateshan
2021-07-31 15:27   ` Vladimir Oltean
2021-08-03 17:04     ` Prasanna Vengateshan
2021-07-23 17:31 ` [PATCH v3 net-next 07/10] net: dsa: microchip: add support for ethtool port counters Prasanna Vengateshan
2021-07-23 17:31 ` [PATCH v3 net-next 08/10] net: dsa: microchip: add support for port mirror operations Prasanna Vengateshan
2021-07-31 15:24   ` Vladimir Oltean
2021-07-23 17:31 ` [PATCH v3 net-next 09/10] net: dsa: microchip: add support for fdb and mdb management Prasanna Vengateshan
2021-07-31 15:19   ` Vladimir Oltean
2021-07-23 17:31 ` [PATCH v3 net-next 10/10] net: dsa: microchip: add support for vlan operations Prasanna Vengateshan
2021-07-31 15:08   ` Vladimir Oltean
2021-08-02 10:48     ` Prasanna Vengateshan

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=YQXJHA+z+hXjxe6+@lunn.ch \
    --to=andrew@lunn.ch \
    --cc=UNGLinuxDriver@microchip.com \
    --cc=Woojung.Huh@microchip.com \
    --cc=davem@davemloft.net \
    --cc=devicetree@vger.kernel.org \
    --cc=f.fainelli@gmail.com \
    --cc=hkallweit1@gmail.com \
    --cc=kuba@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux@armlinux.org.uk \
    --cc=netdev@vger.kernel.org \
    --cc=olteanv@gmail.com \
    --cc=prasanna.vengateshan@microchip.com \
    --cc=robh+dt@kernel.org \
    --cc=vivien.didelot@gmail.com \
    --subject='Re: [PATCH v3 net-next 05/10] net: dsa: microchip: add DSA support for microchip lan937x' \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).