linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Huang Rui <ray.huang@amd.com>
To: "Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
	Viresh Kumar <viresh.kumar@linaro.org>,
	Shuah Khan <skhan@linuxfoundation.org>,
	"Borislav Petkov" <bp@suse.de>,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@kernel.org>,
	Giovanni Gherdovich <ggherdovich@suse.cz>,
	<linux-pm@vger.kernel.org>
Cc: Deepak Sharma <deepak.sharma@amd.com>,
	Alex Deucher <alexander.deucher@amd.com>,
	Mario Limonciello <mario.limonciello@amd.com>,
	Steven Noonan <steven@valvesoftware.com>,
	Nathan Fontenot <nathan.fontenot@amd.com>,
	Jinzhou Su <Jinzhou.Su@amd.com>,
	Xiaojian Du <Xiaojian.Du@amd.com>, <linux-kernel@vger.kernel.org>,
	<x86@kernel.org>, Huang Rui <ray.huang@amd.com>
Subject: [PATCH v3 07/21] cpufreq: amd: add fast switch function for amd-pstate
Date: Fri, 29 Oct 2021 21:02:27 +0800	[thread overview]
Message-ID: <20211029130241.1984459-8-ray.huang@amd.com> (raw)
In-Reply-To: <20211029130241.1984459-1-ray.huang@amd.com>

Introduce the fast switch function for amd-pstate on the AMD processors
which support the full MSR register control. It's able to decrease the
lattency on interrupt context.

Signed-off-by: Huang Rui <ray.huang@amd.com>
---
 drivers/cpufreq/amd-pstate.c | 38 ++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index a400861c7fdc..55ff03f85608 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -191,6 +191,41 @@ static int amd_pstate_target(struct cpufreq_policy *policy,
 	return 0;
 }
 
+static void amd_pstate_adjust_perf(unsigned int cpu,
+				   unsigned long min_perf,
+				   unsigned long target_perf,
+				   unsigned long capacity)
+{
+	unsigned long amd_max_perf, amd_min_perf, amd_des_perf,
+		      amd_cap_perf, lowest_nonlinear_perf;
+	struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
+	struct amd_cpudata *cpudata = policy->driver_data;
+
+	amd_cap_perf = READ_ONCE(cpudata->highest_perf);
+	lowest_nonlinear_perf = READ_ONCE(cpudata->lowest_nonlinear_perf);
+
+	if (target_perf < capacity)
+		amd_des_perf = DIV_ROUND_UP(amd_cap_perf * target_perf,
+					    capacity);
+
+	amd_min_perf = READ_ONCE(cpudata->highest_perf);
+	if (min_perf < capacity)
+		amd_min_perf = DIV_ROUND_UP(amd_cap_perf * min_perf, capacity);
+
+	if (amd_min_perf < lowest_nonlinear_perf)
+		amd_min_perf = lowest_nonlinear_perf;
+
+	amd_max_perf = amd_cap_perf;
+	if (amd_max_perf < amd_min_perf)
+		amd_max_perf = amd_min_perf;
+
+	amd_des_perf = clamp_t(unsigned long, amd_des_perf,
+			       amd_min_perf, amd_max_perf);
+
+	amd_pstate_update(cpudata, amd_min_perf, amd_des_perf,
+			  amd_max_perf, true);
+}
+
 static int amd_get_min_freq(struct amd_cpudata *cpudata)
 {
 	struct cppc_perf_caps cppc_perf;
@@ -311,6 +346,8 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
 	/* It will be updated by governor */
 	policy->cur = policy->cpuinfo.min_freq;
 
+	policy->fast_switch_possible = true;
+
 	ret = freq_qos_add_request(&policy->constraints, &cpudata->req[0],
 				   FREQ_QOS_MIN, policy->cpuinfo.min_freq);
 	if (ret < 0) {
@@ -360,6 +397,7 @@ static struct cpufreq_driver amd_pstate_driver = {
 	.flags		= CPUFREQ_CONST_LOOPS | CPUFREQ_NEED_UPDATE_LIMITS,
 	.verify		= amd_pstate_verify,
 	.target		= amd_pstate_target,
+	.adjust_perf    = amd_pstate_adjust_perf,
 	.init		= amd_pstate_cpu_init,
 	.exit		= amd_pstate_cpu_exit,
 	.name		= "amd-pstate",
-- 
2.25.1


  parent reply	other threads:[~2021-10-29 13:04 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-29 13:02 [PATCH v3 00/21] cpufreq: introduce a new AMD CPU frequency control mechanism Huang Rui
2021-10-29 13:02 ` [PATCH v3 01/21] x86/cpufreatures: add AMD Collaborative Processor Performance Control feature flag Huang Rui
2021-10-29 14:39   ` Borislav Petkov
2021-11-06 10:28   ` Borislav Petkov
2021-11-09  3:08     ` Huang Rui
2021-10-29 13:02 ` [PATCH v3 02/21] x86/msr: add AMD CPPC MSR definitions Huang Rui
2021-10-29 13:02 ` [PATCH v3 03/21] ACPI: CPPC: implement support for SystemIO registers Huang Rui
2021-10-29 13:02 ` [PATCH v3 04/21] ACPI: CPPC: Check present CPUs for determining _CPC is valid Huang Rui
2021-10-29 13:02 ` [PATCH v3 05/21] ACPI: CPPC: add cppc enable register function Huang Rui
2021-10-29 14:15   ` Limonciello, Mario
2021-11-01  9:20     ` Huang Rui
2021-10-29 13:02 ` [PATCH v3 06/21] cpufreq: amd: introduce a new amd pstate driver to support future processors Huang Rui
2021-11-02 18:52   ` Limonciello, Mario
2021-11-02 19:38   ` Nathan Fontenot
2021-11-03  7:01     ` Huang Rui
2021-11-04 15:10       ` Nathan Fontenot
2021-11-05  4:20         ` Huang Rui
2021-10-29 13:02 ` Huang Rui [this message]
2021-10-29 14:16   ` [PATCH v3 07/21] cpufreq: amd: add fast switch function for amd-pstate Limonciello, Mario
2021-11-02 19:56   ` Nathan Fontenot
2021-10-29 13:02 ` [PATCH v3 08/21] cpufreq: amd: add acpi cppc function as the backend for legacy processors Huang Rui
2021-10-29 14:20   ` Limonciello, Mario
2021-11-01  9:02     ` Huang Rui
2021-11-02 18:46   ` Nathan Fontenot
2021-11-03 12:00     ` Huang Rui
2021-10-29 13:02 ` [PATCH v3 09/21] cpufreq: amd: add trace for amd-pstate module Huang Rui
2021-10-29 13:02 ` [PATCH v3 10/21] cpufreq: amd: add boost mode support for amd-pstate Huang Rui
2021-10-29 13:02 ` [PATCH v3 11/21] cpufreq: amd: add amd-pstate frequencies attributes Huang Rui
2021-11-05 18:59   ` Nathan Fontenot
2021-11-10 12:28     ` Huang Rui
2021-10-29 13:02 ` [PATCH v3 12/21] cpufreq: amd: add amd-pstate performance attributes Huang Rui
2021-11-05 18:50   ` Nathan Fontenot
2021-10-29 13:02 ` [PATCH v3 13/21] cpupower: add AMD P-state capability flag Huang Rui
2021-10-29 13:02 ` [PATCH v3 14/21] cpupower: add the function to check amd-pstate enabled Huang Rui
2021-10-29 13:02 ` [PATCH v3 15/21] cpupower: initial AMD P-state capability Huang Rui
2021-10-29 13:02 ` [PATCH v3 16/21] cpupower: add the function to get the sysfs value from specific table Huang Rui
2021-10-29 13:02 ` [PATCH v3 17/21] cpupower: add amd-pstate sysfs definition and access helper Huang Rui
2021-10-29 14:10   ` Limonciello, Mario
2021-11-01  9:14     ` Huang Rui
2021-10-29 13:02 ` [PATCH v3 18/21] cpupower: enable boost state support for amd-pstate module Huang Rui
2021-11-02 20:11   ` Nathan Fontenot
2021-11-03  7:04     ` Huang Rui
2021-10-29 13:02 ` [PATCH v3 19/21] cpupower: move print_speed function into misc helper Huang Rui
2021-10-29 13:02 ` [PATCH v3 20/21] cpupower: print amd-pstate information on cpupower Huang Rui
2021-10-29 13:02 ` [PATCH v3 21/21] Documentation: amd-pstate: add amd-pstate driver introduction Huang Rui
2021-11-04 16:40 ` [PATCH v3 00/21] cpufreq: introduce a new AMD CPU frequency control mechanism Giovanni Gherdovich
2021-11-05 16:09   ` Huang Rui
2021-11-06  8:58     ` Matt McDonald
2021-11-08  9:20       ` Huang Rui
2021-11-12 11:21         ` Du, Xiaojian

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20211029130241.1984459-8-ray.huang@amd.com \
    --to=ray.huang@amd.com \
    --cc=Jinzhou.Su@amd.com \
    --cc=Xiaojian.Du@amd.com \
    --cc=alexander.deucher@amd.com \
    --cc=bp@suse.de \
    --cc=deepak.sharma@amd.com \
    --cc=ggherdovich@suse.cz \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pm@vger.kernel.org \
    --cc=mario.limonciello@amd.com \
    --cc=mingo@kernel.org \
    --cc=nathan.fontenot@amd.com \
    --cc=peterz@infradead.org \
    --cc=rafael.j.wysocki@intel.com \
    --cc=skhan@linuxfoundation.org \
    --cc=steven@valvesoftware.com \
    --cc=viresh.kumar@linaro.org \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).