linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Nathan Fontenot <nafonten@amd.com>
To: Huang Rui <ray.huang@amd.com>,
	"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
	Viresh Kumar <viresh.kumar@linaro.org>,
	Shuah Khan <skhan@linuxfoundation.org>,
	Borislav Petkov <bp@suse.de>,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@kernel.org>,
	Giovanni Gherdovich <ggherdovich@suse.cz>,
	linux-pm@vger.kernel.org
Cc: Deepak Sharma <deepak.sharma@amd.com>,
	Alex Deucher <alexander.deucher@amd.com>,
	Mario Limonciello <mario.limonciello@amd.com>,
	Steven Noonan <steven@valvesoftware.com>,
	Nathan Fontenot <nathan.fontenot@amd.com>,
	Jinzhou Su <Jinzhou.Su@amd.com>,
	Xiaojian Du <Xiaojian.Du@amd.com>,
	linux-kernel@vger.kernel.org, x86@kernel.org
Subject: Re: [PATCH v3 12/21] cpufreq: amd: add amd-pstate performance attributes
Date: Fri, 5 Nov 2021 13:50:49 -0500	[thread overview]
Message-ID: <d0418254-37c2-347c-52e5-a9de72bc08d5@amd.com> (raw)
In-Reply-To: <20211029130241.1984459-13-ray.huang@amd.com>

On 10/29/21 8:02 AM, Huang Rui wrote:
> Introduce sysfs attributes to get the different level amd-pstate
> performances.

Can you explain why we need to provide duplicate sysfs entries for
these values?

Each one of these are already created by the drivers/acpi code and exist
in sysfs (see /sys/devices/system/cpu/cpuX/acpi_cppc).

-Nathan

> 
> Signed-off-by: Huang Rui <ray.huang@amd.com>
> ---
>  drivers/cpufreq/amd-pstate.c | 53 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 53 insertions(+)
> 
> diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
> index 8cf1e80f44e0..58ee50bf492b 100644
> --- a/drivers/cpufreq/amd-pstate.c
> +++ b/drivers/cpufreq/amd-pstate.c
> @@ -536,14 +536,67 @@ static ssize_t show_amd_pstate_lowest_nonlinear_freq(struct cpufreq_policy *poli
>  	return sprintf(&buf[0], "%u\n", freq);
>  }
>  
> +static ssize_t show_amd_pstate_highest_perf(struct cpufreq_policy *policy,
> +					    char *buf)
> +{
> +	u32 perf;
> +	struct amd_cpudata *cpudata = policy->driver_data;
> +
> +	perf = READ_ONCE(cpudata->highest_perf);
> +
> +	return sprintf(&buf[0], "%u\n", perf);
> +}
> +
> +static ssize_t show_amd_pstate_nominal_perf(struct cpufreq_policy *policy,
> +					    char *buf)
> +{
> +	u32 perf;
> +	struct amd_cpudata *cpudata = policy->driver_data;
> +
> +	perf = READ_ONCE(cpudata->nominal_perf);
> +
> +	return sprintf(&buf[0], "%u\n", perf);
> +}
> +
> +static ssize_t show_amd_pstate_lowest_nonlinear_perf(struct cpufreq_policy *policy,
> +						     char *buf)
> +{
> +	u32 perf;
> +	struct amd_cpudata *cpudata = policy->driver_data;
> +
> +	perf = READ_ONCE(cpudata->lowest_nonlinear_perf);
> +
> +	return sprintf(&buf[0], "%u\n", perf);
> +}
> +
> +static ssize_t show_amd_pstate_lowest_perf(struct cpufreq_policy *policy,
> +					   char *buf)
> +{
> +	u32 perf;
> +	struct amd_cpudata *cpudata = policy->driver_data;
> +
> +	perf = READ_ONCE(cpudata->lowest_perf);
> +
> +	return sprintf(&buf[0], "%u\n", perf);
> +}
> +
>  cpufreq_freq_attr_ro(amd_pstate_max_freq);
>  cpufreq_freq_attr_ro(amd_pstate_nominal_freq);
>  cpufreq_freq_attr_ro(amd_pstate_lowest_nonlinear_freq);
>  
> +cpufreq_freq_attr_ro(amd_pstate_highest_perf);
> +cpufreq_freq_attr_ro(amd_pstate_nominal_perf);
> +cpufreq_freq_attr_ro(amd_pstate_lowest_nonlinear_perf);
> +cpufreq_freq_attr_ro(amd_pstate_lowest_perf);
> +
>  static struct freq_attr *amd_pstate_attr[] = {
>  	&amd_pstate_max_freq,
>  	&amd_pstate_nominal_freq,
>  	&amd_pstate_lowest_nonlinear_freq,
> +	&amd_pstate_highest_perf,
> +	&amd_pstate_nominal_perf,
> +	&amd_pstate_lowest_nonlinear_perf,
> +	&amd_pstate_lowest_perf,
>  	NULL,
>  };
>  
> 

  reply	other threads:[~2021-11-05 18:50 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-29 13:02 [PATCH v3 00/21] cpufreq: introduce a new AMD CPU frequency control mechanism Huang Rui
2021-10-29 13:02 ` [PATCH v3 01/21] x86/cpufreatures: add AMD Collaborative Processor Performance Control feature flag Huang Rui
2021-10-29 14:39   ` Borislav Petkov
2021-11-06 10:28   ` Borislav Petkov
2021-11-09  3:08     ` Huang Rui
2021-10-29 13:02 ` [PATCH v3 02/21] x86/msr: add AMD CPPC MSR definitions Huang Rui
2021-10-29 13:02 ` [PATCH v3 03/21] ACPI: CPPC: implement support for SystemIO registers Huang Rui
2021-10-29 13:02 ` [PATCH v3 04/21] ACPI: CPPC: Check present CPUs for determining _CPC is valid Huang Rui
2021-10-29 13:02 ` [PATCH v3 05/21] ACPI: CPPC: add cppc enable register function Huang Rui
2021-10-29 14:15   ` Limonciello, Mario
2021-11-01  9:20     ` Huang Rui
2021-10-29 13:02 ` [PATCH v3 06/21] cpufreq: amd: introduce a new amd pstate driver to support future processors Huang Rui
2021-11-02 18:52   ` Limonciello, Mario
2021-11-02 19:38   ` Nathan Fontenot
2021-11-03  7:01     ` Huang Rui
2021-11-04 15:10       ` Nathan Fontenot
2021-11-05  4:20         ` Huang Rui
2021-10-29 13:02 ` [PATCH v3 07/21] cpufreq: amd: add fast switch function for amd-pstate Huang Rui
2021-10-29 14:16   ` Limonciello, Mario
2021-11-02 19:56   ` Nathan Fontenot
2021-10-29 13:02 ` [PATCH v3 08/21] cpufreq: amd: add acpi cppc function as the backend for legacy processors Huang Rui
2021-10-29 14:20   ` Limonciello, Mario
2021-11-01  9:02     ` Huang Rui
2021-11-02 18:46   ` Nathan Fontenot
2021-11-03 12:00     ` Huang Rui
2021-10-29 13:02 ` [PATCH v3 09/21] cpufreq: amd: add trace for amd-pstate module Huang Rui
2021-10-29 13:02 ` [PATCH v3 10/21] cpufreq: amd: add boost mode support for amd-pstate Huang Rui
2021-10-29 13:02 ` [PATCH v3 11/21] cpufreq: amd: add amd-pstate frequencies attributes Huang Rui
2021-11-05 18:59   ` Nathan Fontenot
2021-11-10 12:28     ` Huang Rui
2021-10-29 13:02 ` [PATCH v3 12/21] cpufreq: amd: add amd-pstate performance attributes Huang Rui
2021-11-05 18:50   ` Nathan Fontenot [this message]
2021-10-29 13:02 ` [PATCH v3 13/21] cpupower: add AMD P-state capability flag Huang Rui
2021-10-29 13:02 ` [PATCH v3 14/21] cpupower: add the function to check amd-pstate enabled Huang Rui
2021-10-29 13:02 ` [PATCH v3 15/21] cpupower: initial AMD P-state capability Huang Rui
2021-10-29 13:02 ` [PATCH v3 16/21] cpupower: add the function to get the sysfs value from specific table Huang Rui
2021-10-29 13:02 ` [PATCH v3 17/21] cpupower: add amd-pstate sysfs definition and access helper Huang Rui
2021-10-29 14:10   ` Limonciello, Mario
2021-11-01  9:14     ` Huang Rui
2021-10-29 13:02 ` [PATCH v3 18/21] cpupower: enable boost state support for amd-pstate module Huang Rui
2021-11-02 20:11   ` Nathan Fontenot
2021-11-03  7:04     ` Huang Rui
2021-10-29 13:02 ` [PATCH v3 19/21] cpupower: move print_speed function into misc helper Huang Rui
2021-10-29 13:02 ` [PATCH v3 20/21] cpupower: print amd-pstate information on cpupower Huang Rui
2021-10-29 13:02 ` [PATCH v3 21/21] Documentation: amd-pstate: add amd-pstate driver introduction Huang Rui
2021-11-04 16:40 ` [PATCH v3 00/21] cpufreq: introduce a new AMD CPU frequency control mechanism Giovanni Gherdovich
2021-11-05 16:09   ` Huang Rui
2021-11-06  8:58     ` Matt McDonald
2021-11-08  9:20       ` Huang Rui
2021-11-12 11:21         ` Du, Xiaojian

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=d0418254-37c2-347c-52e5-a9de72bc08d5@amd.com \
    --to=nafonten@amd.com \
    --cc=Jinzhou.Su@amd.com \
    --cc=Xiaojian.Du@amd.com \
    --cc=alexander.deucher@amd.com \
    --cc=bp@suse.de \
    --cc=deepak.sharma@amd.com \
    --cc=ggherdovich@suse.cz \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pm@vger.kernel.org \
    --cc=mario.limonciello@amd.com \
    --cc=mingo@kernel.org \
    --cc=nathan.fontenot@amd.com \
    --cc=peterz@infradead.org \
    --cc=rafael.j.wysocki@intel.com \
    --cc=ray.huang@amd.com \
    --cc=skhan@linuxfoundation.org \
    --cc=steven@valvesoftware.com \
    --cc=viresh.kumar@linaro.org \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).