* [PATCH v3 0/5] Add initial support for MA35D1 SoC
@ 2022-04-18 8:27 Jacky Huang
2022-04-18 8:27 ` [PATCH v3 1/5] dt-bindings: clock: add binding for MA35D1 clock controller Jacky Huang
` (4 more replies)
0 siblings, 5 replies; 24+ messages in thread
From: Jacky Huang @ 2022-04-18 8:27 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-clk, linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0, Jacky Huang
This patch series adds initial support for Nuvoton MA35D1 SoC,
include initial dts and clock controller binding.
v3:
- added patch 4/5 and 5/5
- introduce CONFIG_ARCH_NUVOTON option
- add initial bindings for Nuvoton Platform boards
- fixed coding style problem of nuvoton,ma35d1-clk.h
- added CAPLL to clock-controller node
- modify the chosen node of ma35d1-evb.dts
- modify clock yaml "clk-pll-mode" to "nuvoton,clk-pll-mode"
v2:
- fixed dt_binding_check failed of nuvoton,ma35d1-clk.yaml
Jacky Huang (5):
dt-bindings: clock: add binding for MA35D1 clock controller
dt-bindings: clock: Document MA35D1 clock controller bindings
arm64: dts: nuvoton: Add initial support for MA35D1
arm64: Kconfig: nuvoton: Introduce CONFIG_ARCH_NUVOTON
dt-bindings: arm: Add initial bindings for Nuvoton Platform
.../devicetree/bindings/arm/nuvoton.yaml | 27 ++
.../bindings/clock/nuvoton,ma35d1-clk.yaml | 63 +++++
arch/arm64/Kconfig.platforms | 10 +
arch/arm64/boot/dts/Makefile | 1 +
arch/arm64/boot/dts/nuvoton/Makefile | 2 +
arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts | 24 ++
arch/arm64/boot/dts/nuvoton/ma35d1.dtsi | 111 ++++++++
.../dt-bindings/clock/nuvoton,ma35d1-clk.h | 260 ++++++++++++++++++
8 files changed, 498 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/nuvoton.yaml
create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile
create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts
create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
create mode 100644 include/dt-bindings/clock/nuvoton,ma35d1-clk.h
--
2.17.1
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3 1/5] dt-bindings: clock: add binding for MA35D1 clock controller
2022-04-18 8:27 [PATCH v3 0/5] Add initial support for MA35D1 SoC Jacky Huang
@ 2022-04-18 8:27 ` Jacky Huang
2022-04-18 12:09 ` Krzysztof Kozlowski
2022-04-18 8:27 ` [PATCH v3 2/5] dt-bindings: clock: Document MA35D1 clock controller bindings Jacky Huang
` (3 subsequent siblings)
4 siblings, 1 reply; 24+ messages in thread
From: Jacky Huang @ 2022-04-18 8:27 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-clk, linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0, Jacky Huang
Add the dt-bindings header for Nuvoton MA35D1, that gets shared
between the clock controller and clock references in the dts.
Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
---
.../dt-bindings/clock/nuvoton,ma35d1-clk.h | 260 ++++++++++++++++++
1 file changed, 260 insertions(+)
create mode 100644 include/dt-bindings/clock/nuvoton,ma35d1-clk.h
diff --git a/include/dt-bindings/clock/nuvoton,ma35d1-clk.h b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
new file mode 100644
index 000000000000..063002384c00
--- /dev/null
+++ b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
@@ -0,0 +1,260 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * Copyright (c) 2022 Nuvoton Technology Corporation.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_NUVOTON_MA35D1_CLK_H
+#define __DT_BINDINGS_CLOCK_NUVOTON_MA35D1_CLK_H
+
+/* Clock Sources */
+/* External and Internal oscillator clocks */
+#define HXT 0
+#define HXT_GATE 1
+#define LXT 2
+#define LXT_GATE 3
+#define HIRC 4
+#define HIRC_GATE 5
+#define LIRC 6
+#define LIRC_GATE 7
+
+/* PLLs */
+#define CAPLL 8
+#define SYSPLL 9
+#define DDRPLL 10
+#define APLL 11
+#define EPLL 12
+#define VPLL 13
+
+/* EPLL Divider */
+#define EPLL_DIV2 14
+#define EPLL_DIV4 15
+#define EPLL_DIV8 16
+
+/* CA35 CPU Clock, System Clock, AXI, HCLK and PCLK */
+#define CA35CLK_MUX 17
+#define AXICLK_DIV2 18
+#define AXICLK_DIV4 19
+#define AXICLK_MUX 20
+#define SYSCLK0_MUX 21
+#define SYSCLK1_MUX 22
+#define SYSCLK1_DIV2 23
+#define HCLK0 24
+#define HCLK1 25
+#define HCLK2 26
+#define PCLK0 27
+#define PCLK1 28
+#define PCLK2 29
+#define HCLK3 30
+#define PCLK3 31
+#define PCLK4 32
+
+/* Peripheral clocks */
+/* AXI and AHB Clocks */
+#define USBPHY0 33
+#define USBPHY1 34
+#define DDR0_GATE 35
+#define DDR6_GATE 36
+#define CAN0_MUX 37
+#define CAN0_DIV 38
+#define CAN0_GATE 39
+#define CAN1_MUX 40
+#define CAN1_DIV 41
+#define CAN1_GATE 42
+#define CAN2_MUX 43
+#define CAN2_DIV 44
+#define CAN2_GATE 45
+#define CAN3_MUX 46
+#define CAN3_DIV 47
+#define CAN3_GATE 48
+#define SDH0_MUX 49
+#define SDH0_GATE 50
+#define SDH1_MUX 51
+#define SDH1_GATE 52
+#define NAND_GATE 53
+#define USBD_GATE 54
+#define USBH_GATE 55
+#define HUSBH0_GATE 56
+#define HUSBH1_GATE 57
+#define GFX_MUX 58
+#define GFX_GATE 59
+#define VC8K_GATE 60
+#define DCU_MUX 61
+#define DCU_GATE 62
+#define DCUP_DIV 63
+#define EMAC0_GATE 64
+#define EMAC1_GATE 65
+#define CCAP0_MUX 66
+#define CCAP0_DIV 67
+#define CCAP0_GATE 68
+#define CCAP1_MUX 69
+#define CCAP1_DIV 70
+#define CCAP1_GATE 71
+#define PDMA0_GATE 72
+#define PDMA1_GATE 73
+#define PDMA2_GATE 74
+#define PDMA3_GATE 75
+#define WH0_GATE 76
+#define WH1_GATE 77
+#define HWS_GATE 78
+#define EBI_GATE 79
+#define SRAM0_GATE 80
+#define SRAM1_GATE 81
+#define ROM_GATE 82
+#define TRA_GATE 83
+#define DBG_MUX 84
+#define DBG_GATE 85
+#define CKO_MUX 86
+#define CKO_DIV 87
+#define CKO_GATE 88
+#define GTMR_GATE 89
+#define GPA_GATE 90
+#define GPB_GATE 91
+#define GPC_GATE 92
+#define GPD_GATE 93
+#define GPE_GATE 94
+#define GPF_GATE 95
+#define GPG_GATE 96
+#define GPH_GATE 97
+#define GPI_GATE 98
+#define GPJ_GATE 99
+#define GPK_GATE 100
+#define GPL_GATE 101
+#define GPM_GATE 102
+#define GPN_GATE 103
+
+/* APB Clocks */
+#define TMR0_MUX 104
+#define TMR0_GATE 105
+#define TMR1_MUX 106
+#define TMR1_GATE 107
+#define TMR2_MUX 108
+#define TMR2_GATE 109
+#define TMR3_MUX 110
+#define TMR3_GATE 111
+#define TMR4_MUX 112
+#define TMR4_GATE 113
+#define TMR5_MUX 114
+#define TMR5_GATE 115
+#define TMR6_MUX 116
+#define TMR6_GATE 117
+#define TMR7_MUX 118
+#define TMR7_GATE 119
+#define TMR8_MUX 120
+#define TMR8_GATE 121
+#define TMR9_MUX 122
+#define TMR9_GATE 123
+#define TMR10_MUX 124
+#define TMR10_GATE 125
+#define TMR11_MUX 126
+#define TMR11_GATE 127
+#define UART0_MUX 128
+#define UART0_DIV 129
+#define UART0_GATE 130
+#define UART1_MUX 131
+#define UART1_DIV 132
+#define UART1_GATE 133
+#define UART2_MUX 134
+#define UART2_DIV 135
+#define UART2_GATE 136
+#define UART3_MUX 137
+#define UART3_DIV 138
+#define UART3_GATE 139
+#define UART4_MUX 140
+#define UART4_DIV 141
+#define UART4_GATE 142
+#define UART5_MUX 143
+#define UART5_DIV 144
+#define UART5_GATE 145
+#define UART6_MUX 146
+#define UART6_DIV 147
+#define UART6_GATE 148
+#define UART7_MUX 149
+#define UART7_DIV 150
+#define UART7_GATE 151
+#define UART8_MUX 152
+#define UART8_DIV 153
+#define UART8_GATE 154
+#define UART9_MUX 155
+#define UART9_DIV 156
+#define UART9_GATE 157
+#define UART10_MUX 158
+#define UART10_DIV 159
+#define UART10_GATE 160
+#define UART11_MUX 161
+#define UART11_DIV 162
+#define UART11_GATE 163
+#define UART12_MUX 164
+#define UART12_DIV 165
+#define UART12_GATE 166
+#define UART13_MUX 167
+#define UART13_DIV 168
+#define UART13_GATE 169
+#define UART14_MUX 170
+#define UART14_DIV 171
+#define UART14_GATE 172
+#define UART15_MUX 173
+#define UART15_DIV 174
+#define UART15_GATE 175
+#define UART16_MUX 176
+#define UART16_DIV 177
+#define UART16_GATE 178
+#define RTC_GATE 179
+#define DDR_GATE 180
+#define KPI_MUX 181
+#define KPI_DIV 182
+#define KPI_GATE 183
+#define I2C0_GATE 184
+#define I2C1_GATE 185
+#define I2C2_GATE 186
+#define I2C3_GATE 187
+#define I2C4_GATE 188
+#define I2C5_GATE 189
+#define QSPI0_MUX 190
+#define QSPI0_GATE 191
+#define QSPI1_MUX 192
+#define QSPI1_GATE 193
+#define SMC0_MUX 194
+#define SMC0_DIV 195
+#define SMC0_GATE 196
+#define SMC1_MUX 197
+#define SMC1_DIV 198
+#define SMC1_GATE 199
+#define WDT0_MUX 200
+#define WDT0_GATE 201
+#define WDT1_MUX 202
+#define WDT1_GATE 203
+#define WDT2_MUX 204
+#define WDT2_GATE 205
+#define WWDT0_MUX 206
+#define WWDT1_MUX 207
+#define WWDT2_MUX 208
+#define EPWM0_GATE 209
+#define EPWM1_GATE 210
+#define EPWM2_GATE 211
+#define I2S0_MUX 212
+#define I2S0_GATE 213
+#define I2S1_MUX 214
+#define I2S1_GATE 215
+#define SSMCC_GATE 216
+#define SSPCC_GATE 217
+#define SPI0_MUX 218
+#define SPI0_GATE 219
+#define SPI1_MUX 220
+#define SPI1_GATE 221
+#define SPI2_MUX 222
+#define SPI2_GATE 223
+#define SPI3_MUX 224
+#define SPI3_GATE 225
+#define ECAP0_GATE 226
+#define ECAP1_GATE 227
+#define ECAP2_GATE 228
+#define QEI0_GATE 229
+#define QEI1_GATE 230
+#define QEI2_GATE 231
+#define ADC_DIV 232
+#define ADC_GATE 233
+#define EADC_DIV 234
+#define EADC_GATE 235
+#define CLK_MAX_IDX 236
+
+#endif /* __DT_BINDINGS_CLOCK_NUVOTON_MA35D1_CLK_H */
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 2/5] dt-bindings: clock: Document MA35D1 clock controller bindings
2022-04-18 8:27 [PATCH v3 0/5] Add initial support for MA35D1 SoC Jacky Huang
2022-04-18 8:27 ` [PATCH v3 1/5] dt-bindings: clock: add binding for MA35D1 clock controller Jacky Huang
@ 2022-04-18 8:27 ` Jacky Huang
2022-04-18 12:18 ` Krzysztof Kozlowski
2022-04-18 13:35 ` Rob Herring
2022-04-18 8:27 ` [PATCH v3 3/5] arm64: dts: nuvoton: Add initial support for MA35D1 Jacky Huang
` (2 subsequent siblings)
4 siblings, 2 replies; 24+ messages in thread
From: Jacky Huang @ 2022-04-18 8:27 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-clk, linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0, Jacky Huang
Add documentation to describe Nuvoton MA35D1 clock driver bindings.
Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
---
.../bindings/clock/nuvoton,ma35d1-clk.yaml | 63 +++++++++++++++++++
1 file changed, 63 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
diff --git a/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
new file mode 100644
index 000000000000..d0d37c5e84af
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/nuvoton,ma35d1-clk.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton MA35D1 Clock Control Module Binding
+
+maintainers:
+ - Chi-Fang Li <cfli0@nuvoton.com>
+ - Jacky Huang <ychuang3@nuvoton.com>
+
+description: |
+ The MA35D1 clock controller generates clocks for the whole chip,
+ including system clocks and all peripheral clocks.
+
+ See also:
+ include/dt-bindings/clock/ma35d1-clk.h
+
+properties:
+ compatible:
+ const: nuvoton,ma35d1-clk
+
+ reg:
+ maxItems: 1
+
+ "#clock-cells":
+ const: 1
+
+ assigned-clocks:
+ minItems: 5
+ maxItems: 5
+
+ assigned-clock-rates:
+ minItems: 5
+ maxItems: 5
+
+ nuvoton,clk-pll-mode:
+ A list of PLL operation mode corresponding to DDRPLL, APLL, EPLL,
+ and VPLL in sequential.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 5
+ maxItems: 5
+ items:
+ enum: [ 0, 1, 2 ]
+
+required:
+ - compatible
+ - reg
+ - "#clock-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
+
+ clk: clock-controller@40460200 {
+ compatible = "nuvoton,ma35d1-clk";
+ reg = <0x0 0x40460200 0x0 0x100>;
+ #clock-cells = <1>;
+ };
+...
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 3/5] arm64: dts: nuvoton: Add initial support for MA35D1
2022-04-18 8:27 [PATCH v3 0/5] Add initial support for MA35D1 SoC Jacky Huang
2022-04-18 8:27 ` [PATCH v3 1/5] dt-bindings: clock: add binding for MA35D1 clock controller Jacky Huang
2022-04-18 8:27 ` [PATCH v3 2/5] dt-bindings: clock: Document MA35D1 clock controller bindings Jacky Huang
@ 2022-04-18 8:27 ` Jacky Huang
2022-04-18 12:20 ` Krzysztof Kozlowski
2022-04-18 8:27 ` [PATCH v3 4/5] arm64: Kconfig: nuvoton: Introduce CONFIG_ARCH_NUVOTON Jacky Huang
2022-04-18 8:27 ` [PATCH v3 5/5] dt-bindings: arm: Add initial bindings for Nuvoton Platform Jacky Huang
4 siblings, 1 reply; 24+ messages in thread
From: Jacky Huang @ 2022-04-18 8:27 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-clk, linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0, Jacky Huang
Add the initial device tree files for Nuvoton MA35D1 Soc.
Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
---
arch/arm64/boot/dts/Makefile | 1 +
arch/arm64/boot/dts/nuvoton/Makefile | 2 +
arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts | 24 +++++
arch/arm64/boot/dts/nuvoton/ma35d1.dtsi | 111 +++++++++++++++++++++
4 files changed, 138 insertions(+)
create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile
create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts
create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index 1ba04e31a438..7b107fa7414b 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -19,6 +19,7 @@ subdir-y += lg
subdir-y += marvell
subdir-y += mediatek
subdir-y += microchip
+subdir-y += nuvoton
subdir-y += nvidia
subdir-y += qcom
subdir-y += realtek
diff --git a/arch/arm64/boot/dts/nuvoton/Makefile b/arch/arm64/boot/dts/nuvoton/Makefile
new file mode 100644
index 000000000000..e1e0c466bf5e
--- /dev/null
+++ b/arch/arm64/boot/dts/nuvoton/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_NUVOTON) += ma35d1-evb.dtb
diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts b/arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts
new file mode 100644
index 000000000000..95f0facb0476
--- /dev/null
+++ b/arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for MA35D1 Evaluation Board (EVB)
+ *
+ * Copyright (C) 2022 Nuvoton Technology Corp.
+ */
+
+/dts-v1/;
+#include "ma35d1.dtsi"
+
+/ {
+ model = "Nuvoton MA35D1-EVB";
+ compatible = "nuvoton,ma35d1-evb", "nuvoton,ma35d1";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0x0 0x10000000>;
+ };
+};
+
diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
new file mode 100644
index 000000000000..98a9ed1f6816
--- /dev/null
+++ b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
@@ -0,0 +1,111 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright (c) 2022 Nuvoton Technology Corp.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
+
+/ {
+ compatible = "nuvoton,ma35d1";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <&cpu0>;
+ };
+ core1 {
+ cpu = <&cpu1>;
+ };
+ };
+ };
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35";
+ reg = <0x0>;
+ enable-method = "psci";
+ next-level-cache = <&L2_0>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35";
+ reg = <0x1>;
+ enable-method = "psci";
+ next-level-cache = <&L2_0>;
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ cache-level = <2>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_LOW)>;
+ clock-frequency = <12000000>;
+ };
+
+ sys: system-controller@40460000 {
+ compatible = "nuvoton,ma35d1-sys", "syscon", "simple-mfd";
+ reg = <0x0 0x40460000 0x0 0x400>;
+ };
+
+ reset: reset-controller {
+ compatible = "nuvoton,ma35d1-reset";
+ nuvoton,ma35d1-sys = <&sys>;
+ #reset-cells = <1>;
+ };
+
+ clk: clock-controller@40460200 {
+ compatible = "nuvoton,ma35d1-clk";
+ reg = <0x0 0x40460200 0x0 0x100>;
+ #clock-cells = <1>;
+ assigned-clocks = <&clk CAPLL>,
+ <&clk DDRPLL>,
+ <&clk APLL>,
+ <&clk EPLL>,
+ <&clk VPLL>;
+ assigned-clock-rates = <1000000000>,
+ <266000000>,
+ <180000000>,
+ <500000000>,
+ <102000000>;
+ nuvoton,clk-pll-mode = <0 1 0 0 0>;
+ };
+
+ gic: interrupt-controller@50800000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
+ interrupt-controller;
+ reg = <0x0 0x50801000 0x0 0x1000>,
+ <0x0 0x50802000 0x0 0x2000>,
+ <0x0 0x50804000 0x0 0x2000>,
+ <0x0 0x50806000 0x0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0x13) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ };
+};
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 4/5] arm64: Kconfig: nuvoton: Introduce CONFIG_ARCH_NUVOTON
2022-04-18 8:27 [PATCH v3 0/5] Add initial support for MA35D1 SoC Jacky Huang
` (2 preceding siblings ...)
2022-04-18 8:27 ` [PATCH v3 3/5] arm64: dts: nuvoton: Add initial support for MA35D1 Jacky Huang
@ 2022-04-18 8:27 ` Jacky Huang
2022-04-18 8:27 ` [PATCH v3 5/5] dt-bindings: arm: Add initial bindings for Nuvoton Platform Jacky Huang
4 siblings, 0 replies; 24+ messages in thread
From: Jacky Huang @ 2022-04-18 8:27 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-clk, linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0, Jacky Huang
This adds a Kconfig option to toggle support for ARMv8 based
Nuvoton SoCs.
Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
---
arch/arm64/Kconfig.platforms | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 30b123cde02c..a6a232b9bda8 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -203,6 +203,16 @@ config ARCH_MXC
This enables support for the ARMv8 based SoCs in the
NXP i.MX family.
+config ARCH_NUVOTON
+ bool "Nuvoton Platforms"
+ select PINCTRL
+ select PM
+ select GPIOLIB
+ select SOC_BUS
+ help
+ This enables support for the ARMv8 based Nuvoton SoCs such
+ as MA35D1.
+
config ARCH_QCOM
bool "Qualcomm Platforms"
select GPIOLIB
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 5/5] dt-bindings: arm: Add initial bindings for Nuvoton Platform
2022-04-18 8:27 [PATCH v3 0/5] Add initial support for MA35D1 SoC Jacky Huang
` (3 preceding siblings ...)
2022-04-18 8:27 ` [PATCH v3 4/5] arm64: Kconfig: nuvoton: Introduce CONFIG_ARCH_NUVOTON Jacky Huang
@ 2022-04-18 8:27 ` Jacky Huang
2022-04-18 12:11 ` Krzysztof Kozlowski
4 siblings, 1 reply; 24+ messages in thread
From: Jacky Huang @ 2022-04-18 8:27 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-clk, linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0, Jacky Huang
Add binding for ARMv8 based Nuvotn SoCs and platform boards.
Add initial bindings for MA35D1 series development boards.
Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
---
.../devicetree/bindings/arm/nuvoton.yaml | 27 +++++++++++++++++++
1 file changed, 27 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/nuvoton.yaml
diff --git a/Documentation/devicetree/bindings/arm/nuvoton.yaml b/Documentation/devicetree/bindings/arm/nuvoton.yaml
new file mode 100644
index 000000000000..2b8444c2f7ed
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/nuvoton.yaml
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/nuvoton.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton Platforms Device Tree Bindings
+
+maintainers:
+ - Jacky Huang <ychuang3@nuvoton.com>
+
+description: |+
+ Bindings for Nuvoton ARMv8 based platform boards.
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ items:
+ - enum:
+ - nuvoton,ma35d1
+ - nuvoton,ma35d1-evb
+ - nuvoton,ma35d1-iot
+ - nuvoton,ma35d1-som512
+ - nuvoton,ma35d1-som1g
+
+additionalProperties: true
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH v3 1/5] dt-bindings: clock: add binding for MA35D1 clock controller
2022-04-18 8:27 ` [PATCH v3 1/5] dt-bindings: clock: add binding for MA35D1 clock controller Jacky Huang
@ 2022-04-18 12:09 ` Krzysztof Kozlowski
0 siblings, 0 replies; 24+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-18 12:09 UTC (permalink / raw)
To: Jacky Huang, linux-kernel, devicetree, linux-clk,
linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0
On 18/04/2022 10:27, Jacky Huang wrote:
> Add the dt-bindings header for Nuvoton MA35D1, that gets shared
> between the clock controller and clock references in the dts.
>
> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 5/5] dt-bindings: arm: Add initial bindings for Nuvoton Platform
2022-04-18 8:27 ` [PATCH v3 5/5] dt-bindings: arm: Add initial bindings for Nuvoton Platform Jacky Huang
@ 2022-04-18 12:11 ` Krzysztof Kozlowski
2022-04-21 6:39 ` Jacky Huang
0 siblings, 1 reply; 24+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-18 12:11 UTC (permalink / raw)
To: Jacky Huang, linux-kernel, devicetree, linux-clk,
linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0
On 18/04/2022 10:27, Jacky Huang wrote:
> +properties:
> + $nodename:
> + const: '/'
> + compatible:
> + items:
> + - enum:
> + - nuvoton,ma35d1
> + - nuvoton,ma35d1-evb
> + - nuvoton,ma35d1-iot
> + - nuvoton,ma35d1-som512
> + - nuvoton,ma35d1-som1g
This does not match your DTS and does not look reasonable (SoC
compatible should not be part of this enum). Check some other board
bindings for examples.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 2/5] dt-bindings: clock: Document MA35D1 clock controller bindings
2022-04-18 8:27 ` [PATCH v3 2/5] dt-bindings: clock: Document MA35D1 clock controller bindings Jacky Huang
@ 2022-04-18 12:18 ` Krzysztof Kozlowski
2022-04-19 10:12 ` Jacky Huang
2022-04-18 13:35 ` Rob Herring
1 sibling, 1 reply; 24+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-18 12:18 UTC (permalink / raw)
To: Jacky Huang, linux-kernel, devicetree, linux-clk,
linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0
On 18/04/2022 10:27, Jacky Huang wrote:
> Add documentation to describe Nuvoton MA35D1 clock driver bindings.
>
You skipped the review tag, so I assume because of amount of changes.
Usually it is nice to mention it...
> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
> ---
> .../bindings/clock/nuvoton,ma35d1-clk.yaml | 63 +++++++++++++++++++
> 1 file changed, 63 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
>
> diff --git a/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> new file mode 100644
> index 000000000000..d0d37c5e84af
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> @@ -0,0 +1,63 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/nuvoton,ma35d1-clk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nuvoton MA35D1 Clock Control Module Binding
> +
> +maintainers:
> + - Chi-Fang Li <cfli0@nuvoton.com>
> + - Jacky Huang <ychuang3@nuvoton.com>
> +
> +description: |
> + The MA35D1 clock controller generates clocks for the whole chip,
> + including system clocks and all peripheral clocks.
> +
> + See also:
> + include/dt-bindings/clock/ma35d1-clk.h
> +
> +properties:
> + compatible:
> + const: nuvoton,ma35d1-clk
> +
> + reg:
> + maxItems: 1
> +
> + "#clock-cells":
> + const: 1
> +
> + assigned-clocks:
What about clocks? This depends on clocks. What clocks do you want to
assign if they are not an input to the device?
> + minItems: 5
> + maxItems: 5
This is different than before. minItems should not be here.
Why do you need assigned-clocks in the binding at all?
> +
> + assigned-clock-rates:
> + minItems: 5
> + maxItems: 5
> +
> + nuvoton,clk-pll-mode:
> + A list of PLL operation mode corresponding to DDRPLL, APLL, EPLL,
> + and VPLL in sequential.
This does not look like a binding which was tested. Read
"writing-schema" and test your bindings.
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + minItems: 5
No need for minItems.
> + maxItems: 5
> + items:
> + enum: [ 0, 1, 2 ]
You need to describe the values in description, what's their meaning.
> +
> +required:
> + - compatible
> + - reg
> + - "#clock-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
> +
> + clk: clock-controller@40460200 {
> + compatible = "nuvoton,ma35d1-clk";
> + reg = <0x0 0x40460200 0x0 0x100>;
> + #clock-cells = <1>;
> + };
> +...
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 3/5] arm64: dts: nuvoton: Add initial support for MA35D1
2022-04-18 8:27 ` [PATCH v3 3/5] arm64: dts: nuvoton: Add initial support for MA35D1 Jacky Huang
@ 2022-04-18 12:20 ` Krzysztof Kozlowski
2022-04-21 6:41 ` Jacky Huang
0 siblings, 1 reply; 24+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-18 12:20 UTC (permalink / raw)
To: Jacky Huang, linux-kernel, devicetree, linux-clk,
linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0
On 18/04/2022 10:27, Jacky Huang wrote:
> Add the initial device tree files for Nuvoton MA35D1 Soc.
>
(...)
> + gic: interrupt-controller@50800000 {
The unit address does not match first reg property. Don't you have
warnings with this?
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + interrupt-parent = <&gic>;
> + interrupt-controller;
> + reg = <0x0 0x50801000 0x0 0x1000>,
> + <0x0 0x50802000 0x0 0x2000>,
> + <0x0 0x50804000 0x0 0x2000>,
> + <0x0 0x50806000 0x0 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0x13) |
> + IRQ_TYPE_LEVEL_HIGH)>;
> + };
> +};
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 2/5] dt-bindings: clock: Document MA35D1 clock controller bindings
2022-04-18 8:27 ` [PATCH v3 2/5] dt-bindings: clock: Document MA35D1 clock controller bindings Jacky Huang
2022-04-18 12:18 ` Krzysztof Kozlowski
@ 2022-04-18 13:35 ` Rob Herring
2022-04-19 8:49 ` Jacky Huang
1 sibling, 1 reply; 24+ messages in thread
From: Rob Herring @ 2022-04-18 13:35 UTC (permalink / raw)
To: Jacky Huang
Cc: robh+dt, krzk+dt, will, arnd, ychuang570808, linux-clk,
linux-arm-kernel, linux-kernel, olof, cfli0, soc, devicetree,
sboyd
On Mon, 18 Apr 2022 16:27:35 +0800, Jacky Huang wrote:
> Add documentation to describe Nuvoton MA35D1 clock driver bindings.
>
> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
> ---
> .../bindings/clock/nuvoton,ma35d1-clk.yaml | 63 +++++++++++++++++++
> 1 file changed, 63 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
./Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml:41:9: [error] syntax error: mapping values are not allowed here (syntax)
dtschema/dtc warnings/errors:
make[1]: *** Deleting file 'Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.example.dts'
Traceback (most recent call last):
File "/usr/local/bin/dt-extract-example", line 52, in <module>
binding = yaml.load(open(args.yamlfile, encoding='utf-8').read())
File "/usr/local/lib/python3.8/dist-packages/ruamel/yaml/main.py", line 434, in load
return constructor.get_single_data()
File "/usr/local/lib/python3.8/dist-packages/ruamel/yaml/constructor.py", line 119, in get_single_data
node = self.composer.get_single_node()
File "_ruamel_yaml.pyx", line 706, in _ruamel_yaml.CParser.get_single_node
File "_ruamel_yaml.pyx", line 724, in _ruamel_yaml.CParser._compose_document
File "_ruamel_yaml.pyx", line 775, in _ruamel_yaml.CParser._compose_node
File "_ruamel_yaml.pyx", line 889, in _ruamel_yaml.CParser._compose_mapping_node
File "_ruamel_yaml.pyx", line 775, in _ruamel_yaml.CParser._compose_node
File "_ruamel_yaml.pyx", line 891, in _ruamel_yaml.CParser._compose_mapping_node
File "_ruamel_yaml.pyx", line 904, in _ruamel_yaml.CParser._parse_next_event
ruamel.yaml.scanner.ScannerError: mapping values are not allowed in this context
in "<unicode string>", line 41, column 9
make[1]: *** [Documentation/devicetree/bindings/Makefile:26: Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.example.dts] Error 1
make[1]: *** Waiting for unfinished jobs....
./Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml: mapping values are not allowed in this context
in "<unicode string>", line 41, column 9
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml: ignoring, error parsing file
make: *** [Makefile:1401: dt_binding_check] Error 2
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 2/5] dt-bindings: clock: Document MA35D1 clock controller bindings
2022-04-18 13:35 ` Rob Herring
@ 2022-04-19 8:49 ` Jacky Huang
0 siblings, 0 replies; 24+ messages in thread
From: Jacky Huang @ 2022-04-19 8:49 UTC (permalink / raw)
To: Rob Herring
Cc: robh+dt, krzk+dt, will, arnd, ychuang570808, linux-clk,
linux-arm-kernel, linux-kernel, olof, cfli0, soc, devicetree,
sboyd
On 2022/4/18 下午 09:35, Rob Herring wrote:
> On Mon, 18 Apr 2022 16:27:35 +0800, Jacky Huang wrote:
>> Add documentation to describe Nuvoton MA35D1 clock driver bindings.
>>
>> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
>> ---
>> .../bindings/clock/nuvoton,ma35d1-clk.yaml | 63 +++++++++++++++++++
>> 1 file changed, 63 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
>>
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
>
> yamllint warnings/errors:
> ./Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml:41:9: [error] syntax error: mapping values are not allowed here (syntax)
>
> dtschema/dtc warnings/errors:
> make[1]: *** Deleting file 'Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.example.dts'
> Traceback (most recent call last):
> File "/usr/local/bin/dt-extract-example", line 52, in <module>
> binding = yaml.load(open(args.yamlfile, encoding='utf-8').read())
> File "/usr/local/lib/python3.8/dist-packages/ruamel/yaml/main.py", line 434, in load
> return constructor.get_single_data()
> File "/usr/local/lib/python3.8/dist-packages/ruamel/yaml/constructor.py", line 119, in get_single_data
> node = self.composer.get_single_node()
> File "_ruamel_yaml.pyx", line 706, in _ruamel_yaml.CParser.get_single_node
> File "_ruamel_yaml.pyx", line 724, in _ruamel_yaml.CParser._compose_document
> File "_ruamel_yaml.pyx", line 775, in _ruamel_yaml.CParser._compose_node
> File "_ruamel_yaml.pyx", line 889, in _ruamel_yaml.CParser._compose_mapping_node
> File "_ruamel_yaml.pyx", line 775, in _ruamel_yaml.CParser._compose_node
> File "_ruamel_yaml.pyx", line 891, in _ruamel_yaml.CParser._compose_mapping_node
> File "_ruamel_yaml.pyx", line 904, in _ruamel_yaml.CParser._parse_next_event
> ruamel.yaml.scanner.ScannerError: mapping values are not allowed in this context
> in "<unicode string>", line 41, column 9
> make[1]: *** [Documentation/devicetree/bindings/Makefile:26: Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.example.dts] Error 1
> make[1]: *** Waiting for unfinished jobs....
> ./Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml: mapping values are not allowed in this context
> in "<unicode string>", line 41, column 9
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml: ignoring, error parsing file
> make: *** [Makefile:1401: dt_binding_check] Error 2
>
> doc reference errors (make refcheckdocs):
>
> See https://patchwork.ozlabs.org/patch/
>
> This check can fail if there are any dependencies. The base for a patch
> series is generally the most recent rc1.
>
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:
>
> pip3 install dtschema --upgrade
>
> Please check and re-submit.
>
Thanks for your review.
I see this error and know where the problem is. I will fix it in the
next version.
Sincerely,
Jacky Huang
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 2/5] dt-bindings: clock: Document MA35D1 clock controller bindings
2022-04-18 12:18 ` Krzysztof Kozlowski
@ 2022-04-19 10:12 ` Jacky Huang
2022-04-19 10:39 ` Krzysztof Kozlowski
0 siblings, 1 reply; 24+ messages in thread
From: Jacky Huang @ 2022-04-19 10:12 UTC (permalink / raw)
To: Krzysztof Kozlowski, linux-kernel, devicetree, linux-clk,
linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0
On 2022/4/18 下午 08:18, Krzysztof Kozlowski wrote:
> On 18/04/2022 10:27, Jacky Huang wrote:
>> Add documentation to describe Nuvoton MA35D1 clock driver bindings.
>>
> You skipped the review tag, so I assume because of amount of changes.
> Usually it is nice to mention it...
I search the mail loop and find the "Reviewed-by" tag.
Now I know I should add the review tag to my patch.
Thanks for your reminding.
>> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
>> ---
>> .../bindings/clock/nuvoton,ma35d1-clk.yaml | 63 +++++++++++++++++++
>> 1 file changed, 63 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
>> new file mode 100644
>> index 000000000000..d0d37c5e84af
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
>> @@ -0,0 +1,63 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: https://apc01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fclock%2Fnuvoton%2Cma35d1-clk.yaml%23&data=05%7C01%7Cychuang3%40nuvoton.com%7C345b237bf1254018654b08da213588f9%7Ca3f24931d4034b4a94f17d83ac638e07%7C0%7C0%7C637858811062058468%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=gCnLGCaMeUI4kdu23m0T9g6eGPd37z8%2BatQQb%2Ftnxb4%3D&reserved=0
>> +$schema: https://apc01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=05%7C01%7Cychuang3%40nuvoton.com%7C345b237bf1254018654b08da213588f9%7Ca3f24931d4034b4a94f17d83ac638e07%7C0%7C0%7C637858811062058468%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=dj6FannQd0GxVJ%2BGlAjqs08SbNzPKi6ibdyLxLfR4q4%3D&reserved=0
>> +
>> +title: Nuvoton MA35D1 Clock Control Module Binding
>> +
>> +maintainers:
>> + - Chi-Fang Li <cfli0@nuvoton.com>
>> + - Jacky Huang <ychuang3@nuvoton.com>
>> +
>> +description: |
>> + The MA35D1 clock controller generates clocks for the whole chip,
>> + including system clocks and all peripheral clocks.
>> +
>> + See also:
>> + include/dt-bindings/clock/ma35d1-clk.h
>> +
>> +properties:
>> + compatible:
>> + const: nuvoton,ma35d1-clk
>> +
>> + reg:
>> + maxItems: 1
>> +
>> + "#clock-cells":
>> + const: 1
>> +
>> + assigned-clocks:
> What about clocks? This depends on clocks. What clocks do you want to
> assign if they are not an input to the device?
The clock source of all PLLs are from external 24 MHz crystal.
Yes, I should add clocks such as
clocks = <&hxt_24m>
and add a node
hxt_24m: hxt_24m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "hxt_24m";
};
>> + minItems: 5
>> + maxItems: 5
> This is different than before. minItems should not be here.
>
> Why do you need assigned-clocks in the binding at all?
The clock controller is equipped with 5 PLLs, which generated clocks for
CPU, DDR, and various peripheral bus. The assigned-clocks describe
these PLL output clocks.
I will remove the minItems.
>> +
>> + assigned-clock-rates:
>> + minItems: 5
>> + maxItems: 5
>> +
>> + nuvoton,clk-pll-mode:
>> + A list of PLL operation mode corresponding to DDRPLL, APLL, EPLL,
>> + and VPLL in sequential.
> This does not look like a binding which was tested. Read
> "writing-schema" and test your bindings.
"nuvoton,clk-pll-mode" is a nonstandard property used to describe the
operation mode of
corresponding PLLs.
(According to Device tree Specification section "2.2.4 Properties"
Nonstandard property names should specify a unique string prefix, such
as a stock ticker symbol, identifying the name of
the company or organization that defined the property. Examples:
fsl,channel-fifo-len
ibm,ppc-interrupt-server#s
linux,network-index)
>> + $ref: /schemas/types.yaml#/definitions/uint32-array
>> + minItems: 5
> No need for minItems.
Yes, I will remove it.
>> + maxItems: 5
>> + items:
>> + enum: [ 0, 1, 2 ]
> You need to describe the values in description, what's their meaning.
OK, I will add description about the values represented for PLL
operation modes.
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - "#clock-cells"
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
>> +
>> + clk: clock-controller@40460200 {
>> + compatible = "nuvoton,ma35d1-clk";
>> + reg = <0x0 0x40460200 0x0 0x100>;
>> + #clock-cells = <1>;
>> + };
>> +...
>
> Best regards,
> Krzysztof
Thanks for your review.
Sincerely,
Jacky Huang
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 2/5] dt-bindings: clock: Document MA35D1 clock controller bindings
2022-04-19 10:12 ` Jacky Huang
@ 2022-04-19 10:39 ` Krzysztof Kozlowski
2022-04-19 10:49 ` Jacky Huang
0 siblings, 1 reply; 24+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-19 10:39 UTC (permalink / raw)
To: Jacky Huang, linux-kernel, devicetree, linux-clk,
linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0
On 19/04/2022 12:12, Jacky Huang wrote:
>>> +
>>> + assigned-clock-rates:
>>> + minItems: 5
>>> + maxItems: 5
>>> +
>>> + nuvoton,clk-pll-mode:
>>> + A list of PLL operation mode corresponding to DDRPLL, APLL, EPLL,
>>> + and VPLL in sequential.
>> This does not look like a binding which was tested. Read
>> "writing-schema" and test your bindings.
>
> "nuvoton,clk-pll-mode" is a nonstandard property used to describe the
> operation mode of
> corresponding PLLs.
>
> (According to Device tree Specification section "2.2.4 Properties"
> Nonstandard property names should specify a unique string prefix, such
> as a stock ticker symbol, identifying the name of
> the company or organization that defined the property. Examples:
I am not saying about property name. I replied under some description
below which fails to build.
Instead please test your bindings.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 2/5] dt-bindings: clock: Document MA35D1 clock controller bindings
2022-04-19 10:39 ` Krzysztof Kozlowski
@ 2022-04-19 10:49 ` Jacky Huang
0 siblings, 0 replies; 24+ messages in thread
From: Jacky Huang @ 2022-04-19 10:49 UTC (permalink / raw)
To: Krzysztof Kozlowski, linux-kernel, devicetree, linux-clk,
linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0
On 2022/4/19 下午 06:39, Krzysztof Kozlowski wrote:
> On 19/04/2022 12:12, Jacky Huang wrote:
>>>> +
>>>> + assigned-clock-rates:
>>>> + minItems: 5
>>>> + maxItems: 5
>>>> +
>>>> + nuvoton,clk-pll-mode:
>>>> + A list of PLL operation mode corresponding to DDRPLL, APLL, EPLL,
>>>> + and VPLL in sequential.
>>> This does not look like a binding which was tested. Read
>>> "writing-schema" and test your bindings.
>> "nuvoton,clk-pll-mode" is a nonstandard property used to describe the
>> operation mode of
>> corresponding PLLs.
>>
>> (According to Device tree Specification section "2.2.4 Properties"
>> Nonstandard property names should specify a unique string prefix, such
>> as a stock ticker symbol, identifying the name of
>> the company or organization that defined the property. Examples:
> I am not saying about property name. I replied under some description
> below which fails to build.
>
> Instead please test your bindings.
>
> Best regards,
> Krzysztof
OK, I got it. I found the error by dt_binding_check.
I will fix them in the next version.
Thank you very much.
Jacky Huang
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 5/5] dt-bindings: arm: Add initial bindings for Nuvoton Platform
2022-04-18 12:11 ` Krzysztof Kozlowski
@ 2022-04-21 6:39 ` Jacky Huang
2022-04-21 6:56 ` Krzysztof Kozlowski
0 siblings, 1 reply; 24+ messages in thread
From: Jacky Huang @ 2022-04-21 6:39 UTC (permalink / raw)
To: Krzysztof Kozlowski, linux-kernel, devicetree, linux-clk,
linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0
On 2022/4/18 下午 08:11, Krzysztof Kozlowski wrote:
> On 18/04/2022 10:27, Jacky Huang wrote:
>> +properties:
>> + $nodename:
>> + const: '/'
>> + compatible:
>> + items:
>> + - enum:
>> + - nuvoton,ma35d1
>> + - nuvoton,ma35d1-evb
>> + - nuvoton,ma35d1-iot
>> + - nuvoton,ma35d1-som512
>> + - nuvoton,ma35d1-som1g
> This does not match your DTS and does not look reasonable (SoC
> compatible should not be part of this enum). Check some other board
> bindings for examples.
>
>
> Best regards,
> Krzysztof
I would like to modify it as follows:
description: |
Boards with an ARMv8 based Nuvoton SoC shall have the following
properties.
properties:
$nodename:
const: '/'
compatible:
oneOf:
- description: MA35D1 evaluation board
items:
- const: nuvoton,ma35d1-evb
- const: nuvoton,ma35d1
- description: MA35D1 IoT board
items:
- const: nuvoton,ma35d1-iot
- const: nuvoton,ma35d1
- description: MA35D1 SOM board with 512MB DDR
items:
- const: nuvoton,ma35d1-som512
- const: nuvoton,ma35d1
- description: MA35D1 SOM board with 1GB DDR
items:
- const: nuvoton,ma35d1-som1g
- const: nuvoton,ma35d1
additionalProperties: true
Thank you very much.
Jacky Huang
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 3/5] arm64: dts: nuvoton: Add initial support for MA35D1
2022-04-18 12:20 ` Krzysztof Kozlowski
@ 2022-04-21 6:41 ` Jacky Huang
0 siblings, 0 replies; 24+ messages in thread
From: Jacky Huang @ 2022-04-21 6:41 UTC (permalink / raw)
To: Krzysztof Kozlowski, linux-kernel, devicetree, linux-clk,
linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0
On 2022/4/18 下午 08:20, Krzysztof Kozlowski wrote:
> On 18/04/2022 10:27, Jacky Huang wrote:
>> Add the initial device tree files for Nuvoton MA35D1 Soc.
>>
> (...)
>
>> + gic: interrupt-controller@50800000 {
> The unit address does not match first reg property. Don't you have
> warnings with this?
Yes, I will modify it as
gic: interrupt-controller@50801000
>
>> + compatible = "arm,gic-400";
>> + #interrupt-cells = <3>;
>> + interrupt-parent = <&gic>;
>> + interrupt-controller;
>> + reg = <0x0 0x50801000 0x0 0x1000>,
>> + <0x0 0x50802000 0x0 0x2000>,
>> + <0x0 0x50804000 0x0 0x2000>,
>> + <0x0 0x50806000 0x0 0x2000>;
>> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0x13) |
>> + IRQ_TYPE_LEVEL_HIGH)>;
>> + };
>> +};
> Best regards,
> Krzysztof
Thanks for your review.
Jacky Huang
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 5/5] dt-bindings: arm: Add initial bindings for Nuvoton Platform
2022-04-21 6:39 ` Jacky Huang
@ 2022-04-21 6:56 ` Krzysztof Kozlowski
2022-04-21 8:04 ` Jacky Huang
0 siblings, 1 reply; 24+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-21 6:56 UTC (permalink / raw)
To: Jacky Huang, linux-kernel, devicetree, linux-clk,
linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0
On 21/04/2022 08:39, Jacky Huang wrote:
>
>
> On 2022/4/18 下午 08:11, Krzysztof Kozlowski wrote:
>> On 18/04/2022 10:27, Jacky Huang wrote:
>>> +properties:
>>> + $nodename:
>>> + const: '/'
>>> + compatible:
>>> + items:
>>> + - enum:
>>> + - nuvoton,ma35d1
>>> + - nuvoton,ma35d1-evb
>>> + - nuvoton,ma35d1-iot
>>> + - nuvoton,ma35d1-som512
>>> + - nuvoton,ma35d1-som1g
>> This does not match your DTS and does not look reasonable (SoC
>> compatible should not be part of this enum). Check some other board
>> bindings for examples.
>>
>>
>> Best regards,
>> Krzysztof
>
> I would like to modify it as follows:
>
> description: |
> Boards with an ARMv8 based Nuvoton SoC shall have the following
> properties.
>
> properties:
> $nodename:
> const: '/'
> compatible:
> oneOf:
>
> - description: MA35D1 evaluation board
> items:
> - const: nuvoton,ma35d1-evb
> - const: nuvoton,ma35d1
>
> - description: MA35D1 IoT board
> items:
> - const: nuvoton,ma35d1-iot
Instead just enum with all board compatibles.
>
> Thank you very much.
> Jacky Huang
>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 5/5] dt-bindings: arm: Add initial bindings for Nuvoton Platform
2022-04-21 6:56 ` Krzysztof Kozlowski
@ 2022-04-21 8:04 ` Jacky Huang
2022-04-21 8:05 ` Krzysztof Kozlowski
0 siblings, 1 reply; 24+ messages in thread
From: Jacky Huang @ 2022-04-21 8:04 UTC (permalink / raw)
To: Krzysztof Kozlowski, linux-kernel, devicetree, linux-clk,
linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0
On 2022/4/21 下午 02:56, Krzysztof Kozlowski wrote:
> On 21/04/2022 08:39, Jacky Huang wrote:
>>
>> On 2022/4/18 下午 08:11, Krzysztof Kozlowski wrote:
>>> On 18/04/2022 10:27, Jacky Huang wrote:
>>>> +properties:
>>>> + $nodename:
>>>> + const: '/'
>>>> + compatible:
>>>> + items:
>>>> + - enum:
>>>> + - nuvoton,ma35d1
>>>> + - nuvoton,ma35d1-evb
>>>> + - nuvoton,ma35d1-iot
>>>> + - nuvoton,ma35d1-som512
>>>> + - nuvoton,ma35d1-som1g
>>> This does not match your DTS and does not look reasonable (SoC
>>> compatible should not be part of this enum). Check some other board
>>> bindings for examples.
>>>
>>>
>>> Best regards,
>>> Krzysztof
>> I would like to modify it as follows:
>>
>> description: |
>> Boards with an ARMv8 based Nuvoton SoC shall have the following
>> properties.
>>
>> properties:
>> $nodename:
>> const: '/'
>> compatible:
>> oneOf:
>>
>> - description: MA35D1 evaluation board
>> items:
>> - const: nuvoton,ma35d1-evb
>> - const: nuvoton,ma35d1
>>
>> - description: MA35D1 IoT board
>> items:
>> - const: nuvoton,ma35d1-iot
> Instead just enum with all board compatibles.
How about to modify it as the follows:
compatible:
oneOf:
- description: MA35D1 evaluation board
items:
- enum:
- nuvoton,ma35d1-evb
- const: nuvoton,ma35d1
- description: MA35D1 IoT board
items:
- enum:
- nuvoton,ma35d1-iot
- const: nuvoton,ma35d1
- description: MA35D1 SOM board
items:
- enum:
- nuvoton,ma35d1-som512
- nuvoton,ma35d1-som1g
- const: nuvoton,ma35d1
>> Thank you very much.
>> Jacky Huang
>>
>
> Best regards,
> Krzysztof
Sincerely,
Jacky Huang
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 5/5] dt-bindings: arm: Add initial bindings for Nuvoton Platform
2022-04-21 8:04 ` Jacky Huang
@ 2022-04-21 8:05 ` Krzysztof Kozlowski
2022-04-21 8:13 ` Jacky Huang
0 siblings, 1 reply; 24+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-21 8:05 UTC (permalink / raw)
To: Jacky Huang, linux-kernel, devicetree, linux-clk,
linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0
On 21/04/2022 10:04, Jacky Huang wrote:
>
>
> On 2022/4/21 下午 02:56, Krzysztof Kozlowski wrote:
>> On 21/04/2022 08:39, Jacky Huang wrote:
>>>
>>> On 2022/4/18 下午 08:11, Krzysztof Kozlowski wrote:
>>>> On 18/04/2022 10:27, Jacky Huang wrote:
>>>>> +properties:
>>>>> + $nodename:
>>>>> + const: '/'
>>>>> + compatible:
>>>>> + items:
>>>>> + - enum:
>>>>> + - nuvoton,ma35d1
>>>>> + - nuvoton,ma35d1-evb
>>>>> + - nuvoton,ma35d1-iot
>>>>> + - nuvoton,ma35d1-som512
>>>>> + - nuvoton,ma35d1-som1g
>>>> This does not match your DTS and does not look reasonable (SoC
>>>> compatible should not be part of this enum). Check some other board
>>>> bindings for examples.
>>>>
>>>>
>>>> Best regards,
>>>> Krzysztof
>>> I would like to modify it as follows:
>>>
>>> description: |
>>> Boards with an ARMv8 based Nuvoton SoC shall have the following
>>> properties.
>>>
>>> properties:
>>> $nodename:
>>> const: '/'
>>> compatible:
>>> oneOf:
>>>
>>> - description: MA35D1 evaluation board
>>> items:
>>> - const: nuvoton,ma35d1-evb
>>> - const: nuvoton,ma35d1
>>>
>>> - description: MA35D1 IoT board
>>> items:
>>> - const: nuvoton,ma35d1-iot
>> Instead just enum with all board compatibles.
>
> How about to modify it as the follows:
>
> compatible:
> oneOf:
>
> - description: MA35D1 evaluation board
> items:
> - enum:
> - nuvoton,ma35d1-evb
> - const: nuvoton,ma35d1
>
> - description: MA35D1 IoT board
> items:
> - enum:
> - nuvoton,ma35d1-iot
> - const: nuvoton,ma35d1
>
> - description: MA35D1 SOM board
> items:
> - enum:
> - nuvoton,ma35d1-som512
> - nuvoton,ma35d1-som1g
> - const: nuvoton,ma35d1
>
It's still almost the same. All boards together. You can add a comment
next to the compatible if you want some user-friendly name.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 5/5] dt-bindings: arm: Add initial bindings for Nuvoton Platform
2022-04-21 8:05 ` Krzysztof Kozlowski
@ 2022-04-21 8:13 ` Jacky Huang
2022-04-21 8:33 ` Krzysztof Kozlowski
2022-04-26 0:19 ` Rob Herring
0 siblings, 2 replies; 24+ messages in thread
From: Jacky Huang @ 2022-04-21 8:13 UTC (permalink / raw)
To: Krzysztof Kozlowski, linux-kernel, devicetree, linux-clk,
linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0
On 2022/4/21 下午 04:05, Krzysztof Kozlowski wrote:
> On 21/04/2022 10:04, Jacky Huang wrote:
>>
>> On 2022/4/21 下午 02:56, Krzysztof Kozlowski wrote:
>>> On 21/04/2022 08:39, Jacky Huang wrote:
>>>> On 2022/4/18 下午 08:11, Krzysztof Kozlowski wrote:
>>>>> On 18/04/2022 10:27, Jacky Huang wrote:
>>>>>> +properties:
>>>>>> + $nodename:
>>>>>> + const: '/'
>>>>>> + compatible:
>>>>>> + items:
>>>>>> + - enum:
>>>>>> + - nuvoton,ma35d1
>>>>>> + - nuvoton,ma35d1-evb
>>>>>> + - nuvoton,ma35d1-iot
>>>>>> + - nuvoton,ma35d1-som512
>>>>>> + - nuvoton,ma35d1-som1g
>>>>> This does not match your DTS and does not look reasonable (SoC
>>>>> compatible should not be part of this enum). Check some other board
>>>>> bindings for examples.
>>>>>
>>>>>
>>>>> Best regards,
>>>>> Krzysztof
>>>> I would like to modify it as follows:
>>>>
>>>> description: |
>>>> Boards with an ARMv8 based Nuvoton SoC shall have the following
>>>> properties.
>>>>
>>>> properties:
>>>> $nodename:
>>>> const: '/'
>>>> compatible:
>>>> oneOf:
>>>>
>>>> - description: MA35D1 evaluation board
>>>> items:
>>>> - const: nuvoton,ma35d1-evb
>>>> - const: nuvoton,ma35d1
>>>>
>>>> - description: MA35D1 IoT board
>>>> items:
>>>> - const: nuvoton,ma35d1-iot
>>> Instead just enum with all board compatibles.
>> How about to modify it as the follows:
>>
>> compatible:
>> oneOf:
>>
>> - description: MA35D1 evaluation board
>> items:
>> - enum:
>> - nuvoton,ma35d1-evb
>> - const: nuvoton,ma35d1
>>
>> - description: MA35D1 IoT board
>> items:
>> - enum:
>> - nuvoton,ma35d1-iot
>> - const: nuvoton,ma35d1
>>
>> - description: MA35D1 SOM board
>> items:
>> - enum:
>> - nuvoton,ma35d1-som512
>> - nuvoton,ma35d1-som1g
>> - const: nuvoton,ma35d1
>>
> It's still almost the same. All boards together. You can add a comment
> next to the compatible if you want some user-friendly name.
>
>
> Best regards,
> Krzysztof
OK, I got it. Like this,
compatible:
oneOf:
- description: MA35D1 based boards
items:
- enum:
- nuvoton,ma35d1-evb
- nuvoton,ma35d1-iot
- nuvoton,ma35d1-som512
- nuvoton,ma35d1-som1g
- const: nuvoton,ma35d1
Sincerely,
Jacky Huang
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 5/5] dt-bindings: arm: Add initial bindings for Nuvoton Platform
2022-04-21 8:13 ` Jacky Huang
@ 2022-04-21 8:33 ` Krzysztof Kozlowski
2022-04-26 0:19 ` Rob Herring
1 sibling, 0 replies; 24+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-21 8:33 UTC (permalink / raw)
To: Jacky Huang, linux-kernel, devicetree, linux-clk,
linux-arm-kernel, ychuang570808
Cc: robh+dt, sboyd, krzk+dt, arnd, olof, will, soc, cfli0
On 21/04/2022 10:13, Jacky Huang wrote:
> OK, I got it. Like this,
>
> compatible:
> oneOf:
>
> - description: MA35D1 based boards
> items:
> - enum:
> - nuvoton,ma35d1-evb
> - nuvoton,ma35d1-iot
> - nuvoton,ma35d1-som512
> - nuvoton,ma35d1-som1g
> - const: nuvoton,ma35d1
Yes, exactly. Thank you.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 5/5] dt-bindings: arm: Add initial bindings for Nuvoton Platform
2022-04-21 8:13 ` Jacky Huang
2022-04-21 8:33 ` Krzysztof Kozlowski
@ 2022-04-26 0:19 ` Rob Herring
2022-04-26 0:47 ` Jacky Huang
1 sibling, 1 reply; 24+ messages in thread
From: Rob Herring @ 2022-04-26 0:19 UTC (permalink / raw)
To: Jacky Huang
Cc: Krzysztof Kozlowski, linux-kernel, devicetree, linux-clk,
linux-arm-kernel, ychuang570808, sboyd, krzk+dt, arnd, olof,
will, soc, cfli0
On Thu, Apr 21, 2022 at 04:13:20PM +0800, Jacky Huang wrote:
>
>
> On 2022/4/21 下午 04:05, Krzysztof Kozlowski wrote:
> > On 21/04/2022 10:04, Jacky Huang wrote:
> > >
> > > On 2022/4/21 下午 02:56, Krzysztof Kozlowski wrote:
> > > > On 21/04/2022 08:39, Jacky Huang wrote:
> > > > > On 2022/4/18 下午 08:11, Krzysztof Kozlowski wrote:
> > > > > > On 18/04/2022 10:27, Jacky Huang wrote:
> > > > > > > +properties:
> > > > > > > + $nodename:
> > > > > > > + const: '/'
> > > > > > > + compatible:
> > > > > > > + items:
> > > > > > > + - enum:
> > > > > > > + - nuvoton,ma35d1
> > > > > > > + - nuvoton,ma35d1-evb
> > > > > > > + - nuvoton,ma35d1-iot
> > > > > > > + - nuvoton,ma35d1-som512
> > > > > > > + - nuvoton,ma35d1-som1g
> > > > > > This does not match your DTS and does not look reasonable (SoC
> > > > > > compatible should not be part of this enum). Check some other board
> > > > > > bindings for examples.
> > > > > >
> > > > > >
> > > > > > Best regards,
> > > > > > Krzysztof
> > > > > I would like to modify it as follows:
> > > > >
> > > > > description: |
> > > > > Boards with an ARMv8 based Nuvoton SoC shall have the following
> > > > > properties.
> > > > >
> > > > > properties:
> > > > > $nodename:
> > > > > const: '/'
> > > > > compatible:
> > > > > oneOf:
> > > > >
> > > > > - description: MA35D1 evaluation board
> > > > > items:
> > > > > - const: nuvoton,ma35d1-evb
> > > > > - const: nuvoton,ma35d1
> > > > >
> > > > > - description: MA35D1 IoT board
> > > > > items:
> > > > > - const: nuvoton,ma35d1-iot
> > > > Instead just enum with all board compatibles.
> > > How about to modify it as the follows:
> > >
> > > compatible:
> > > oneOf:
> > >
> > > - description: MA35D1 evaluation board
> > > items:
> > > - enum:
> > > - nuvoton,ma35d1-evb
> > > - const: nuvoton,ma35d1
> > >
> > > - description: MA35D1 IoT board
> > > items:
> > > - enum:
> > > - nuvoton,ma35d1-iot
> > > - const: nuvoton,ma35d1
> > >
> > > - description: MA35D1 SOM board
> > > items:
> > > - enum:
> > > - nuvoton,ma35d1-som512
> > > - nuvoton,ma35d1-som1g
> > > - const: nuvoton,ma35d1
> > >
> > It's still almost the same. All boards together. You can add a comment
> > next to the compatible if you want some user-friendly name.
> >
> >
> > Best regards,
> > Krzysztof
>
> OK, I got it. Like this,
>
> compatible:
> oneOf:
>
> - description: MA35D1 based boards
> items:
> - enum:
> - nuvoton,ma35d1-evb
> - nuvoton,ma35d1-iot
> - nuvoton,ma35d1-som512
> - nuvoton,ma35d1-som1g
The memory node distinguishes how much memory. Is the board different
for the SoM? If not, combine these to 1.
> - const: nuvoton,ma35d1
>
> Sincerely,
> Jacky Huang
>
>
>
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 5/5] dt-bindings: arm: Add initial bindings for Nuvoton Platform
2022-04-26 0:19 ` Rob Herring
@ 2022-04-26 0:47 ` Jacky Huang
0 siblings, 0 replies; 24+ messages in thread
From: Jacky Huang @ 2022-04-26 0:47 UTC (permalink / raw)
To: Rob Herring
Cc: Krzysztof Kozlowski, linux-kernel, devicetree, linux-clk,
linux-arm-kernel, ychuang570808, sboyd, krzk+dt, arnd, olof,
will, soc, cfli0
On 2022/4/26 上午 08:19, Rob Herring wrote:
> On Thu, Apr 21, 2022 at 04:13:20PM +0800, Jacky Huang wrote:
>>
>> On 2022/4/21 下午 04:05, Krzysztof Kozlowski wrote:
>>> On 21/04/2022 10:04, Jacky Huang wrote:
>>>> On 2022/4/21 下午 02:56, Krzysztof Kozlowski wrote:
>>>>> On 21/04/2022 08:39, Jacky Huang wrote:
>>>>>> On 2022/4/18 下午 08:11, Krzysztof Kozlowski wrote:
>>>>>>> On 18/04/2022 10:27, Jacky Huang wrote:
>>>>>>>> +properties:
>>>>>>>> + $nodename:
>>>>>>>> + const: '/'
>>>>>>>> + compatible:
>>>>>>>> + items:
>>>>>>>> + - enum:
>>>>>>>> + - nuvoton,ma35d1
>>>>>>>> + - nuvoton,ma35d1-evb
>>>>>>>> + - nuvoton,ma35d1-iot
>>>>>>>> + - nuvoton,ma35d1-som512
>>>>>>>> + - nuvoton,ma35d1-som1g
>>>>>>> This does not match your DTS and does not look reasonable (SoC
>>>>>>> compatible should not be part of this enum). Check some other board
>>>>>>> bindings for examples.
>>>>>>>
>>>>>>>
>>>>>>> Best regards,
>>>>>>> Krzysztof
>>>>>> I would like to modify it as follows:
>>>>>>
>>>>>> description: |
>>>>>> Boards with an ARMv8 based Nuvoton SoC shall have the following
>>>>>> properties.
>>>>>>
>>>>>> properties:
>>>>>> $nodename:
>>>>>> const: '/'
>>>>>> compatible:
>>>>>> oneOf:
>>>>>>
>>>>>> - description: MA35D1 evaluation board
>>>>>> items:
>>>>>> - const: nuvoton,ma35d1-evb
>>>>>> - const: nuvoton,ma35d1
>>>>>>
>>>>>> - description: MA35D1 IoT board
>>>>>> items:
>>>>>> - const: nuvoton,ma35d1-iot
>>>>> Instead just enum with all board compatibles.
>>>> How about to modify it as the follows:
>>>>
>>>> compatible:
>>>> oneOf:
>>>>
>>>> - description: MA35D1 evaluation board
>>>> items:
>>>> - enum:
>>>> - nuvoton,ma35d1-evb
>>>> - const: nuvoton,ma35d1
>>>>
>>>> - description: MA35D1 IoT board
>>>> items:
>>>> - enum:
>>>> - nuvoton,ma35d1-iot
>>>> - const: nuvoton,ma35d1
>>>>
>>>> - description: MA35D1 SOM board
>>>> items:
>>>> - enum:
>>>> - nuvoton,ma35d1-som512
>>>> - nuvoton,ma35d1-som1g
>>>> - const: nuvoton,ma35d1
>>>>
>>> It's still almost the same. All boards together. You can add a comment
>>> next to the compatible if you want some user-friendly name.
>>>
>>>
>>> Best regards,
>>> Krzysztof
>> OK, I got it. Like this,
>>
>> compatible:
>> oneOf:
>>
>> - description: MA35D1 based boards
>> items:
>> - enum:
>> - nuvoton,ma35d1-evb
>> - nuvoton,ma35d1-iot
>> - nuvoton,ma35d1-som512
>> - nuvoton,ma35d1-som1g
> The memory node distinguishes how much memory. Is the board different
> for the SoM? If not, combine these to 1.
Yes, I can make two dts files (som512 and som1g) with binding to the
same som board.
I will modify it as a single nuvoton,ma35d1-som board.
Thank you.
>> - const: nuvoton,ma35d1
>>
>> Sincerely,
>> Jacky Huang
>>
>>
>>
Sincerely,
Jacky Huang
^ permalink raw reply [flat|nested] 24+ messages in thread
end of thread, other threads:[~2022-04-26 0:47 UTC | newest]
Thread overview: 24+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-04-18 8:27 [PATCH v3 0/5] Add initial support for MA35D1 SoC Jacky Huang
2022-04-18 8:27 ` [PATCH v3 1/5] dt-bindings: clock: add binding for MA35D1 clock controller Jacky Huang
2022-04-18 12:09 ` Krzysztof Kozlowski
2022-04-18 8:27 ` [PATCH v3 2/5] dt-bindings: clock: Document MA35D1 clock controller bindings Jacky Huang
2022-04-18 12:18 ` Krzysztof Kozlowski
2022-04-19 10:12 ` Jacky Huang
2022-04-19 10:39 ` Krzysztof Kozlowski
2022-04-19 10:49 ` Jacky Huang
2022-04-18 13:35 ` Rob Herring
2022-04-19 8:49 ` Jacky Huang
2022-04-18 8:27 ` [PATCH v3 3/5] arm64: dts: nuvoton: Add initial support for MA35D1 Jacky Huang
2022-04-18 12:20 ` Krzysztof Kozlowski
2022-04-21 6:41 ` Jacky Huang
2022-04-18 8:27 ` [PATCH v3 4/5] arm64: Kconfig: nuvoton: Introduce CONFIG_ARCH_NUVOTON Jacky Huang
2022-04-18 8:27 ` [PATCH v3 5/5] dt-bindings: arm: Add initial bindings for Nuvoton Platform Jacky Huang
2022-04-18 12:11 ` Krzysztof Kozlowski
2022-04-21 6:39 ` Jacky Huang
2022-04-21 6:56 ` Krzysztof Kozlowski
2022-04-21 8:04 ` Jacky Huang
2022-04-21 8:05 ` Krzysztof Kozlowski
2022-04-21 8:13 ` Jacky Huang
2022-04-21 8:33 ` Krzysztof Kozlowski
2022-04-26 0:19 ` Rob Herring
2022-04-26 0:47 ` Jacky Huang
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