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From: Robert Richter <rrichter@amd.com>
To: Alison Schofield <alison.schofield@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	Ira Weiny <ira.weiny@intel.com>,
	Ben Widawsky <bwidawsk@kernel.org>,
	Dan Williams <dan.j.williams@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	Len Brown <lenb@kernel.org>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	"Davidlohr Bueso" <dave@stgolabs.net>,
	Robert Richter <rrichter@amd.com>
Subject: [PATCH v2 11/12] cxl: Factor out code in match_add_dports() to pci_dev_add_dport()
Date: Tue, 18 Oct 2022 15:23:39 +0200	[thread overview]
Message-ID: <20221018132341.76259-12-rrichter@amd.com> (raw)
In-Reply-To: <20221018132341.76259-1-rrichter@amd.com>

Factor out the code to register a PCI device's dport to a port. It
will be reused to implement RCD mode.

Signed-off-by: Robert Richter <rrichter@amd.com>
---
 drivers/cxl/core/pci.c | 37 ++++++++++++++++++++++++++-----------
 1 file changed, 26 insertions(+), 11 deletions(-)

diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
index 8271b8abde7a..667de4f125f6 100644
--- a/drivers/cxl/core/pci.c
+++ b/drivers/cxl/core/pci.c
@@ -29,14 +29,32 @@ struct cxl_walk_context {
 	int count;
 };
 
+static int pci_dev_add_dport(struct pci_dev *pdev, struct cxl_port *port,
+			      resource_size_t component_reg_phys)
+{
+	struct cxl_dport *dport;
+	u32 lnkcap, port_num;
+
+	if (pci_read_config_dword(pdev, pci_pcie_cap(pdev) + PCI_EXP_LNKCAP,
+				  &lnkcap))
+		return -ENXIO;
+
+	port_num = FIELD_GET(PCI_EXP_LNKCAP_PN, lnkcap);
+	dport = devm_cxl_add_dport(port, &pdev->dev, port_num,
+				   component_reg_phys);
+	if (IS_ERR(dport))
+		return PTR_ERR(dport);
+
+	return 0;
+}
+
 static int match_add_dports(struct pci_dev *pdev, void *data)
 {
 	struct cxl_walk_context *ctx = data;
 	struct cxl_port *port = ctx->port;
 	int type = pci_pcie_type(pdev);
 	struct cxl_register_map map;
-	struct cxl_dport *dport;
-	u32 lnkcap, port_num;
+	resource_size_t component_reg_phys;
 	int rc;
 
 	if (pdev->bus != ctx->bus)
@@ -45,21 +63,18 @@ static int match_add_dports(struct pci_dev *pdev, void *data)
 		return 0;
 	if (type != ctx->type)
 		return 0;
-	if (pci_read_config_dword(pdev, pci_pcie_cap(pdev) + PCI_EXP_LNKCAP,
-				  &lnkcap))
-		return -ENXIO;
 
 	rc = cxl_find_regblock(pdev, CXL_REGLOC_RBI_COMPONENT, &map);
 	if (rc)
 		dev_dbg(&port->dev, "failed to find component registers\n");
 
-	port_num = FIELD_GET(PCI_EXP_LNKCAP_PN, lnkcap);
-	dport = devm_cxl_add_dport(port, &pdev->dev, port_num,
-				   cxl_regmap_to_base(pdev, &map));
-	if (IS_ERR(dport)) {
-		ctx->error = PTR_ERR(dport);
-		return PTR_ERR(dport);
+	component_reg_phys = cxl_regmap_to_base(pdev, &map);
+	rc = pci_dev_add_dport(pdev, port, component_reg_phys);
+	if (rc) {
+		ctx->error = rc;
+		return rc;
 	}
+
 	ctx->count++;
 
 	return 0;
-- 
2.30.2


  parent reply	other threads:[~2022-10-18 13:26 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-18 13:23 [PATCH v2 00/12] cxl: Add support for Restricted CXL hosts (RCD mode) Robert Richter
2022-10-18 13:23 ` [PATCH v2 01/12] cxl/core: Remove duplicate declaration of devm_cxl_iomap_block() Robert Richter
2022-10-20 23:56   ` Dan Williams
2022-10-21  8:54     ` Robert Richter
2022-10-18 13:23 ` [PATCH v2 02/12] cxl/core: Check physical address before mapping it in devm_cxl_iomap_block() Robert Richter
2022-10-21  0:01   ` Dan Williams
2022-10-18 13:23 ` [PATCH v2 03/12] cxl: Unify debug messages when calling devm_cxl_add_port() Robert Richter
2022-10-21  0:20   ` Dan Williams
2022-10-21  8:57     ` Robert Richter
2022-10-18 13:23 ` [PATCH v2 04/12] cxl: Unify debug messages when calling devm_cxl_add_dport() Robert Richter
2022-10-21  0:32   ` Dan Williams
2022-10-21  9:00     ` Robert Richter
2022-10-18 13:23 ` [PATCH v2 05/12] cxl/acpi: Improve debug messages in cxl_acpi_probe() Robert Richter
2022-10-21  1:00   ` Dan Williams
2022-10-18 13:23 ` [PATCH v2 06/12] cxl/acpi: Extract component registers of restricted hosts from RCRB Robert Richter
2022-10-18 13:31   ` Rafael J. Wysocki
2022-10-18 18:41     ` Robert Richter
2022-10-18 18:57       ` Rafael J. Wysocki
2022-10-19 10:46         ` Robert Richter
2022-10-21  5:17   ` Dan Williams
2022-10-24 21:04     ` Robert Richter
2022-10-24 21:24       ` Dan Williams
2022-10-24 22:37         ` Dan Williams
     [not found]           ` <63cd195a-f5d0-b016-d833-b3a9c86ff6ee@intel.com>
2022-10-24 23:50             ` Robert Richter
2022-10-24 23:57               ` Dan Williams
2022-10-18 13:23 ` [PATCH v2 07/12] cxl: Remove dev_is_cxl_root_child() check in devm_cxl_enumerate_ports() Robert Richter
2022-10-21  5:38   ` Dan Williams
2022-10-21  6:32     ` Verma, Vishal L
2022-11-09 14:33       ` Robert Richter
2022-10-18 13:23 ` [PATCH v2 08/12] cxl: Factor out code in devm_cxl_enumerate_ports() to find_port_attach_ep() Robert Richter
2022-10-18 13:23 ` [PATCH v2 09/12] cxl: Extend devm_cxl_enumerate_ports() to support restricted devices (RCDs) Robert Richter
2022-10-18 13:23 ` [PATCH v2 10/12] cxl: Do not ignore PCI config read errors in match_add_dports() Robert Richter
2022-10-18 13:23 ` Robert Richter [this message]
2022-10-18 13:23 ` [PATCH v2 12/12] cxl: Extend devm_cxl_port_enumerate_dports() to support restricted hosts (RCH) Robert Richter

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