From: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
To: Kim Phillips <kim.phillips@amd.com>
Cc: x86@kernel.org, Babu Moger <Babu.Moger@amd.com>,
Borislav Petkov <bp@alien8.de>, Borislav Petkov <bp@suse.de>,
Boris Ostrovsky <boris.ostrovsky@oracle.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
"H. Peter Anvin" <hpa@zytor.com>, Ingo Molnar <mingo@redhat.com>,
Joao Martins <joao.m.martins@oracle.com>,
Jonathan Corbet <corbet@lwn.net>,
Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
Thomas Gleixner <tglx@linutronix.de>,
David Woodhouse <dwmw@amazon.co.uk>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Juergen Gross <jgross@suse.com>,
Peter Zijlstra <peterz@infradead.org>,
Tony Luck <tony.luck@intel.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Alexey Kardashevskiy <aik@amd.com>,
kvm@vger.kernel.org, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 6/7] x86/cpu: Support AMD Automatic IBRS
Date: Fri, 2 Dec 2022 08:31:58 -0800 [thread overview]
Message-ID: <20221202163158.p7yuqimmnjbmlzvq@desk> (raw)
In-Reply-To: <20221201015003.295769-7-kim.phillips@amd.com>
On Wed, Nov 30, 2022 at 07:50:02PM -0600, Kim Phillips wrote:
>--- a/Documentation/admin-guide/kernel-parameters.txt
>+++ b/Documentation/admin-guide/kernel-parameters.txt
>@@ -5698,9 +5698,12 @@
> retpoline,generic - Retpolines
> retpoline,lfence - LFENCE; indirect branch
> retpoline,amd - alias for retpoline,lfence
>- eibrs - enhanced IBRS
>- eibrs,retpoline - enhanced IBRS + Retpolines
>- eibrs,lfence - enhanced IBRS + LFENCE
>+ eibrs - Enhanced/Auto IBRS
>+ autoibrs - Enhanced/Auto IBRS
>+ eibrs,retpoline - Enhanced/Auto IBRS + Retpolines
>+ autoibrs,retpoline- Enhanced/Auto IBRS + Retpolines
>+ eibrs,lfence - Enhanced/Auto IBRS + LFENCE
>+ autoibrs,lfence - Enhanced/Auto IBRS + LFENCE
> ibrs - use IBRS to protect kernel
Documentation/admin-guide/hw-vuln/spectre.rst also needs an update.
>--- a/arch/x86/kernel/cpu/common.c
>+++ b/arch/x86/kernel/cpu/common.c
>@@ -1226,7 +1226,7 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
> VULNWL_AMD(0x12, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
>
> /* FAMILY_ANY must be last, otherwise 0x0f - 0x12 matches won't work */
>- VULNWL_AMD(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
>+ VULNWL_AMD(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO | NO_EIBRS_PBRSB),
> VULNWL_HYGON(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
I don't know if Hygon is ever going to get Automatic IBRS, but it
doesn't hurt to add NO_EIBRS_PBRSB to Hygon as well.
next prev parent reply other threads:[~2022-12-02 16:32 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-01 1:49 [PATCH v4 0/7] x86/cpu, kvm: Support AMD Automatic IBRS Kim Phillips
2022-12-01 1:49 ` [PATCH v4 1/7] x86/cpu: Define a scattered No Nested Data Breakpoints feature bit Kim Phillips
2022-12-05 10:23 ` Borislav Petkov
2022-12-05 17:32 ` Kim Phillips
2022-12-05 20:20 ` Borislav Petkov
2022-12-05 22:05 ` Kim Phillips
2022-12-01 1:49 ` [PATCH v4 2/7] x86/cpu: Define a scattered Null Selector Clears Base " Kim Phillips
2022-12-01 1:49 ` [PATCH v4 3/7] x86/cpu: Make X86_FEATURE_LFENCE_RDTSC a scattered " Kim Phillips
2022-12-01 1:50 ` [PATCH v4 4/7] x86/cpu, kvm: Move CPUID 0x80000021 EAX feature bits propagation to kvm_set_cpu_caps() Kim Phillips
2022-12-01 1:50 ` [PATCH v4 5/7] x86/cpu: Define a scattered AMD Automatic IBRS feature bit Kim Phillips
2022-12-01 1:50 ` [PATCH v4 6/7] x86/cpu: Support AMD Automatic IBRS Kim Phillips
2022-12-02 16:31 ` Pawan Gupta [this message]
2022-12-02 17:40 ` Dave Hansen
2022-12-01 1:50 ` [PATCH v4 7/7] x86/cpu, kvm: Propagate the AMD Automatic IBRS feature to the guest Kim Phillips
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