From: Dave Hansen <dave.hansen@linux.intel.com>
To: linux-kernel@vger.kernel.org
Cc: kirill.shutemov@linux.intel.com,pbonzini@redhat.com,tglx@linutronix.de,x86@kernel.org,bp@alien8.de,Dave
Hansen <dave.hansen@linux.intel.com>
Subject: [RFC][PATCH 25/34] x86/cpu: Move cache bits to global config
Date: Thu, 22 Feb 2024 10:39:59 -0800 [thread overview]
Message-ID: <20240222183959.7061C5F3@davehans-spike.ostc.intel.com> (raw)
In-Reply-To: <20240222183926.517AFCD2@davehans-spike.ostc.intel.com>
From: Dave Hansen <dave.hansen@linux.intel.com>
x86_cache_bits is established and stored per-cpu despite being system-wide.
Move it from 'struct cpuinfo_x86' to 'x86_config' and give it a helper.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
---
b/arch/x86/include/asm/processor.h | 10 +++++++---
b/arch/x86/kernel/cpu/common.c | 8 ++++----
b/arch/x86/kvm/mmu/spte.c | 6 +++---
3 files changed, 14 insertions(+), 10 deletions(-)
diff -puN arch/x86/include/asm/processor.h~config-cache_bits arch/x86/include/asm/processor.h
--- a/arch/x86/include/asm/processor.h~config-cache_bits 2024-02-22 10:09:00.768936544 -0800
+++ b/arch/x86/include/asm/processor.h 2024-02-22 10:09:00.772936701 -0800
@@ -154,8 +154,6 @@ struct cpuinfo_x86 {
/* Is SMT active on this core? */
bool smt_active;
u32 microcode;
- /* Address space bits used by the cache internally */
- u8 x86_cache_bits;
unsigned initialized : 1;
} __randomize_layout;
@@ -195,6 +193,7 @@ struct x86_sys_config {
/* Address bits supported by all processors */
u8 phys_bits;
u8 virt_bits;
+ u8 cache_bits;
u16 clflush_size;
int cache_alignment; /* in bytes */
};
@@ -241,7 +240,7 @@ extern void cpu_detect(struct cpuinfo_x8
static inline unsigned long long l1tf_pfn_limit(void)
{
- return BIT_ULL(boot_cpu_data.x86_cache_bits - 1 - PAGE_SHIFT);
+ return BIT_ULL(x86_config.cache_bits - 1 - PAGE_SHIFT);
}
extern void early_cpu_init(void);
@@ -816,6 +815,11 @@ static inline u8 x86_virt_bits(void)
return x86_config.virt_bits;
}
+static inline u8 x86_cache_bits(void)
+{
+ return x86_config.cache_bits;
+}
+
static inline u8 x86_clflush_size(void)
{
return x86_config.clflush_size;
diff -puN arch/x86/kernel/cpu/common.c~config-cache_bits arch/x86/kernel/cpu/common.c
--- a/arch/x86/kernel/cpu/common.c~config-cache_bits 2024-02-22 10:09:00.768936544 -0800
+++ b/arch/x86/kernel/cpu/common.c 2024-02-22 10:09:00.772936701 -0800
@@ -1138,15 +1138,15 @@ void get_cpu_address_sizes(struct cpuinf
}
x86_config.clflush_size = detect_clflush_size(c);
- c->x86_cache_bits = x86_config.phys_bits;
- if (c->x86_cache_bits < bsp_addr_config.min_cache_bits)
- c->x86_cache_bits = bsp_addr_config.min_cache_bits;
+ x86_config.cache_bits = x86_config.phys_bits;
+ if (x86_config.cache_bits < bsp_addr_config.min_cache_bits)
+ x86_config.cache_bits = bsp_addr_config.min_cache_bits;
x86_config.cache_alignment = x86_clflush_size();
if (bsp_addr_config.cache_align_mult)
x86_config.cache_alignment *= bsp_addr_config.cache_align_mult;
- /* Do this last to avoid affecting ->x86_cache_bits. */
+ /* Do this last to avoid affecting '.cache_bits'. */
x86_config.phys_bits -= bsp_addr_config.phys_addr_reduction_bits;
}
diff -puN arch/x86/kvm/mmu/spte.c~config-cache_bits arch/x86/kvm/mmu/spte.c
--- a/arch/x86/kvm/mmu/spte.c~config-cache_bits 2024-02-22 10:09:00.772936701 -0800
+++ b/arch/x86/kvm/mmu/spte.c 2024-02-22 10:09:00.772936701 -0800
@@ -470,12 +470,12 @@ void kvm_mmu_reset_all_pte_masks(void)
shadow_nonpresent_or_rsvd_mask = 0;
low_phys_bits = x86_phys_bits();
if (boot_cpu_has_bug(X86_BUG_L1TF) &&
- !WARN_ON_ONCE(boot_cpu_data.x86_cache_bits >=
+ !WARN_ON_ONCE(x86_cache_bits() >=
52 - SHADOW_NONPRESENT_OR_RSVD_MASK_LEN)) {
- low_phys_bits = boot_cpu_data.x86_cache_bits
+ low_phys_bits = x86_cache_bits()
- SHADOW_NONPRESENT_OR_RSVD_MASK_LEN;
shadow_nonpresent_or_rsvd_mask =
- rsvd_bits(low_phys_bits, boot_cpu_data.x86_cache_bits - 1);
+ rsvd_bits(low_phys_bits, x86_cache_bits() - 1);
}
shadow_nonpresent_or_rsvd_lower_gfn_mask =
_
next prev parent reply other threads:[~2024-02-22 18:40 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-22 18:39 [RFC][PATCH 00/34] [RFC] x86: Rework system-wide configuration masquerading as per-cpu data Dave Hansen
2024-02-22 18:39 ` [RFC][PATCH 01/34] x86/xen: Explain why calling get_cpu_cap() so early is a hack Dave Hansen
2024-03-07 16:27 ` Borislav Petkov
2024-02-22 18:39 ` [RFC][PATCH 02/34] x86/xen: Remove early "debug" physical address lookups Dave Hansen
2024-03-07 17:01 ` Borislav Petkov
2024-03-11 13:16 ` Jürgen Groß
2024-02-22 18:39 ` [RFC][PATCH 03/34] x86/pci: Assume that clflush size is always provided Dave Hansen
2024-03-08 8:57 ` Borislav Petkov
2024-02-22 18:39 ` [RFC][PATCH 04/34] x86/mm: Introduce physical address limit helper Dave Hansen
2024-02-27 11:05 ` Huang, Kai
2024-02-22 18:39 ` [RFC][PATCH 05/34] x86/cpu: Move /proc per-cpu ->x86_phys_bits reference to global one Dave Hansen
2024-02-27 11:05 ` Huang, Kai
2024-02-22 18:39 ` [RFC][PATCH 06/34] x86/boot: Use consistent value for iomem_resource.end Dave Hansen
2024-02-27 10:59 ` Huang, Kai
2024-02-28 14:22 ` Zhang, Rui
2024-02-22 18:39 ` [RFC][PATCH 07/34] x86/mm: Introduce virtual address space limit helper Dave Hansen
2024-02-27 11:09 ` Huang, Kai
2024-02-22 18:39 ` [RFC][PATCH 08/34] x86/cpu: Add CLFLUSH size helper Dave Hansen
2024-02-22 18:39 ` [RFC][PATCH 09/34] x86/cpu: Introduce address configuration structure Dave Hansen
2024-02-27 23:47 ` Huang, Kai
2024-02-28 17:29 ` Dave Hansen
2024-02-22 18:39 ` [RFC][PATCH 10/34] x86/cpu/amd: Use new "address configuration" infrastructure Dave Hansen
2024-02-22 18:39 ` [RFC][PATCH 11/34] x86/cpu/intel: Prepare MKTME for " Dave Hansen
2024-02-23 11:33 ` Kirill A. Shutemov
2024-02-23 16:22 ` Dave Hansen
2024-02-26 12:14 ` Kirill A. Shutemov
2024-02-27 21:48 ` Huang, Kai
2024-02-28 15:20 ` Kirill A. Shutemov
2024-02-28 16:57 ` Dave Hansen
2024-02-22 18:39 ` [RFC][PATCH 12/34] x86/cpu/intel: Actually use "address configuration" infrastructure for MKTME Dave Hansen
2024-02-23 11:41 ` Kirill A. Shutemov
2024-02-23 16:16 ` Dave Hansen
2024-02-22 18:39 ` [RFC][PATCH 13/34] x86/boot: Use address reduction config to handle erratum Dave Hansen
2024-02-22 18:39 ` [RFC][PATCH 14/34] x86/cpu: Remove default physical address space settings Dave Hansen
2024-02-22 18:39 ` [RFC][PATCH 15/34] x86/cpu: Remove default x86_phys_bits assignment Dave Hansen
2024-02-22 18:39 ` [RFC][PATCH 16/34] x86/cpu: Move physical address limit out of cpuinfo_x86 Dave Hansen
2024-02-22 18:39 ` [RFC][PATCH 17/34] x86/cpu: Move virtual " Dave Hansen
2024-02-22 18:39 ` [RFC][PATCH 18/34] x86/cpu/centaur: Move cache alignment override to BSP init Dave Hansen
2024-02-22 18:39 ` [RFC][PATCH 19/34] x86/cpu: Introduce cache alignment multiplier Dave Hansen
2024-02-22 18:39 ` [RFC][PATCH 20/34] x86/cpu: Remove superfluous cache alignment assignments Dave Hansen
2024-02-22 18:39 ` [RFC][PATCH 21/34] x86/cpu: Consolidate CLFLUSH size setting Dave Hansen
2024-02-22 18:39 ` [RFC][PATCH 22/34] x86/cpu: Move CLFLUSH size into global config Dave Hansen
2024-02-22 18:39 ` [RFC][PATCH 23/34] x86/cpu: Move cache alignment configuration to global struct Dave Hansen
2024-02-22 18:39 ` [RFC][PATCH 24/34] x86/cpu: Establish 'min_cache_bits' configuration Dave Hansen
2024-02-22 18:39 ` Dave Hansen [this message]
2024-02-22 18:40 ` [RFC][PATCH 26/34] x86/cpu: Zap superfluous get_cpu_address_sizes() Dave Hansen
2024-02-22 18:40 ` [RFC][PATCH 27/34] x86/cpu: Enforce read-only x86_config state (lightly) Dave Hansen
2024-02-22 18:40 ` [RFC][PATCH 28/34] x86/cpu: Return sane defaults for early x86_config reads Dave Hansen
2024-02-22 18:40 ` [RFC][PATCH 29/34] x86/xen: Remove extra get_cpu_address_sizes() call Dave Hansen
2024-02-22 18:40 ` [RFC][PATCH 30/34] x86/cpu/centaur: Mark BSP init function as __init Dave Hansen
2024-02-22 18:40 ` [RFC][PATCH 31/34] x86/cpu/intel: " Dave Hansen
2024-02-22 18:40 ` [RFC][PATCH 32/34] x86/cpu/amd: Move memory encryption detection Dave Hansen
2024-02-22 18:40 ` [RFC][PATCH 33/34] x86/cpu: Make get_cpu_address_sizes() static and __init Dave Hansen
2024-02-22 18:40 ` [RFC][PATCH 34/34] x86/cpu: Mark new boot CPU and config structures appropriately Dave Hansen
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