Re: [RFC][PATCH 12/34] x86/cpu/intel: Actually use "address configuration" infrastructure for MKTME

[Dave Hansen <dave.hansen@intel.com>]

On 2/23/24 03:41, Kirill A. Shutemov wrote:
>> -	/*
>> -	 * KeyID bits effectively lower the number of physical address
>> -	 * bits.  Update cpuinfo_x86::x86_phys_bits accordingly.
>> -	 */
>> -	c->x86_phys_bits -= keyid_bits;
>> +	/* KeyID bits effectively lower the number of physical address bits */
>> +	bsp_addr_config.phys_addr_reduction_bits = keyid_bits;
> Do we expect reduction_bits to stack? Like can multiple features steal
> physical bits? Make use "+= keyid_bits" here?

Good question.

IMNHO, the idea that different "users" of these fields can be oblivious
to each other is the reason that this has gotten so bad.

I thought about interfering or stacking a bit when I was putting this
together.  It's one of the reasons I chose to add the specific
'phys_addr_reduction_bits' field _instead_ of continuing to just munge
'phys_addr_bits'.

I want 'bsp_addr_config' to represent the *inputs* that eventually end
up in x86_config, and have the inputs distilled down to the output in
one (or very few) places.

There are thankfully very few users of this: Intel and AMD memory
encryption and one Intel CPU erratum for very old CPUs.  So they can't
stack in practice.

If we ever need something to stack, I'd prefer that we add two fields,
maybe:

	bsp_addr_config.enc_reduction_bits

and

	bsp_addr_config.maxphyaddr_erratum_override

or something, then have any collision be resolved when 'bsp_addr_config'
is consulted, in *ONE* central pace in the code.