From: Niklas Cassel <niklas.cassel@axis.com>
To: Joao Pinto <Joao.Pinto@synopsys.com>, Bjorn Helgaas <helgaas@kernel.org>
Cc: Jingoo Han <jingoohan1@gmail.com>,
Bjorn Helgaas <bhelgaas@google.com>, <linux-pci@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v4 01/17] PCI: dwc: Use the DMA-API to get the MSI address
Date: Tue, 21 Nov 2017 13:18:18 +0100 [thread overview]
Message-ID: <233b3102-0ca3-ca28-5b43-34e55a5c87c4@axis.com> (raw)
In-Reply-To: <1c059ad0-aa57-fca4-6d92-e68736ffad5f@synopsys.com>
On 08/11/17 13:45, Joao Pinto wrote:
> Hello to all,
>
> Às 12:56 AM de 11/8/2017, Bjorn Helgaas escreveu:
>> On Fri, Nov 03, 2017 at 02:47:05PM +0100, Niklas Cassel wrote:
>>> Use the DMA-API to get the MSI address. This address will be written to
>>> our PCI config space and to the register which determines which AXI
>>> address the DWC IP will spoof for incoming MSI irqs.
>>>
>>> Since it is a PCIe endpoint device, rather than the CPU, that is supposed
>>> to write to the MSI address, the proper way to get the MSI address is by
>>> using the DMA API, not by using virt_to_phys().
>>>
>>> Using virt_to_phys() might work on some systems, but using the DMA API
>>> should work on all systems.
>>>
>>> This is essentially the same thing as allocating a buffer in a driver
>>> to which the endpoint will write to. To do this, we use the DMA API.
>>>
>>> Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
>>
>> I'm expecting Jingoo and/or Joao to chime in and ack the
>> DesignWare-related patches. I think all the others are in
>> pretty good shape.
>>
>>> ---
>>> drivers/pci/dwc/pcie-designware-host.c | 15 ++++++++++++---
>>> drivers/pci/dwc/pcie-designware.h | 3 ++-
>>> 2 files changed, 14 insertions(+), 4 deletions(-)
>>> ...
>
> Let me test this patch-set in my setup first!
> I will give feedback until Friday.
>
Hello Joao,
did you manage to find any time to test the designware
related patches?
If not, I posted a V5 yesterday, so in case you are still
planning on testing them, could you please test V5 instead?
Best regards,
Niklas
next prev parent reply other threads:[~2017-11-21 12:18 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-03 13:47 [PATCH v4 00/17] dwc MSI fixes, ARTPEC-6 EP mode support, ARTPEC-7 SoC support Niklas Cassel
2017-11-03 13:47 ` [PATCH v4 01/17] PCI: dwc: Use the DMA-API to get the MSI address Niklas Cassel
2017-11-08 0:56 ` Bjorn Helgaas
2017-11-08 12:45 ` Joao Pinto
2017-11-08 17:27 ` Bjorn Helgaas
2017-11-09 9:20 ` Niklas Cassel
2017-11-21 12:18 ` Niklas Cassel [this message]
2017-11-03 13:47 ` [PATCH v4 02/17] PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits Niklas Cassel
2017-11-03 13:47 ` [PATCH v4 03/17] PCI: designware-ep: Read-only registers need DBI_RO_WR_EN to be writable Niklas Cassel
2017-11-03 13:47 ` [PATCH v4 04/17] PCI: designware-ep: Pre-allocate memory for MSI in dw_pcie_ep_init Niklas Cassel
2017-11-03 13:47 ` [PATCH v4 05/17] PCI: designware-ep: Remove static keyword from dw_pcie_ep_reset_bar() Niklas Cassel
2017-11-03 13:47 ` [PATCH v4 06/17] PCI: designware-ep: Add generic function for raising MSI irq Niklas Cassel
2017-11-03 13:47 ` [PATCH v4 07/17] PCI: dwc: dra7xx: Refactor Kconfig and Makefile handling for host/ep mode Niklas Cassel
2017-11-03 13:47 ` [PATCH v4 08/17] PCI: dwc: dra7xx: Assign pp->ops in dra7xx_add_pcie_port() rather than in probe Niklas Cassel
2017-11-03 13:47 ` [PATCH v4 09/17] PCI: dwc: dra7xx: Help compiler to remove unused code Niklas Cassel
2017-11-03 13:47 ` [PATCH v4 10/17] PCI: dwc: artpec6: Remove unused defines Niklas Cassel
2017-11-03 13:47 ` [PATCH v4 11/17] PCI: dwc: artpec6: Use BIT and GENMASK macros Niklas Cassel
2017-11-03 13:47 ` [PATCH v4 12/17] PCI: dwc: artpec6: Split artpec6_pcie_establish_link() into smaller functions Niklas Cassel
2017-11-03 13:47 ` [PATCH v4 13/17] bindings: PCI: artpec: Add support for endpoint mode Niklas Cassel
2017-11-03 13:47 ` [PATCH v4 14/17] PCI: dwc: artpec6: " Niklas Cassel
2017-11-03 13:47 ` [PATCH v4 15/17] PCI: dwc: Make cpu_addr_fixup take struct dw_pcie as argument Niklas Cassel
2017-11-03 13:47 ` [PATCH v4 16/17] bindings: PCI: artpec: Add support for the ARTPEC-7 SoC Niklas Cassel
2017-11-03 13:47 ` [PATCH v4 17/17] PCI: dwc: artpec6: " Niklas Cassel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=233b3102-0ca3-ca28-5b43-34e55a5c87c4@axis.com \
--to=niklas.cassel@axis.com \
--cc=Joao.Pinto@synopsys.com \
--cc=bhelgaas@google.com \
--cc=helgaas@kernel.org \
--cc=jingoohan1@gmail.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).