Re: [Patch v5 2/4] memory: tegra: Add MC error logging on tegra186 onward

[Ashish Mhetre <amhetre@nvidia.com>]

On 3/30/2022 5:31 AM, Dmitry Osipenko wrote:
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> 
> 
> On 3/22/22 20:34, Ashish Mhetre wrote:
>>>> +     switch (status & mc->soc->int_channel_mask) {
>>>> +     case BIT(0):
>>>> +             *mc_channel = 0;
>>>> +             break;
>>>> +
>>>> +     case BIT(1):
>>>> +             *mc_channel = 1;
>>>> +             break;
>>>> +
>>>> +     case BIT(2):
>>>> +             *mc_channel = 2;
>>>> +             break;
>>>> +
>>>> +     case BIT(3):
>>>> +             *mc_channel = 3;
>>>> +             break;
>>>> +
>>>> +     case BIT(24):
>>>> +             *mc_channel = MC_BROADCAST_CHANNEL;
>>>> +             break;
>>>> +
>>>> +     default:
>>>> +             pr_err("Unknown interrupt source\n");
>>>
>>> dev_err_ratelimited("unknown interrupt channel 0x%08x\n", status) and
>>> should be moved to the common interrupt handler.
>>>
>> So return just error from default case and handle error in common
>> interrupt handler with this print, right? I'll update this in next
>> version.
> 
> Yes, just move out the common print.
> 
> Although, you could parameterize the shift per SoC and then have a
> common helper that does "status >> intmask_chan_shift", couldn't you?

Do you mean shift to get the channel, like
"channel = status >> intmask_chan_shift"?
So to get rid of this callback completely and adding a variable in
tegra_mc_soc for intmask_chan_shift, right? Or compute shift in this
callback and use it in common handler?
If we are to remove this callback then how to handle unknown interrupt
channel error?
Also we want to handle interrupts on one channel at a time and then
clear it from status register. There can be interrupts on multiple
channel. So multiple bits from status will be set. Hence it will be
hard to parameterize shift such that it gives appropriate channel.
So I think current approach is fine. Please correct me if I am wrong
somewhere.