From: Ashish Mhetre <amhetre@nvidia.com>
To: Dmitry Osipenko <dmitry.osipenko@collabora.com>,
krzysztof.kozlowski@canonical.com, robh+dt@kernel.org,
thierry.reding@gmail.com, digetx@gmail.com, jonathanh@nvidia.com,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-tegra@vger.kernel.org
Cc: vdumpa@nvidia.com, Snikam@nvidia.com
Subject: Re: [Patch v5 2/4] memory: tegra: Add MC error logging on tegra186 onward
Date: Wed, 30 Mar 2022 14:33:47 +0530 [thread overview]
Message-ID: <c5341578-e0a6-4ad7-5b6c-95b31b16faad@nvidia.com> (raw)
In-Reply-To: <04bb5ef2-15c3-d561-3572-76dc803275ef@collabora.com>
On 3/30/2022 5:36 AM, Dmitry Osipenko wrote:
> External email: Use caution opening links or attachments
>
>
> On 3/16/22 12:25, Ashish Mhetre wrote:
>> Add new function 'get_int_channel' in tegra_mc_soc struture which is
>> implemented by tegra SOCs which support multiple MC channels. This
>> function returns the channel which should be used to get the information
>> of interrupts.
>> Remove static from tegra30_mc_handle_irq and use it as interrupt handler
>> for MC interrupts on tegra186, tegra194 and tegra234 to log the errors.
>> Add error specific MC status and address register bits and use them on
>> tegra186, tegra194 and tegra234.
>> Add error logging for generalized carveout interrupt on tegra186, tegra194
>> and tegra234.
>> Add error logging for route sanity interrupt on tegra194 an tegra234.
>> Add register for higher bits of error address which is available on
>> tegra194 and tegra234.
>> Add a boolean variable 'has_addr_hi_reg' in tegra_mc_soc struture which
>> will be true if soc has register for higher bits of memory controller
>> error address. Set it true for tegra194 and tegra234.
>>
>> Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
>
>> Reported-by: kernel test robot <lkp@intel.com>
>> Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
>
> Reported what? You should add this tag only if patch addresses reported
> problem. This patch doesn't address anything, hence the tag is
> inappropriate, you should remove it.
Okay, smatch warning was reported on v4 of this patch which is fixed in
v5. Then I understand that we don't need to add Reported-by if we fix
bug in subsequent versions, right?
next prev parent reply other threads:[~2022-03-30 9:04 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-16 9:25 [Patch v5 0/4] memory: tegra: Add MC channels and error logging Ashish Mhetre
2022-03-16 9:25 ` [Patch v5 1/4] memory: tegra: Add memory controller channels support Ashish Mhetre
2022-03-19 15:42 ` Dmitry Osipenko
2022-03-22 16:13 ` Ashish Mhetre
2022-03-25 4:50 ` Ashish Mhetre
2022-03-29 23:48 ` Dmitry Osipenko
2022-03-30 5:07 ` Ashish Mhetre
2022-03-20 12:31 ` Krzysztof Kozlowski
2022-03-22 18:04 ` Ashish Mhetre
2022-03-22 18:24 ` Krzysztof Kozlowski
2022-03-16 9:25 ` [Patch v5 2/4] memory: tegra: Add MC error logging on tegra186 onward Ashish Mhetre
2022-03-19 15:50 ` Dmitry Osipenko
2022-03-19 16:19 ` Dmitry Osipenko
2022-03-22 17:51 ` Ashish Mhetre
2022-03-22 16:48 ` Ashish Mhetre
2022-03-19 15:59 ` Dmitry Osipenko
2022-03-22 17:23 ` Ashish Mhetre
2022-03-29 23:51 ` Dmitry Osipenko
2022-03-30 5:02 ` Ashish Mhetre
2022-03-19 16:14 ` Dmitry Osipenko
2022-03-22 17:34 ` Ashish Mhetre
2022-03-30 0:01 ` Dmitry Osipenko
2022-03-30 10:16 ` Ashish Mhetre
2022-03-30 10:36 ` Dmitry Osipenko
2022-03-30 11:22 ` Ashish Mhetre
2022-03-31 19:49 ` Dmitry Osipenko
2022-03-31 21:55 ` Ashish Mhetre
2022-03-20 12:53 ` Dmitry Osipenko
2022-03-23 8:36 ` Ashish Mhetre
2022-03-30 0:06 ` Dmitry Osipenko
2022-03-30 9:03 ` Ashish Mhetre [this message]
2022-03-30 10:19 ` Dmitry Osipenko
2022-03-30 10:34 ` Ashish Mhetre
2022-03-16 9:25 ` [Patch v5 3/4] dt-bindings: memory: Update reg maxitems for tegra186 Ashish Mhetre
2022-03-19 15:42 ` Dmitry Osipenko
2022-03-20 2:13 ` Rob Herring
2022-03-20 12:42 ` Krzysztof Kozlowski
2022-03-22 18:12 ` Ashish Mhetre
2022-03-22 18:42 ` Krzysztof Kozlowski
2022-03-16 9:25 ` [Patch v5 4/4] arm64: tegra: Add memory controller channels Ashish Mhetre
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