* [PATCH 0/4 v4] usb: dwc2: fix the usb host for host port at RK32 [not found] <7ca3b54d-e9d8-a137-79b6-d24f0b7065c7@synopsys.com> @ 2016-08-20 20:32 ` Randy Li 2016-08-20 20:32 ` [PATCH 1/4] phy: Add reset callback Randy Li ` (3 more replies) 0 siblings, 4 replies; 25+ messages in thread From: Randy Li @ 2016-08-20 20:32 UTC (permalink / raw) To: linux-usb Cc: johnyoun, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, kishon, linux-kernel, heiko, Randy Li Hello All: This version would move reset into phy. I wanted to implement a hard code version but I meet some problem with ioremap reset controller, in order to keep my word, I offer this version this time. Randy Li (4): phy: Add reset callback phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup usb: dwc2: assert phy reset when waking up in rk3288 platform ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset arch/arm/boot/dts/rk3288.dtsi | 5 +++++ drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++ drivers/usb/dwc2/core_intr.c | 9 +++++++++ include/linux/phy/phy.h | 2 ++ 4 files changed, 36 insertions(+) -- 2.7.4 ^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 1/4] phy: Add reset callback 2016-08-20 20:32 ` [PATCH 0/4 v4] usb: dwc2: fix the usb host for host port at RK32 Randy Li @ 2016-08-20 20:32 ` Randy Li 2016-08-20 20:32 ` [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup Randy Li ` (2 subsequent siblings) 3 siblings, 0 replies; 25+ messages in thread From: Randy Li @ 2016-08-20 20:32 UTC (permalink / raw) To: linux-usb Cc: johnyoun, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, kishon, linux-kernel, heiko, Randy Li The only use for this is for solving a hardware design problem in usb of Rockchip RK3288. Signed-off-by: Randy Li <ayaka@soulik.info> --- include/linux/phy/phy.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h index f08b672..4d34607 100644 --- a/include/linux/phy/phy.h +++ b/include/linux/phy/phy.h @@ -36,6 +36,7 @@ enum phy_mode { * @power_on: powering on the phy * @power_off: powering off the phy * @set_mode: set the mode of the phy + * @reset: reseting the phy * @owner: the module owner containing the ops */ struct phy_ops { @@ -44,6 +45,7 @@ struct phy_ops { int (*power_on)(struct phy *phy); int (*power_off)(struct phy *phy); int (*set_mode)(struct phy *phy, enum phy_mode mode); + int (*reset)(struct phy *phy); struct module *owner; }; -- 2.7.4 ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup 2016-08-20 20:32 ` [PATCH 0/4 v4] usb: dwc2: fix the usb host for host port at RK32 Randy Li 2016-08-20 20:32 ` [PATCH 1/4] phy: Add reset callback Randy Li @ 2016-08-20 20:32 ` Randy Li 2016-08-22 11:47 ` Kishon Vijay Abraham I 2016-08-20 20:32 ` [PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform Randy Li 2016-08-20 20:32 ` [PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset Randy Li 3 siblings, 1 reply; 25+ messages in thread From: Randy Li @ 2016-08-20 20:32 UTC (permalink / raw) To: linux-usb Cc: johnyoun, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, kishon, linux-kernel, heiko, Randy Li It is a hardware bug in RK3288, the only way to solve it is to reset the phy. Signed-off-by: Randy Li <ayaka@soulik.info> --- drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/phy/phy-rockchip-usb.c b/drivers/phy/phy-rockchip-usb.c index 2a7381f..734987f 100644 --- a/drivers/phy/phy-rockchip-usb.c +++ b/drivers/phy/phy-rockchip-usb.c @@ -29,6 +29,7 @@ #include <linux/reset.h> #include <linux/regmap.h> #include <linux/mfd/syscon.h> +#include <linux/delay.h> static int enable_usb_uart; @@ -64,6 +65,7 @@ struct rockchip_usb_phy { struct clk_hw clk480m_hw; struct phy *phy; bool uart_enabled; + struct reset_control *reset; }; static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy, @@ -144,9 +146,23 @@ static int rockchip_usb_phy_power_on(struct phy *_phy) return clk_prepare_enable(phy->clk480m); } +static int rockchip_usb_phy_reset(struct phy *_phy) +{ + struct rockchip_usb_phy *phy = phy_get_drvdata(_phy); + + if (phy->reset) { + reset_control_assert(phy->reset); + udelay(10); + reset_control_deassert(phy->reset); + } + + return 0; +} + static const struct phy_ops ops = { .power_on = rockchip_usb_phy_power_on, .power_off = rockchip_usb_phy_power_off, + .reset = rockchip_usb_phy_reset, .owner = THIS_MODULE, }; @@ -185,6 +201,10 @@ static int rockchip_usb_phy_init(struct rockchip_usb_phy_base *base, return -EINVAL; } + rk_phy->reset = of_reset_control_get(child, "phy-reset"); + if (IS_ERR(rk_phy->reset)) + rk_phy->reset = NULL; + rk_phy->reg_offset = reg_offset; rk_phy->clk = of_clk_get_by_name(child, "phyclk"); -- 2.7.4 ^ permalink raw reply related [flat|nested] 25+ messages in thread
* Re: [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup 2016-08-20 20:32 ` [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup Randy Li @ 2016-08-22 11:47 ` Kishon Vijay Abraham I 2016-08-22 13:00 ` Heiko Stübner 0 siblings, 1 reply; 25+ messages in thread From: Kishon Vijay Abraham I @ 2016-08-22 11:47 UTC (permalink / raw) To: Randy Li, linux-usb Cc: johnyoun, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, linux-kernel, heiko Hi, On Sunday 21 August 2016 02:02 AM, Randy Li wrote: > It is a hardware bug in RK3288, the only way to solve it is to > reset the phy. > > Signed-off-by: Randy Li <ayaka@soulik.info> > --- > drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/drivers/phy/phy-rockchip-usb.c b/drivers/phy/phy-rockchip-usb.c > index 2a7381f..734987f 100644 > --- a/drivers/phy/phy-rockchip-usb.c > +++ b/drivers/phy/phy-rockchip-usb.c > @@ -29,6 +29,7 @@ > #include <linux/reset.h> > #include <linux/regmap.h> > #include <linux/mfd/syscon.h> > +#include <linux/delay.h> > > static int enable_usb_uart; > > @@ -64,6 +65,7 @@ struct rockchip_usb_phy { > struct clk_hw clk480m_hw; > struct phy *phy; > bool uart_enabled; > + struct reset_control *reset; > }; > > static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy, > @@ -144,9 +146,23 @@ static int rockchip_usb_phy_power_on(struct phy *_phy) > return clk_prepare_enable(phy->clk480m); > } > > +static int rockchip_usb_phy_reset(struct phy *_phy) > +{ > + struct rockchip_usb_phy *phy = phy_get_drvdata(_phy); > + > + if (phy->reset) { > + reset_control_assert(phy->reset); > + udelay(10); > + reset_control_deassert(phy->reset); > + } > + > + return 0; > +} > + > static const struct phy_ops ops = { > .power_on = rockchip_usb_phy_power_on, > .power_off = rockchip_usb_phy_power_off, > + .reset = rockchip_usb_phy_reset, why not just reuse the .init ops? reset can be done during initialization right? Thanks Kishon ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup 2016-08-22 11:47 ` Kishon Vijay Abraham I @ 2016-08-22 13:00 ` Heiko Stübner 2016-08-29 9:32 ` Kishon Vijay Abraham I 0 siblings, 1 reply; 25+ messages in thread From: Heiko Stübner @ 2016-08-22 13:00 UTC (permalink / raw) To: Kishon Vijay Abraham I Cc: Randy Li, linux-usb, johnyoun, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, linux-kernel Am Montag, 22. August 2016, 17:17:41 schrieb Kishon Vijay Abraham I: > Hi, > > On Sunday 21 August 2016 02:02 AM, Randy Li wrote: > > It is a hardware bug in RK3288, the only way to solve it is to > > reset the phy. > > > > Signed-off-by: Randy Li <ayaka@soulik.info> > > --- > > > > drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++ > > 1 file changed, 20 insertions(+) > > > > diff --git a/drivers/phy/phy-rockchip-usb.c > > b/drivers/phy/phy-rockchip-usb.c index 2a7381f..734987f 100644 > > --- a/drivers/phy/phy-rockchip-usb.c > > +++ b/drivers/phy/phy-rockchip-usb.c > > @@ -29,6 +29,7 @@ > > > > #include <linux/reset.h> > > #include <linux/regmap.h> > > #include <linux/mfd/syscon.h> > > > > +#include <linux/delay.h> > > > > static int enable_usb_uart; > > > > @@ -64,6 +65,7 @@ struct rockchip_usb_phy { > > > > struct clk_hw clk480m_hw; > > struct phy *phy; > > bool uart_enabled; > > > > + struct reset_control *reset; > > > > }; > > > > static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy, > > > > @@ -144,9 +146,23 @@ static int rockchip_usb_phy_power_on(struct phy > > *_phy) > > > > return clk_prepare_enable(phy->clk480m); > > > > } > > > > +static int rockchip_usb_phy_reset(struct phy *_phy) > > +{ > > + struct rockchip_usb_phy *phy = phy_get_drvdata(_phy); > > + > > + if (phy->reset) { > > + reset_control_assert(phy->reset); > > + udelay(10); > > + reset_control_deassert(phy->reset); > > + } > > + > > + return 0; > > +} > > + > > > > static const struct phy_ops ops = { > > > > .power_on = rockchip_usb_phy_power_on, > > .power_off = rockchip_usb_phy_power_off, > > > > + .reset = rockchip_usb_phy_reset, > > why not just reuse the .init ops? reset can be done during initialization > right? The naming of power_on + power_off and init + exit probably suggests that they are supposed to be used in pairs. (aka module_init + module_exit and probably more) But in fact I've seen different combinations so far (phy_init + phy_power_on ... phy_power_off + phy_exit but also phy_power_on + phy_init ... phy_exit + phy_power_off), so I guess the semantics are not that strictly defined. ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup 2016-08-22 13:00 ` Heiko Stübner @ 2016-08-29 9:32 ` Kishon Vijay Abraham I 0 siblings, 0 replies; 25+ messages in thread From: Kishon Vijay Abraham I @ 2016-08-29 9:32 UTC (permalink / raw) To: Heiko Stübner Cc: Randy Li, linux-usb, johnyoun, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, linux-kernel Hi, On Monday 22 August 2016 06:30 PM, Heiko Stübner wrote: > Am Montag, 22. August 2016, 17:17:41 schrieb Kishon Vijay Abraham I: >> Hi, >> >> On Sunday 21 August 2016 02:02 AM, Randy Li wrote: >>> It is a hardware bug in RK3288, the only way to solve it is to >>> reset the phy. >>> >>> Signed-off-by: Randy Li <ayaka@soulik.info> >>> --- >>> >>> drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++ >>> 1 file changed, 20 insertions(+) >>> >>> diff --git a/drivers/phy/phy-rockchip-usb.c >>> b/drivers/phy/phy-rockchip-usb.c index 2a7381f..734987f 100644 >>> --- a/drivers/phy/phy-rockchip-usb.c >>> +++ b/drivers/phy/phy-rockchip-usb.c >>> @@ -29,6 +29,7 @@ >>> >>> #include <linux/reset.h> >>> #include <linux/regmap.h> >>> #include <linux/mfd/syscon.h> >>> >>> +#include <linux/delay.h> >>> >>> static int enable_usb_uart; >>> >>> @@ -64,6 +65,7 @@ struct rockchip_usb_phy { >>> >>> struct clk_hw clk480m_hw; >>> struct phy *phy; >>> bool uart_enabled; >>> >>> + struct reset_control *reset; >>> >>> }; >>> >>> static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy, >>> >>> @@ -144,9 +146,23 @@ static int rockchip_usb_phy_power_on(struct phy >>> *_phy) >>> >>> return clk_prepare_enable(phy->clk480m); >>> >>> } >>> >>> +static int rockchip_usb_phy_reset(struct phy *_phy) >>> +{ >>> + struct rockchip_usb_phy *phy = phy_get_drvdata(_phy); >>> + >>> + if (phy->reset) { >>> + reset_control_assert(phy->reset); >>> + udelay(10); >>> + reset_control_deassert(phy->reset); >>> + } >>> + >>> + return 0; >>> +} >>> + >>> >>> static const struct phy_ops ops = { >>> >>> .power_on = rockchip_usb_phy_power_on, >>> .power_off = rockchip_usb_phy_power_off, >>> >>> + .reset = rockchip_usb_phy_reset, >> >> why not just reuse the .init ops? reset can be done during initialization >> right? > > The naming of power_on + power_off and init + exit probably suggests that they > are supposed to be used in pairs. (aka module_init + module_exit and probably > more) > > But in fact I've seen different combinations so far (phy_init + phy_power_on > ... phy_power_off + phy_exit but also phy_power_on + phy_init ... phy_exit + > phy_power_off), so I guess the semantics are not that strictly defined. yeah, it got difficult to maintain the semantics once the number of phy users increased. Thought it was better than bloating the framework with platform specific callbacks. Thanks Kishon ^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform 2016-08-20 20:32 ` [PATCH 0/4 v4] usb: dwc2: fix the usb host for host port at RK32 Randy Li 2016-08-20 20:32 ` [PATCH 1/4] phy: Add reset callback Randy Li 2016-08-20 20:32 ` [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup Randy Li @ 2016-08-20 20:32 ` Randy Li 2016-08-20 21:30 ` Sergei Shtylyov 2016-08-20 20:32 ` [PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset Randy Li 3 siblings, 1 reply; 25+ messages in thread From: Randy Li @ 2016-08-20 20:32 UTC (permalink / raw) To: linux-usb Cc: johnyoun, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, kishon, linux-kernel, heiko, Randy Li On the rk3288 USB host-only port (the one that's not the OTG-enabled port) the PHY can get into a bad state when a wakeup is asserted (not just a wakeup from full system suspend but also a wakeup from autosuspend). We can get the PHY out of its bad state by asserting its "port reset", but unfortunately that seems to assert a reset onto the USB bus so it could confuse things if we don't actually deenumerate / reenumerate the device. We can also get the PHY out of its bad state by fully resetting it using the reset from the CRU (clock reset unit) in chip, which does a more full reset. The CRU-based reset appears to actually cause devices on the bus to be removed and reinserted, which fixes the problem (albeit in a hacky way). It's unfortunate that we need to do a full re-enumeration of devices at wakeup time, but this is better than alternative of letting the bus get wedged. The original patches came from Doug Anderson <dianders@chromium.org>. Signed-off-by: Randy Li <ayaka@soulik.info> --- drivers/usb/dwc2/core_intr.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c index d85c5c9..c31c3fe 100644 --- a/drivers/usb/dwc2/core_intr.c +++ b/drivers/usb/dwc2/core_intr.c @@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg) static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg) { int ret; + struct device_node *np = hsotg->dev->of_node; /* Clear interrupt */ dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS); @@ -379,6 +380,14 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg) /* Restart the Phy Clock */ pcgcctl &= ~PCGCTL_STOPPCLK; dwc2_writel(pcgcctl, hsotg->regs + PCGCTL); + + /* It is a quirk in Rockchip RK3288, causing by + * a hardware bug. This will propagate out and + * eventually we'll re-enumerate the device. + * Not great but the best we can do */ + if (of_device_is_compatible(np, "rockchip,rk3288-usb")) + hsotg->phy->ops->reset(hsotg->phy); + mod_timer(&hsotg->wkp_timer, jiffies + msecs_to_jiffies(71)); } else { -- 2.7.4 ^ permalink raw reply related [flat|nested] 25+ messages in thread
* Re: [PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform 2016-08-20 20:32 ` [PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform Randy Li @ 2016-08-20 21:30 ` Sergei Shtylyov 2016-08-21 7:56 ` [PATCH 0/4 v5] usb: dwc2: fix the usb host for host port at RK32 Randy Li 2016-08-21 19:31 ` [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform Randy Li 0 siblings, 2 replies; 25+ messages in thread From: Sergei Shtylyov @ 2016-08-20 21:30 UTC (permalink / raw) To: Randy Li, linux-usb Cc: johnyoun, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, kishon, linux-kernel, heiko Hello. On 08/20/2016 11:32 PM, Randy Li wrote: > On the rk3288 USB host-only port (the one that's not the OTG-enabled > port) the PHY can get into a bad state when a wakeup is asserted (not > just a wakeup from full system suspend but also a wakeup from > autosuspend). > > We can get the PHY out of its bad state by asserting its "port reset", > but unfortunately that seems to assert a reset onto the USB bus so it > could confuse things if we don't actually deenumerate / reenumerate the > device. > > We can also get the PHY out of its bad state by fully resetting it using > the reset from the CRU (clock reset unit) in chip, which does a more full > reset. The CRU-based reset appears to actually cause devices on the bus > to be removed and reinserted, which fixes the problem (albeit in a hacky > way). > > It's unfortunate that we need to do a full re-enumeration of devices at > wakeup time, but this is better than alternative of letting the bus get > wedged. > > The original patches came from Doug Anderson <dianders@chromium.org>. > > Signed-off-by: Randy Li <ayaka@soulik.info> > --- > drivers/usb/dwc2/core_intr.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c > index d85c5c9..c31c3fe 100644 > --- a/drivers/usb/dwc2/core_intr.c > +++ b/drivers/usb/dwc2/core_intr.c [...] > @@ -379,6 +380,14 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg) > /* Restart the Phy Clock */ > pcgcctl &= ~PCGCTL_STOPPCLK; > dwc2_writel(pcgcctl, hsotg->regs + PCGCTL); > + > + /* It is a quirk in Rockchip RK3288, causing by > + * a hardware bug. This will propagate out and > + * eventually we'll re-enumerate the device. > + * Not great but the best we can do */ The preferred multi-line comment style is this: /* * bla * bla */ Yours is close. :-) [...] MBR, Sergei ^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 0/4 v5] usb: dwc2: fix the usb host for host port at RK32 2016-08-20 21:30 ` Sergei Shtylyov @ 2016-08-21 7:56 ` Randy Li 2016-08-21 7:56 ` [PATCH 1/4] phy: Add reset callback Randy Li ` (3 more replies) 2016-08-21 19:31 ` [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform Randy Li 1 sibling, 4 replies; 25+ messages in thread From: Randy Li @ 2016-08-21 7:56 UTC (permalink / raw) To: linux-usb Cc: johnyoun, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, kishon, linux-kernel, heiko, linux-rockchip, Randy Li Hello All: This version would move reset into phy. I wanted to implement a hard code version but I meet some problem with ioremap reset controller, in order to keep my word, I offer this version this time. Changelog: v5 A few modification at style, add the missing doc in the last commit. v4 1. Adding the reset callback in struct phy_ops. 2. Moving the reset into phy rockchip usb. 3. Trying to call a reset when dwc2 wakeup in rk3288. v3 Rebased from previous commit. Randy Li (4): phy: Add reset callback phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup usb: dwc2: assert phy reset when waking up in rk3288 platform ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset arch/arm/boot/dts/rk3288.dtsi | 5 +++++ drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++ drivers/usb/dwc2/core_intr.c | 9 +++++++++ include/linux/phy/phy.h | 2 ++ 4 files changed, 36 insertions(+) -- 2.7.4 ^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 1/4] phy: Add reset callback 2016-08-21 7:56 ` [PATCH 0/4 v5] usb: dwc2: fix the usb host for host port at RK32 Randy Li @ 2016-08-21 7:56 ` Randy Li 2016-08-21 7:56 ` [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup Randy Li ` (2 subsequent siblings) 3 siblings, 0 replies; 25+ messages in thread From: Randy Li @ 2016-08-21 7:56 UTC (permalink / raw) To: linux-usb Cc: johnyoun, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, kishon, linux-kernel, heiko, linux-rockchip, Randy Li The only use for this is for solving a hardware design problem in usb of Rockchip RK3288. Signed-off-by: Randy Li <ayaka@soulik.info> --- include/linux/phy/phy.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h index f08b672..4d34607 100644 --- a/include/linux/phy/phy.h +++ b/include/linux/phy/phy.h @@ -36,6 +36,7 @@ enum phy_mode { * @power_on: powering on the phy * @power_off: powering off the phy * @set_mode: set the mode of the phy + * @reset: reseting the phy * @owner: the module owner containing the ops */ struct phy_ops { @@ -44,6 +45,7 @@ struct phy_ops { int (*power_on)(struct phy *phy); int (*power_off)(struct phy *phy); int (*set_mode)(struct phy *phy, enum phy_mode mode); + int (*reset)(struct phy *phy); struct module *owner; }; -- 2.7.4 ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup 2016-08-21 7:56 ` [PATCH 0/4 v5] usb: dwc2: fix the usb host for host port at RK32 Randy Li 2016-08-21 7:56 ` [PATCH 1/4] phy: Add reset callback Randy Li @ 2016-08-21 7:56 ` Randy Li 2016-08-23 17:53 ` Rob Herring 2016-08-21 7:56 ` [PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform Randy Li 2016-08-21 7:56 ` [PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset Randy Li 3 siblings, 1 reply; 25+ messages in thread From: Randy Li @ 2016-08-21 7:56 UTC (permalink / raw) To: linux-usb Cc: johnyoun, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, kishon, linux-kernel, heiko, linux-rockchip, Randy Li It is a hardware bug in RK3288, the only way to solve it is to reset the phy. Signed-off-by: Randy Li <ayaka@soulik.info> --- .../devicetree/bindings/phy/rockchip-usb-phy.txt | 3 +++ drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++ 2 files changed, 23 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt index cc6be96..57dc388 100644 --- a/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt +++ b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt @@ -27,6 +27,9 @@ Optional Properties: - clocks : phandle + clock specifier for the phy clocks - clock-names: string, clock name, must be "phyclk" - #clock-cells: for users of the phy-pll, should be 0 +- reset-names: Only allow the following entries: + - phy-reset +- resets: Must contain an entry for each entry in reset-names. Example: diff --git a/drivers/phy/phy-rockchip-usb.c b/drivers/phy/phy-rockchip-usb.c index 2a7381f..734987f 100644 --- a/drivers/phy/phy-rockchip-usb.c +++ b/drivers/phy/phy-rockchip-usb.c @@ -29,6 +29,7 @@ #include <linux/reset.h> #include <linux/regmap.h> #include <linux/mfd/syscon.h> +#include <linux/delay.h> static int enable_usb_uart; @@ -64,6 +65,7 @@ struct rockchip_usb_phy { struct clk_hw clk480m_hw; struct phy *phy; bool uart_enabled; + struct reset_control *reset; }; static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy, @@ -144,9 +146,23 @@ static int rockchip_usb_phy_power_on(struct phy *_phy) return clk_prepare_enable(phy->clk480m); } +static int rockchip_usb_phy_reset(struct phy *_phy) +{ + struct rockchip_usb_phy *phy = phy_get_drvdata(_phy); + + if (phy->reset) { + reset_control_assert(phy->reset); + udelay(10); + reset_control_deassert(phy->reset); + } + + return 0; +} + static const struct phy_ops ops = { .power_on = rockchip_usb_phy_power_on, .power_off = rockchip_usb_phy_power_off, + .reset = rockchip_usb_phy_reset, .owner = THIS_MODULE, }; @@ -185,6 +201,10 @@ static int rockchip_usb_phy_init(struct rockchip_usb_phy_base *base, return -EINVAL; } + rk_phy->reset = of_reset_control_get(child, "phy-reset"); + if (IS_ERR(rk_phy->reset)) + rk_phy->reset = NULL; + rk_phy->reg_offset = reg_offset; rk_phy->clk = of_clk_get_by_name(child, "phyclk"); -- 2.7.4 ^ permalink raw reply related [flat|nested] 25+ messages in thread
* Re: [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup 2016-08-21 7:56 ` [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup Randy Li @ 2016-08-23 17:53 ` Rob Herring 0 siblings, 0 replies; 25+ messages in thread From: Rob Herring @ 2016-08-23 17:53 UTC (permalink / raw) To: Randy Li Cc: linux-usb, johnyoun, gregkh, mark.rutland, devicetree, eddie.cai, randy.li, kishon, linux-kernel, heiko, linux-rockchip On Sun, Aug 21, 2016 at 03:56:43PM +0800, Randy Li wrote: > It is a hardware bug in RK3288, the only way to solve it is to > reset the phy. > > Signed-off-by: Randy Li <ayaka@soulik.info> > --- > .../devicetree/bindings/phy/rockchip-usb-phy.txt | 3 +++ > drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++ > 2 files changed, 23 insertions(+) Acked-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform 2016-08-21 7:56 ` [PATCH 0/4 v5] usb: dwc2: fix the usb host for host port at RK32 Randy Li 2016-08-21 7:56 ` [PATCH 1/4] phy: Add reset callback Randy Li 2016-08-21 7:56 ` [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup Randy Li @ 2016-08-21 7:56 ` Randy Li 2016-08-21 7:56 ` [PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset Randy Li 3 siblings, 0 replies; 25+ messages in thread From: Randy Li @ 2016-08-21 7:56 UTC (permalink / raw) To: linux-usb Cc: johnyoun, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, kishon, linux-kernel, heiko, linux-rockchip, Randy Li On the rk3288 USB host-only port (the one that's not the OTG-enabled port) the PHY can get into a bad state when a wakeup is asserted (not just a wakeup from full system suspend but also a wakeup from autosuspend). We can get the PHY out of its bad state by asserting its "port reset", but unfortunately that seems to assert a reset onto the USB bus so it could confuse things if we don't actually deenumerate / reenumerate the device. We can also get the PHY out of its bad state by fully resetting it using the reset from the CRU (clock reset unit) in chip, which does a more full reset. The CRU-based reset appears to actually cause devices on the bus to be removed and reinserted, which fixes the problem (albeit in a hacky way). It's unfortunate that we need to do a full re-enumeration of devices at wakeup time, but this is better than alternative of letting the bus get wedged. The original patches came from Doug Anderson <dianders@chromium.org>. Signed-off-by: Randy Li <ayaka@soulik.info> --- drivers/usb/dwc2/core_intr.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c index d85c5c9..f57c48a 100644 --- a/drivers/usb/dwc2/core_intr.c +++ b/drivers/usb/dwc2/core_intr.c @@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg) static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg) { int ret; + struct device_node *np = hsotg->dev->of_node; /* Clear interrupt */ dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS); @@ -379,6 +380,16 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg) /* Restart the Phy Clock */ pcgcctl &= ~PCGCTL_STOPPCLK; dwc2_writel(pcgcctl, hsotg->regs + PCGCTL); + + /* + * It is a quirk in Rockchip RK3288, causing by + * a hardware bug. This will propagate out and + * eventually we'll re-enumerate the device. + * Not great but the best we can do + */ + if (of_device_is_compatible(np, "rockchip,rk3288-usb")) + hsotg->phy->ops->reset(hsotg->phy); + mod_timer(&hsotg->wkp_timer, jiffies + msecs_to_jiffies(71)); } else { -- 2.7.4 ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset 2016-08-21 7:56 ` [PATCH 0/4 v5] usb: dwc2: fix the usb host for host port at RK32 Randy Li ` (2 preceding siblings ...) 2016-08-21 7:56 ` [PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform Randy Li @ 2016-08-21 7:56 ` Randy Li 2016-08-21 11:06 ` Sergei Shtylyov 3 siblings, 1 reply; 25+ messages in thread From: Randy Li @ 2016-08-21 7:56 UTC (permalink / raw) To: linux-usb Cc: johnyoun, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, kishon, linux-kernel, heiko, linux-rockchip, Randy Li The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288 has a hardware errata that causes everything to get confused when we get a remote wakeup. We'll use the reset that's in the CRU to reset the port when it's in a bad state. Note that we add the reset to both dwc2 controllers even though only one has the errata in case we find some other use for this reset that's unrelated to the current hardware errata. Only the host port gets the quirk property, though. This patch came from Doug Anderson <dianders@chromium.org> originally. Signed-off-by: Randy Li <ayaka@soulik.info> --- arch/arm/boot/dts/rk3288.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 48ca4e4..646f49d 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -855,6 +855,8 @@ clocks = <&cru SCLK_OTGPHY0>; clock-names = "phyclk"; #clock-cells = <0>; + resets = <&cru SRST_USBOTG_PHY>; + reset-names = "phy-reset"; }; usbphy1: usb-phy@334 { @@ -871,6 +873,9 @@ clocks = <&cru SCLK_OTGPHY2>; clock-names = "phyclk"; #clock-cells = <0>; + resets = <&cru SRST_USBHOST1_PHY>; + reset-names = "phy-reset"; + }; }; }; -- 2.7.4 ^ permalink raw reply related [flat|nested] 25+ messages in thread
* Re: [PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset 2016-08-21 7:56 ` [PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset Randy Li @ 2016-08-21 11:06 ` Sergei Shtylyov 2016-08-21 12:19 ` ayaka 0 siblings, 1 reply; 25+ messages in thread From: Sergei Shtylyov @ 2016-08-21 11:06 UTC (permalink / raw) To: Randy Li, linux-usb Cc: johnyoun, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, kishon, linux-kernel, heiko, linux-rockchip Hello. On 8/21/2016 10:56 AM, Randy Li wrote: > The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288 > has a hardware errata that causes everything to get confused when we get > a remote wakeup. We'll use the reset that's in the CRU to reset the > port when it's in a bad state. > > Note that we add the reset to both dwc2 controllers even though only one > has the errata in case we find some other use for this reset that's > unrelated to the current hardware errata. Only the host port gets the > quirk property, though. > > This patch came from Doug Anderson <dianders@chromium.org> originally. Was it signed off by him? Don't you need to keep his authorship via th "From:" tag? > Signed-off-by: Randy Li <ayaka@soulik.info> > --- > arch/arm/boot/dts/rk3288.dtsi | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi > index 48ca4e4..646f49d 100644 > --- a/arch/arm/boot/dts/rk3288.dtsi > +++ b/arch/arm/boot/dts/rk3288.dtsi [...] > @@ -871,6 +873,9 @@ > clocks = <&cru SCLK_OTGPHY2>; > clock-names = "phyclk"; > #clock-cells = <0>; > + resets = <&cru SRST_USBHOST1_PHY>; > + reset-names = "phy-reset"; > + Don't need empty line here. > }; > }; > }; MBR , Sergei ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset 2016-08-21 11:06 ` Sergei Shtylyov @ 2016-08-21 12:19 ` ayaka 2016-08-22 10:30 ` Sergei Shtylyov 0 siblings, 1 reply; 25+ messages in thread From: ayaka @ 2016-08-21 12:19 UTC (permalink / raw) To: Sergei Shtylyov, linux-usb Cc: johnyoun, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, kishon, linux-kernel, heiko, linux-rockchip On 08/21/2016 07:06 PM, Sergei Shtylyov wrote: > Hello. > > On 8/21/2016 10:56 AM, Randy Li wrote: > >> The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288 >> has a hardware errata that causes everything to get confused when we get >> a remote wakeup. We'll use the reset that's in the CRU to reset the >> port when it's in a bad state. >> >> Note that we add the reset to both dwc2 controllers even though only one >> has the errata in case we find some other use for this reset that's >> unrelated to the current hardware errata. Only the host port gets the >> quirk property, though. >> >> This patch came from Doug Anderson <dianders@chromium.org> originally. > > Was it signed off by him? Don't you need to keep his authorship via > th "From:" tag? I would rather the idea comes from him, but the implementation is different. I don't which tag would be better? If the "From:" would be the best choice. I would resend the last two patches. >> Signed-off-by: Randy Li <ayaka@soulik.info> >> --- >> arch/arm/boot/dts/rk3288.dtsi | 5 +++++ >> 1 file changed, 5 insertions(+) >> >> diff --git a/arch/arm/boot/dts/rk3288.dtsi >> b/arch/arm/boot/dts/rk3288.dtsi >> index 48ca4e4..646f49d 100644 >> --- a/arch/arm/boot/dts/rk3288.dtsi >> +++ b/arch/arm/boot/dts/rk3288.dtsi > [...] >> @@ -871,6 +873,9 @@ >> clocks = <&cru SCLK_OTGPHY2>; >> clock-names = "phyclk"; >> #clock-cells = <0>; >> + resets = <&cru SRST_USBHOST1_PHY>; >> + reset-names = "phy-reset"; >> + > > Don't need empty line here. I would be removed > >> }; >> }; >> }; > > MBR , Sergei ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset 2016-08-21 12:19 ` ayaka @ 2016-08-22 10:30 ` Sergei Shtylyov 0 siblings, 0 replies; 25+ messages in thread From: Sergei Shtylyov @ 2016-08-22 10:30 UTC (permalink / raw) To: ayaka, linux-usb Cc: johnyoun, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, kishon, linux-kernel, heiko, linux-rockchip Hello. On 8/21/2016 3:19 PM, ayaka wrote: >>> The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288 >>> has a hardware errata that causes everything to get confused when we get >>> a remote wakeup. We'll use the reset that's in the CRU to reset the >>> port when it's in a bad state. >>> >>> Note that we add the reset to both dwc2 controllers even though only one >>> has the errata in case we find some other use for this reset that's >>> unrelated to the current hardware errata. Only the host port gets the >>> quirk property, though. >>> >>> This patch came from Doug Anderson <dianders@chromium.org> originally. >> >> Was it signed off by him? Don't you need to keep his authorship via th >> "From:" tag? > I would rather the idea comes from him, but the implementation is different. I Then write exactly that. Because now it sounds like the patch itself was originated from him. > don't which tag would be > better? If the "From:" would be the best choice. I would resend the last two > patches. There's also "Suggested-by:" tag which might fit here. >>> Signed-off-by: Randy Li <ayaka@soulik.info> [...] MBR, Sergei ^ permalink raw reply [flat|nested] 25+ messages in thread
* [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform 2016-08-20 21:30 ` Sergei Shtylyov 2016-08-21 7:56 ` [PATCH 0/4 v5] usb: dwc2: fix the usb host for host port at RK32 Randy Li @ 2016-08-21 19:31 ` Randy Li 2016-08-21 19:31 ` [RESEND PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset Randy Li 2016-08-23 20:46 ` [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform John Youn 1 sibling, 2 replies; 25+ messages in thread From: Randy Li @ 2016-08-21 19:31 UTC (permalink / raw) To: linux-usb Cc: johnyoun, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, kishon, linux-kernel, heiko, linux-rockchip, Randy Li On the rk3288 USB host-only port (the one that's not the OTG-enabled port) the PHY can get into a bad state when a wakeup is asserted (not just a wakeup from full system suspend but also a wakeup from autosuspend). We can get the PHY out of its bad state by asserting its "port reset", but unfortunately that seems to assert a reset onto the USB bus so it could confuse things if we don't actually deenumerate / reenumerate the device. We can also get the PHY out of its bad state by fully resetting it using the reset from the CRU (clock reset unit) in chip, which does a more full reset. The CRU-based reset appears to actually cause devices on the bus to be removed and reinserted, which fixes the problem (albeit in a hacky way). It's unfortunate that we need to do a full re-enumeration of devices at wakeup time, but this is better than alternative of letting the bus get wedged. Signed-off-by: Randy Li <ayaka@soulik.info> --- drivers/usb/dwc2/core_intr.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c index d85c5c9..f57c48a 100644 --- a/drivers/usb/dwc2/core_intr.c +++ b/drivers/usb/dwc2/core_intr.c @@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg) static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg) { int ret; + struct device_node *np = hsotg->dev->of_node; /* Clear interrupt */ dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS); @@ -379,6 +380,16 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg) /* Restart the Phy Clock */ pcgcctl &= ~PCGCTL_STOPPCLK; dwc2_writel(pcgcctl, hsotg->regs + PCGCTL); + + /* + * It is a quirk in Rockchip RK3288, causing by + * a hardware bug. This will propagate out and + * eventually we'll re-enumerate the device. + * Not great but the best we can do + */ + if (of_device_is_compatible(np, "rockchip,rk3288-usb")) + hsotg->phy->ops->reset(hsotg->phy); + mod_timer(&hsotg->wkp_timer, jiffies + msecs_to_jiffies(71)); } else { -- 2.7.4 ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [RESEND PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset 2016-08-21 19:31 ` [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform Randy Li @ 2016-08-21 19:31 ` Randy Li 2016-08-23 20:46 ` [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform John Youn 1 sibling, 0 replies; 25+ messages in thread From: Randy Li @ 2016-08-21 19:31 UTC (permalink / raw) To: linux-usb Cc: johnyoun, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, kishon, linux-kernel, heiko, linux-rockchip, Randy Li The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288 has a hardware errata that causes everything to get confused when we get a remote wakeup. We'll use the reset that's in the CRU to reset the port when it's in a bad state. Note that we add the reset to both dwc2 controllers even though only one has the errata in case we find some other use for this reset that's unrelated to the current hardware errata. Only the host port gets the quirk property, though. Signed-off-by: Randy Li <ayaka@soulik.info> --- arch/arm/boot/dts/rk3288.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 48ca4e4..de54604 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -855,6 +855,8 @@ clocks = <&cru SCLK_OTGPHY0>; clock-names = "phyclk"; #clock-cells = <0>; + resets = <&cru SRST_USBOTG_PHY>; + reset-names = "phy-reset"; }; usbphy1: usb-phy@334 { @@ -871,6 +873,8 @@ clocks = <&cru SCLK_OTGPHY2>; clock-names = "phyclk"; #clock-cells = <0>; + resets = <&cru SRST_USBHOST1_PHY>; + reset-names = "phy-reset"; }; }; }; -- 2.7.4 ^ permalink raw reply related [flat|nested] 25+ messages in thread
* Re: [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform 2016-08-21 19:31 ` [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform Randy Li 2016-08-21 19:31 ` [RESEND PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset Randy Li @ 2016-08-23 20:46 ` John Youn 2016-08-24 8:54 ` Randy Li 1 sibling, 1 reply; 25+ messages in thread From: John Youn @ 2016-08-23 20:46 UTC (permalink / raw) To: Randy Li, linux-usb Cc: John.Youn, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, kishon, linux-kernel, heiko, linux-rockchip On 8/21/2016 12:32 PM, Randy Li wrote: > On the rk3288 USB host-only port (the one that's not the OTG-enabled > port) the PHY can get into a bad state when a wakeup is asserted (not > just a wakeup from full system suspend but also a wakeup from > autosuspend). > > We can get the PHY out of its bad state by asserting its "port reset", > but unfortunately that seems to assert a reset onto the USB bus so it > could confuse things if we don't actually deenumerate / reenumerate the > device. > > We can also get the PHY out of its bad state by fully resetting it using > the reset from the CRU (clock reset unit) in chip, which does a more full > reset. The CRU-based reset appears to actually cause devices on the bus > to be removed and reinserted, which fixes the problem (albeit in a hacky > way). > > It's unfortunate that we need to do a full re-enumeration of devices at > wakeup time, but this is better than alternative of letting the bus get > wedged. > > Signed-off-by: Randy Li <ayaka@soulik.info> > --- > drivers/usb/dwc2/core_intr.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c > index d85c5c9..f57c48a 100644 > --- a/drivers/usb/dwc2/core_intr.c > +++ b/drivers/usb/dwc2/core_intr.c > @@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg) > static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg) > { > int ret; > + struct device_node *np = hsotg->dev->of_node; > > /* Clear interrupt */ > dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS); > @@ -379,6 +380,16 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg) > /* Restart the Phy Clock */ > pcgcctl &= ~PCGCTL_STOPPCLK; > dwc2_writel(pcgcctl, hsotg->regs + PCGCTL); > + > + /* > + * It is a quirk in Rockchip RK3288, causing by > + * a hardware bug. This will propagate out and > + * eventually we'll re-enumerate the device. > + * Not great but the best we can do Remove the trailing whitespaces in this comment. Run scripts/checkpatch.pl to catch these. > + */ > + if (of_device_is_compatible(np, "rockchip,rk3288-usb")) > + hsotg->phy->ops->reset(hsotg->phy); > + You should probably check for NULL before calling the reset() callback. Also, I'd rather see a generic quirk property that you set for your platform. Something like "phy_reset_on_wakeup_quirk". Also, try to preserve the version tag in your subject for all the patches so that we can easily identify the latest version of the series, like: [PATCH v5 3/4] ... And, typically "RESEND" means there are no code change. Regards, John ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform 2016-08-23 20:46 ` [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform John Youn @ 2016-08-24 8:54 ` Randy Li 2016-08-25 18:23 ` John Youn 0 siblings, 1 reply; 25+ messages in thread From: Randy Li @ 2016-08-24 8:54 UTC (permalink / raw) To: John Youn, Randy Li, linux-usb Cc: mark.rutland, devicetree, heiko, gregkh, linux-kernel, linux-rockchip, robh+dt, eddie.cai, kishon On 08/24/2016 04:46 AM, John Youn wrote: > On 8/21/2016 12:32 PM, Randy Li wrote: >> On the rk3288 USB host-only port (the one that's not the OTG-enabled >> port) the PHY can get into a bad state when a wakeup is asserted (not >> just a wakeup from full system suspend but also a wakeup from >> autosuspend). >> >> We can get the PHY out of its bad state by asserting its "port reset", >> but unfortunately that seems to assert a reset onto the USB bus so it >> could confuse things if we don't actually deenumerate / reenumerate the >> device. >> >> We can also get the PHY out of its bad state by fully resetting it using >> the reset from the CRU (clock reset unit) in chip, which does a more full >> reset. The CRU-based reset appears to actually cause devices on the bus >> to be removed and reinserted, which fixes the problem (albeit in a hacky >> way). >> >> It's unfortunate that we need to do a full re-enumeration of devices at >> wakeup time, but this is better than alternative of letting the bus get >> wedged. >> >> Signed-off-by: Randy Li <ayaka@soulik.info> >> --- >> drivers/usb/dwc2/core_intr.c | 11 +++++++++++ >> 1 file changed, 11 insertions(+) >> >> diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c >> index d85c5c9..f57c48a 100644 >> --- a/drivers/usb/dwc2/core_intr.c >> +++ b/drivers/usb/dwc2/core_intr.c >> @@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg) >> static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg) >> { >> int ret; >> + struct device_node *np = hsotg->dev->of_node; >> >> /* Clear interrupt */ >> dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS); >> @@ -379,6 +380,16 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg) >> /* Restart the Phy Clock */ >> pcgcctl &= ~PCGCTL_STOPPCLK; >> dwc2_writel(pcgcctl, hsotg->regs + PCGCTL); >> + >> + /* >> + * It is a quirk in Rockchip RK3288, causing by >> + * a hardware bug. This will propagate out and >> + * eventually we'll re-enumerate the device. >> + * Not great but the best we can do > > Remove the trailing whitespaces in this comment. > > Run scripts/checkpatch.pl to catch these. I see. > >> + */ >> + if (of_device_is_compatible(np, "rockchip,rk3288-usb")) >> + hsotg->phy->ops->reset(hsotg->phy); >> + > > You should probably check for NULL before calling the reset() > callback. Sure. > > Also, I'd rather see a generic quirk property that you set for your > platform. > > Something like "phy_reset_on_wakeup_quirk". But Rob Herring want me to implied by the SoC specific compatible string. I agree with him. It is certainly bug in RK3288 platform. It is no found no the other platform. > > Also, try to preserve the version tag in your subject for all the > patches so that we can easily identify the latest version of the > series, like: > > [PATCH v5 3/4] ... > > And, typically "RESEND" means there are no code change. I see, I just make up my mind whether code style is new version before. I won't again. Thank you very much. > > Regards, > John > > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip > -- Randy Li The third produce department ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform 2016-08-24 8:54 ` Randy Li @ 2016-08-25 18:23 ` John Youn 2016-08-29 7:51 ` Felipe Balbi 0 siblings, 1 reply; 25+ messages in thread From: John Youn @ 2016-08-25 18:23 UTC (permalink / raw) To: Randy Li, John Youn, Randy Li, linux-usb, Felipe Balbi Cc: mark.rutland, devicetree, heiko, gregkh, linux-kernel, linux-rockchip, robh+dt, eddie.cai, kishon On 8/24/2016 1:54 AM, Randy Li wrote: > > > On 08/24/2016 04:46 AM, John Youn wrote: >> On 8/21/2016 12:32 PM, Randy Li wrote: >>> On the rk3288 USB host-only port (the one that's not the OTG-enabled >>> port) the PHY can get into a bad state when a wakeup is asserted (not >>> just a wakeup from full system suspend but also a wakeup from >>> autosuspend). >>> >>> We can get the PHY out of its bad state by asserting its "port reset", >>> but unfortunately that seems to assert a reset onto the USB bus so it >>> could confuse things if we don't actually deenumerate / reenumerate the >>> device. >>> >>> We can also get the PHY out of its bad state by fully resetting it using >>> the reset from the CRU (clock reset unit) in chip, which does a more full >>> reset. The CRU-based reset appears to actually cause devices on the bus >>> to be removed and reinserted, which fixes the problem (albeit in a hacky >>> way). >>> >>> It's unfortunate that we need to do a full re-enumeration of devices at >>> wakeup time, but this is better than alternative of letting the bus get >>> wedged. >>> >>> Signed-off-by: Randy Li <ayaka@soulik.info> >>> --- >>> drivers/usb/dwc2/core_intr.c | 11 +++++++++++ >>> 1 file changed, 11 insertions(+) >>> >>> diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c >>> index d85c5c9..f57c48a 100644 >>> --- a/drivers/usb/dwc2/core_intr.c >>> +++ b/drivers/usb/dwc2/core_intr.c >>> @@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg) >>> static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg) >>> { >>> int ret; >>> + struct device_node *np = hsotg->dev->of_node; >>> >>> /* Clear interrupt */ >>> dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS); >>> @@ -379,6 +380,16 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg) >>> /* Restart the Phy Clock */ >>> pcgcctl &= ~PCGCTL_STOPPCLK; >>> dwc2_writel(pcgcctl, hsotg->regs + PCGCTL); >>> + >>> + /* >>> + * It is a quirk in Rockchip RK3288, causing by >>> + * a hardware bug. This will propagate out and >>> + * eventually we'll re-enumerate the device. >>> + * Not great but the best we can do >> >> Remove the trailing whitespaces in this comment. >> >> Run scripts/checkpatch.pl to catch these. > I see. >> >>> + */ >>> + if (of_device_is_compatible(np, "rockchip,rk3288-usb")) >>> + hsotg->phy->ops->reset(hsotg->phy); >>> + >> >> You should probably check for NULL before calling the reset() >> callback. > Sure. >> >> Also, I'd rather see a generic quirk property that you set for your >> platform. >> >> Something like "phy_reset_on_wakeup_quirk". > But Rob Herring want me to implied by the SoC specific compatible > string. I agree with him. It is certainly bug in RK3288 platform. > It is no found no the other platform. Ok, I missed that before. Based on the drivers I'm familiar with (like dwc3), you would typically add a "quirk" anyways. Felipe, Do you have some policy or preference on this? Regards, John ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform 2016-08-25 18:23 ` John Youn @ 2016-08-29 7:51 ` Felipe Balbi 2016-08-29 18:24 ` John Youn 0 siblings, 1 reply; 25+ messages in thread From: Felipe Balbi @ 2016-08-29 7:51 UTC (permalink / raw) To: John Youn, Randy Li, John Youn, Randy Li, linux-usb Cc: mark.rutland, devicetree, heiko, gregkh, linux-kernel, linux-rockchip, robh+dt, eddie.cai, kishon [-- Attachment #1: Type: text/plain, Size: 1146 bytes --] Hi, John Youn <John.Youn@synopsys.com> writes: [...] >>>> + */ >>>> + if (of_device_is_compatible(np, "rockchip,rk3288-usb")) >>>> + hsotg->phy->ops->reset(hsotg->phy); >>>> + >>> >>> You should probably check for NULL before calling the reset() >>> callback. >> Sure. >>> >>> Also, I'd rather see a generic quirk property that you set for your >>> platform. >>> >>> Something like "phy_reset_on_wakeup_quirk". >> But Rob Herring want me to implied by the SoC specific compatible >> string. I agree with him. It is certainly bug in RK3288 platform. >> It is no found no the other platform. > > Ok, I missed that before. > > Based on the drivers I'm familiar with (like dwc3), you would > typically add a "quirk" anyways. > > Felipe, > > Do you have some policy or preference on this? if it's not a dwc2-generic feature, then let's do it via compatible flag, sure. What we don't want is for things like: if (is_compatible('synopsys') || is_compatible('rockchip') || is_compatible('foobar') ... ) For that, we'd be better of adding a generic quirk flag which several can use. -- balbi [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 800 bytes --] ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform 2016-08-29 7:51 ` Felipe Balbi @ 2016-08-29 18:24 ` John Youn 0 siblings, 0 replies; 25+ messages in thread From: John Youn @ 2016-08-29 18:24 UTC (permalink / raw) To: Felipe Balbi, John Youn, Randy Li, Randy Li, linux-usb Cc: mark.rutland, devicetree, heiko, gregkh, linux-kernel, linux-rockchip, robh+dt, eddie.cai, kishon On 8/29/2016 12:51 AM, Felipe Balbi wrote: > > Hi, > > John Youn <John.Youn@synopsys.com> writes: > > [...] > >>>>> + */ >>>>> + if (of_device_is_compatible(np, "rockchip,rk3288-usb")) >>>>> + hsotg->phy->ops->reset(hsotg->phy); >>>>> + >>>> >>>> You should probably check for NULL before calling the reset() >>>> callback. >>> Sure. >>>> >>>> Also, I'd rather see a generic quirk property that you set for your >>>> platform. >>>> >>>> Something like "phy_reset_on_wakeup_quirk". >>> But Rob Herring want me to implied by the SoC specific compatible >>> string. I agree with him. It is certainly bug in RK3288 platform. >>> It is no found no the other platform. >> >> Ok, I missed that before. >> >> Based on the drivers I'm familiar with (like dwc3), you would >> typically add a "quirk" anyways. >> >> Felipe, >> >> Do you have some policy or preference on this? > > if it's not a dwc2-generic feature, then let's do it via compatible > flag, sure. What we don't want is for things like: > > if (is_compatible('synopsys') || is_compatible('rockchip') || > is_compatible('foobar') ... ) > > For that, we'd be better of adding a generic quirk flag which several > can use. > Alright sounds reasonable. Randy, could you respin with the other feedback? There's no need to add a quirk. Regards, John ^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset 2016-08-20 20:32 ` [PATCH 0/4 v4] usb: dwc2: fix the usb host for host port at RK32 Randy Li ` (2 preceding siblings ...) 2016-08-20 20:32 ` [PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform Randy Li @ 2016-08-20 20:32 ` Randy Li 3 siblings, 0 replies; 25+ messages in thread From: Randy Li @ 2016-08-20 20:32 UTC (permalink / raw) To: linux-usb Cc: johnyoun, gregkh, robh+dt, mark.rutland, devicetree, eddie.cai, randy.li, kishon, linux-kernel, heiko, Randy Li The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288 has a hardware errata that causes everything to get confused when we get a remote wakeup. We'll use the reset that's in the CRU to reset the port when it's in a bad state. Note that we add the reset to both dwc2 controllers even though only one has the errata in case we find some other use for this reset that's unrelated to the current hardware errata. Only the host port gets the quirk property, though. This patch came from Doug Anderson <dianders@chromium.org> originally. Signed-off-by: Randy Li <ayaka@soulik.info> --- arch/arm/boot/dts/rk3288.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 48ca4e4..646f49d 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -855,6 +855,8 @@ clocks = <&cru SCLK_OTGPHY0>; clock-names = "phyclk"; #clock-cells = <0>; + resets = <&cru SRST_USBOTG_PHY>; + reset-names = "phy-reset"; }; usbphy1: usb-phy@334 { @@ -871,6 +873,9 @@ clocks = <&cru SCLK_OTGPHY2>; clock-names = "phyclk"; #clock-cells = <0>; + resets = <&cru SRST_USBHOST1_PHY>; + reset-names = "phy-reset"; + }; }; }; -- 2.7.4 ^ permalink raw reply related [flat|nested] 25+ messages in thread
end of thread, other threads:[~2016-08-29 18:24 UTC | newest] Thread overview: 25+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- [not found] <7ca3b54d-e9d8-a137-79b6-d24f0b7065c7@synopsys.com> 2016-08-20 20:32 ` [PATCH 0/4 v4] usb: dwc2: fix the usb host for host port at RK32 Randy Li 2016-08-20 20:32 ` [PATCH 1/4] phy: Add reset callback Randy Li 2016-08-20 20:32 ` [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup Randy Li 2016-08-22 11:47 ` Kishon Vijay Abraham I 2016-08-22 13:00 ` Heiko Stübner 2016-08-29 9:32 ` Kishon Vijay Abraham I 2016-08-20 20:32 ` [PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform Randy Li 2016-08-20 21:30 ` Sergei Shtylyov 2016-08-21 7:56 ` [PATCH 0/4 v5] usb: dwc2: fix the usb host for host port at RK32 Randy Li 2016-08-21 7:56 ` [PATCH 1/4] phy: Add reset callback Randy Li 2016-08-21 7:56 ` [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup Randy Li 2016-08-23 17:53 ` Rob Herring 2016-08-21 7:56 ` [PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform Randy Li 2016-08-21 7:56 ` [PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset Randy Li 2016-08-21 11:06 ` Sergei Shtylyov 2016-08-21 12:19 ` ayaka 2016-08-22 10:30 ` Sergei Shtylyov 2016-08-21 19:31 ` [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform Randy Li 2016-08-21 19:31 ` [RESEND PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset Randy Li 2016-08-23 20:46 ` [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform John Youn 2016-08-24 8:54 ` Randy Li 2016-08-25 18:23 ` John Youn 2016-08-29 7:51 ` Felipe Balbi 2016-08-29 18:24 ` John Youn 2016-08-20 20:32 ` [PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset Randy Li
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