From: Len Brown <lenb@kernel.org>
To: x86@kernel.org
Cc: linux-kernel@vger.kernel.org, Len Brown <len.brown@intel.com>
Subject: [PATCH 5/9] x86 tsc_msr: Add Airmont reference clock values
Date: Thu, 31 Mar 2016 00:13:51 -0400 [thread overview]
Message-ID: <4a62ba36cf4fb77ea35dee1f5992e0e7c48dad14.1459397558.git.len.brown@intel.com> (raw)
In-Reply-To: <1459397635-4871-1-git-send-email-lenb@kernel.org>
In-Reply-To: <6e0c25e64e0fb65a42dfc63ad5f660302e07cd87.1459397558.git.len.brown@intel.com>
From: Len Brown <len.brown@intel.com>
per the Intel 64 and IA-32 Architecture Software Developer's Manual...
Add the reference clock for Intel Atom Processors
Based on the Airmont Microarchitecture.
Reported-by: Stephane Gasparini <stephane.gasparini@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
---
arch/x86/kernel/tsc_msr.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c
index 19f2a9a..59c371e 100644
--- a/arch/x86/kernel/tsc_msr.c
+++ b/arch/x86/kernel/tsc_msr.c
@@ -13,7 +13,7 @@
#include <asm/apic.h>
#include <asm/param.h>
-#define MAX_NUM_FREQS 8
+#define MAX_NUM_FREQS 9
/*
* If MSR_PERF_STAT[31] is set, the maximum resolved bus ratio can be
@@ -40,6 +40,9 @@ static struct freq_desc freq_desc_tables[] = {
{ 6, 0x37, 1, { 83300, 100000, 133300, 116700, 80000, 0, 0, 0 } },
/* ANN - Intel Atom processor Z3500 series */
{ 6, 0x5a, 1, { 83300, 100000, 133300, 100000, 0, 0, 0, 0 } },
+ /* AMT - Intel Atom processor X7-Z8000 and X5-Z8000 series */
+ { 6, 0x4c, 1, { 83300, 100000, 133300, 116700,
+ 80000, 93300, 90000, 88900, 87500 } },
};
static int match_cpu(u8 family, u8 model)
--
2.8.0.rc4.16.g56331f8
next prev parent reply other threads:[~2016-03-31 4:14 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-31 4:13 [PATCH 0/9] x86: TSC calibration update Len Brown
2016-03-31 4:13 ` [PATCH 1/9] x86 tsc_msr: Identify Intel-specific code Len Brown
2016-03-31 4:13 ` [PATCH 2/9] x86 tsc_msr: Remove debugging messages Len Brown
2016-03-31 4:13 ` [PATCH 3/9] x86 tsc_msr: Update comments, expand definitions Len Brown
2016-03-31 4:13 ` [PATCH 4/9] x86 tsc_msr: Correct Silvermont reference clock values Len Brown
2016-03-31 4:13 ` Len Brown [this message]
2016-03-31 4:13 ` [PATCH 6/9] x86 tsc_msr: Extend to include Intel Core Architecture Len Brown
2016-03-31 4:13 ` [PATCH 7/9] x86 tsc_msr: Remove irqoff around MSR-based TSC enumeration Len Brown
2016-03-31 4:13 ` [PATCH 8/9] x86 tsc: enumerate SKL cpu_khz and tsc_khz via CPUID Len Brown
2016-03-31 4:13 ` [PATCH 9/9] x86 tsc: enumerate BXT " Len Brown
2016-06-10 13:20 ` [PATCH 0/9] x86: TSC calibration update Thomas Gleixner
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