From: Len Brown <lenb@kernel.org>
To: x86@kernel.org
Cc: linux-kernel@vger.kernel.org, Len Brown <len.brown@intel.com>
Subject: [PATCH 1/9] x86 tsc_msr: Identify Intel-specific code
Date: Thu, 31 Mar 2016 00:13:47 -0400 [thread overview]
Message-ID: <6e0c25e64e0fb65a42dfc63ad5f660302e07cd87.1459397558.git.len.brown@intel.com> (raw)
In-Reply-To: <1459397635-4871-1-git-send-email-lenb@kernel.org>
From: Len Brown <len.brown@intel.com>
try_msr_calibrate_tsc() is currently Intel-specific,
and should not execute on any other vendor's parts.
Signed-off-by: Len Brown <len.brown@intel.com>
---
arch/x86/kernel/tsc_msr.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c
index 92ae6ac..c16e35b 100644
--- a/arch/x86/kernel/tsc_msr.c
+++ b/arch/x86/kernel/tsc_msr.c
@@ -86,6 +86,9 @@ unsigned long try_msr_calibrate_tsc(void)
unsigned long res;
int cpu_index;
+ if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
+ return 0;
+
cpu_index = match_cpu(boot_cpu_data.x86, boot_cpu_data.x86_model);
if (cpu_index < 0)
return 0;
--
2.8.0.rc4.16.g56331f8
next prev parent reply other threads:[~2016-03-31 4:16 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-31 4:13 [PATCH 0/9] x86: TSC calibration update Len Brown
2016-03-31 4:13 ` Len Brown [this message]
2016-03-31 4:13 ` [PATCH 2/9] x86 tsc_msr: Remove debugging messages Len Brown
2016-03-31 4:13 ` [PATCH 3/9] x86 tsc_msr: Update comments, expand definitions Len Brown
2016-03-31 4:13 ` [PATCH 4/9] x86 tsc_msr: Correct Silvermont reference clock values Len Brown
2016-03-31 4:13 ` [PATCH 5/9] x86 tsc_msr: Add Airmont " Len Brown
2016-03-31 4:13 ` [PATCH 6/9] x86 tsc_msr: Extend to include Intel Core Architecture Len Brown
2016-03-31 4:13 ` [PATCH 7/9] x86 tsc_msr: Remove irqoff around MSR-based TSC enumeration Len Brown
2016-03-31 4:13 ` [PATCH 8/9] x86 tsc: enumerate SKL cpu_khz and tsc_khz via CPUID Len Brown
2016-03-31 4:13 ` [PATCH 9/9] x86 tsc: enumerate BXT " Len Brown
2016-06-10 13:20 ` [PATCH 0/9] x86: TSC calibration update Thomas Gleixner
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