From: Mathias Nyman <mathias.nyman@linux.intel.com>
To: Kai-Heng Feng <kai.heng.feng@canonical.com>
Cc: Mathias Nyman <mathias.nyman@intel.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Alan Stern <stern@rowland.harvard.edu>,
AceLan Kao <acelan.kao@canonical.com>,
USB list <linux-usb@vger.kernel.org>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/3] xhci: Ensure link state is U3 after setting USB_SS_PORT_LS_U3
Date: Tue, 14 Jan 2020 17:07:39 +0200 [thread overview]
Message-ID: <7719f382-e36d-7d31-024c-459ca0fcd91b@linux.intel.com> (raw)
In-Reply-To: <CAAd53p5a2RFpZuHGvuNO_9kgv4dGhHCYU0jeq44FtKJv0Ky8uA@mail.gmail.com>
On 13.1.2020 11.10, Kai-Heng Feng wrote:
> On Fri, Jan 10, 2020 at 5:33 PM Mathias Nyman
> <mathias.nyman@linux.intel.com> wrote:
>>> @@ -1316,9 +1317,17 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
>>> msleep(20); /* wait device to enter */
>>> spin_lock_irqsave(&xhci->lock, flags);
>>>
>>> - temp = readl(ports[wIndex]->addr);
>>> - if (link_state == USB_SS_PORT_LS_U3)
>>> + if (link_state == USB_SS_PORT_LS_U3) {
>>> + retval = xhci_handshake(ports[wIndex]->addr, PORT_PLS_MASK, XDEV_U3, 80 * 1000);
>>> + if (retval)
>>> + xhci_dbg(xhci, "polling XDEV_U3 on port %d-%d timeout\n", hcd->self.busnum, wIndex + 1);
>>
>> In worst case we are busylooping for 80ms here, keeping the cpu busy.
>> It should be ok to sleep here, so how about just reading the register
>> every 10ms max 10 times, sleeping in between.
>
> Ok. Is the polling safe outside of spin_lock_irqsave()?
>
Should be, we only read one 32 bit register, and we anyway used to release
and re-acquire the lock right before this anyway.
-Mathias
prev parent reply other threads:[~2020-01-14 15:05 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-03 8:40 [PATCH 1/3] xhci: Ensure link state is U3 after setting USB_SS_PORT_LS_U3 Kai-Heng Feng
2020-01-03 8:40 ` [PATCH 2/3] xhci: Wait until link state trainsits to U0 after setting USB_SS_PORT_LS_U0 Kai-Heng Feng
2020-01-10 15:29 ` Mathias Nyman
2020-01-13 9:18 ` Kai-Heng Feng
2020-01-14 14:48 ` Mathias Nyman
2020-01-03 8:40 ` [PATCH 3/3] USB: Disable LPM on WD19's Realtek Hub during setting its ports to U0 Kai-Heng Feng
2020-01-03 15:21 ` Alan Stern
2020-01-03 16:25 ` Kai-Heng Feng
2020-01-03 16:54 ` Alan Stern
2020-01-04 6:41 ` Kai-Heng Feng
2020-01-04 16:20 ` Alan Stern
2020-01-06 6:19 ` Kai-Heng Feng
2020-01-06 15:08 ` Alan Stern
2020-01-10 7:35 ` Kai-Heng Feng
2020-01-10 8:02 ` [PATCH v2 3/3] USB: Disable LPM on WD19's Realtek Hub Kai-Heng Feng
2020-01-10 15:40 ` Alan Stern
2020-01-10 15:51 ` Kai-Heng Feng
2020-01-10 16:36 ` Alan Stern
2020-01-10 16:46 ` Kai-Heng Feng
2020-01-11 19:23 ` Greg KH
2020-01-13 9:06 ` Kai-Heng Feng
2020-01-10 9:34 ` [PATCH 1/3] xhci: Ensure link state is U3 after setting USB_SS_PORT_LS_U3 Mathias Nyman
2020-01-13 9:10 ` Kai-Heng Feng
2020-01-14 15:07 ` Mathias Nyman [this message]
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