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From: Samuel Holland <samuel@sholland.org>
To: Conor.Dooley@microchip.com
Cc: wens@csie.org, jernej.skrabec@gmail.com,
	linux-sunxi@lists.linux.dev, palmer@dabbelt.com,
	paul.walmsley@sifive.com, aou@eecs.berkeley.edu,
	linux-riscv@lists.infradead.org, robh+dt@kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de,
	Peter Korsgaard <peter@korsgaard.com>,
	Icenowy Zheng <uwu@icenowy.me>
Subject: Re: [PATCH 07/12] riscv: dts: allwinner: Add Allwinner D1 Nezha devicetree
Date: Thu, 8 Sep 2022 23:37:42 -0500	[thread overview]
Message-ID: <8a2194bf-93bd-de4d-8d39-0cd72aabb0a9@sholland.org> (raw)
In-Reply-To: <adc4a8e2-7347-7616-99b9-59762023b2ff@microchip.com>

Hi Conor,

On 8/19/22 5:10 PM, Conor.Dooley@microchip.com wrote:
> Finally got around to giving this a go with the fix for loading
> modules which is mostly what was blocking me before..
> 
> On 15/08/2022 06:08, Samuel Holland wrote:
>> "D1 Nezha" is Allwinner's first-party development board for the D1 SoC.
>> It was shipped with 512M, 1G, or 2G of DDR3. It supports onboard audio,
> 
> I am really not keen on the way you have things, with the memory
> nodes removed from the device tree. I know your preferred flow
> for booting these things might be to pass the dtb up from U-Boot,
> but I think the devicetree in the kernel should be usable in a
> standalone manner, even if that is the barest-minimum memory
> config.

That is simply not possible to guarantee. As an obvious example, consider the
MangoPi MQ-Pro board with socketed DRAM:

https://twitter.com/mangopi_sbc/status/1516225559214583808

But focusing on the /memory node misses the bigger picture. The DTB is passed
through _all_ of the firmware stages, and gets patched by every one of them:

 - SPL/boot0 adds the /memory node with the detected DRAM size.
   If the in-tree DTS has a "minimum memory config" (which for a
   board with socketed DRAM means the smallest possible die), I
   guarantee people will use it and complain about missing DRAM.

 - The SBI implementation reserves memory for itself and any
   possible secure partitions. Right now, booting happens to work
   without the reserved-memory node because the SBI implementation
   is loaded at the beginning of RAM, and Linux ignores RAM below
   the kernel load address.

   However, memory-constrained devices (e.g. D1s) will need to get
   those 2 MiB back by loading the kernel at the start of DRAM and
   SBI at the end of DRAM. Then the reserved-memory node becomes
   quite important.

   It also adds nodes for CPU idle states, since the available
   states and their latencies depend on the SBI implementation.

   It also reserves devices used by it or by a secure partition.
   And it is responsible for extracting data (e.g. MAC addresses)
   from "secure" eFuses which the OS may not have access to.

 - U-Boot adds other information, like boot arguments, the address
   of the initramfs and framebuffer, etc. These are less of a
   concern because of course U-Boot can patch these in to a DTB
   loaded from disk, but they are relevant if you want to load a
   DTB from a later bootloader like GRUB.

If you load a DTB from disk, you lose all of the changes made by the earlier
firmware stages. On ARM, U-Boot tries to work around this by copying a few
specific bits of information from the firmware DTB to the DTB loaded from disk.
But this misses the point that the SBI implementation can modify *any* part of
the DTB. (So in practice U-Boot on ARM already loses CPU idle states and
reserved memory nodes that were added by the PSCI implementation.)

As an extreme example, consider paravirtualization, where only a small subset of
DRAM and peripherals may be made available to any one OS partition.

Fundamentally, I reserve the right to make arbitrary changes to the DTB in the
SBI implementation, and thus I cannot condone using the DTBs generated from the
Linux source tree for any purpose other than validation.

Regards,
Samuel

  parent reply	other threads:[~2022-09-09  4:38 UTC|newest]

Thread overview: 79+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-15  5:08 [PATCH 00/12] riscv: Allwinner D1 platform support Samuel Holland
2022-08-15  5:08 ` [PATCH 01/12] MAINTAINERS: Match the sun20i family of Allwinner SoCs Samuel Holland
2022-08-15 17:06   ` Heiko Stübner
2022-08-15  5:08 ` [PATCH 02/12] dt-bindings: riscv: Add T-HEAD C906 and C910 compatibles Samuel Holland
2022-08-15 17:07   ` Heiko Stübner
2022-08-16 17:34   ` Rob Herring
2022-11-04  2:57   ` Icenowy Zheng
2022-11-20 11:23     ` Conor Dooley
2022-11-20 11:25       ` Conor Dooley
2022-08-15  5:08 ` [PATCH 03/12] dt-bindings: vendor-prefixes: Add Allwinner D1 board vendors Samuel Holland
2022-08-15 17:12   ` Heiko Stübner
2022-08-16 17:34   ` Rob Herring
2022-08-15  5:08 ` [PATCH 04/12] dt-bindings: riscv: Add Allwinner D1 board compatibles Samuel Holland
2022-08-16  7:39   ` Krzysztof Kozlowski
2022-08-16  9:02     ` Heiko Stübner
2022-08-16  9:12   ` Heiko Stübner
2022-08-16 17:35   ` Rob Herring
2022-08-15  5:08 ` [PATCH 05/12] riscv: Add the Allwinner SoC family Kconfig option Samuel Holland
2022-08-15 16:56   ` Conor.Dooley
2022-08-16  9:17     ` Heiko Stübner
2022-08-16  9:23       ` Conor.Dooley
2022-08-15 17:13   ` Heiko Stübner
2022-08-15  5:08 ` [PATCH 06/12] riscv: dts: allwinner: Add the D1 SoC base devicetree Samuel Holland
2022-08-15 13:11   ` Andre Przywara
2022-08-15 17:01     ` Conor.Dooley
2022-08-20 17:24       ` Samuel Holland
2022-08-20 17:29         ` Conor.Dooley
2022-08-21  6:45           ` Icenowy Zheng
2022-08-21 10:04             ` Conor.Dooley
2022-08-22 11:46               ` Geert Uytterhoeven
2022-08-22 12:13                 ` Conor.Dooley
2022-08-22 12:29                   ` Andre Przywara
2022-08-22 12:31                   ` Geert Uytterhoeven
2022-08-22 13:56                     ` Conor.Dooley
2022-08-22 15:29                       ` Jessica Clarke
2022-09-09  3:42                         ` Samuel Holland
2022-09-09  7:10                           ` Geert Uytterhoeven
2022-09-21  7:49                             ` Geert Uytterhoeven
2022-08-22 10:50         ` Andre Przywara
2022-08-16  7:41   ` Krzysztof Kozlowski
2022-08-16  7:49     ` Jernej Škrabec
2022-08-16  9:12       ` Heiko Stübner
2022-08-16  9:25         ` Jernej Škrabec
2022-08-16  9:42           ` Krzysztof Kozlowski
2022-08-16 11:00             ` Andre Przywara
2022-08-16 11:11               ` Krzysztof Kozlowski
2022-08-16 11:12                 ` Krzysztof Kozlowski
2022-08-16 11:34                   ` Conor.Dooley
2022-08-22 11:40           ` Geert Uytterhoeven
2022-08-16  9:11   ` Heiko Stübner
2022-08-17  8:29   ` Krzysztof Kozlowski
2022-08-19 22:19   ` Conor.Dooley
2022-08-15  5:08 ` [PATCH 07/12] riscv: dts: allwinner: Add Allwinner D1 Nezha devicetree Samuel Holland
2022-08-15 17:37   ` Conor.Dooley
2022-08-15 18:34     ` Conor.Dooley
2022-08-16  8:55   ` Heiko Stübner
2022-08-19 22:10   ` Conor.Dooley
2022-08-21  7:06     ` Icenowy Zheng
2022-09-04 20:10     ` Peter Korsgaard
2022-09-09  4:37     ` Samuel Holland [this message]
2022-09-09  7:18       ` Conor.Dooley
2022-09-09  8:11         ` Heiko Stübner
2022-09-09 19:04           ` Jessica Clarke
2022-09-03 15:21   ` Peter Korsgaard
2022-08-15  5:08 ` [PATCH 08/12] riscv: dts: allwinner: Add Sipeed Lichee RV devicetrees Samuel Holland
2022-08-15  5:08 ` [PATCH 09/12] riscv: dts: allwinner: Add MangoPi MQ Pro devicetree Samuel Holland
2022-08-15  5:08 ` [PATCH 10/12] riscv: dts: allwinner: Add Dongshan Nezha STU devicetree Samuel Holland
2022-08-15  5:08 ` [PATCH 11/12] riscv: dts: allwinner: Add ClockworkPi and DevTerm devicetrees Samuel Holland
2022-08-15  5:08 ` [PATCH 12/12] riscv: defconfig: Enable the Allwinner D1 platform and drivers Samuel Holland
2022-08-15  7:05 ` [PATCH 00/12] riscv: Allwinner D1 platform support Conor.Dooley
2022-08-15 17:12   ` Conor.Dooley
2022-08-16  2:42     ` Samuel Holland
2022-08-16  6:38       ` Conor.Dooley
2022-09-01 18:10 ` Palmer Dabbelt
2022-09-02  5:42   ` Conor.Dooley
2022-09-06 20:29   ` Jernej Škrabec
2022-09-07 20:43     ` Conor.Dooley
2022-09-08  7:00       ` Geert Uytterhoeven
2022-09-08  9:04         ` Arnd Bergmann

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