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From: Andy Lutomirski <luto@kernel.org>
To: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>,
	Dave Hansen <dave.hansen@intel.com>, X86 ML <x86@kernel.org>,
	Borislav Petkov <bpetkov@suse.de>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Brian Gerst <brgerst@gmail.com>
Subject: Re: [RFC 6/7] x86/asm: Remap the TSS into the cpu entry area
Date: Mon, 13 Nov 2017 18:30:07 -0800	[thread overview]
Message-ID: <CALCETrWozKE0nHWiyF_V4UU7hr_TWS2AFLbOJ15ZZqQYhCG8NA@mail.gmail.com> (raw)
In-Reply-To: <CA+55aFy1oxA-vMyvh7Z+vt3paj-XHkYbc8qU2vSFxOiATmrMjA@mail.gmail.com>

On Mon, Nov 13, 2017 at 6:28 PM, Linus Torvalds
<torvalds@linux-foundation.org> wrote:
> On Mon, Nov 13, 2017 at 6:25 PM, Andy Lutomirski <luto@kernel.org> wrote:
>> On Mon, Nov 13, 2017 at 11:36 AM, Linus Torvalds
>> <torvalds@linux-foundation.org> wrote:
>>>
>>> I forget what the actual size is, but aligning the hardware TSS struct
>>> to 128 bytes might be sufficient. It's not that big.
>>
>> 104 bytes, so it's probably already fine.  For anything except an
>> actual task switch, only the first 12 or so bytes matter.
>
> Note that historically, about half of the Intel errata (that don't get
> fixed) are about TSS in oddball situations, mainly page crossers.
>
> I may be exaggerating just a tiny bit, but it's definitely a "don't do it".

:)

I suspect the major case where this matters is when we do a task
switch, which only ever happens on 32-bit double faults, at which
point we're already seriously screwed.  But yes, I agree.

  reply	other threads:[~2017-11-14  2:30 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-11  4:05 [RFC 0/7] Prep code for better stack switching Andy Lutomirski
2017-11-11  4:05 ` [RFC 1/7] x86/asm/64: Allocate and enable the SYSENTER stack Andy Lutomirski
2017-11-13 19:07   ` Dave Hansen
2017-11-14  2:17     ` Andy Lutomirski
2017-11-14  7:15       ` Ingo Molnar
2017-11-11  4:05 ` [RFC 2/7] x86/gdt: Put per-cpu GDT remaps in ascending order Andy Lutomirski
2017-11-11  4:05 ` [RFC 3/7] x86/fixmap: Generalize the GDT fixmap mechanism Andy Lutomirski
2017-11-11  4:05 ` [RFC 4/7] x86/asm: Fix assumptions that the HW TSS is at the beginning of cpu_tss Andy Lutomirski
2017-11-13 17:01   ` Dave Hansen
2017-11-26 13:48     ` [PATCH v2] x86/entry: " Ingo Molnar
2017-11-26 15:41       ` Andy Lutomirski
2017-11-26 15:58         ` Ingo Molnar
2017-11-26 16:00           ` Ingo Molnar
2017-11-26 16:05             ` Andy Lutomirski
2017-11-26 16:43               ` Ingo Molnar
2017-11-11  4:05 ` [RFC 5/7] x86/asm: Rearrange struct cpu_tss to enlarge SYSENTER_stack and fix alignment Andy Lutomirski
2017-11-11  4:11   ` Andy Lutomirski
2017-11-13 19:19   ` Dave Hansen
2017-11-11  4:05 ` [RFC 6/7] x86/asm: Remap the TSS into the cpu entry area Andy Lutomirski
2017-11-13 19:22   ` Dave Hansen
2017-11-13 19:36     ` Linus Torvalds
2017-11-14  2:25       ` Andy Lutomirski
2017-11-14  2:28         ` Linus Torvalds
2017-11-14  2:30           ` Andy Lutomirski [this message]
2017-11-14  2:27     ` Andy Lutomirski
2017-11-11  4:05 ` [RFC 7/7] x86/unwind/64: Add support for the SYSENTER stack Andy Lutomirski
2017-11-13 22:46   ` Josh Poimboeuf
2017-11-14  2:13     ` Andy Lutomirski
2017-11-11 10:58 ` [RFC 0/7] Prep code for better stack switching Borislav Petkov
2017-11-12  2:59   ` Andy Lutomirski
2017-11-12  4:25     ` Andy Lutomirski
2017-11-13  4:37       ` Andy Lutomirski

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