RE: [PATCH] 2.6 workaround for Athlon/Opteron prefetch errata

[Bill Davidsen <davidsen@tmr.com>]

On Mon, 15 Sep 2003 richard.brunner@amd.com wrote:

> I think Alan brought up a very good point. Even if you
> use a generic kernel that avoids prefetch use on Athlon
> (which I am opposed to), it doesn't solve the problem
> of user space programs detecting that the ISA supports
> prefetch and using prefetch instructions and hitting the
> errata on Athlon.
> 
> The user space problem worries me more, because the expectation
> is that if CPUID says the program can use perfetch, it could
> and should regardless of what the kernel decided to do here.
> 
> Andi's patch solves both the kernel space and the user space
> issues in a pretty small footprint.

Clearly AMD would like to avoid having PIV and Athlon optimized kernels,
and to default to adding unnecessary size to the PIV kernel to support
errata in the Athlon. But fighting against having a config which produces
a smaller and faster kernel for all non-Athlon users and all embedded or
otherwise size limited users seems to be just a marketing thing so P4 code
will seem to work correctly on Athlon.

Vendors will build a kernel which runs as well as possible on as many CPUs
as possible, but users who build their own kernel want to build a kernel
for a particular config in most cases and should have the option. There
should be a "support Athlon prefetch" option as well, which turns on
the fix only when it's needed, just as there is for P4 thermal throttling,
F.P. emulation, etc. Why shouldn't this be treated the same way as other
features already in the config menu?

-- 
bill davidsen <davidsen@tmr.com>
  CTO, TMR Associates, Inc
Doing interesting things with little computers since 1979.