* [PATCH v1 1/2] usb: host: ohci-sunplus: Add driver for USB HOST OHCI in Sunplus SP7021 SoC
2022-03-14 5:32 [PATCH v1 0/2] Add USB HOST OHCI driver for Sunplus SP7021 SoC Vincent Shih
@ 2022-03-14 5:32 ` Vincent Shih
2022-03-14 5:32 ` [PATCH v1 2/2] dt-bindings: usb: Add bindings doc for Sunplus USB HOST OHCI driver Vincent Shih
2022-03-23 18:07 ` [PATCH v1 0/2] Add USB HOST OHCI driver for Sunplus SP7021 SoC Rob Herring
2 siblings, 0 replies; 8+ messages in thread
From: Vincent Shih @ 2022-03-14 5:32 UTC (permalink / raw)
To: gregkh, stern, p.zabel, linux-kernel, linux-usb, robh+dt,
devicetree, wells.lu
Cc: Vincent Shih
Add driver for USB HOST OHCI in Sunplus SP7021 SoC
Signed-off-by: Vincent Shih <vincent.sunplus@gmail.com>
---
MAINTAINERS | 6 ++
drivers/usb/host/Kconfig | 10 ++
drivers/usb/host/Makefile | 1 +
drivers/usb/host/ohci-sunplus.c | 202 ++++++++++++++++++++++++++++++++++++++++
4 files changed, 219 insertions(+)
create mode 100644 drivers/usb/host/ohci-sunplus.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 3b79fd4..f7a9ed7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17945,6 +17945,12 @@ L: netdev@vger.kernel.org
S: Maintained
F: drivers/net/ethernet/dlink/sundance.c
+SUNPLUS USB OHCI DRIVER
+M: Vincent Shih <vincent.sunplus@gmail.com>
+L: linux-usb@vger.kernel.org
+S: Maintained
+F: drivers/usb/host/ohci-sunplus.c
+
SUPERH
M: Yoshinori Sato <ysato@users.sourceforge.jp>
M: Rich Felker <dalias@libc.org>
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index c4736d1..d0670fe 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -500,6 +500,16 @@ config USB_OHCI_HCD_DAVINCI
controller. This driver cannot currently be a loadable
module because it lacks a proper PHY abstraction.
+config USB_OHCI_HCD_SUNPLUS
+ tristate "OHCI support for Sunplus SP7021"
+ depends on SOC_SP7021
+ help
+ Enables support for the on-chip OHCI controller in Sunplus
+ SoCs. It supports 32-bit AHB/AXI config bus and 64-bit AXI
+ data bus.
+ This driver can also be built as a module. If so, the module
+ will be called ohci-sunplus.
+
config USB_OHCI_HCD_PPC_OF_BE
bool "OHCI support for OF platform bus (big endian)"
depends on PPC
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 171de4d..67f44c9 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -63,6 +63,7 @@ obj-$(CONFIG_USB_OHCI_HCD_S3C2410) += ohci-s3c2410.o
obj-$(CONFIG_USB_OHCI_HCD_LPC32XX) += ohci-nxp.o
obj-$(CONFIG_USB_OHCI_HCD_PXA27X) += ohci-pxa27x.o
obj-$(CONFIG_USB_OHCI_HCD_DAVINCI) += ohci-da8xx.o
+obj-$(CONFIG_USB_OHCI_HCD_SUNPLUS)+= ohci-sunplus.o
obj-$(CONFIG_USB_UHCI_HCD) += uhci-hcd.o
obj-$(CONFIG_USB_FHCI_HCD) += fhci.o
diff --git a/drivers/usb/host/ohci-sunplus.c b/drivers/usb/host/ohci-sunplus.c
new file mode 100644
index 0000000..46a28ce
--- /dev/null
+++ b/drivers/usb/host/ohci-sunplus.c
@@ -0,0 +1,202 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/*
+ * The USB HOST OHCI driver for Sunplus SP7021
+ *
+ * Copyright (C) 2021 Sunplus Technology Inc., All rights reserved.
+ */
+
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/reset.h>
+#include <linux/usb/ohci_pdriver.h>
+#include <linux/usb.h>
+#include <linux/usb/hcd.h>
+
+#include "ohci.h"
+
+#define hcd_to_sp_ohci_priv(h) \
+ ((struct sp_ohci_priv *)hcd_to_ohci(h)->priv)
+
+struct sp_ohci_priv {
+ struct clk *ohci_clk;
+ struct reset_control *ohci_rstc;
+};
+
+static struct hc_driver __read_mostly ohci_sunplus_driver;
+
+static const struct ohci_driver_overrides ohci_sunplus_overrides __initconst = {
+ .extra_priv_size = sizeof(struct sp_ohci_priv),
+};
+
+static int ohci_sunplus_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct sp_ohci_priv *sp_priv;
+ struct resource *res_mem;
+ struct usb_hcd *hcd;
+ int irq;
+ int ret;
+
+ if (usb_disabled())
+ return -ENODEV;
+
+ hcd = usb_create_hcd(&ohci_sunplus_driver, dev, dev_name(&pdev->dev));
+ if (!hcd)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, hcd);
+ sp_priv = hcd_to_sp_ohci_priv(hcd);
+
+ res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ hcd->regs = devm_ioremap_resource(dev, res_mem);
+ if (IS_ERR(hcd->regs)) {
+ ret = PTR_ERR(hcd->regs);
+ goto err_put_hcd;
+ }
+
+ hcd->rsrc_start = res_mem->start;
+ hcd->rsrc_len = resource_size(res_mem);
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+ pr_err("no irq provieded\n");
+ ret = irq;
+ goto err_put_hcd;
+ }
+
+ sp_priv->ohci_clk = devm_clk_get(dev, NULL);
+ if (IS_ERR(sp_priv->ohci_clk)) {
+ pr_err("not found clk source\n");
+ ret = PTR_ERR(sp_priv->ohci_clk);
+ goto err_put_hcd;
+ }
+
+ sp_priv->ohci_rstc = devm_reset_control_get_exclusive(dev, NULL);
+ if (IS_ERR(sp_priv->ohci_rstc)) {
+ ret = PTR_ERR(sp_priv->ohci_rstc);
+ goto err_put_hcd;
+ }
+
+ ret = clk_prepare_enable(sp_priv->ohci_clk);
+ if (ret)
+ goto err_clk;
+
+ ret = reset_control_deassert(sp_priv->ohci_rstc);
+ if (ret)
+ goto err_reset;
+
+ ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
+ if (ret)
+ goto err_reset;
+
+ dev_dbg(dev, "hcd_irq:%d,%d\n", hcd->irq, irq);
+
+ return ret;
+
+err_reset:
+ reset_control_assert(sp_priv->ohci_rstc);
+err_clk:
+ clk_disable_unprepare(sp_priv->ohci_clk);
+err_put_hcd:
+ usb_put_hcd(hcd);
+
+ return ret;
+}
+
+static int ohci_sunplus_remove(struct platform_device *pdev)
+{
+ struct usb_hcd *hcd = platform_get_drvdata(pdev);
+ struct sp_ohci_priv *sp_priv = hcd_to_sp_ohci_priv(hcd);
+
+ usb_remove_hcd(hcd);
+ usb_put_hcd(hcd);
+ platform_set_drvdata(pdev, NULL);
+
+ reset_control_assert(sp_priv->ohci_rstc);
+ clk_disable_unprepare(sp_priv->ohci_clk);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int ohci_sunplus_drv_suspend(struct device *pdev)
+{
+ struct usb_hcd *hcd = dev_get_drvdata(pdev);
+ struct sp_ohci_priv *sp_priv = hcd_to_sp_ohci_priv(hcd);
+ bool do_wakeup = device_may_wakeup(pdev);
+ int rc;
+
+ rc = ohci_suspend(hcd, do_wakeup);
+ if (rc)
+ return rc;
+
+ reset_control_assert(sp_priv->ohci_rstc);
+ clk_disable_unprepare(sp_priv->ohci_clk);
+
+ return 0;
+}
+
+static int ohci_sunplus_drv_resume(struct device *pdev)
+{
+ struct usb_hcd *hcd = dev_get_drvdata(pdev);
+ struct sp_ohci_priv *sp_priv = hcd_to_sp_ohci_priv(hcd);
+
+ clk_prepare_enable(sp_priv->ohci_clk);
+ reset_control_deassert(sp_priv->ohci_rstc);
+
+ ohci_resume(hcd, false);
+
+ return 0;
+}
+
+struct dev_pm_ops const ohci_sunplus_pm_ops = {
+ .suspend = ohci_sunplus_drv_suspend,
+ .resume = ohci_sunplus_drv_resume,
+};
+#endif
+
+static const struct of_device_id ohci_sunplus_dt_ids[] = {
+ { .compatible = "sunplus,sp7021-usb-ohci" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, ohci_sunplus_dt_ids);
+
+static struct platform_driver ohci_hcd_sunplus_driver = {
+ .probe = ohci_sunplus_probe,
+ .remove = ohci_sunplus_remove,
+ .shutdown = usb_hcd_platform_shutdown,
+ .driver = {
+ .name = "ohci-sunplus",
+ .of_match_table = ohci_sunplus_dt_ids,
+#ifdef CONFIG_PM
+ .pm = &ohci_sunplus_pm_ops,
+#endif
+ }
+};
+
+static int __init ohci_sunplus_init(void)
+{
+ if (usb_disabled())
+ return -ENODEV;
+
+ ohci_init_driver(&ohci_sunplus_driver, &ohci_sunplus_overrides);
+
+ return platform_driver_register(&ohci_hcd_sunplus_driver);
+}
+module_init(ohci_sunplus_init);
+
+static void __exit ohci_sunplus_cleanup(void)
+{
+ platform_driver_unregister(&ohci_hcd_sunplus_driver);
+}
+module_exit(ohci_sunplus_cleanup);
+
+MODULE_AUTHOR("Vincent Shih <vincent.sunplus@gmail.com>");
+MODULE_DESCRIPTION("Sunplus USB OHCI driver");
+MODULE_LICENSE("GPL");
+
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v1 2/2] dt-bindings: usb: Add bindings doc for Sunplus USB HOST OHCI driver
2022-03-14 5:32 [PATCH v1 0/2] Add USB HOST OHCI driver for Sunplus SP7021 SoC Vincent Shih
2022-03-14 5:32 ` [PATCH v1 1/2] usb: host: ohci-sunplus: Add driver for USB HOST OHCI in " Vincent Shih
@ 2022-03-14 5:32 ` Vincent Shih
2022-03-14 16:42 ` Krzysztof Kozlowski
2022-03-23 18:07 ` [PATCH v1 0/2] Add USB HOST OHCI driver for Sunplus SP7021 SoC Rob Herring
2 siblings, 1 reply; 8+ messages in thread
From: Vincent Shih @ 2022-03-14 5:32 UTC (permalink / raw)
To: gregkh, stern, p.zabel, linux-kernel, linux-usb, robh+dt,
devicetree, wells.lu
Cc: Vincent Shih
Add bindings doc for Sunplus USB HOST OHCI driver
Signed-off-by: Vincent Shih <vincent.sunplus@gmail.com>
---
.../bindings/usb/sunplus,sp7021-usb-ohci.yaml | 69 ++++++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 70 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/sunplus,sp7021-usb-ohci.yaml
diff --git a/Documentation/devicetree/bindings/usb/sunplus,sp7021-usb-ohci.yaml b/Documentation/devicetree/bindings/usb/sunplus,sp7021-usb-ohci.yaml
new file mode 100644
index 0000000..7583b68
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/sunplus,sp7021-usb-ohci.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) Sunplus Co., Ltd. 2021
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/sunplus,sp7021-usb-ohci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sunplus SP7021 OHCI Controller Device Tree Bindings
+
+allOf:
+ - $ref: usb-hcd.yaml#
+
+maintainers:
+ - Vincent Shih <vincent.sunplus@gmail.com>
+
+description:
+ Sunplus SP7021 USB HOST IP is a USB2.0 Host Controller. It supports both
+ Enhanced Host Controller Interface (EHCI) and Open Host Controller Interface
+ (OHCI).
+
+ It supports 32-bits address bus and 64bit data bus interface, compliant
+ to AMBA AXI interface for data transfer.
+
+ It supports 32-bits address and data bus interface, compliant to AMBA
+ AHB interface for register configurations.
+
+ It supports 32-bits address and data bus interface, compliant to AMBA
+ AXI interface for register alternative configurations.
+
+ The UTM Interface block generates PHY control signals, compliant to
+ USB2.0 Transceiver Macrocell Interface Specification Revision 1.0.
+
+properties:
+ compatible:
+ const: sunplus,sp7021-usb-ohci
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - resets
+ - interrupts
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ sp_ohci0: usb@9c102080 {
+ compatible = "sunplus,sp7021-usb-ohci";
+ reg = <0x9c102080 0x68>;
+ clocks = <&clkc 0x3a>;
+ resets = <&rstc 0x2a>;
+ interrupt-parent = <&intc>;
+ interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index f7a9ed7..4c80c39 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17949,6 +17949,7 @@ SUNPLUS USB OHCI DRIVER
M: Vincent Shih <vincent.sunplus@gmail.com>
L: linux-usb@vger.kernel.org
S: Maintained
+F: Documentation/devicetree/bindings/usb/sunplus,sp7021-usb-ohci.yaml
F: drivers/usb/host/ohci-sunplus.c
SUPERH
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v1 0/2] Add USB HOST OHCI driver for Sunplus SP7021 SoC
2022-03-14 5:32 [PATCH v1 0/2] Add USB HOST OHCI driver for Sunplus SP7021 SoC Vincent Shih
2022-03-14 5:32 ` [PATCH v1 1/2] usb: host: ohci-sunplus: Add driver for USB HOST OHCI in " Vincent Shih
2022-03-14 5:32 ` [PATCH v1 2/2] dt-bindings: usb: Add bindings doc for Sunplus USB HOST OHCI driver Vincent Shih
@ 2022-03-23 18:07 ` Rob Herring
2022-03-24 10:48 ` 施錕鴻
2 siblings, 1 reply; 8+ messages in thread
From: Rob Herring @ 2022-03-23 18:07 UTC (permalink / raw)
To: Vincent Shih
Cc: gregkh, stern, p.zabel, linux-kernel, linux-usb, devicetree, wells.lu
On Mon, Mar 14, 2022 at 01:32:02PM +0800, Vincent Shih wrote:
> This is a patch series for USB HOST OHCI driver for Sunplus SP7021 SoC.
>
> Sunplus SP7021 is an ARM Cortex A7 (4 cores) based SoC. It integrates
> many peripherals (ex: UART, I2C, SPI, SDIO, eMMC, USB, SD Card and
> etc.) into a single chip. It is designed for industrial control.
Looks to me like the generic-ohci binding and driver should work for
this?
Rob
^ permalink raw reply [flat|nested] 8+ messages in thread