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From: Thomas Gleixner <tglx@linutronix.de>
To: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Christoph Hellwig <hch@lst.de>,
	marc.zyngier@arm.com, jason@lakedaemon.net, robh+dt@kernel.org,
	mark.rutland@arm.com, devicetree@vger.kernel.org,
	aou@eecs.berkeley.edu, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, shorne@gmail.com
Subject: Re: [PATCH 3/6] irqchip: RISC-V Local Interrupt Controller Driver
Date: Sat, 4 Aug 2018 18:40:26 +0200 (CEST)	[thread overview]
Message-ID: <alpine.DEB.2.21.1808041837130.1658@nanos.tec.linutronix.de> (raw)
In-Reply-To: <mhng-f79111da-51d4-483e-86ce-ff0a41c3b5bc@palmer-si-x1c4>

On Fri, 3 Aug 2018, Palmer Dabbelt wrote:
> On Wed, 01 Aug 2018 11:55:06 PDT (-0700), tglx@linutronix.de wrote:
> > Is there some high level documentation about the design (or the lack of) or
> > can someone give a concise explanation how this stuff is supposed to work?
> As part of our original push to upstream the arch code it was suggested that
> we move this out to an irqchip driver, but after actually attempting to do
> that it appears that the mechanics of doing so have overshadowed the
> complexity of the actual interrupt handling code, which is only a dozen or so
> instructions.  In retrospect this is just another instance of me not knowing
> what I'm doing, sorry!
> 
> I like Christoph's approach of merging the ISA-mandated interrupt handling
> code back into arch/riscv, as it's much saner that way.  The one big headache
> is that because we special-cased timer interrupts in the ISA they now
> disappear from the standard Linux mechanisms for handling these.
> 
> That said, I'd rather have this warts and all then wait around for something
> perfect, as maintaining a dozen or so out of tree drivers that are tightly
> coupled to the core arch code has proven to be a mess.  If we can get the code
> upstream then everyone will be on the same page so we can work on actually
> improving this, as opposed to just spinning our wheels keeping this big mess
> alive.
> 
> Hopefully that makes some amount of sense...

Thanks for the detailed explanation. It's what I extracted from the
documents to which Christoph pointed me. And as I said in the other thread
it does not realiy make sense to force that low level mechanism into an irq
chip. That would be overkill for no real value.

Thanks,

	tglx


  reply	other threads:[~2018-08-04 16:40 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-25  9:36 RISC-V irqchip drivers Christoph Hellwig
2018-07-25  9:36 ` [PATCH 1/6] RISC-V: simplify software interrupt / IPI code Christoph Hellwig
2018-07-25 21:44   ` Palmer Dabbelt
2018-07-26  8:10     ` Christoph Hellwig
2018-07-25  9:36 ` [PATCH 2/6] RISC-V: remove INTERRUPT_CAUSE_* defines from asm/irq.h Christoph Hellwig
2018-07-25 21:44   ` Palmer Dabbelt
2018-07-25  9:36 ` [PATCH 3/6] irqchip: RISC-V Local Interrupt Controller Driver Christoph Hellwig
2018-07-25 11:18   ` Marc Zyngier
2018-07-25 11:24     ` Christoph Hellwig
2018-07-25 11:37       ` Marc Zyngier
2018-07-25 17:54         ` Atish Patra
2018-07-26  3:38       ` Anup Patel
2018-07-26  8:27         ` Christoph Hellwig
2018-07-26 13:39           ` Anup Patel
2018-08-01 18:55       ` Thomas Gleixner
2018-08-02  7:34         ` Christoph Hellwig
2018-08-02  9:35           ` Thomas Gleixner
2018-08-02  9:43             ` Christoph Hellwig
2018-08-02  9:44               ` Thomas Gleixner
2018-08-04  4:03         ` Palmer Dabbelt
2018-08-04 16:40           ` Thomas Gleixner [this message]
2018-07-25  9:36 ` [PATCH 4/6] dt-bindings: interrupt-controller: RISC-V local interrupt controller docs Christoph Hellwig
2018-07-31 22:37   ` Rob Herring
2018-08-01  7:13     ` Christoph Hellwig
2018-08-01 18:14       ` Rob Herring
2018-07-25  9:36 ` [PATCH 5/6] irqchip: New RISC-V PLIC Driver Christoph Hellwig
2018-07-25  9:36 ` [PATCH 6/6] dt-bindings: interrupt-controller: RISC-V PLIC documentation Christoph Hellwig
2018-07-31 22:46   ` Rob Herring
2018-08-01  7:16     ` Christoph Hellwig
2018-08-01 18:26       ` Rob Herring
2018-08-02  9:55         ` Christoph Hellwig
2018-08-02 14:43           ` Rob Herring
2018-08-04  1:48         ` Palmer Dabbelt
2018-07-25 21:26 ` RISC-V irqchip drivers Palmer Dabbelt

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