* [PATCH v1 1/8] dt-bindings: display: panel: mipi-dbi-spi: add shineworld lh133k compatible
@ 2023-06-07 11:55 Leonard Göhrs
2023-06-07 11:55 ` [PATCH v1 2/8] dt-bindings: display: panel: mipi-dbi-spi: add spi-3wire property Leonard Göhrs
` (8 more replies)
0 siblings, 9 replies; 26+ messages in thread
From: Leonard Göhrs @ 2023-06-07 11:55 UTC (permalink / raw)
To: Noralf Trønnes, Neil Armstrong, Sam Ravnborg, David Airlie,
Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: kernel, Leonard Göhrs, dri-devel, devicetree, linux-kernel
The Shineworld LH133K is a 1.3" 240x240px RGB LCD with a MIPI DBI
compatible SPI interface.
The initialization procedure is quite basic with the exception of
requiring inverted colors.
A basic mipi-dbi-cmd[1] script to get the display running thus looks
like this:
$ cat shineworld,lh133k.txt
command 0x11 # exit sleep mode
delay 120
# The display seems to require display color inversion, so enable it.
command 0x21 # INVON
# Enable normal display mode (in contrast to partial display mode).
command 0x13 # NORON
command 0x29 # MIPI_DCS_SET_DISPLAY_ON
$ mipi-dbi-cmd shineworld,lh133k.bin shineworld,lh133k.txt
[1]: https://github.com/notro/panel-mipi-dbi
Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
---
.../devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml | 1 +
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
2 files changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml b/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
index 9b701df5e9d28..c07da1a9e6288 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
+++ b/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
@@ -67,6 +67,7 @@ properties:
items:
- enum:
- sainsmart18
+ - shineworld,lh133k
- const: panel-mipi-dbi-spi
write-only:
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 82d39ab0231b0..b0afa421bc4a5 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -1189,6 +1189,8 @@ patternProperties:
description: SHIFT GmbH
"^shimafuji,.*":
description: Shimafuji Electric, Inc.
+ "^shineworld,.*":
+ description: ShineWorld Innovations
"^shiratech,.*":
description: Shiratech Solutions
"^si-en,.*":
base-commit: 9561de3a55bed6bdd44a12820ba81ec416e705a7
--
2.39.2
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH v1 2/8] dt-bindings: display: panel: mipi-dbi-spi: add spi-3wire property
2023-06-07 11:55 [PATCH v1 1/8] dt-bindings: display: panel: mipi-dbi-spi: add shineworld lh133k compatible Leonard Göhrs
@ 2023-06-07 11:55 ` Leonard Göhrs
2023-06-07 17:54 ` Conor Dooley
` (2 more replies)
2023-06-07 11:55 ` [PATCH v1 3/8] dt-bindings: gpio: pca9570: add gpio-line-names property Leonard Göhrs
` (7 subsequent siblings)
8 siblings, 3 replies; 26+ messages in thread
From: Leonard Göhrs @ 2023-06-07 11:55 UTC (permalink / raw)
To: Noralf Trønnes, Neil Armstrong, Sam Ravnborg, David Airlie,
Daniel Vetter
Cc: kernel, Leonard Göhrs, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, dri-devel, devicetree, linux-kernel
Some MIPI DBI panels support a three wire mode (clock, chip select,
bidirectional data) that can be used to ask the panel if it is already set
up by e.g. the bootloader and can thus skip the initialization.
This enables a flicker-free boot.
Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
---
.../devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml b/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
index c07da1a9e6288..2f0238b770eba 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
+++ b/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
@@ -87,6 +87,8 @@ properties:
Logic level supply for interface signals (Vddi).
No need to set if this is the same as power-supply.
+ spi-3wire: true
+
required:
- compatible
- reg
--
2.39.2
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH v1 3/8] dt-bindings: gpio: pca9570: add gpio-line-names property
2023-06-07 11:55 [PATCH v1 1/8] dt-bindings: display: panel: mipi-dbi-spi: add shineworld lh133k compatible Leonard Göhrs
2023-06-07 11:55 ` [PATCH v1 2/8] dt-bindings: display: panel: mipi-dbi-spi: add spi-3wire property Leonard Göhrs
@ 2023-06-07 11:55 ` Leonard Göhrs
2023-06-07 16:36 ` andy.shevchenko
` (2 more replies)
2023-06-07 11:55 ` [PATCH v1 4/8] dt-bindings: can: m_can: add termination-{gpios,ohms} properties Leonard Göhrs
` (6 subsequent siblings)
8 siblings, 3 replies; 26+ messages in thread
From: Leonard Göhrs @ 2023-06-07 11:55 UTC (permalink / raw)
To: Linus Walleij, Bartosz Golaszewski, Sungbo Eo
Cc: kernel, Leonard Göhrs, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-gpio, devicetree, linux-kernel
This patch allows giving each of the controller's pins a meaningful
name.
Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
---
Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml b/Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml
index 5b0134304e51c..452f8972a9659 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml
+++ b/Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml
@@ -24,6 +24,10 @@ properties:
'#gpio-cells':
const: 2
+ gpio-line-names:
+ minItems: 4
+ maxItems: 8
+
required:
- compatible
- reg
--
2.39.2
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH v1 4/8] dt-bindings: can: m_can: add termination-{gpios,ohms} properties
2023-06-07 11:55 [PATCH v1 1/8] dt-bindings: display: panel: mipi-dbi-spi: add shineworld lh133k compatible Leonard Göhrs
2023-06-07 11:55 ` [PATCH v1 2/8] dt-bindings: display: panel: mipi-dbi-spi: add spi-3wire property Leonard Göhrs
2023-06-07 11:55 ` [PATCH v1 3/8] dt-bindings: gpio: pca9570: add gpio-line-names property Leonard Göhrs
@ 2023-06-07 11:55 ` Leonard Göhrs
2023-06-07 17:51 ` Conor Dooley
2023-06-07 23:03 ` Rob Herring
2023-06-07 11:55 ` [PATCH v1 5/8] dt-bindings: net: dsa: microchip: add missing spi-{cpha,cpol} properties Leonard Göhrs
` (5 subsequent siblings)
8 siblings, 2 replies; 26+ messages in thread
From: Leonard Göhrs @ 2023-06-07 11:55 UTC (permalink / raw)
To: Chandrasekar Ramakrishnan, Wolfgang Grandegger,
Marc Kleine-Budde, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni
Cc: kernel, Leonard Göhrs, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-can, netdev, devicetree, linux-kernel
The termination-gpios property allows specifying a GPIO pin that
enables/disables a termination resistor on said CAN interface.
The termination-ohms property specifies the resistance of said resistor.
Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
---
Documentation/devicetree/bindings/net/can/bosch,m_can.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml
index 67879aab623b5..106c79fa560c3 100644
--- a/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml
+++ b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml
@@ -118,6 +118,9 @@ properties:
phys:
maxItems: 1
+ termination-gpios: true
+ termination-ohms: true
+
required:
- compatible
- reg
--
2.39.2
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH v1 5/8] dt-bindings: net: dsa: microchip: add missing spi-{cpha,cpol} properties
2023-06-07 11:55 [PATCH v1 1/8] dt-bindings: display: panel: mipi-dbi-spi: add shineworld lh133k compatible Leonard Göhrs
` (2 preceding siblings ...)
2023-06-07 11:55 ` [PATCH v1 4/8] dt-bindings: can: m_can: add termination-{gpios,ohms} properties Leonard Göhrs
@ 2023-06-07 11:55 ` Leonard Göhrs
2023-06-07 17:50 ` Conor Dooley
2023-06-07 23:04 ` Rob Herring
2023-06-07 11:55 ` [PATCH v1 6/8] ARM: dts: stm32: Add pinmux groups for Linux Automation GmbH TAC Leonard Göhrs
` (4 subsequent siblings)
8 siblings, 2 replies; 26+ messages in thread
From: Leonard Göhrs @ 2023-06-07 11:55 UTC (permalink / raw)
To: Woojung Huh, UNGLinuxDriver, Andrew Lunn, Florian Fainelli,
Vladimir Oltean, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Marek Vasut
Cc: kernel, Leonard Göhrs, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, netdev, devicetree, linux-kernel
This patch allows setting the correct SPI phase and polarity for KSZ
switches.
Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
---
Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
index e51be1ac03623..f7c620d9ee8b4 100644
--- a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
+++ b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
@@ -49,6 +49,9 @@ properties:
Set if the output SYNCLKO clock should be disabled. Do not mix with
microchip,synclko-125.
+ spi-cpha: true
+ spi-cpol: true
+
required:
- compatible
- reg
--
2.39.2
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH v1 6/8] ARM: dts: stm32: Add pinmux groups for Linux Automation GmbH TAC
2023-06-07 11:55 [PATCH v1 1/8] dt-bindings: display: panel: mipi-dbi-spi: add shineworld lh133k compatible Leonard Göhrs
` (3 preceding siblings ...)
2023-06-07 11:55 ` [PATCH v1 5/8] dt-bindings: net: dsa: microchip: add missing spi-{cpha,cpol} properties Leonard Göhrs
@ 2023-06-07 11:55 ` Leonard Göhrs
2023-06-08 13:02 ` Alexandre TORGUE
2023-06-07 11:55 ` [PATCH v1 7/8] dt-bindings: arm: stm32: Add compatible string for Linux Automation LXA TAC Leonard Göhrs
` (3 subsequent siblings)
8 siblings, 1 reply; 26+ messages in thread
From: Leonard Göhrs @ 2023-06-07 11:55 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin,
Alexandre Torgue
Cc: kernel, Leonard Göhrs, devicetree, linux-stm32,
linux-arm-kernel, linux-kernel
Add pinmux groups required for the Linux Automation GmbH TAC.
Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
---
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 129 +++++++++++++++++++++++
1 file changed, 129 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
index e86d989dd351d..0c864461ca449 100644
--- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
@@ -6,6 +6,17 @@
#include <dt-bindings/pinctrl/stm32-pinfunc.h>
&pinctrl {
+ adc1_ain_pins_a: adc1-ain-0 {
+ pins {
+ pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* ADC1_INP2 */
+ <STM32_PINMUX('B', 1, ANALOG)>, /* ADC1_INP5 */
+ <STM32_PINMUX('B', 0, ANALOG)>, /* ADC1_INP9 */
+ <STM32_PINMUX('C', 0, ANALOG)>, /* ADC1_INP10 */
+ <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1_INP13 */
+ <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1_INP15 */
+ };
+ };
+
adc1_in6_pins_a: adc1-in6-0 {
pins {
pinmux = <STM32_PINMUX('F', 12, ANALOG)>;
@@ -341,6 +352,46 @@ pins1 {
};
};
+ ethernet0_rgmii_pins_d: rgmii-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
+ <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
+ <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
+ <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
+ <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
+ <STM32_PINMUX('B', 11, AF11)>; /* ETH_RGMII_TX_CTL */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <2>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
+ <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
+ <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
+ <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
+ <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
+ <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
+ bias-disable;
+ };
+ };
+
+ ethernet0_rgmii_sleep_pins_d: rgmii-sleep-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
+ <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
+ <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
+ <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
+ <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
+ <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
+ <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
+ <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
+ <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
+ <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
+ <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
+ <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
+ };
+ };
+
ethernet0_rmii_pins_a: rmii-0 {
pins1 {
pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
@@ -1104,6 +1155,20 @@ pins {
};
};
+ pwm1_pins_c: pwm1-2 {
+ pins {
+ pinmux = <STM32_PINMUX('E', 11, AF1)>; /* TIM1_CH2 */
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ };
+
+ pwm1_sleep_pins_c: pwm1-sleep-2 {
+ pins {
+ pinmux = <STM32_PINMUX('E', 11, ANALOG)>; /* TIM1_CH2 */
+ };
+ };
+
pwm2_pins_a: pwm2-0 {
pins {
pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
@@ -1230,6 +1295,26 @@ pins {
};
};
+ pwm8_pins_b: pwm8-1 {
+ pins {
+ pinmux = <STM32_PINMUX('I', 5, AF3)>, /* TIM8_CH1 */
+ <STM32_PINMUX('I', 6, AF3)>, /* TIM8_CH2 */
+ <STM32_PINMUX('I', 7, AF3)>, /* TIM8_CH3 */
+ <STM32_PINMUX('C', 9, AF3)>; /* TIM8_CH4 */
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ };
+
+ pwm8_sleep_pins_b: pwm8-sleep-1 {
+ pins {
+ pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* TIM8_CH1 */
+ <STM32_PINMUX('I', 6, ANALOG)>, /* TIM8_CH2 */
+ <STM32_PINMUX('I', 7, ANALOG)>, /* TIM8_CH3 */
+ <STM32_PINMUX('C', 9, ANALOG)>; /* TIM8_CH4 */
+ };
+ };
+
pwm12_pins_a: pwm12-0 {
pins {
pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
@@ -1925,6 +2010,20 @@ pins2 {
};
};
+ spi2_pins_c: spi2-2 {
+ pins1 {
+ pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */
+ <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */
+ bias-disable;
+ drive-push-pull;
+ };
+
+ pins2 {
+ pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
+ bias-pull-down;
+ };
+ };
+
spi4_pins_a: spi4-0 {
pins {
pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
@@ -1939,6 +2038,21 @@ pins2 {
};
};
+ spi5_pins_a: spi5-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('F', 7, AF5)>, /* SPI5_SCK */
+ <STM32_PINMUX('F', 9, AF5)>; /* SPI5_MOSI */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <1>;
+ };
+
+ pins2 {
+ pinmux = <STM32_PINMUX('F', 8, AF5)>; /* SPI5_MISO */
+ bias-disable;
+ };
+ };
+
stusb1600_pins_a: stusb1600-0 {
pins {
pinmux = <STM32_PINMUX('I', 11, GPIO)>;
@@ -2385,6 +2499,21 @@ pins {
};
};
+ usart3_pins_f: usart3-5 {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
+ <STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
+ <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
+ bias-disable;
+ };
+ };
+
usbotg_hs_pins_a: usbotg-hs-0 {
pins {
pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
--
2.39.2
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH v1 7/8] dt-bindings: arm: stm32: Add compatible string for Linux Automation LXA TAC
2023-06-07 11:55 [PATCH v1 1/8] dt-bindings: display: panel: mipi-dbi-spi: add shineworld lh133k compatible Leonard Göhrs
` (4 preceding siblings ...)
2023-06-07 11:55 ` [PATCH v1 6/8] ARM: dts: stm32: Add pinmux groups for Linux Automation GmbH TAC Leonard Göhrs
@ 2023-06-07 11:55 ` Leonard Göhrs
2023-06-07 17:29 ` Conor Dooley
2023-06-07 11:55 ` [PATCH v1 8/8] ARM: dts: stm32: lxa-tac: add Linux Automation GmbH TAC Leonard Göhrs
` (2 subsequent siblings)
8 siblings, 1 reply; 26+ messages in thread
From: Leonard Göhrs @ 2023-06-07 11:55 UTC (permalink / raw)
To: Maxime Coquelin, Alexandre Torgue
Cc: kernel, Leonard Göhrs, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, devicetree, linux-stm32, linux-arm-kernel,
linux-kernel
Add DT compatible string for Linux Automation GmbH Test Automation
Controllers (LXA TAC).
LXA TACs are a development tool for embedded devices with a focus on
embedded Linux devices.
As of now there are two STM32MP157 based hardware generations (Gen 1 and
Gen 2) that have most of their hardware config in common.
In the future there will also be a STM32MP153 based hardware generation.
Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
---
Documentation/devicetree/bindings/arm/stm32/stm32.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
index 13e34241145b4..11f8706101eca 100644
--- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
+++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
@@ -143,7 +143,9 @@ properties:
- description: Octavo OSD32MP15x System-in-Package based boards
items:
- enum:
- - lxa,stm32mp157c-mc1 # Linux Automation MC-1
+ - lxa,stm32mp157c-mc1 # Linux Automation MC-1
+ - lxa,stm32mp157c-tac-gen1 # Linux Automation TAC (Generation 1)
+ - lxa,stm32mp157c-tac-gen2 # Linux Automation TAC (Generation 2)
- const: oct,stm32mp15xx-osd32
- enum:
- st,stm32mp157
--
2.39.2
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH v1 8/8] ARM: dts: stm32: lxa-tac: add Linux Automation GmbH TAC
2023-06-07 11:55 [PATCH v1 1/8] dt-bindings: display: panel: mipi-dbi-spi: add shineworld lh133k compatible Leonard Göhrs
` (5 preceding siblings ...)
2023-06-07 11:55 ` [PATCH v1 7/8] dt-bindings: arm: stm32: Add compatible string for Linux Automation LXA TAC Leonard Göhrs
@ 2023-06-07 11:55 ` Leonard Göhrs
2023-06-08 13:13 ` Alexandre TORGUE
2023-06-07 17:55 ` [PATCH v1 1/8] dt-bindings: display: panel: mipi-dbi-spi: add shineworld lh133k compatible Conor Dooley
2023-06-07 22:59 ` Rob Herring
8 siblings, 1 reply; 26+ messages in thread
From: Leonard Göhrs @ 2023-06-07 11:55 UTC (permalink / raw)
To: Arnd Bergmann, Olof Johansson, soc, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin,
Alexandre Torgue
Cc: kernel, Leonard Göhrs, linux-arm-kernel, devicetree,
linux-kernel, linux-stm32
The Linux Automation Test Automation Controller (LXA TAC)[1] is an embedded
software development tool built around the Octavo Systems OSD32MP15x SiP.
The device contains an eMMC for storage, a DSA-capable on board ethernet
switch with two external ports, dual CAN busses, a power switch to turn
a device under test on or off and some other I/O.
As of now there are two STM32MP157 based hardware generations (Gen 1 and
Gen 2) that have most of their hardware config in common.
In the future there will also be a STM32MP153 based hardware generation.
[1]: https://www.linux-automation.com/en/products/lxa-tac.html
Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
---
arch/arm/boot/dts/Makefile | 2 +
.../arm/boot/dts/stm32mp157c-lxa-tac-gen1.dts | 93 +++
.../arm/boot/dts/stm32mp157c-lxa-tac-gen2.dts | 172 +++++
arch/arm/boot/dts/stm32mp15xc-lxa-tac.dtsi | 612 ++++++++++++++++++
4 files changed, 879 insertions(+)
create mode 100644 arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dts
create mode 100644 arch/arm/boot/dts/stm32mp157c-lxa-tac-gen2.dts
create mode 100644 arch/arm/boot/dts/stm32mp15xc-lxa-tac.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 59829fc903152..886371436bbc1 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1266,6 +1266,8 @@ dtb-$(CONFIG_ARCH_STM32) += \
stm32mp157c-ev1.dtb \
stm32mp157c-ev1-scmi.dtb \
stm32mp157c-lxa-mc1.dtb \
+ stm32mp157c-lxa-tac-gen1.dtb \
+ stm32mp157c-lxa-tac-gen2.dtb \
stm32mp157c-odyssey.dtb
dtb-$(CONFIG_MACH_SUN4I) += \
sun4i-a10-a1000.dtb \
diff --git a/arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dts b/arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dts
new file mode 100644
index 0000000000000..81f254fb88b0a
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dts
@@ -0,0 +1,93 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) 2020 STMicroelectronics - All Rights Reserved
+ * Copyright (C) 2021 Rouven Czerwinski, Pengutronix
+ * Copyright (C) 2023 Leonard Göhrs, Pengutronix
+ */
+
+/dts-v1/;
+
+#include "stm32mp157.dtsi"
+#include "stm32mp15xc-lxa-tac.dtsi"
+
+/ {
+ model = "Linux Automation Test Automation Controller (TAC) Gen 1";
+ compatible = "lxa,stm32mp157c-tac-gen1", "oct,stm32mp15xx-osd32", "st,stm32mp157";
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ power-supply = <&v3v3>;
+
+ brightness-levels = <0 31 63 95 127 159 191 223 255>;
+ default-brightness-level = <7>;
+ pwms = <&backlight_pwm 1 1000000 0>;
+ };
+
+ reg_iobus_12v: regulator-iobus-12v {
+ compatible = "regulator-fixed";
+ vin-supply = <®_12v>;
+
+ gpio = <&gpioh 13 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-max-microvolt = <12000000>;
+ regulator-min-microvolt = <12000000>;
+ regulator-name = "12V_IOBUS";
+ };
+};
+
+&gpioa {
+ gpio-line-names = "", "", "STACK_CS2", "", "STACK_CS3", /* 0 */
+ "ETH_GPIO1", "ETH_INT", "", "", "", /* 5 */
+ "", "", "", "BOOTROM_LED", "ETH_LAB_LEDRP", /* 10 */
+ ""; /* 15 */
+};
+
+&gpioc {
+ gpio-line-names = "", "STACK_CS1", "", "", "", /* 0 */
+ "", "", "", "", "", /* 5 */
+ "", ""; /* 10 */
+};
+
+&gpu {
+ status = "disabled";
+};
+
+&i2c1 {
+ powerboard_gpio: gpio@24 {
+ compatible = "nxp,pca9570";
+ reg = <0x24>;
+
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-line-names = "DUT_PWR_EN", "DUT_PWR_DISCH", "DUT_PWR_ADCRST", "";
+ };
+};
+
+&spi2 {
+ adc@0 {
+ compatible = "ti,lmp92064";
+ reg = <0>;
+ spi-max-frequency = <5000000>;
+ vdd-supply = <®_pb_3v3>;
+ vdig-supply = <®_pb_3v3>;
+ reset-gpios = <&powerboard_gpio 2 GPIO_ACTIVE_HIGH>;
+
+ shunt-resistor-micro-ohms = <15000>;
+ };
+};
+
+&timers1 {
+ /* spare dmas for other usage */
+ /delete-property/dmas;
+ /delete-property/dma-names;
+
+ status = "okay";
+
+ backlight_pwm: pwm {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pwm1_pins_c>;
+ pinctrl-1 = <&pwm1_sleep_pins_c>;
+
+ status = "okay";
+ };
+};
diff --git a/arch/arm/boot/dts/stm32mp157c-lxa-tac-gen2.dts b/arch/arm/boot/dts/stm32mp157c-lxa-tac-gen2.dts
new file mode 100644
index 0000000000000..8a34d15e9005f
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp157c-lxa-tac-gen2.dts
@@ -0,0 +1,172 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) 2020 STMicroelectronics - All Rights Reserved
+ * Copyright (C) 2021 Rouven Czerwinski, Pengutronix
+ * Copyright (C) 2023 Leonard Göhrs, Pengutronix
+ */
+
+/dts-v1/;
+
+#include "stm32mp157.dtsi"
+#include "stm32mp15xc-lxa-tac.dtsi"
+
+/ {
+ model = "Linux Automation Test Automation Controller (TAC) Gen 2";
+ compatible = "lxa,stm32mp157c-tac-gen2", "oct,stm32mp15xx-osd32", "st,stm32mp157";
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ power-supply = <&v3v3>;
+
+ brightness-levels = <0 31 63 95 127 159 191 223 255>;
+ default-brightness-level = <7>;
+ pwms = <&led_pwm 3 1000000 0>;
+ };
+
+ reg_iobus_12v: regulator-iobus-12v {
+ compatible = "regulator-fixed";
+ vin-supply = <®_12v>;
+ gpio = <&gpioh 13 GPIO_ACTIVE_LOW>;
+ regulator-max-microvolt = <12000000>;
+ regulator-min-microvolt = <12000000>;
+ regulator-name = "12V_IOBUS";
+ };
+
+ led-controller-1 {
+ compatible = "pwm-leds-multicolor";
+
+ multi-led {
+ color = <LED_COLOR_ID_RGB>;
+ function = LED_FUNCTION_STATUS;
+ max-brightness = <65535>;
+
+ led-red {
+ active-low;
+ color = <LED_COLOR_ID_RED>;
+ pwms = <&led_pwm 0 1000000 0>;
+ };
+
+ led-green {
+ active-low;
+ color = <LED_COLOR_ID_GREEN>;
+ pwms = <&led_pwm 2 1000000 0>;
+ };
+
+ led-blue {
+ active-low;
+ color = <LED_COLOR_ID_BLUE>;
+ pwms = <&led_pwm 1 1000000 0>;
+ };
+ };
+ };
+
+ led-controller-2 {
+ compatible = "gpio-leds";
+
+ led-5 {
+ label = "tac:green:iobus";
+ gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-6 {
+ label = "tac:green:can";
+ gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-7 {
+ label = "tac:green:out0";
+ gpios = <&gpiob 8 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-8 {
+ label = "tac:green:out1";
+ gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-9 {
+ label = "tac:green:uarttx";
+ gpios = <&gpiod 3 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-10 {
+ label = "tac:green:uartrx";
+ gpios = <&gpiof 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-11 {
+ label = "tac:green:usbh1";
+ gpios = <&gpioc 8 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-12 {
+ label = "tac:green:usbh2";
+ gpios = <&gpiod 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-13 {
+ label = "tac:green:usbh3";
+ gpios = <&gpiob 9 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-14 {
+ label = "tac:green:usbg";
+ gpios = <&gpiod 14 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "usb-gadget";
+ };
+
+ led-15 {
+ label = "tac:green:dutpwr";
+ gpios = <&gpioa 15 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&gpioa {
+ gpio-line-names = "", "", "DUT_PWR_EN", "", "STACK_CS3", /* 0 */
+ "ETH_GPIO1", "ETH_INT", "", "", "", /* 5 */
+ "", "", "", "BOOTROM_LED", "ETH_LAB_LEDRP", /* 10 */
+ ""; /* 15 */
+};
+
+&gpioc {
+ gpio-line-names = "", "DUT_PWR_DISCH", "", "", "", /* 0 */
+ "", "", "", "", "", /* 5 */
+ "", ""; /* 10 */
+};
+
+&gpu {
+ status = "disabled";
+};
+
+&m_can2 {
+ termination-gpios = <&gpioe 4 GPIO_ACTIVE_HIGH>;
+ termination-ohms = <120>;
+};
+
+&spi2 {
+ adc@0 {
+ compatible = "ti,lmp92064";
+ reg = <0>;
+
+ reset-gpios = <&gpioa 4 GPIO_ACTIVE_HIGH>;
+ shunt-resistor-micro-ohms = <15000>;
+ spi-max-frequency = <5000000>;
+ vdd-supply = <®_pb_3v3>;
+ vdig-supply = <®_pb_3v3>;
+ };
+};
+
+&timers8 {
+ /* spare dmas for other usage */
+ /delete-property/dmas;
+ /delete-property/dma-names;
+
+ status = "okay";
+
+ led_pwm: pwm {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pwm8_pins_b>;
+ pinctrl-1 = <&pwm8_sleep_pins_b>;
+ status = "okay";
+ };
+};
diff --git a/arch/arm/boot/dts/stm32mp15xc-lxa-tac.dtsi b/arch/arm/boot/dts/stm32mp15xc-lxa-tac.dtsi
new file mode 100644
index 0000000000000..ca4d25f5c9b51
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp15xc-lxa-tac.dtsi
@@ -0,0 +1,612 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) 2020 STMicroelectronics - All Rights Reserved
+ * Copyright (C) 2021 Rouven Czerwinski, Pengutronix
+ * Copyright (C) 2023 Leonard Göhrs, Pengutronix
+ */
+
+#include "stm32mp15xc.dtsi"
+#include "stm32mp15xx-osd32.dtsi"
+#include "stm32mp15xxac-pinctrl.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pwm/pwm.h>
+
+/ {
+ aliases {
+ ethernet0 = ðernet0;
+ ethernet1 = &port_uplink;
+ ethernet2 = &port_dut;
+ mmc1 = &sdmmc2;
+ serial0 = &uart4;
+ serial1 = &usart3;
+ };
+
+ chosen {
+ stdout-path = &uart4;
+ };
+
+ led-controller-0 {
+ compatible = "gpio-leds";
+
+ led-0 {
+ label = "tac:green:user1";
+ gpios = <&gpiof 10 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ led-1 {
+ label = "tac:green:user2";
+ gpios = <&gpiog 7 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-2 {
+ label = "tac:green:statusdut";
+ gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
+ };
+
+ /* led-3 and led-4 are internally connected antiparallel to one
+ * another inside the ethernet jack like this:
+ * GPIOA14 ---+---|led-3|>--+--- GPIOD15
+ * +--<|led-4|---+
+ * E.g. only one of the LEDs can be illuminated at a time while
+ * the other output must be driven low.
+ * This should likely be implemented using a multi color LED
+ * driver for antiparallel LEDs.
+ */
+ led-3 {
+ label = "tac:green:statuslab";
+ gpios = <&gpioa 14 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-4 {
+ label = "tac:orange:statuslab";
+ gpios = <&gpiod 15 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ button-lower {
+ label = "USER_BTN2";
+ linux,code = <KEY_ESC>;
+ gpios = <&gpioe 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ };
+
+ button-upper {
+ label = "USER_BTN";
+ linux,code = <KEY_HOME>;
+ gpios = <&gpioi 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ };
+ };
+
+ /* supplied by either barrel connector or PoE */
+ reg_12v: regulator-12v {
+ compatible = "regulator-fixed";
+ regulator-name = "12V";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ regulator-always-on;
+ };
+
+ reg_5v: regulator-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ vin-supply = <®_12v>;
+ };
+
+ reg_1v2: regulator-1v2 {
+ compatible = "regulator-fixed";
+ regulator-name = "1V2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ vin-supply = <®_5v>;
+ };
+
+ reg_pb_5v: regulator-pb-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "5V_POWERBOARD";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ vin-supply = <®_5v>;
+ };
+
+ reg_pb_3v3: regulator-pb-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3_POWERBOARD";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ vin-supply = <®_pb_5v>;
+ };
+
+ output-iobus-12v {
+ compatible = "regulator-output";
+ vout-supply = <®_iobus_12v>;
+ };
+
+ output-vuart {
+ compatible = "regulator-output";
+ vout-supply = <&v3v3_hdmi>;
+ };
+};
+
+baseboard_eeprom: &sip_eeprom {
+};
+
+&adc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&adc1_ain_pins_a>;
+ vdd-supply = <&vdd>;
+ vdda-supply = <&vdda>;
+ vref-supply = <&vrefbuf>;
+ status = "okay";
+
+ adc1: adc@0 {
+ st,adc-channels = <0 1 2 5 9 10 13 15>;
+ st,min-sample-time-nsecs = <5000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ channel@0 {
+ reg = <0>;
+ label = "HOST_2_CURR_FB";
+ };
+
+ channel@1 {
+ reg = <1>;
+ label = "HOST_3_CURR_FB";
+ };
+
+ channel@2 {
+ reg = <2>;
+ label = "OUT_0_FB";
+ };
+
+ channel@5 {
+ reg = <5>;
+ label = "IOBUS_CURR_FB";
+ };
+
+ channel@9 {
+ reg = <9>;
+ label = "IOBUS_VOLT_FB";
+ };
+
+ channel@10 {
+ reg = <10>;
+ label = "OUT_1_FB";
+ };
+
+ channel@13 {
+ reg = <13>;
+ label = "HOST_CURR_FB";
+ };
+
+ channel@15 {
+ reg = <15>;
+ label = "HOST_1_CURR_FB";
+ };
+ };
+
+ adc2: adc@100 {
+ st,adc-channels = <12>;
+ st,min-sample-time-nsecs = <500000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ channel@12 {
+ reg = <12>;
+ label = "TEMP_INTERNAL";
+ };
+ };
+};
+
+&crc1 {
+ status = "okay";
+};
+
+&cryp1 {
+ status = "okay";
+};
+
+&dts {
+ status = "okay";
+};
+
+ðernet0 {
+ assigned-clocks = <&rcc ETHCK_K>, <&rcc PLL4_P>;
+ assigned-clock-parents = <&rcc PLL4_P>;
+ assigned-clock-rates = <125000000>; /* Clock PLL4 to 750Mhz in ATF */
+
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <ðernet0_rgmii_pins_d>;
+ pinctrl-1 = <ðernet0_rgmii_sleep_pins_d>;
+
+ st,eth-clk-sel;
+ phy-mode = "rgmii-id";
+
+ status = "okay";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
+ðernet0_rgmii_pins_d {
+ pins1 {
+ /* Reduce EMI emission by reducing RGMII drive strength */
+ slew-rate = <1>;
+ };
+};
+
+&gpiob {
+ gpio-line-names = "", "", "", "", "", /* 0 */
+ "", "USB_RESET", "", "", "", /* 5 */
+ "", "", "", "", "", /* 10 */
+ ""; /* 15 */
+};
+
+&gpiod {
+ gpio-line-names = "", "", "", "", "TP38", /* 0 */
+ "TP39", "", "", "TP41", "TP42", /* 5 */
+ "OLED_DC", "", "", "ETH_CS", "", /* 10 */
+ "ETH_LAB_LEDRN"; /* 15 */
+};
+
+&gpioe {
+ gpio-line-names = "TP35", "", "", "", "CAN_1_120R", /* 0 */
+ "", "", "USER_BTN2", "TP48", "UART_TX_EN", /* 5 */
+ "UART_RX_EN", "TP24", "", "TP25", "TP26", /* 10 */
+ "TP27"; /* 15 */
+};
+
+&gpiof {
+ gpio-line-names = "TP36", "TP37", "", "", "OLED_CS", /* 0 */
+ "", "", "", "", "", /* 5 */
+ "USER_LED1", "", "STACK_CS0", "", "", /* 10 */
+ ""; /* 15 */
+};
+
+&gpiog {
+ gpio-line-names = "ETH_RESET", "", "", "", "", /* 0 */
+ "IOBUS_FLT_FB", "", "USER_LED2", "ETH1_PPS_A", "CAN_0_120R", /* 5 */
+ "TP49", "", "", "", "", /* 10 */
+ ""; /* 15 */
+};
+
+&gpioh {
+ gpio-line-names = "", "", "OUT_1", "OUT_0", "OLED_RESET", /* 0 */
+ "", "", "", "", "", /* 5 */
+ "ETH1_PPS_B", "ETH_GPIO2", "", "IOBUS_PWR_EN", "", /* 10 */
+ "TP33"; /* 15 */
+};
+
+&gpioi {
+ gpio-line-names = "TIM_RTS", "", "", "", "DEVICE_DATA_EN", /* 0 */
+ "", "", "", "ETH_WOL", "TP43", /* 5 */
+ "", "USER_BTN"; /* 10 */
+};
+
+&gpioz {
+ gpio-line-names = "HWID0", "HWID1", "HWID2", "HWID3", "", /* 0 */
+ "", "HWID4", "HWID5"; /* 5 */
+};
+
+&hash1 {
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&i2c1_pins_b>;
+ pinctrl-1 = <&i2c1_sleep_pins_b>;
+ status = "okay";
+
+ powerboard_eeprom: eeprom@50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ vcc-supply = <&v3v3>;
+ };
+
+ temperature-sensor@48 {
+ compatible = "national,lm75a";
+ reg = <0x48>;
+ status = "disabled";
+ };
+};
+
+&i2c5 {
+ /delete-property/dmas;
+ /delete-property/dma-names;
+
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&i2c5_pins_b>;
+ pinctrl-1 = <&i2c5_sleep_pins_b>;
+
+ status = "okay";
+
+ usbhub: usbhub@2c {
+ compatible ="microchip,usb2514b";
+ reg = <0x2c>;
+ vdd-supply = <&v3v3>;
+ reset-gpios = <&gpiob 6 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&iwdg2 {
+ timeout-sec = <8>;
+ status = "okay";
+};
+
+&m_can1 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&m_can1_pins_b>;
+ pinctrl-1 = <&m_can1_sleep_pins_b>;
+ status = "okay";
+};
+
+&m_can2 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&m_can2_pins_a>;
+ pinctrl-1 = <&m_can2_sleep_pins_a>;
+ status = "okay";
+};
+
+&pmic {
+ regulators {
+ buck1-supply = <®_5v>; /* VIN */
+ buck2-supply = <®_5v>; /* VIN */
+ buck3-supply = <®_5v>; /* VIN */
+ buck4-supply = <®_5v>; /* VIN */
+ ldo2-supply = <®_5v>; /* PMIC_LDO25IN */
+ ldo4-supply = <®_5v>; /* VIN */
+ ldo5-supply = <®_5v>; /* PMIC_LDO25IN */
+ vref_ddr-supply = <®_5v>; /* VIN */
+ boost-supply = <®_5v>; /* PMIC_BSTIN */
+ pwr_sw2-supply = <&bst_out>; /* PMIC_SWIN */
+ };
+};
+
+&pwr_regulators {
+ vdd-supply = <&vdd>;
+ vdd_3v3_usbfs-supply = <&vdd_usb>;
+};
+
+&rtc {
+ status = "okay";
+};
+
+&sdmmc2 {
+ pinctrl-names = "default", "opendrain", "sleep";
+ pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_b>;
+ pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_b>;
+ pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_b>;
+ vmmc-supply = <&v3v3>;
+
+ bus-width = <8>;
+ mmc-ddr-3_3v;
+ no-1-8-v;
+ non-removable;
+ no-sd;
+ no-sdio;
+ st,neg-edge;
+
+ status = "okay";
+};
+
+&spi2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2_pins_c>;
+ cs-gpios = <&gpiof 12 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&spi4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi4_pins_a>;
+ cs-gpios = <&gpiof 4 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ lcd: display@0 {
+ compatible = "shineworld,lh133k", "panel-mipi-dbi-spi";
+ reg = <0>;
+ power-supply = <&v3v3>;
+ io-supply = <&v3v3>;
+ backlight = <&backlight>;
+ dc-gpios = <&gpiod 10 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpioh 4 GPIO_ACTIVE_HIGH>;
+ spi-3wire;
+ spi-max-frequency = <32000000>;
+
+ width-mm = <23>;
+ height-mm = <23>;
+ rotation = <180>;
+
+ panel-timing {
+ hactive = <240>;
+ vactive = <240>;
+ hback-porch = <0>;
+ vback-porch = <0>;
+
+ clock-frequency = <0>;
+ hfront-porch = <0>;
+ hsync-len = <0>;
+ vfront-porch = <0>;
+ vsync-len = <0>;
+ };
+ };
+};
+
+&spi5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi5_pins_a>;
+
+ /* spare dmas for other usage */
+ /delete-property/dmas;
+ /delete-property/dma-names;
+
+ cs-gpios = <&gpiod 13 GPIO_ACTIVE_LOW>;
+
+ status = "okay";
+
+ switch: switch@0 {
+ compatible = "microchip,ksz9563";
+ reg = <0>;
+
+ reset-gpios = <&gpiog 0 GPIO_ACTIVE_LOW>;
+ spi-max-frequency = <44000000>;
+ spi-cpha;
+ spi-cpol;
+
+ interrupt-parent = <&gpioa>;
+ interrupts = <6 IRQ_TYPE_EDGE_RISING>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port_dut: port@0 {
+ reg = <0>;
+ label = "dut";
+ };
+
+ port_uplink: port@1 {
+ reg = <1>;
+ label = "uplink";
+ };
+
+ port_cpu: port@2 {
+ reg = <2>;
+ label = "cpu";
+
+ ethernet = <ðernet0>;
+
+ phy-mode = "rgmii-id";
+ rx-internal-delay-ps = <2000>;
+ tx-internal-delay-ps = <2000>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+ };
+};
+
+&timers2 {
+ /* spare dmas for other usage */
+ /delete-property/dmas;
+ /delete-property/dma-names;
+
+ status = "okay";
+
+ timer@1 {
+ status = "okay";
+ };
+};
+
+&timers3 {
+ /* spare dmas for other usage */
+ /delete-property/dmas;
+ /delete-property/dma-names;
+
+ status = "okay";
+
+ timer@2 {
+ status = "okay";
+ };
+};
+
+&timers4 {
+ /* spare dmas for other usage */
+ /delete-property/dmas;
+ /delete-property/dma-names;
+
+ status = "okay";
+
+ timer@3 {
+ status = "okay";
+ };
+};
+
+&uart4 {
+ label = "debug";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pins_a>;
+
+ /* spare dmas for other usage */
+ /delete-property/dmas;
+ /delete-property/dma-names;
+
+ status = "okay";
+};
+
+&usart3 {
+ label = "dut";
+ uart-has-rtscts;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&usart3_pins_f>;
+
+ /* spare dmas for other usage */
+ /delete-property/dmas;
+ /delete-property/dma-names;
+
+ status = "okay";
+};
+
+&usbh_ehci {
+ phys = <&usbphyc_port0>;
+ phy-names = "usb";
+
+ status = "okay";
+};
+
+&usbotg_hs {
+ phys = <&usbphyc_port1 0>;
+ phy-names = "usb2-phy";
+
+ vusb_d-supply = <&vdd_usb>;
+ vusb_a-supply = <®18>;
+
+ dr_mode = "peripheral";
+
+ status = "okay";
+};
+
+&usbphyc {
+ status = "okay";
+};
+
+&usbphyc_port0 {
+ phy-supply = <&vdd_usb>;
+};
+
+&usbphyc_port1 {
+ phy-supply = <&vdd_usb>;
+};
+
+&v3v3_hdmi {
+ /delete-property/regulator-always-on;
+};
+
+&vrefbuf {
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ vdda-supply = <&vdda>;
+
+ status = "okay";
+};
--
2.39.2
^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PATCH v1 3/8] dt-bindings: gpio: pca9570: add gpio-line-names property
2023-06-07 11:55 ` [PATCH v1 3/8] dt-bindings: gpio: pca9570: add gpio-line-names property Leonard Göhrs
@ 2023-06-07 16:36 ` andy.shevchenko
2023-06-08 13:24 ` Krzysztof Kozlowski
2023-06-08 13:24 ` Krzysztof Kozlowski
2023-06-13 14:54 ` Bartosz Golaszewski
2 siblings, 1 reply; 26+ messages in thread
From: andy.shevchenko @ 2023-06-07 16:36 UTC (permalink / raw)
To: Leonard Göhrs
Cc: Linus Walleij, Bartosz Golaszewski, Sungbo Eo, kernel,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-gpio,
devicetree, linux-kernel
Wed, Jun 07, 2023 at 01:55:02PM +0200, Leonard Göhrs kirjoitti:
> This patch allows giving each of the controller's pins a meaningful
> name.
Isn't it gpio.txt already mentiones this?
Perhaps you need to convert that to YAML and use it here?
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v1 7/8] dt-bindings: arm: stm32: Add compatible string for Linux Automation LXA TAC
2023-06-07 11:55 ` [PATCH v1 7/8] dt-bindings: arm: stm32: Add compatible string for Linux Automation LXA TAC Leonard Göhrs
@ 2023-06-07 17:29 ` Conor Dooley
0 siblings, 0 replies; 26+ messages in thread
From: Conor Dooley @ 2023-06-07 17:29 UTC (permalink / raw)
To: Leonard Göhrs
Cc: Maxime Coquelin, Alexandre Torgue, kernel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, devicetree, linux-stm32,
linux-arm-kernel, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 1616 bytes --]
On Wed, Jun 07, 2023 at 01:55:06PM +0200, Leonard Göhrs wrote:
> Add DT compatible string for Linux Automation GmbH Test Automation
> Controllers (LXA TAC).
> LXA TACs are a development tool for embedded devices with a focus on
> embedded Linux devices.
>
> As of now there are two STM32MP157 based hardware generations (Gen 1 and
> Gen 2) that have most of their hardware config in common.
> In the future there will also be a STM32MP153 based hardware generation.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Cheers,
Conor.
>
> Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
> ---
> Documentation/devicetree/bindings/arm/stm32/stm32.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
> index 13e34241145b4..11f8706101eca 100644
> --- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
> +++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
> @@ -143,7 +143,9 @@ properties:
> - description: Octavo OSD32MP15x System-in-Package based boards
> items:
> - enum:
> - - lxa,stm32mp157c-mc1 # Linux Automation MC-1
> + - lxa,stm32mp157c-mc1 # Linux Automation MC-1
> + - lxa,stm32mp157c-tac-gen1 # Linux Automation TAC (Generation 1)
> + - lxa,stm32mp157c-tac-gen2 # Linux Automation TAC (Generation 2)
> - const: oct,stm32mp15xx-osd32
> - enum:
> - st,stm32mp157
> --
> 2.39.2
>
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^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v1 5/8] dt-bindings: net: dsa: microchip: add missing spi-{cpha,cpol} properties
2023-06-07 11:55 ` [PATCH v1 5/8] dt-bindings: net: dsa: microchip: add missing spi-{cpha,cpol} properties Leonard Göhrs
@ 2023-06-07 17:50 ` Conor Dooley
2023-06-07 23:04 ` Rob Herring
1 sibling, 0 replies; 26+ messages in thread
From: Conor Dooley @ 2023-06-07 17:50 UTC (permalink / raw)
To: Leonard Göhrs
Cc: Woojung Huh, UNGLinuxDriver, Andrew Lunn, Florian Fainelli,
Vladimir Oltean, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Marek Vasut, kernel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, netdev, devicetree,
linux-kernel
[-- Attachment #1: Type: text/plain, Size: 285 bytes --]
On Wed, Jun 07, 2023 at 01:55:04PM +0200, Leonard Göhrs wrote:
> This patch allows setting the correct SPI phase and polarity for KSZ
> switches.
>
> Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Cheers,
Conor.
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^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v1 4/8] dt-bindings: can: m_can: add termination-{gpios,ohms} properties
2023-06-07 11:55 ` [PATCH v1 4/8] dt-bindings: can: m_can: add termination-{gpios,ohms} properties Leonard Göhrs
@ 2023-06-07 17:51 ` Conor Dooley
2023-06-07 23:03 ` Rob Herring
1 sibling, 0 replies; 26+ messages in thread
From: Conor Dooley @ 2023-06-07 17:51 UTC (permalink / raw)
To: Leonard Göhrs
Cc: Chandrasekar Ramakrishnan, Wolfgang Grandegger,
Marc Kleine-Budde, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, kernel, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-can, netdev, devicetree, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 410 bytes --]
On Wed, Jun 07, 2023 at 01:55:03PM +0200, Leonard Göhrs wrote:
> The termination-gpios property allows specifying a GPIO pin that
> enables/disables a termination resistor on said CAN interface.
> The termination-ohms property specifies the resistance of said resistor.
>
> Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Cheers,
Conor.
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^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v1 2/8] dt-bindings: display: panel: mipi-dbi-spi: add spi-3wire property
2023-06-07 11:55 ` [PATCH v1 2/8] dt-bindings: display: panel: mipi-dbi-spi: add spi-3wire property Leonard Göhrs
@ 2023-06-07 17:54 ` Conor Dooley
2023-06-07 19:59 ` Noralf Trønnes
2023-06-07 22:59 ` Rob Herring
2 siblings, 0 replies; 26+ messages in thread
From: Conor Dooley @ 2023-06-07 17:54 UTC (permalink / raw)
To: Leonard Göhrs
Cc: Noralf Trønnes, Neil Armstrong, Sam Ravnborg, David Airlie,
Daniel Vetter, kernel, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, dri-devel, devicetree, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 453 bytes --]
On Wed, Jun 07, 2023 at 01:55:01PM +0200, Leonard Göhrs wrote:
> Some MIPI DBI panels support a three wire mode (clock, chip select,
> bidirectional data) that can be used to ask the panel if it is already set
> up by e.g. the bootloader and can thus skip the initialization.
> This enables a flicker-free boot.
>
> Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Cheers,
Conor.
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v1 1/8] dt-bindings: display: panel: mipi-dbi-spi: add shineworld lh133k compatible
2023-06-07 11:55 [PATCH v1 1/8] dt-bindings: display: panel: mipi-dbi-spi: add shineworld lh133k compatible Leonard Göhrs
` (6 preceding siblings ...)
2023-06-07 11:55 ` [PATCH v1 8/8] ARM: dts: stm32: lxa-tac: add Linux Automation GmbH TAC Leonard Göhrs
@ 2023-06-07 17:55 ` Conor Dooley
2023-06-07 22:59 ` Rob Herring
8 siblings, 0 replies; 26+ messages in thread
From: Conor Dooley @ 2023-06-07 17:55 UTC (permalink / raw)
To: Leonard Göhrs
Cc: Noralf Trønnes, Neil Armstrong, Sam Ravnborg, David Airlie,
Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
kernel, dri-devel, devicetree, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 2391 bytes --]
On Wed, Jun 07, 2023 at 01:55:00PM +0200, Leonard Göhrs wrote:
> The Shineworld LH133K is a 1.3" 240x240px RGB LCD with a MIPI DBI
> compatible SPI interface.
> The initialization procedure is quite basic with the exception of
> requiring inverted colors.
> A basic mipi-dbi-cmd[1] script to get the display running thus looks
> like this:
>
> $ cat shineworld,lh133k.txt
> command 0x11 # exit sleep mode
> delay 120
>
> # The display seems to require display color inversion, so enable it.
> command 0x21 # INVON
>
> # Enable normal display mode (in contrast to partial display mode).
> command 0x13 # NORON
> command 0x29 # MIPI_DCS_SET_DISPLAY_ON
>
> $ mipi-dbi-cmd shineworld,lh133k.bin shineworld,lh133k.txt
>
> [1]: https://github.com/notro/panel-mipi-dbi
>
> Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
> ---
> .../devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml | 1 +
> Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
> 2 files changed, 3 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml b/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
> index 9b701df5e9d28..c07da1a9e6288 100644
> --- a/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
> +++ b/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
> @@ -67,6 +67,7 @@ properties:
> items:
> - enum:
> - sainsmart18
> + - shineworld,lh133k
> - const: panel-mipi-dbi-spi
>
> write-only:
> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> index 82d39ab0231b0..b0afa421bc4a5 100644
> --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
> +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> @@ -1189,6 +1189,8 @@ patternProperties:
> description: SHIFT GmbH
> "^shimafuji,.*":
> description: Shimafuji Electric, Inc.
> + "^shineworld,.*":
> + description: ShineWorld Innovations
> "^shiratech,.*":
> description: Shiratech Solutions
> "^si-en,.*":
AFAIU, these are supposed to be split into separate patches.
Otherwise,
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Cheers,
Conor.
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^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v1 2/8] dt-bindings: display: panel: mipi-dbi-spi: add spi-3wire property
2023-06-07 11:55 ` [PATCH v1 2/8] dt-bindings: display: panel: mipi-dbi-spi: add spi-3wire property Leonard Göhrs
2023-06-07 17:54 ` Conor Dooley
@ 2023-06-07 19:59 ` Noralf Trønnes
2023-06-07 22:58 ` Rob Herring
2023-06-07 22:59 ` Rob Herring
2 siblings, 1 reply; 26+ messages in thread
From: Noralf Trønnes @ 2023-06-07 19:59 UTC (permalink / raw)
To: Leonard Göhrs, Neil Armstrong, Sam Ravnborg, David Airlie,
Daniel Vetter
Cc: kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
dri-devel, devicetree, linux-kernel, noralf
On 6/7/23 13:55, Leonard Göhrs wrote:
> Some MIPI DBI panels support a three wire mode (clock, chip select,
> bidirectional data) that can be used to ask the panel if it is already set
> up by e.g. the bootloader and can thus skip the initialization.
> This enables a flicker-free boot.
>
> Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
> ---
> .../devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml b/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
> index c07da1a9e6288..2f0238b770eba 100644
> --- a/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
> +++ b/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
> @@ -87,6 +87,8 @@ properties:
> Logic level supply for interface signals (Vddi).
> No need to set if this is the same as power-supply.
>
> + spi-3wire: true
> +
I don't think this should be added here. spi-cpha and spi-cpol are also
supported but they are not mentioned. Instead those are documented in
bindings/spi/spi-controller.yaml. Why they're not documented in
bindings/spi/spi-peripheral-props.yaml instead which this binding has a
ref to, I have no idea.
Noralf.
> required:
> - compatible
> - reg
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v1 2/8] dt-bindings: display: panel: mipi-dbi-spi: add spi-3wire property
2023-06-07 19:59 ` Noralf Trønnes
@ 2023-06-07 22:58 ` Rob Herring
0 siblings, 0 replies; 26+ messages in thread
From: Rob Herring @ 2023-06-07 22:58 UTC (permalink / raw)
To: Noralf Trønnes
Cc: Leonard Göhrs, Neil Armstrong, Sam Ravnborg, David Airlie,
Daniel Vetter, kernel, Krzysztof Kozlowski, Conor Dooley,
dri-devel, devicetree, linux-kernel
On Wed, Jun 07, 2023 at 09:59:47PM +0200, Noralf Trønnes wrote:
>
>
> On 6/7/23 13:55, Leonard Göhrs wrote:
> > Some MIPI DBI panels support a three wire mode (clock, chip select,
> > bidirectional data) that can be used to ask the panel if it is already set
> > up by e.g. the bootloader and can thus skip the initialization.
> > This enables a flicker-free boot.
> >
> > Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
> > ---
> > .../devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml b/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
> > index c07da1a9e6288..2f0238b770eba 100644
> > --- a/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
> > +++ b/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
> > @@ -87,6 +87,8 @@ properties:
> > Logic level supply for interface signals (Vddi).
> > No need to set if this is the same as power-supply.
> >
> > + spi-3wire: true
> > +
>
> I don't think this should be added here. spi-cpha and spi-cpol are also
> supported but they are not mentioned. Instead those are documented in
> bindings/spi/spi-controller.yaml. Why they're not documented in
> bindings/spi/spi-peripheral-props.yaml instead which this binding has a
> ref to, I have no idea.
spi-peripheral-props.yaml are properties of the controller in the
peripheral nodes. spi-cpha and spi-cpol are properties of the device
which are completely invalid on some devices. We can only check that by
documenting where they are valid. I think spi-3wire is similar. There
should be more explanation in the spi-peripheral-props.yaml commit
history.
Rob
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v1 1/8] dt-bindings: display: panel: mipi-dbi-spi: add shineworld lh133k compatible
2023-06-07 11:55 [PATCH v1 1/8] dt-bindings: display: panel: mipi-dbi-spi: add shineworld lh133k compatible Leonard Göhrs
` (7 preceding siblings ...)
2023-06-07 17:55 ` [PATCH v1 1/8] dt-bindings: display: panel: mipi-dbi-spi: add shineworld lh133k compatible Conor Dooley
@ 2023-06-07 22:59 ` Rob Herring
8 siblings, 0 replies; 26+ messages in thread
From: Rob Herring @ 2023-06-07 22:59 UTC (permalink / raw)
To: Leonard Göhrs
Cc: David Airlie, dri-devel, devicetree, Sam Ravnborg,
Neil Armstrong, Noralf Trønnes, Rob Herring, kernel,
Krzysztof Kozlowski, linux-kernel, Daniel Vetter, Conor Dooley
On Wed, 07 Jun 2023 13:55:00 +0200, Leonard Göhrs wrote:
> The Shineworld LH133K is a 1.3" 240x240px RGB LCD with a MIPI DBI
> compatible SPI interface.
> The initialization procedure is quite basic with the exception of
> requiring inverted colors.
> A basic mipi-dbi-cmd[1] script to get the display running thus looks
> like this:
>
> $ cat shineworld,lh133k.txt
> command 0x11 # exit sleep mode
> delay 120
>
> # The display seems to require display color inversion, so enable it.
> command 0x21 # INVON
>
> # Enable normal display mode (in contrast to partial display mode).
> command 0x13 # NORON
> command 0x29 # MIPI_DCS_SET_DISPLAY_ON
>
> $ mipi-dbi-cmd shineworld,lh133k.bin shineworld,lh133k.txt
>
> [1]: https://github.com/notro/panel-mipi-dbi
>
> Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
> ---
> .../devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml | 1 +
> Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
> 2 files changed, 3 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v1 2/8] dt-bindings: display: panel: mipi-dbi-spi: add spi-3wire property
2023-06-07 11:55 ` [PATCH v1 2/8] dt-bindings: display: panel: mipi-dbi-spi: add spi-3wire property Leonard Göhrs
2023-06-07 17:54 ` Conor Dooley
2023-06-07 19:59 ` Noralf Trønnes
@ 2023-06-07 22:59 ` Rob Herring
2 siblings, 0 replies; 26+ messages in thread
From: Rob Herring @ 2023-06-07 22:59 UTC (permalink / raw)
To: Leonard Göhrs
Cc: Rob Herring, Noralf Trønnes, Sam Ravnborg, devicetree,
David Airlie, Neil Armstrong, Daniel Vetter, linux-kernel,
Conor Dooley, Krzysztof Kozlowski, kernel, dri-devel
On Wed, 07 Jun 2023 13:55:01 +0200, Leonard Göhrs wrote:
> Some MIPI DBI panels support a three wire mode (clock, chip select,
> bidirectional data) that can be used to ask the panel if it is already set
> up by e.g. the bootloader and can thus skip the initialization.
> This enables a flicker-free boot.
>
> Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
> ---
> .../devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v1 4/8] dt-bindings: can: m_can: add termination-{gpios,ohms} properties
2023-06-07 11:55 ` [PATCH v1 4/8] dt-bindings: can: m_can: add termination-{gpios,ohms} properties Leonard Göhrs
2023-06-07 17:51 ` Conor Dooley
@ 2023-06-07 23:03 ` Rob Herring
1 sibling, 0 replies; 26+ messages in thread
From: Rob Herring @ 2023-06-07 23:03 UTC (permalink / raw)
To: Leonard Göhrs
Cc: Chandrasekar Ramakrishnan, Wolfgang Grandegger,
Marc Kleine-Budde, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, kernel, Krzysztof Kozlowski, Conor Dooley,
linux-can, netdev, devicetree, linux-kernel
On Wed, Jun 07, 2023 at 01:55:03PM +0200, Leonard Göhrs wrote:
> The termination-gpios property allows specifying a GPIO pin that
> enables/disables a termination resistor on said CAN interface.
> The termination-ohms property specifies the resistance of said resistor.
>
> Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
> ---
> Documentation/devicetree/bindings/net/can/bosch,m_can.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml
> index 67879aab623b5..106c79fa560c3 100644
> --- a/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml
> +++ b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml
> @@ -118,6 +118,9 @@ properties:
> phys:
> maxItems: 1
>
> + termination-gpios: true
> + termination-ohms: true
All you should need here is change additionalProperties to
unevaluatedProperties as these are defined by can-controller.yaml.
> +
> required:
> - compatible
> - reg
> --
> 2.39.2
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v1 5/8] dt-bindings: net: dsa: microchip: add missing spi-{cpha,cpol} properties
2023-06-07 11:55 ` [PATCH v1 5/8] dt-bindings: net: dsa: microchip: add missing spi-{cpha,cpol} properties Leonard Göhrs
2023-06-07 17:50 ` Conor Dooley
@ 2023-06-07 23:04 ` Rob Herring
1 sibling, 0 replies; 26+ messages in thread
From: Rob Herring @ 2023-06-07 23:04 UTC (permalink / raw)
To: Leonard Göhrs
Cc: Woojung Huh, UNGLinuxDriver, Andrew Lunn, Florian Fainelli,
Vladimir Oltean, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Marek Vasut, kernel, Krzysztof Kozlowski,
Conor Dooley, netdev, devicetree, linux-kernel
On Wed, Jun 07, 2023 at 01:55:04PM +0200, Leonard Göhrs wrote:
> This patch allows setting the correct SPI phase and polarity for KSZ
> switches.
>
> Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
> ---
> Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
> index e51be1ac03623..f7c620d9ee8b4 100644
> --- a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
> +++ b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
> @@ -49,6 +49,9 @@ properties:
> Set if the output SYNCLKO clock should be disabled. Do not mix with
> microchip,synclko-125.
>
> + spi-cpha: true
> + spi-cpol: true
These should only be needed if the mode is configurable or variable.
Otherwise, the driver for the device should set the mode correctly.
Rob
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v1 6/8] ARM: dts: stm32: Add pinmux groups for Linux Automation GmbH TAC
2023-06-07 11:55 ` [PATCH v1 6/8] ARM: dts: stm32: Add pinmux groups for Linux Automation GmbH TAC Leonard Göhrs
@ 2023-06-08 13:02 ` Alexandre TORGUE
0 siblings, 0 replies; 26+ messages in thread
From: Alexandre TORGUE @ 2023-06-08 13:02 UTC (permalink / raw)
To: Leonard Göhrs, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Maxime Coquelin
Cc: kernel, devicetree, linux-stm32, linux-arm-kernel, linux-kernel
Hi
On 6/7/23 13:55, Leonard Göhrs wrote:
> Add pinmux groups required for the Linux Automation GmbH TAC.
>
> Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
> ---
> arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 129 +++++++++++++++++++++++
> 1 file changed, 129 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
> index e86d989dd351d..0c864461ca449 100644
> --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
> +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
> @@ -6,6 +6,17 @@
> #include <dt-bindings/pinctrl/stm32-pinfunc.h>
>
> &pinctrl {
> + adc1_ain_pins_a: adc1-ain-0 {
> + pins {
> + pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* ADC1_INP2 */
> + <STM32_PINMUX('B', 1, ANALOG)>, /* ADC1_INP5 */
> + <STM32_PINMUX('B', 0, ANALOG)>, /* ADC1_INP9 */
> + <STM32_PINMUX('C', 0, ANALOG)>, /* ADC1_INP10 */
> + <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1_INP13 */
> + <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1_INP15 */
> + };
> + };
> +
> adc1_in6_pins_a: adc1-in6-0 {
> pins {
> pinmux = <STM32_PINMUX('F', 12, ANALOG)>;
> @@ -341,6 +352,46 @@ pins1 {
> };
> };
>
> + ethernet0_rgmii_pins_d: rgmii-1 {
xxx_pins_d is already defined for rgmii-3, it should be xxx_pins_e
And rgmii-1 is already defined, it should be rgmii-4. Don't forget to
update boards files with new pinctrl names in eth node.
please rebase on top of stm32-next branch.
> + pins1 {
> + pinmux = <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
> + <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
> + <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
> + <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
> + <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
> + <STM32_PINMUX('B', 11, AF11)>; /* ETH_RGMII_TX_CTL */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <2>;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
> + <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
> + <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
> + <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
> + <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
> + <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
> + bias-disable;
> + };
> + };
> +
> + ethernet0_rgmii_sleep_pins_d: rgmii-sleep-1 {
xxx_pins_d is already defined for rgmii-3, it should be xxx_pins_e
rgmii-sleep-1 is already defined, it should be rgmii-sleep-4
> + pins1 {
> + pinmux = <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
> + <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
> + <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
> + <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
> + <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
> + <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
> + <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
> + <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
> + <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
> + <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
> + <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
> + <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
> + };
> + };
> +
> ethernet0_rmii_pins_a: rmii-0 {
> pins1 {
> pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
> @@ -1104,6 +1155,20 @@ pins {
> };
> };
>
> + pwm1_pins_c: pwm1-2 {
> + pins {
> + pinmux = <STM32_PINMUX('E', 11, AF1)>; /* TIM1_CH2 */
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + };
> +
> + pwm1_sleep_pins_c: pwm1-sleep-2 {
> + pins {
> + pinmux = <STM32_PINMUX('E', 11, ANALOG)>; /* TIM1_CH2 */
> + };
> + };
> +
> pwm2_pins_a: pwm2-0 {
> pins {
> pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
> @@ -1230,6 +1295,26 @@ pins {
> };
> };
>
> + pwm8_pins_b: pwm8-1 {
> + pins {
> + pinmux = <STM32_PINMUX('I', 5, AF3)>, /* TIM8_CH1 */
> + <STM32_PINMUX('I', 6, AF3)>, /* TIM8_CH2 */
> + <STM32_PINMUX('I', 7, AF3)>, /* TIM8_CH3 */
> + <STM32_PINMUX('C', 9, AF3)>; /* TIM8_CH4 */
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + };
> +
> + pwm8_sleep_pins_b: pwm8-sleep-1 {
> + pins {
> + pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* TIM8_CH1 */
> + <STM32_PINMUX('I', 6, ANALOG)>, /* TIM8_CH2 */
> + <STM32_PINMUX('I', 7, ANALOG)>, /* TIM8_CH3 */
> + <STM32_PINMUX('C', 9, ANALOG)>; /* TIM8_CH4 */
> + };
> + };
> +
> pwm12_pins_a: pwm12-0 {
> pins {
> pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
> @@ -1925,6 +2010,20 @@ pins2 {
> };
> };
>
> + spi2_pins_c: spi2-2 {
> + pins1 {
> + pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */
> + <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */
> + bias-disable;
> + drive-push-pull;
> + };
> +
> + pins2 {
> + pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
> + bias-pull-down;
> + };
> + };
> +
> spi4_pins_a: spi4-0 {
> pins {
> pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
> @@ -1939,6 +2038,21 @@ pins2 {
> };
> };
>
> + spi5_pins_a: spi5-0 {
> + pins1 {
> + pinmux = <STM32_PINMUX('F', 7, AF5)>, /* SPI5_SCK */
> + <STM32_PINMUX('F', 9, AF5)>; /* SPI5_MOSI */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <1>;
> + };
> +
> + pins2 {
> + pinmux = <STM32_PINMUX('F', 8, AF5)>; /* SPI5_MISO */
> + bias-disable;
> + };
> + };
> +
> stusb1600_pins_a: stusb1600-0 {
> pins {
> pinmux = <STM32_PINMUX('I', 11, GPIO)>;
> @@ -2385,6 +2499,21 @@ pins {
> };
> };
>
> + usart3_pins_f: usart3-5 {
> + pins1 {
> + pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
> + <STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
> + <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
> + bias-disable;
> + };
> + };
> +
> usbotg_hs_pins_a: usbotg-hs-0 {
> pins {
> pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v1 8/8] ARM: dts: stm32: lxa-tac: add Linux Automation GmbH TAC
2023-06-07 11:55 ` [PATCH v1 8/8] ARM: dts: stm32: lxa-tac: add Linux Automation GmbH TAC Leonard Göhrs
@ 2023-06-08 13:13 ` Alexandre TORGUE
2023-06-14 12:46 ` Leonard Göhrs
0 siblings, 1 reply; 26+ messages in thread
From: Alexandre TORGUE @ 2023-06-08 13:13 UTC (permalink / raw)
To: Leonard Göhrs, Arnd Bergmann, Olof Johansson, soc,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin
Cc: kernel, linux-arm-kernel, devicetree, linux-kernel, linux-stm32
Hi Leonard
On 6/7/23 13:55, Leonard Göhrs wrote:
> The Linux Automation Test Automation Controller (LXA TAC)[1] is an embedded
> software development tool built around the Octavo Systems OSD32MP15x SiP.
>
> The device contains an eMMC for storage, a DSA-capable on board ethernet
> switch with two external ports, dual CAN busses, a power switch to turn
> a device under test on or off and some other I/O.
>
> As of now there are two STM32MP157 based hardware generations (Gen 1 and
> Gen 2) that have most of their hardware config in common.
> In the future there will also be a STM32MP153 based hardware generation.
>
> [1]: https://www.linux-automation.com/en/products/lxa-tac.html
>
> Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
> ---
There are some YAML issues reported. Some are linked to the
stm32mp151.dts or common bindings and are going to be fixed. But some
looks more linked to your board. Can you have a look on those:
arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dtb: gpio@24:
'gpio-line-names' does not match any of the regexes: 'pinctrl-[0-9]+'
From schema: /Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml
arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dtb: display@0: compatible:0:
'shineworld,lh133k' is not one of ['sainsmart18']
From schema:
/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dtb: display@0: Unevaluated
properties are not allowed ('compatible', 'spi-3wire' were unexpected)
From schema:
/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dtb:
/soc/spi@44005000/display@0: failed to match any schema with compatible:
['shineworld,lh133k', 'panel-mipi-dbi-spi']
/arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dtb: switch@0: Unevaluated
properties are not allowed ('spi-cpha', 'spi-cpol', 'interrupt-parent',
'interrupts' were unexpected)
From schema: /Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
arch/arm/boot/dts/stm32mp157c-lxa-tac-gen2.dtb: can@4400f000:
'termination-gpios', 'termination-ohms' do not match any of the regexes:
'pinctrl-[0-9]+'
From schema: /Documentation/devicetree/bindings/net/can/bosch,m_can.yaml
Thanks in advance
Alex
> arch/arm/boot/dts/Makefile | 2 +
> .../arm/boot/dts/stm32mp157c-lxa-tac-gen1.dts | 93 +++
> .../arm/boot/dts/stm32mp157c-lxa-tac-gen2.dts | 172 +++++
> arch/arm/boot/dts/stm32mp15xc-lxa-tac.dtsi | 612 ++++++++++++++++++
> 4 files changed, 879 insertions(+)
> create mode 100644 arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dts
> create mode 100644 arch/arm/boot/dts/stm32mp157c-lxa-tac-gen2.dts
> create mode 100644 arch/arm/boot/dts/stm32mp15xc-lxa-tac.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 59829fc903152..886371436bbc1 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1266,6 +1266,8 @@ dtb-$(CONFIG_ARCH_STM32) += \
> stm32mp157c-ev1.dtb \
> stm32mp157c-ev1-scmi.dtb \
> stm32mp157c-lxa-mc1.dtb \
> + stm32mp157c-lxa-tac-gen1.dtb \
> + stm32mp157c-lxa-tac-gen2.dtb \
> stm32mp157c-odyssey.dtb
> dtb-$(CONFIG_MACH_SUN4I) += \
> sun4i-a10-a1000.dtb \
> diff --git a/arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dts b/arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dts
> new file mode 100644
> index 0000000000000..81f254fb88b0a
> --- /dev/null
> +++ b/arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dts
> @@ -0,0 +1,93 @@
> +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
> +/*
> + * Copyright (C) 2020 STMicroelectronics - All Rights Reserved
> + * Copyright (C) 2021 Rouven Czerwinski, Pengutronix
> + * Copyright (C) 2023 Leonard Göhrs, Pengutronix
> + */
> +
> +/dts-v1/;
> +
> +#include "stm32mp157.dtsi"
> +#include "stm32mp15xc-lxa-tac.dtsi"
> +
> +/ {
> + model = "Linux Automation Test Automation Controller (TAC) Gen 1";
> + compatible = "lxa,stm32mp157c-tac-gen1", "oct,stm32mp15xx-osd32", "st,stm32mp157";
> +
> + backlight: backlight {
> + compatible = "pwm-backlight";
> + power-supply = <&v3v3>;
> +
> + brightness-levels = <0 31 63 95 127 159 191 223 255>;
> + default-brightness-level = <7>;
> + pwms = <&backlight_pwm 1 1000000 0>;
> + };
> +
> + reg_iobus_12v: regulator-iobus-12v {
> + compatible = "regulator-fixed";
> + vin-supply = <®_12v>;
> +
> + gpio = <&gpioh 13 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + regulator-max-microvolt = <12000000>;
> + regulator-min-microvolt = <12000000>;
> + regulator-name = "12V_IOBUS";
> + };
> +};
> +
> +&gpioa {
> + gpio-line-names = "", "", "STACK_CS2", "", "STACK_CS3", /* 0 */
> + "ETH_GPIO1", "ETH_INT", "", "", "", /* 5 */
> + "", "", "", "BOOTROM_LED", "ETH_LAB_LEDRP", /* 10 */
> + ""; /* 15 */
> +};
> +
> +&gpioc {
> + gpio-line-names = "", "STACK_CS1", "", "", "", /* 0 */
> + "", "", "", "", "", /* 5 */
> + "", ""; /* 10 */
> +};
> +
> +&gpu {
> + status = "disabled";
> +};
> +
> +&i2c1 {
> + powerboard_gpio: gpio@24 {
> + compatible = "nxp,pca9570";
> + reg = <0x24>;
> +
> + #gpio-cells = <2>;
> + gpio-controller;
> + gpio-line-names = "DUT_PWR_EN", "DUT_PWR_DISCH", "DUT_PWR_ADCRST", "";
> + };
> +};
> +
> +&spi2 {
> + adc@0 {
> + compatible = "ti,lmp92064";
> + reg = <0>;
> + spi-max-frequency = <5000000>;
> + vdd-supply = <®_pb_3v3>;
> + vdig-supply = <®_pb_3v3>;
> + reset-gpios = <&powerboard_gpio 2 GPIO_ACTIVE_HIGH>;
> +
> + shunt-resistor-micro-ohms = <15000>;
> + };
> +};
> +
> +&timers1 {
> + /* spare dmas for other usage */
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +
> + status = "okay";
> +
> + backlight_pwm: pwm {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&pwm1_pins_c>;
> + pinctrl-1 = <&pwm1_sleep_pins_c>;
> +
> + status = "okay";
> + };
> +};
> diff --git a/arch/arm/boot/dts/stm32mp157c-lxa-tac-gen2.dts b/arch/arm/boot/dts/stm32mp157c-lxa-tac-gen2.dts
> new file mode 100644
> index 0000000000000..8a34d15e9005f
> --- /dev/null
> +++ b/arch/arm/boot/dts/stm32mp157c-lxa-tac-gen2.dts
> @@ -0,0 +1,172 @@
> +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
> +/*
> + * Copyright (C) 2020 STMicroelectronics - All Rights Reserved
> + * Copyright (C) 2021 Rouven Czerwinski, Pengutronix
> + * Copyright (C) 2023 Leonard Göhrs, Pengutronix
> + */
> +
> +/dts-v1/;
> +
> +#include "stm32mp157.dtsi"
> +#include "stm32mp15xc-lxa-tac.dtsi"
> +
> +/ {
> + model = "Linux Automation Test Automation Controller (TAC) Gen 2";
> + compatible = "lxa,stm32mp157c-tac-gen2", "oct,stm32mp15xx-osd32", "st,stm32mp157";
> +
> + backlight: backlight {
> + compatible = "pwm-backlight";
> + power-supply = <&v3v3>;
> +
> + brightness-levels = <0 31 63 95 127 159 191 223 255>;
> + default-brightness-level = <7>;
> + pwms = <&led_pwm 3 1000000 0>;
> + };
> +
> + reg_iobus_12v: regulator-iobus-12v {
> + compatible = "regulator-fixed";
> + vin-supply = <®_12v>;
> + gpio = <&gpioh 13 GPIO_ACTIVE_LOW>;
> + regulator-max-microvolt = <12000000>;
> + regulator-min-microvolt = <12000000>;
> + regulator-name = "12V_IOBUS";
> + };
> +
> + led-controller-1 {
> + compatible = "pwm-leds-multicolor";
> +
> + multi-led {
> + color = <LED_COLOR_ID_RGB>;
> + function = LED_FUNCTION_STATUS;
> + max-brightness = <65535>;
> +
> + led-red {
> + active-low;
> + color = <LED_COLOR_ID_RED>;
> + pwms = <&led_pwm 0 1000000 0>;
> + };
> +
> + led-green {
> + active-low;
> + color = <LED_COLOR_ID_GREEN>;
> + pwms = <&led_pwm 2 1000000 0>;
> + };
> +
> + led-blue {
> + active-low;
> + color = <LED_COLOR_ID_BLUE>;
> + pwms = <&led_pwm 1 1000000 0>;
> + };
> + };
> + };
> +
> + led-controller-2 {
> + compatible = "gpio-leds";
> +
> + led-5 {
> + label = "tac:green:iobus";
> + gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>;
> + };
> +
> + led-6 {
> + label = "tac:green:can";
> + gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>;
> + };
> +
> + led-7 {
> + label = "tac:green:out0";
> + gpios = <&gpiob 8 GPIO_ACTIVE_HIGH>;
> + };
> +
> + led-8 {
> + label = "tac:green:out1";
> + gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>;
> + };
> +
> + led-9 {
> + label = "tac:green:uarttx";
> + gpios = <&gpiod 3 GPIO_ACTIVE_HIGH>;
> + };
> +
> + led-10 {
> + label = "tac:green:uartrx";
> + gpios = <&gpiof 6 GPIO_ACTIVE_HIGH>;
> + };
> +
> + led-11 {
> + label = "tac:green:usbh1";
> + gpios = <&gpioc 8 GPIO_ACTIVE_HIGH>;
> + };
> +
> + led-12 {
> + label = "tac:green:usbh2";
> + gpios = <&gpiod 6 GPIO_ACTIVE_HIGH>;
> + };
> +
> + led-13 {
> + label = "tac:green:usbh3";
> + gpios = <&gpiob 9 GPIO_ACTIVE_HIGH>;
> + };
> +
> + led-14 {
> + label = "tac:green:usbg";
> + gpios = <&gpiod 14 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "usb-gadget";
> + };
> +
> + led-15 {
> + label = "tac:green:dutpwr";
> + gpios = <&gpioa 15 GPIO_ACTIVE_HIGH>;
> + };
> + };
> +};
> +
> +&gpioa {
> + gpio-line-names = "", "", "DUT_PWR_EN", "", "STACK_CS3", /* 0 */
> + "ETH_GPIO1", "ETH_INT", "", "", "", /* 5 */
> + "", "", "", "BOOTROM_LED", "ETH_LAB_LEDRP", /* 10 */
> + ""; /* 15 */
> +};
> +
> +&gpioc {
> + gpio-line-names = "", "DUT_PWR_DISCH", "", "", "", /* 0 */
> + "", "", "", "", "", /* 5 */
> + "", ""; /* 10 */
> +};
> +
> +&gpu {
> + status = "disabled";
> +};
> +
> +&m_can2 {
> + termination-gpios = <&gpioe 4 GPIO_ACTIVE_HIGH>;
> + termination-ohms = <120>;
> +};
> +
> +&spi2 {
> + adc@0 {
> + compatible = "ti,lmp92064";
> + reg = <0>;
> +
> + reset-gpios = <&gpioa 4 GPIO_ACTIVE_HIGH>;
> + shunt-resistor-micro-ohms = <15000>;
> + spi-max-frequency = <5000000>;
> + vdd-supply = <®_pb_3v3>;
> + vdig-supply = <®_pb_3v3>;
> + };
> +};
> +
> +&timers8 {
> + /* spare dmas for other usage */
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +
> + status = "okay";
> +
> + led_pwm: pwm {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&pwm8_pins_b>;
> + pinctrl-1 = <&pwm8_sleep_pins_b>;
> + status = "okay";
> + };
> +};
> diff --git a/arch/arm/boot/dts/stm32mp15xc-lxa-tac.dtsi b/arch/arm/boot/dts/stm32mp15xc-lxa-tac.dtsi
> new file mode 100644
> index 0000000000000..ca4d25f5c9b51
> --- /dev/null
> +++ b/arch/arm/boot/dts/stm32mp15xc-lxa-tac.dtsi
> @@ -0,0 +1,612 @@
> +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
> +/*
> + * Copyright (C) 2020 STMicroelectronics - All Rights Reserved
> + * Copyright (C) 2021 Rouven Czerwinski, Pengutronix
> + * Copyright (C) 2023 Leonard Göhrs, Pengutronix
> + */
> +
> +#include "stm32mp15xc.dtsi"
> +#include "stm32mp15xx-osd32.dtsi"
> +#include "stm32mp15xxac-pinctrl.dtsi"
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/pwm/pwm.h>
> +
> +/ {
> + aliases {
> + ethernet0 = ðernet0;
> + ethernet1 = &port_uplink;
> + ethernet2 = &port_dut;
> + mmc1 = &sdmmc2;
> + serial0 = &uart4;
> + serial1 = &usart3;
> + };
> +
> + chosen {
> + stdout-path = &uart4;
> + };
> +
> + led-controller-0 {
> + compatible = "gpio-leds";
> +
> + led-0 {
> + label = "tac:green:user1";
> + gpios = <&gpiof 10 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + };
> +
> + led-1 {
> + label = "tac:green:user2";
> + gpios = <&gpiog 7 GPIO_ACTIVE_HIGH>;
> + };
> +
> + led-2 {
> + label = "tac:green:statusdut";
> + gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
> + };
> +
> + /* led-3 and led-4 are internally connected antiparallel to one
> + * another inside the ethernet jack like this:
> + * GPIOA14 ---+---|led-3|>--+--- GPIOD15
> + * +--<|led-4|---+
> + * E.g. only one of the LEDs can be illuminated at a time while
> + * the other output must be driven low.
> + * This should likely be implemented using a multi color LED
> + * driver for antiparallel LEDs.
> + */
> + led-3 {
> + label = "tac:green:statuslab";
> + gpios = <&gpioa 14 GPIO_ACTIVE_HIGH>;
> + };
> +
> + led-4 {
> + label = "tac:orange:statuslab";
> + gpios = <&gpiod 15 GPIO_ACTIVE_HIGH>;
> + };
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + button-lower {
> + label = "USER_BTN2";
> + linux,code = <KEY_ESC>;
> + gpios = <&gpioe 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> + };
> +
> + button-upper {
> + label = "USER_BTN";
> + linux,code = <KEY_HOME>;
> + gpios = <&gpioi 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> + };
> + };
> +
> + /* supplied by either barrel connector or PoE */
> + reg_12v: regulator-12v {
> + compatible = "regulator-fixed";
> + regulator-name = "12V";
> + regulator-min-microvolt = <12000000>;
> + regulator-max-microvolt = <12000000>;
> + regulator-always-on;
> + };
> +
> + reg_5v: regulator-5v {
> + compatible = "regulator-fixed";
> + regulator-name = "5V";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-always-on;
> + vin-supply = <®_12v>;
> + };
> +
> + reg_1v2: regulator-1v2 {
> + compatible = "regulator-fixed";
> + regulator-name = "1V2";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-always-on;
> + vin-supply = <®_5v>;
> + };
> +
> + reg_pb_5v: regulator-pb-5v {
> + compatible = "regulator-fixed";
> + regulator-name = "5V_POWERBOARD";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-always-on;
> + vin-supply = <®_5v>;
> + };
> +
> + reg_pb_3v3: regulator-pb-3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "3V3_POWERBOARD";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + vin-supply = <®_pb_5v>;
> + };
> +
> + output-iobus-12v {
> + compatible = "regulator-output";
> + vout-supply = <®_iobus_12v>;
> + };
> +
> + output-vuart {
> + compatible = "regulator-output";
> + vout-supply = <&v3v3_hdmi>;
> + };
> +};
> +
> +baseboard_eeprom: &sip_eeprom {
> +};
> +
> +&adc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&adc1_ain_pins_a>;
> + vdd-supply = <&vdd>;
> + vdda-supply = <&vdda>;
> + vref-supply = <&vrefbuf>;
> + status = "okay";
> +
> + adc1: adc@0 {
> + st,adc-channels = <0 1 2 5 9 10 13 15>;
> + st,min-sample-time-nsecs = <5000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + channel@0 {
> + reg = <0>;
> + label = "HOST_2_CURR_FB";
> + };
> +
> + channel@1 {
> + reg = <1>;
> + label = "HOST_3_CURR_FB";
> + };
> +
> + channel@2 {
> + reg = <2>;
> + label = "OUT_0_FB";
> + };
> +
> + channel@5 {
> + reg = <5>;
> + label = "IOBUS_CURR_FB";
> + };
> +
> + channel@9 {
> + reg = <9>;
> + label = "IOBUS_VOLT_FB";
> + };
> +
> + channel@10 {
> + reg = <10>;
> + label = "OUT_1_FB";
> + };
> +
> + channel@13 {
> + reg = <13>;
> + label = "HOST_CURR_FB";
> + };
> +
> + channel@15 {
> + reg = <15>;
> + label = "HOST_1_CURR_FB";
> + };
> + };
> +
> + adc2: adc@100 {
> + st,adc-channels = <12>;
> + st,min-sample-time-nsecs = <500000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + channel@12 {
> + reg = <12>;
> + label = "TEMP_INTERNAL";
> + };
> + };
> +};
> +
> +&crc1 {
> + status = "okay";
> +};
> +
> +&cryp1 {
> + status = "okay";
> +};
> +
> +&dts {
> + status = "okay";
> +};
> +
> +ðernet0 {
> + assigned-clocks = <&rcc ETHCK_K>, <&rcc PLL4_P>;
> + assigned-clock-parents = <&rcc PLL4_P>;
> + assigned-clock-rates = <125000000>; /* Clock PLL4 to 750Mhz in ATF */
> +
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <ðernet0_rgmii_pins_d>;
> + pinctrl-1 = <ðernet0_rgmii_sleep_pins_d>;
> +
> + st,eth-clk-sel;
> + phy-mode = "rgmii-id";
> +
> + status = "okay";
> +
> + fixed-link {
> + speed = <1000>;
> + full-duplex;
> + };
> +};
> +
> +ðernet0_rgmii_pins_d {
> + pins1 {
> + /* Reduce EMI emission by reducing RGMII drive strength */
> + slew-rate = <1>;
> + };
> +};
> +
> +&gpiob {
> + gpio-line-names = "", "", "", "", "", /* 0 */
> + "", "USB_RESET", "", "", "", /* 5 */
> + "", "", "", "", "", /* 10 */
> + ""; /* 15 */
> +};
> +
> +&gpiod {
> + gpio-line-names = "", "", "", "", "TP38", /* 0 */
> + "TP39", "", "", "TP41", "TP42", /* 5 */
> + "OLED_DC", "", "", "ETH_CS", "", /* 10 */
> + "ETH_LAB_LEDRN"; /* 15 */
> +};
> +
> +&gpioe {
> + gpio-line-names = "TP35", "", "", "", "CAN_1_120R", /* 0 */
> + "", "", "USER_BTN2", "TP48", "UART_TX_EN", /* 5 */
> + "UART_RX_EN", "TP24", "", "TP25", "TP26", /* 10 */
> + "TP27"; /* 15 */
> +};
> +
> +&gpiof {
> + gpio-line-names = "TP36", "TP37", "", "", "OLED_CS", /* 0 */
> + "", "", "", "", "", /* 5 */
> + "USER_LED1", "", "STACK_CS0", "", "", /* 10 */
> + ""; /* 15 */
> +};
> +
> +&gpiog {
> + gpio-line-names = "ETH_RESET", "", "", "", "", /* 0 */
> + "IOBUS_FLT_FB", "", "USER_LED2", "ETH1_PPS_A", "CAN_0_120R", /* 5 */
> + "TP49", "", "", "", "", /* 10 */
> + ""; /* 15 */
> +};
> +
> +&gpioh {
> + gpio-line-names = "", "", "OUT_1", "OUT_0", "OLED_RESET", /* 0 */
> + "", "", "", "", "", /* 5 */
> + "ETH1_PPS_B", "ETH_GPIO2", "", "IOBUS_PWR_EN", "", /* 10 */
> + "TP33"; /* 15 */
> +};
> +
> +&gpioi {
> + gpio-line-names = "TIM_RTS", "", "", "", "DEVICE_DATA_EN", /* 0 */
> + "", "", "", "ETH_WOL", "TP43", /* 5 */
> + "", "USER_BTN"; /* 10 */
> +};
> +
> +&gpioz {
> + gpio-line-names = "HWID0", "HWID1", "HWID2", "HWID3", "", /* 0 */
> + "", "HWID4", "HWID5"; /* 5 */
> +};
> +
> +&hash1 {
> + status = "okay";
> +};
> +
> +&i2c1 {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&i2c1_pins_b>;
> + pinctrl-1 = <&i2c1_sleep_pins_b>;
> + status = "okay";
> +
> + powerboard_eeprom: eeprom@50 {
> + compatible = "atmel,24c02";
> + reg = <0x50>;
> + vcc-supply = <&v3v3>;
> + };
> +
> + temperature-sensor@48 {
> + compatible = "national,lm75a";
> + reg = <0x48>;
> + status = "disabled";
> + };
> +};
> +
> +&i2c5 {
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&i2c5_pins_b>;
> + pinctrl-1 = <&i2c5_sleep_pins_b>;
> +
> + status = "okay";
> +
> + usbhub: usbhub@2c {
> + compatible ="microchip,usb2514b";
> + reg = <0x2c>;
> + vdd-supply = <&v3v3>;
> + reset-gpios = <&gpiob 6 GPIO_ACTIVE_LOW>;
> + };
> +};
> +
> +&iwdg2 {
> + timeout-sec = <8>;
> + status = "okay";
> +};
> +
> +&m_can1 {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&m_can1_pins_b>;
> + pinctrl-1 = <&m_can1_sleep_pins_b>;
> + status = "okay";
> +};
> +
> +&m_can2 {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&m_can2_pins_a>;
> + pinctrl-1 = <&m_can2_sleep_pins_a>;
> + status = "okay";
> +};
> +
> +&pmic {
> + regulators {
> + buck1-supply = <®_5v>; /* VIN */
> + buck2-supply = <®_5v>; /* VIN */
> + buck3-supply = <®_5v>; /* VIN */
> + buck4-supply = <®_5v>; /* VIN */
> + ldo2-supply = <®_5v>; /* PMIC_LDO25IN */
> + ldo4-supply = <®_5v>; /* VIN */
> + ldo5-supply = <®_5v>; /* PMIC_LDO25IN */
> + vref_ddr-supply = <®_5v>; /* VIN */
> + boost-supply = <®_5v>; /* PMIC_BSTIN */
> + pwr_sw2-supply = <&bst_out>; /* PMIC_SWIN */
> + };
> +};
> +
> +&pwr_regulators {
> + vdd-supply = <&vdd>;
> + vdd_3v3_usbfs-supply = <&vdd_usb>;
> +};
> +
> +&rtc {
> + status = "okay";
> +};
> +
> +&sdmmc2 {
> + pinctrl-names = "default", "opendrain", "sleep";
> + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_b>;
> + pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_b>;
> + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_b>;
> + vmmc-supply = <&v3v3>;
> +
> + bus-width = <8>;
> + mmc-ddr-3_3v;
> + no-1-8-v;
> + non-removable;
> + no-sd;
> + no-sdio;
> + st,neg-edge;
> +
> + status = "okay";
> +};
> +
> +&spi2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&spi2_pins_c>;
> + cs-gpios = <&gpiof 12 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&spi4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&spi4_pins_a>;
> + cs-gpios = <&gpiof 4 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +
> + lcd: display@0 {
> + compatible = "shineworld,lh133k", "panel-mipi-dbi-spi";
> + reg = <0>;
> + power-supply = <&v3v3>;
> + io-supply = <&v3v3>;
> + backlight = <&backlight>;
> + dc-gpios = <&gpiod 10 GPIO_ACTIVE_HIGH>;
> + reset-gpios = <&gpioh 4 GPIO_ACTIVE_HIGH>;
> + spi-3wire;
> + spi-max-frequency = <32000000>;
> +
> + width-mm = <23>;
> + height-mm = <23>;
> + rotation = <180>;
> +
> + panel-timing {
> + hactive = <240>;
> + vactive = <240>;
> + hback-porch = <0>;
> + vback-porch = <0>;
> +
> + clock-frequency = <0>;
> + hfront-porch = <0>;
> + hsync-len = <0>;
> + vfront-porch = <0>;
> + vsync-len = <0>;
> + };
> + };
> +};
> +
> +&spi5 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&spi5_pins_a>;
> +
> + /* spare dmas for other usage */
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +
> + cs-gpios = <&gpiod 13 GPIO_ACTIVE_LOW>;
> +
> + status = "okay";
> +
> + switch: switch@0 {
> + compatible = "microchip,ksz9563";
> + reg = <0>;
> +
> + reset-gpios = <&gpiog 0 GPIO_ACTIVE_LOW>;
> + spi-max-frequency = <44000000>;
> + spi-cpha;
> + spi-cpol;
> +
> + interrupt-parent = <&gpioa>;
> + interrupts = <6 IRQ_TYPE_EDGE_RISING>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + port_dut: port@0 {
> + reg = <0>;
> + label = "dut";
> + };
> +
> + port_uplink: port@1 {
> + reg = <1>;
> + label = "uplink";
> + };
> +
> + port_cpu: port@2 {
> + reg = <2>;
> + label = "cpu";
> +
> + ethernet = <ðernet0>;
> +
> + phy-mode = "rgmii-id";
> + rx-internal-delay-ps = <2000>;
> + tx-internal-delay-ps = <2000>;
> +
> + fixed-link {
> + speed = <1000>;
> + full-duplex;
> + };
> + };
> + };
> + };
> +};
> +
> +&timers2 {
> + /* spare dmas for other usage */
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +
> + status = "okay";
> +
> + timer@1 {
> + status = "okay";
> + };
> +};
> +
> +&timers3 {
> + /* spare dmas for other usage */
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +
> + status = "okay";
> +
> + timer@2 {
> + status = "okay";
> + };
> +};
> +
> +&timers4 {
> + /* spare dmas for other usage */
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +
> + status = "okay";
> +
> + timer@3 {
> + status = "okay";
> + };
> +};
> +
> +&uart4 {
> + label = "debug";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart4_pins_a>;
> +
> + /* spare dmas for other usage */
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +
> + status = "okay";
> +};
> +
> +&usart3 {
> + label = "dut";
> + uart-has-rtscts;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&usart3_pins_f>;
> +
> + /* spare dmas for other usage */
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +
> + status = "okay";
> +};
> +
> +&usbh_ehci {
> + phys = <&usbphyc_port0>;
> + phy-names = "usb";
> +
> + status = "okay";
> +};
> +
> +&usbotg_hs {
> + phys = <&usbphyc_port1 0>;
> + phy-names = "usb2-phy";
> +
> + vusb_d-supply = <&vdd_usb>;
> + vusb_a-supply = <®18>;
> +
> + dr_mode = "peripheral";
> +
> + status = "okay";
> +};
> +
> +&usbphyc {
> + status = "okay";
> +};
> +
> +&usbphyc_port0 {
> + phy-supply = <&vdd_usb>;
> +};
> +
> +&usbphyc_port1 {
> + phy-supply = <&vdd_usb>;
> +};
> +
> +&v3v3_hdmi {
> + /delete-property/regulator-always-on;
> +};
> +
> +&vrefbuf {
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + vdda-supply = <&vdda>;
> +
> + status = "okay";
> +};
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v1 3/8] dt-bindings: gpio: pca9570: add gpio-line-names property
2023-06-07 16:36 ` andy.shevchenko
@ 2023-06-08 13:24 ` Krzysztof Kozlowski
0 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2023-06-08 13:24 UTC (permalink / raw)
To: andy.shevchenko, Leonard Göhrs
Cc: Linus Walleij, Bartosz Golaszewski, Sungbo Eo, kernel,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-gpio,
devicetree, linux-kernel
On 07/06/2023 18:36, andy.shevchenko@gmail.com wrote:
> Wed, Jun 07, 2023 at 01:55:02PM +0200, Leonard Göhrs kirjoitti:
>> This patch allows giving each of the controller's pins a meaningful
>> name.
>
> Isn't it gpio.txt already mentiones this?
TXT does not matter for DT schema. It's is already covered by dtschemas.
> Perhaps you need to convert that to YAML and use it here?
How would it solve anything? We still want constraints, right?
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v1 3/8] dt-bindings: gpio: pca9570: add gpio-line-names property
2023-06-07 11:55 ` [PATCH v1 3/8] dt-bindings: gpio: pca9570: add gpio-line-names property Leonard Göhrs
2023-06-07 16:36 ` andy.shevchenko
@ 2023-06-08 13:24 ` Krzysztof Kozlowski
2023-06-13 14:54 ` Bartosz Golaszewski
2 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2023-06-08 13:24 UTC (permalink / raw)
To: Leonard Göhrs, Linus Walleij, Bartosz Golaszewski, Sungbo Eo
Cc: kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-gpio, devicetree, linux-kernel
On 07/06/2023 13:55, Leonard Göhrs wrote:
> This patch allows giving each of the controller's pins a meaningful
> name.
>
> Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
> ---
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v1 3/8] dt-bindings: gpio: pca9570: add gpio-line-names property
2023-06-07 11:55 ` [PATCH v1 3/8] dt-bindings: gpio: pca9570: add gpio-line-names property Leonard Göhrs
2023-06-07 16:36 ` andy.shevchenko
2023-06-08 13:24 ` Krzysztof Kozlowski
@ 2023-06-13 14:54 ` Bartosz Golaszewski
2 siblings, 0 replies; 26+ messages in thread
From: Bartosz Golaszewski @ 2023-06-13 14:54 UTC (permalink / raw)
To: Leonard Göhrs
Cc: Linus Walleij, Sungbo Eo, kernel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-gpio, devicetree,
linux-kernel
On Wed, Jun 7, 2023 at 1:57 PM Leonard Göhrs <l.goehrs@pengutronix.de> wrote:
>
> This patch allows giving each of the controller's pins a meaningful
> name.
>
> Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
> ---
> Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml b/Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml
> index 5b0134304e51c..452f8972a9659 100644
> --- a/Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml
> +++ b/Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml
> @@ -24,6 +24,10 @@ properties:
> '#gpio-cells':
> const: 2
>
> + gpio-line-names:
> + minItems: 4
> + maxItems: 8
> +
> required:
> - compatible
> - reg
> --
> 2.39.2
>
Applied, thanks!
Bart
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v1 8/8] ARM: dts: stm32: lxa-tac: add Linux Automation GmbH TAC
2023-06-08 13:13 ` Alexandre TORGUE
@ 2023-06-14 12:46 ` Leonard Göhrs
0 siblings, 0 replies; 26+ messages in thread
From: Leonard Göhrs @ 2023-06-14 12:46 UTC (permalink / raw)
To: Alexandre TORGUE
Cc: kernel, linux-arm-kernel, devicetree, linux-kernel, linux-stm32,
Arnd Bergmann, Olof Johansson, soc, Rob Herring,
Krzysztof Kozlowski, Maxime Coquelin, Conor Dooley
On 08.06.23 15:13, Alexandre TORGUE wrote:
> Hi Leonard
>
> On 6/7/23 13:55, Leonard Göhrs wrote:
>> The Linux Automation Test Automation Controller (LXA TAC)[1] is an embedded
>> software development tool built around the Octavo Systems OSD32MP15x SiP.
>>
>> The device contains an eMMC for storage, a DSA-capable on board ethernet
>> switch with two external ports, dual CAN busses, a power switch to turn
>> a device under test on or off and some other I/O.
>>
>> As of now there are two STM32MP157 based hardware generations (Gen 1 and
>> Gen 2) that have most of their hardware config in common.
>> In the future there will also be a STM32MP153 based hardware generation.
>>
>> [1]: https://www.linux-automation.com/en/products/lxa-tac.html
>>
>> Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
>> ---
>
> There are some YAML issues reported. Some are linked to the
> stm32mp151.dts or common bindings and are going to be fixed. But some
> looks more linked to your board. Can you have a look on those:
Most of these should be addressed by the other patches in the series,
that add devicetree bindings for things we use in the LXA TAC devicetree.
> arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dtb: gpio@24:
> 'gpio-line-names' does not match any of the regexes: 'pinctrl-[0-9]+'
> From schema: /Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml
The patch to add this property is now in gpio/for-next.
> arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dtb: display@0: compatible:0:
> 'shineworld,lh133k' is not one of ['sainsmart18']
> From schema:
> /Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
>
> arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dtb: display@0: Unevaluated
> properties are not allowed ('compatible', 'spi-3wire' were unexpected)
> From schema:
> /Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml> arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dtb:
> /soc/spi@44005000/display@0: failed to match any schema with compatible:
> ['shineworld,lh133k', 'panel-mipi-dbi-spi']
Bindings for these properties are added in previous patches in this series
(which are not yet applied anywhere).
> /arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dtb: switch@0: Unevaluated
> properties are not allowed ('spi-cpha', 'spi-cpol', 'interrupt-parent',
> 'interrupts' were unexpected)
> From schema: /Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
The 'spi-cpha' and 'spi-cpol' properties were not actually required, so I've
dropped them from the devicetree for the V2 I've just sent.
I've added a patch that adds bindings for 'interrupts' to the V2, so this should
be addressed as well.
> arch/arm/boot/dts/stm32mp157c-lxa-tac-gen2.dtb: can@4400f000:
> 'termination-gpios', 'termination-ohms' do not match any of the regexes:
> 'pinctrl-[0-9]+'
> From schema: /Documentation/devicetree/bindings/net/can/bosch,m_can.yaml
This should also be addressed in the V2.
> Thanks in advance
Thanks for checking out my patch!
>
> Alex
>
>
>> arch/arm/boot/dts/Makefile | 2 +
>> .../arm/boot/dts/stm32mp157c-lxa-tac-gen1.dts | 93 +++
>> .../arm/boot/dts/stm32mp157c-lxa-tac-gen2.dts | 172 +++++
>> arch/arm/boot/dts/stm32mp15xc-lxa-tac.dtsi | 612 ++++++++++++++++++
>> 4 files changed, 879 insertions(+)
>> create mode 100644 arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dts
>> create mode 100644 arch/arm/boot/dts/stm32mp157c-lxa-tac-gen2.dts
>> create mode 100644 arch/arm/boot/dts/stm32mp15xc-lxa-tac.dtsi
>>
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index 59829fc903152..886371436bbc1 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -1266,6 +1266,8 @@ dtb-$(CONFIG_ARCH_STM32) += \
>> stm32mp157c-ev1.dtb \
>> stm32mp157c-ev1-scmi.dtb \
>> stm32mp157c-lxa-mc1.dtb \
>> + stm32mp157c-lxa-tac-gen1.dtb \
>> + stm32mp157c-lxa-tac-gen2.dtb \
>> stm32mp157c-odyssey.dtb
>> dtb-$(CONFIG_MACH_SUN4I) += \
>> sun4i-a10-a1000.dtb \
>> diff --git a/arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dts b/arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dts
>> new file mode 100644
>> index 0000000000000..81f254fb88b0a
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/stm32mp157c-lxa-tac-gen1.dts
>> @@ -0,0 +1,93 @@
>> +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
>> +/*
>> + * Copyright (C) 2020 STMicroelectronics - All Rights Reserved
>> + * Copyright (C) 2021 Rouven Czerwinski, Pengutronix
>> + * Copyright (C) 2023 Leonard Göhrs, Pengutronix
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "stm32mp157.dtsi"
>> +#include "stm32mp15xc-lxa-tac.dtsi"
>> +
>> +/ {
>> + model = "Linux Automation Test Automation Controller (TAC) Gen 1";
>> + compatible = "lxa,stm32mp157c-tac-gen1", "oct,stm32mp15xx-osd32", "st,stm32mp157";
>> +
>> + backlight: backlight {
>> + compatible = "pwm-backlight";
>> + power-supply = <&v3v3>;
>> +
>> + brightness-levels = <0 31 63 95 127 159 191 223 255>;
>> + default-brightness-level = <7>;
>> + pwms = <&backlight_pwm 1 1000000 0>;
>> + };
>> +
>> + reg_iobus_12v: regulator-iobus-12v {
>> + compatible = "regulator-fixed";
>> + vin-supply = <®_12v>;
>> +
>> + gpio = <&gpioh 13 GPIO_ACTIVE_HIGH>;
>> + enable-active-high;
>> + regulator-max-microvolt = <12000000>;
>> + regulator-min-microvolt = <12000000>;
>> + regulator-name = "12V_IOBUS";
>> + };
>> +};
>> +
>> +&gpioa {
>> + gpio-line-names = "", "", "STACK_CS2", "", "STACK_CS3", /* 0 */
>> + "ETH_GPIO1", "ETH_INT", "", "", "", /* 5 */
>> + "", "", "", "BOOTROM_LED", "ETH_LAB_LEDRP", /* 10 */
>> + ""; /* 15 */
>> +};
>> +
>> +&gpioc {
>> + gpio-line-names = "", "STACK_CS1", "", "", "", /* 0 */
>> + "", "", "", "", "", /* 5 */
>> + "", ""; /* 10 */
>> +};
>> +
>> +&gpu {
>> + status = "disabled";
>> +};
>> +
>> +&i2c1 {
>> + powerboard_gpio: gpio@24 {
>> + compatible = "nxp,pca9570";
>> + reg = <0x24>;
>> +
>> + #gpio-cells = <2>;
>> + gpio-controller;
>> + gpio-line-names = "DUT_PWR_EN", "DUT_PWR_DISCH", "DUT_PWR_ADCRST", "";
>> + };
>> +};
>> +
>> +&spi2 {
>> + adc@0 {
>> + compatible = "ti,lmp92064";
>> + reg = <0>;
>> + spi-max-frequency = <5000000>;
>> + vdd-supply = <®_pb_3v3>;
>> + vdig-supply = <®_pb_3v3>;
>> + reset-gpios = <&powerboard_gpio 2 GPIO_ACTIVE_HIGH>;
>> +
>> + shunt-resistor-micro-ohms = <15000>;
>> + };
>> +};
>> +
>> +&timers1 {
>> + /* spare dmas for other usage */
>> + /delete-property/dmas;
>> + /delete-property/dma-names;
>> +
>> + status = "okay";
>> +
>> + backlight_pwm: pwm {
>> + pinctrl-names = "default", "sleep";
>> + pinctrl-0 = <&pwm1_pins_c>;
>> + pinctrl-1 = <&pwm1_sleep_pins_c>;
>> +
>> + status = "okay";
>> + };
>> +};
>> diff --git a/arch/arm/boot/dts/stm32mp157c-lxa-tac-gen2.dts b/arch/arm/boot/dts/stm32mp157c-lxa-tac-gen2.dts
>> new file mode 100644
>> index 0000000000000..8a34d15e9005f
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/stm32mp157c-lxa-tac-gen2.dts
>> @@ -0,0 +1,172 @@
>> +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
>> +/*
>> + * Copyright (C) 2020 STMicroelectronics - All Rights Reserved
>> + * Copyright (C) 2021 Rouven Czerwinski, Pengutronix
>> + * Copyright (C) 2023 Leonard Göhrs, Pengutronix
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "stm32mp157.dtsi"
>> +#include "stm32mp15xc-lxa-tac.dtsi"
>> +
>> +/ {
>> + model = "Linux Automation Test Automation Controller (TAC) Gen 2";
>> + compatible = "lxa,stm32mp157c-tac-gen2", "oct,stm32mp15xx-osd32", "st,stm32mp157";
>> +
>> + backlight: backlight {
>> + compatible = "pwm-backlight";
>> + power-supply = <&v3v3>;
>> +
>> + brightness-levels = <0 31 63 95 127 159 191 223 255>;
>> + default-brightness-level = <7>;
>> + pwms = <&led_pwm 3 1000000 0>;
>> + };
>> +
>> + reg_iobus_12v: regulator-iobus-12v {
>> + compatible = "regulator-fixed";
>> + vin-supply = <®_12v>;
>> + gpio = <&gpioh 13 GPIO_ACTIVE_LOW>;
>> + regulator-max-microvolt = <12000000>;
>> + regulator-min-microvolt = <12000000>;
>> + regulator-name = "12V_IOBUS";
>> + };
>> +
>> + led-controller-1 {
>> + compatible = "pwm-leds-multicolor";
>> +
>> + multi-led {
>> + color = <LED_COLOR_ID_RGB>;
>> + function = LED_FUNCTION_STATUS;
>> + max-brightness = <65535>;
>> +
>> + led-red {
>> + active-low;
>> + color = <LED_COLOR_ID_RED>;
>> + pwms = <&led_pwm 0 1000000 0>;
>> + };
>> +
>> + led-green {
>> + active-low;
>> + color = <LED_COLOR_ID_GREEN>;
>> + pwms = <&led_pwm 2 1000000 0>;
>> + };
>> +
>> + led-blue {
>> + active-low;
>> + color = <LED_COLOR_ID_BLUE>;
>> + pwms = <&led_pwm 1 1000000 0>;
>> + };
>> + };
>> + };
>> +
>> + led-controller-2 {
>> + compatible = "gpio-leds";
>> +
>> + led-5 {
>> + label = "tac:green:iobus";
>> + gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>;
>> + };
>> +
>> + led-6 {
>> + label = "tac:green:can";
>> + gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>;
>> + };
>> +
>> + led-7 {
>> + label = "tac:green:out0";
>> + gpios = <&gpiob 8 GPIO_ACTIVE_HIGH>;
>> + };
>> +
>> + led-8 {
>> + label = "tac:green:out1";
>> + gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>;
>> + };
>> +
>> + led-9 {
>> + label = "tac:green:uarttx";
>> + gpios = <&gpiod 3 GPIO_ACTIVE_HIGH>;
>> + };
>> +
>> + led-10 {
>> + label = "tac:green:uartrx";
>> + gpios = <&gpiof 6 GPIO_ACTIVE_HIGH>;
>> + };
>> +
>> + led-11 {
>> + label = "tac:green:usbh1";
>> + gpios = <&gpioc 8 GPIO_ACTIVE_HIGH>;
>> + };
>> +
>> + led-12 {
>> + label = "tac:green:usbh2";
>> + gpios = <&gpiod 6 GPIO_ACTIVE_HIGH>;
>> + };
>> +
>> + led-13 {
>> + label = "tac:green:usbh3";
>> + gpios = <&gpiob 9 GPIO_ACTIVE_HIGH>;
>> + };
>> +
>> + led-14 {
>> + label = "tac:green:usbg";
>> + gpios = <&gpiod 14 GPIO_ACTIVE_HIGH>;
>> + linux,default-trigger = "usb-gadget";
>> + };
>> +
>> + led-15 {
>> + label = "tac:green:dutpwr";
>> + gpios = <&gpioa 15 GPIO_ACTIVE_HIGH>;
>> + };
>> + };
>> +};
>> +
>> +&gpioa {
>> + gpio-line-names = "", "", "DUT_PWR_EN", "", "STACK_CS3", /* 0 */
>> + "ETH_GPIO1", "ETH_INT", "", "", "", /* 5 */
>> + "", "", "", "BOOTROM_LED", "ETH_LAB_LEDRP", /* 10 */
>> + ""; /* 15 */
>> +};
>> +
>> +&gpioc {
>> + gpio-line-names = "", "DUT_PWR_DISCH", "", "", "", /* 0 */
>> + "", "", "", "", "", /* 5 */
>> + "", ""; /* 10 */
>> +};
>> +
>> +&gpu {
>> + status = "disabled";
>> +};
>> +
>> +&m_can2 {
>> + termination-gpios = <&gpioe 4 GPIO_ACTIVE_HIGH>;
>> + termination-ohms = <120>;
>> +};
>> +
>> +&spi2 {
>> + adc@0 {
>> + compatible = "ti,lmp92064";
>> + reg = <0>;
>> +
>> + reset-gpios = <&gpioa 4 GPIO_ACTIVE_HIGH>;
>> + shunt-resistor-micro-ohms = <15000>;
>> + spi-max-frequency = <5000000>;
>> + vdd-supply = <®_pb_3v3>;
>> + vdig-supply = <®_pb_3v3>;
>> + };
>> +};
>> +
>> +&timers8 {
>> + /* spare dmas for other usage */
>> + /delete-property/dmas;
>> + /delete-property/dma-names;
>> +
>> + status = "okay";
>> +
>> + led_pwm: pwm {
>> + pinctrl-names = "default", "sleep";
>> + pinctrl-0 = <&pwm8_pins_b>;
>> + pinctrl-1 = <&pwm8_sleep_pins_b>;
>> + status = "okay";
>> + };
>> +};
>> diff --git a/arch/arm/boot/dts/stm32mp15xc-lxa-tac.dtsi b/arch/arm/boot/dts/stm32mp15xc-lxa-tac.dtsi
>> new file mode 100644
>> index 0000000000000..ca4d25f5c9b51
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/stm32mp15xc-lxa-tac.dtsi
>> @@ -0,0 +1,612 @@
>> +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
>> +/*
>> + * Copyright (C) 2020 STMicroelectronics - All Rights Reserved
>> + * Copyright (C) 2021 Rouven Czerwinski, Pengutronix
>> + * Copyright (C) 2023 Leonard Göhrs, Pengutronix
>> + */
>> +
>> +#include "stm32mp15xc.dtsi"
>> +#include "stm32mp15xx-osd32.dtsi"
>> +#include "stm32mp15xxac-pinctrl.dtsi"
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/input/input.h>
>> +#include <dt-bindings/leds/common.h>
>> +#include <dt-bindings/pwm/pwm.h>
>> +
>> +/ {
>> + aliases {
>> + ethernet0 = ðernet0;
>> + ethernet1 = &port_uplink;
>> + ethernet2 = &port_dut;
>> + mmc1 = &sdmmc2;
>> + serial0 = &uart4;
>> + serial1 = &usart3;
>> + };
>> +
>> + chosen {
>> + stdout-path = &uart4;
>> + };
>> +
>> + led-controller-0 {
>> + compatible = "gpio-leds";
>> +
>> + led-0 {
>> + label = "tac:green:user1";
>> + gpios = <&gpiof 10 GPIO_ACTIVE_HIGH>;
>> + linux,default-trigger = "heartbeat";
>> + };
>> +
>> + led-1 {
>> + label = "tac:green:user2";
>> + gpios = <&gpiog 7 GPIO_ACTIVE_HIGH>;
>> + };
>> +
>> + led-2 {
>> + label = "tac:green:statusdut";
>> + gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
>> + };
>> +
>> + /* led-3 and led-4 are internally connected antiparallel to one
>> + * another inside the ethernet jack like this:
>> + * GPIOA14 ---+---|led-3|>--+--- GPIOD15
>> + * +--<|led-4|---+
>> + * E.g. only one of the LEDs can be illuminated at a time while
>> + * the other output must be driven low.
>> + * This should likely be implemented using a multi color LED
>> + * driver for antiparallel LEDs.
>> + */
>> + led-3 {
>> + label = "tac:green:statuslab";
>> + gpios = <&gpioa 14 GPIO_ACTIVE_HIGH>;
>> + };
>> +
>> + led-4 {
>> + label = "tac:orange:statuslab";
>> + gpios = <&gpiod 15 GPIO_ACTIVE_HIGH>;
>> + };
>> + };
>> +
>> + gpio-keys {
>> + compatible = "gpio-keys";
>> +
>> + button-lower {
>> + label = "USER_BTN2";
>> + linux,code = <KEY_ESC>;
>> + gpios = <&gpioe 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
>> + };
>> +
>> + button-upper {
>> + label = "USER_BTN";
>> + linux,code = <KEY_HOME>;
>> + gpios = <&gpioi 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
>> + };
>> + };
>> +
>> + /* supplied by either barrel connector or PoE */
>> + reg_12v: regulator-12v {
>> + compatible = "regulator-fixed";
>> + regulator-name = "12V";
>> + regulator-min-microvolt = <12000000>;
>> + regulator-max-microvolt = <12000000>;
>> + regulator-always-on;
>> + };
>> +
>> + reg_5v: regulator-5v {
>> + compatible = "regulator-fixed";
>> + regulator-name = "5V";
>> + regulator-min-microvolt = <5000000>;
>> + regulator-max-microvolt = <5000000>;
>> + regulator-always-on;
>> + vin-supply = <®_12v>;
>> + };
>> +
>> + reg_1v2: regulator-1v2 {
>> + compatible = "regulator-fixed";
>> + regulator-name = "1V2";
>> + regulator-min-microvolt = <1200000>;
>> + regulator-max-microvolt = <1200000>;
>> + regulator-always-on;
>> + vin-supply = <®_5v>;
>> + };
>> +
>> + reg_pb_5v: regulator-pb-5v {
>> + compatible = "regulator-fixed";
>> + regulator-name = "5V_POWERBOARD";
>> + regulator-min-microvolt = <5000000>;
>> + regulator-max-microvolt = <5000000>;
>> + regulator-always-on;
>> + vin-supply = <®_5v>;
>> + };
>> +
>> + reg_pb_3v3: regulator-pb-3v3 {
>> + compatible = "regulator-fixed";
>> + regulator-name = "3V3_POWERBOARD";
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-always-on;
>> + vin-supply = <®_pb_5v>;
>> + };
>> +
>> + output-iobus-12v {
>> + compatible = "regulator-output";
>> + vout-supply = <®_iobus_12v>;
>> + };
>> +
>> + output-vuart {
>> + compatible = "regulator-output";
>> + vout-supply = <&v3v3_hdmi>;
>> + };
>> +};
>> +
>> +baseboard_eeprom: &sip_eeprom {
>> +};
>> +
>> +&adc {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&adc1_ain_pins_a>;
>> + vdd-supply = <&vdd>;
>> + vdda-supply = <&vdda>;
>> + vref-supply = <&vrefbuf>;
>> + status = "okay";
>> +
>> + adc1: adc@0 {
>> + st,adc-channels = <0 1 2 5 9 10 13 15>;
>> + st,min-sample-time-nsecs = <5000>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + status = "okay";
>> +
>> + channel@0 {
>> + reg = <0>;
>> + label = "HOST_2_CURR_FB";
>> + };
>> +
>> + channel@1 {
>> + reg = <1>;
>> + label = "HOST_3_CURR_FB";
>> + };
>> +
>> + channel@2 {
>> + reg = <2>;
>> + label = "OUT_0_FB";
>> + };
>> +
>> + channel@5 {
>> + reg = <5>;
>> + label = "IOBUS_CURR_FB";
>> + };
>> +
>> + channel@9 {
>> + reg = <9>;
>> + label = "IOBUS_VOLT_FB";
>> + };
>> +
>> + channel@10 {
>> + reg = <10>;
>> + label = "OUT_1_FB";
>> + };
>> +
>> + channel@13 {
>> + reg = <13>;
>> + label = "HOST_CURR_FB";
>> + };
>> +
>> + channel@15 {
>> + reg = <15>;
>> + label = "HOST_1_CURR_FB";
>> + };
>> + };
>> +
>> + adc2: adc@100 {
>> + st,adc-channels = <12>;
>> + st,min-sample-time-nsecs = <500000>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + status = "okay";
>> +
>> + channel@12 {
>> + reg = <12>;
>> + label = "TEMP_INTERNAL";
>> + };
>> + };
>> +};
>> +
>> +&crc1 {
>> + status = "okay";
>> +};
>> +
>> +&cryp1 {
>> + status = "okay";
>> +};
>> +
>> +&dts {
>> + status = "okay";
>> +};
>> +
>> +ðernet0 {
>> + assigned-clocks = <&rcc ETHCK_K>, <&rcc PLL4_P>;
>> + assigned-clock-parents = <&rcc PLL4_P>;
>> + assigned-clock-rates = <125000000>; /* Clock PLL4 to 750Mhz in ATF */
>> +
>> + pinctrl-names = "default", "sleep";
>> + pinctrl-0 = <ðernet0_rgmii_pins_d>;
>> + pinctrl-1 = <ðernet0_rgmii_sleep_pins_d>;
>> +
>> + st,eth-clk-sel;
>> + phy-mode = "rgmii-id";
>> +
>> + status = "okay";
>> +
>> + fixed-link {
>> + speed = <1000>;
>> + full-duplex;
>> + };
>> +};
>> +
>> +ðernet0_rgmii_pins_d {
>> + pins1 {
>> + /* Reduce EMI emission by reducing RGMII drive strength */
>> + slew-rate = <1>;
>> + };
>> +};
>> +
>> +&gpiob {
>> + gpio-line-names = "", "", "", "", "", /* 0 */
>> + "", "USB_RESET", "", "", "", /* 5 */
>> + "", "", "", "", "", /* 10 */
>> + ""; /* 15 */
>> +};
>> +
>> +&gpiod {
>> + gpio-line-names = "", "", "", "", "TP38", /* 0 */
>> + "TP39", "", "", "TP41", "TP42", /* 5 */
>> + "OLED_DC", "", "", "ETH_CS", "", /* 10 */
>> + "ETH_LAB_LEDRN"; /* 15 */
>> +};
>> +
>> +&gpioe {
>> + gpio-line-names = "TP35", "", "", "", "CAN_1_120R", /* 0 */
>> + "", "", "USER_BTN2", "TP48", "UART_TX_EN", /* 5 */
>> + "UART_RX_EN", "TP24", "", "TP25", "TP26", /* 10 */
>> + "TP27"; /* 15 */
>> +};
>> +
>> +&gpiof {
>> + gpio-line-names = "TP36", "TP37", "", "", "OLED_CS", /* 0 */
>> + "", "", "", "", "", /* 5 */
>> + "USER_LED1", "", "STACK_CS0", "", "", /* 10 */
>> + ""; /* 15 */
>> +};
>> +
>> +&gpiog {
>> + gpio-line-names = "ETH_RESET", "", "", "", "", /* 0 */
>> + "IOBUS_FLT_FB", "", "USER_LED2", "ETH1_PPS_A", "CAN_0_120R", /* 5 */
>> + "TP49", "", "", "", "", /* 10 */
>> + ""; /* 15 */
>> +};
>> +
>> +&gpioh {
>> + gpio-line-names = "", "", "OUT_1", "OUT_0", "OLED_RESET", /* 0 */
>> + "", "", "", "", "", /* 5 */
>> + "ETH1_PPS_B", "ETH_GPIO2", "", "IOBUS_PWR_EN", "", /* 10 */
>> + "TP33"; /* 15 */
>> +};
>> +
>> +&gpioi {
>> + gpio-line-names = "TIM_RTS", "", "", "", "DEVICE_DATA_EN", /* 0 */
>> + "", "", "", "ETH_WOL", "TP43", /* 5 */
>> + "", "USER_BTN"; /* 10 */
>> +};
>> +
>> +&gpioz {
>> + gpio-line-names = "HWID0", "HWID1", "HWID2", "HWID3", "", /* 0 */
>> + "", "HWID4", "HWID5"; /* 5 */
>> +};
>> +
>> +&hash1 {
>> + status = "okay";
>> +};
>> +
>> +&i2c1 {
>> + pinctrl-names = "default", "sleep";
>> + pinctrl-0 = <&i2c1_pins_b>;
>> + pinctrl-1 = <&i2c1_sleep_pins_b>;
>> + status = "okay";
>> +
>> + powerboard_eeprom: eeprom@50 {
>> + compatible = "atmel,24c02";
>> + reg = <0x50>;
>> + vcc-supply = <&v3v3>;
>> + };
>> +
>> + temperature-sensor@48 {
>> + compatible = "national,lm75a";
>> + reg = <0x48>;
>> + status = "disabled";
>> + };
>> +};
>> +
>> +&i2c5 {
>> + /delete-property/dmas;
>> + /delete-property/dma-names;
>> +
>> + pinctrl-names = "default", "sleep";
>> + pinctrl-0 = <&i2c5_pins_b>;
>> + pinctrl-1 = <&i2c5_sleep_pins_b>;
>> +
>> + status = "okay";
>> +
>> + usbhub: usbhub@2c {
>> + compatible ="microchip,usb2514b";
>> + reg = <0x2c>;
>> + vdd-supply = <&v3v3>;
>> + reset-gpios = <&gpiob 6 GPIO_ACTIVE_LOW>;
>> + };
>> +};
>> +
>> +&iwdg2 {
>> + timeout-sec = <8>;
>> + status = "okay";
>> +};
>> +
>> +&m_can1 {
>> + pinctrl-names = "default", "sleep";
>> + pinctrl-0 = <&m_can1_pins_b>;
>> + pinctrl-1 = <&m_can1_sleep_pins_b>;
>> + status = "okay";
>> +};
>> +
>> +&m_can2 {
>> + pinctrl-names = "default", "sleep";
>> + pinctrl-0 = <&m_can2_pins_a>;
>> + pinctrl-1 = <&m_can2_sleep_pins_a>;
>> + status = "okay";
>> +};
>> +
>> +&pmic {
>> + regulators {
>> + buck1-supply = <®_5v>; /* VIN */
>> + buck2-supply = <®_5v>; /* VIN */
>> + buck3-supply = <®_5v>; /* VIN */
>> + buck4-supply = <®_5v>; /* VIN */
>> + ldo2-supply = <®_5v>; /* PMIC_LDO25IN */
>> + ldo4-supply = <®_5v>; /* VIN */
>> + ldo5-supply = <®_5v>; /* PMIC_LDO25IN */
>> + vref_ddr-supply = <®_5v>; /* VIN */
>> + boost-supply = <®_5v>; /* PMIC_BSTIN */
>> + pwr_sw2-supply = <&bst_out>; /* PMIC_SWIN */
>> + };
>> +};
>> +
>> +&pwr_regulators {
>> + vdd-supply = <&vdd>;
>> + vdd_3v3_usbfs-supply = <&vdd_usb>;
>> +};
>> +
>> +&rtc {
>> + status = "okay";
>> +};
>> +
>> +&sdmmc2 {
>> + pinctrl-names = "default", "opendrain", "sleep";
>> + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_b>;
>> + pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_b>;
>> + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_b>;
>> + vmmc-supply = <&v3v3>;
>> +
>> + bus-width = <8>;
>> + mmc-ddr-3_3v;
>> + no-1-8-v;
>> + non-removable;
>> + no-sd;
>> + no-sdio;
>> + st,neg-edge;
>> +
>> + status = "okay";
>> +};
>> +
>> +&spi2 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&spi2_pins_c>;
>> + cs-gpios = <&gpiof 12 GPIO_ACTIVE_LOW>;
>> + status = "okay";
>> +};
>> +
>> +&spi4 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&spi4_pins_a>;
>> + cs-gpios = <&gpiof 4 GPIO_ACTIVE_LOW>;
>> + status = "okay";
>> +
>> + lcd: display@0 {
>> + compatible = "shineworld,lh133k", "panel-mipi-dbi-spi";
>> + reg = <0>;
>> + power-supply = <&v3v3>;
>> + io-supply = <&v3v3>;
>> + backlight = <&backlight>;
>> + dc-gpios = <&gpiod 10 GPIO_ACTIVE_HIGH>;
>> + reset-gpios = <&gpioh 4 GPIO_ACTIVE_HIGH>;
>> + spi-3wire;
>> + spi-max-frequency = <32000000>;
>> +
>> + width-mm = <23>;
>> + height-mm = <23>;
>> + rotation = <180>;
>> +
>> + panel-timing {
>> + hactive = <240>;
>> + vactive = <240>;
>> + hback-porch = <0>;
>> + vback-porch = <0>;
>> +
>> + clock-frequency = <0>;
>> + hfront-porch = <0>;
>> + hsync-len = <0>;
>> + vfront-porch = <0>;
>> + vsync-len = <0>;
>> + };
>> + };
>> +};
>> +
>> +&spi5 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&spi5_pins_a>;
>> +
>> + /* spare dmas for other usage */
>> + /delete-property/dmas;
>> + /delete-property/dma-names;
>> +
>> + cs-gpios = <&gpiod 13 GPIO_ACTIVE_LOW>;
>> +
>> + status = "okay";
>> +
>> + switch: switch@0 {
>> + compatible = "microchip,ksz9563";
>> + reg = <0>;
>> +
>> + reset-gpios = <&gpiog 0 GPIO_ACTIVE_LOW>;
>> + spi-max-frequency = <44000000>;
>> + spi-cpha;
>> + spi-cpol;
>> +
>> + interrupt-parent = <&gpioa>;
>> + interrupts = <6 IRQ_TYPE_EDGE_RISING>;
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + port_dut: port@0 {
>> + reg = <0>;
>> + label = "dut";
>> + };
>> +
>> + port_uplink: port@1 {
>> + reg = <1>;
>> + label = "uplink";
>> + };
>> +
>> + port_cpu: port@2 {
>> + reg = <2>;
>> + label = "cpu";
>> +
>> + ethernet = <ðernet0>;
>> +
>> + phy-mode = "rgmii-id";
>> + rx-internal-delay-ps = <2000>;
>> + tx-internal-delay-ps = <2000>;
>> +
>> + fixed-link {
>> + speed = <1000>;
>> + full-duplex;
>> + };
>> + };
>> + };
>> + };
>> +};
>> +
>> +&timers2 {
>> + /* spare dmas for other usage */
>> + /delete-property/dmas;
>> + /delete-property/dma-names;
>> +
>> + status = "okay";
>> +
>> + timer@1 {
>> + status = "okay";
>> + };
>> +};
>> +
>> +&timers3 {
>> + /* spare dmas for other usage */
>> + /delete-property/dmas;
>> + /delete-property/dma-names;
>> +
>> + status = "okay";
>> +
>> + timer@2 {
>> + status = "okay";
>> + };
>> +};
>> +
>> +&timers4 {
>> + /* spare dmas for other usage */
>> + /delete-property/dmas;
>> + /delete-property/dma-names;
>> +
>> + status = "okay";
>> +
>> + timer@3 {
>> + status = "okay";
>> + };
>> +};
>> +
>> +&uart4 {
>> + label = "debug";
>> +
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&uart4_pins_a>;
>> +
>> + /* spare dmas for other usage */
>> + /delete-property/dmas;
>> + /delete-property/dma-names;
>> +
>> + status = "okay";
>> +};
>> +
>> +&usart3 {
>> + label = "dut";
>> + uart-has-rtscts;
>> +
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&usart3_pins_f>;
>> +
>> + /* spare dmas for other usage */
>> + /delete-property/dmas;
>> + /delete-property/dma-names;
>> +
>> + status = "okay";
>> +};
>> +
>> +&usbh_ehci {
>> + phys = <&usbphyc_port0>;
>> + phy-names = "usb";
>> +
>> + status = "okay";
>> +};
>> +
>> +&usbotg_hs {
>> + phys = <&usbphyc_port1 0>;
>> + phy-names = "usb2-phy";
>> +
>> + vusb_d-supply = <&vdd_usb>;
>> + vusb_a-supply = <®18>;
>> +
>> + dr_mode = "peripheral";
>> +
>> + status = "okay";
>> +};
>> +
>> +&usbphyc {
>> + status = "okay";
>> +};
>> +
>> +&usbphyc_port0 {
>> + phy-supply = <&vdd_usb>;
>> +};
>> +
>> +&usbphyc_port1 {
>> + phy-supply = <&vdd_usb>;
>> +};
>> +
>> +&v3v3_hdmi {
>> + /delete-property/regulator-always-on;
>> +};
>> +
>> +&vrefbuf {
>> + regulator-min-microvolt = <2500000>;
>> + regulator-max-microvolt = <2500000>;
>> + vdda-supply = <&vdda>;
>> +
>> + status = "okay";
>> +};
>
>
^ permalink raw reply [flat|nested] 26+ messages in thread
end of thread, other threads:[~2023-06-14 12:47 UTC | newest]
Thread overview: 26+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-06-07 11:55 [PATCH v1 1/8] dt-bindings: display: panel: mipi-dbi-spi: add shineworld lh133k compatible Leonard Göhrs
2023-06-07 11:55 ` [PATCH v1 2/8] dt-bindings: display: panel: mipi-dbi-spi: add spi-3wire property Leonard Göhrs
2023-06-07 17:54 ` Conor Dooley
2023-06-07 19:59 ` Noralf Trønnes
2023-06-07 22:58 ` Rob Herring
2023-06-07 22:59 ` Rob Herring
2023-06-07 11:55 ` [PATCH v1 3/8] dt-bindings: gpio: pca9570: add gpio-line-names property Leonard Göhrs
2023-06-07 16:36 ` andy.shevchenko
2023-06-08 13:24 ` Krzysztof Kozlowski
2023-06-08 13:24 ` Krzysztof Kozlowski
2023-06-13 14:54 ` Bartosz Golaszewski
2023-06-07 11:55 ` [PATCH v1 4/8] dt-bindings: can: m_can: add termination-{gpios,ohms} properties Leonard Göhrs
2023-06-07 17:51 ` Conor Dooley
2023-06-07 23:03 ` Rob Herring
2023-06-07 11:55 ` [PATCH v1 5/8] dt-bindings: net: dsa: microchip: add missing spi-{cpha,cpol} properties Leonard Göhrs
2023-06-07 17:50 ` Conor Dooley
2023-06-07 23:04 ` Rob Herring
2023-06-07 11:55 ` [PATCH v1 6/8] ARM: dts: stm32: Add pinmux groups for Linux Automation GmbH TAC Leonard Göhrs
2023-06-08 13:02 ` Alexandre TORGUE
2023-06-07 11:55 ` [PATCH v1 7/8] dt-bindings: arm: stm32: Add compatible string for Linux Automation LXA TAC Leonard Göhrs
2023-06-07 17:29 ` Conor Dooley
2023-06-07 11:55 ` [PATCH v1 8/8] ARM: dts: stm32: lxa-tac: add Linux Automation GmbH TAC Leonard Göhrs
2023-06-08 13:13 ` Alexandre TORGUE
2023-06-14 12:46 ` Leonard Göhrs
2023-06-07 17:55 ` [PATCH v1 1/8] dt-bindings: display: panel: mipi-dbi-spi: add shineworld lh133k compatible Conor Dooley
2023-06-07 22:59 ` Rob Herring
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