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From: Palmer Dabbelt <palmer@dabbelt.com>
To: sboyd@kernel.org
Cc: mr.bossman075@gmail.com, linux-riscv@lists.infradead.org,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	Mr.Bossman075@gmail.com, ustcymgu@gmail.com,
	damien.lemoal@wdc.com, mturquette@baylibre.com, wbx@openadk.org,
	aou@eecs.berkeley.edu, Paul Walmsley <paul.walmsley@sifive.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	lkp@intel.com
Subject: Re: [PATCH v3 1/3] clk: k210: remove an implicit 64-bit division
Date: Mon, 06 Mar 2023 14:48:33 -0800 (PST)	[thread overview]
Message-ID: <mhng-8b4fc148-76c1-4dae-b5ab-34f218e7ffe6@palmer-ri-x1c9a> (raw)
In-Reply-To: <774cb6d15fef0e0b41e7a071eedef980.sboyd@kernel.org>

On Mon, 06 Mar 2023 14:41:11 PST (-0800), sboyd@kernel.org wrote:
> Quoting Jesse Taube (2023-02-28 16:26:55)
>> From: Conor Dooley <conor.dooley@microchip.com>
>> 
>> The K210 clock driver depends on SOC_CANAAN, which is only selectable
>> when !MMU on RISC-V. !MMU is not possible on 32-bit yet, but patches
>> have been sent for its enabling. The kernel test robot reported this
>> implicit 64-bit division there.
>> 
>> Replace the implicit division with an explicit one.
>> 
>> Reported-by: kernel test robot <lkp@intel.com>
>> Link: https://lore.kernel.org/linux-riscv/202301201538.zNlqgE4L-lkp@intel.com/
>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
>> ---
>
> Seems better to merge this one-liner earlier to unblock 32-bit.
>
> Applied to clk-fixes

Thanks!

WARNING: multiple messages have this Message-ID (diff)
From: Palmer Dabbelt <palmer@dabbelt.com>
To: sboyd@kernel.org
Cc: mr.bossman075@gmail.com, linux-riscv@lists.infradead.org,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	Mr.Bossman075@gmail.com, ustcymgu@gmail.com,
	damien.lemoal@wdc.com, mturquette@baylibre.com, wbx@openadk.org,
	aou@eecs.berkeley.edu, Paul Walmsley <paul.walmsley@sifive.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	lkp@intel.com
Subject: Re: [PATCH v3 1/3] clk: k210: remove an implicit 64-bit division
Date: Mon, 06 Mar 2023 14:48:33 -0800 (PST)	[thread overview]
Message-ID: <mhng-8b4fc148-76c1-4dae-b5ab-34f218e7ffe6@palmer-ri-x1c9a> (raw)
In-Reply-To: <774cb6d15fef0e0b41e7a071eedef980.sboyd@kernel.org>

On Mon, 06 Mar 2023 14:41:11 PST (-0800), sboyd@kernel.org wrote:
> Quoting Jesse Taube (2023-02-28 16:26:55)
>> From: Conor Dooley <conor.dooley@microchip.com>
>> 
>> The K210 clock driver depends on SOC_CANAAN, which is only selectable
>> when !MMU on RISC-V. !MMU is not possible on 32-bit yet, but patches
>> have been sent for its enabling. The kernel test robot reported this
>> implicit 64-bit division there.
>> 
>> Replace the implicit division with an explicit one.
>> 
>> Reported-by: kernel test robot <lkp@intel.com>
>> Link: https://lore.kernel.org/linux-riscv/202301201538.zNlqgE4L-lkp@intel.com/
>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
>> ---
>
> Seems better to merge this one-liner earlier to unblock 32-bit.
>
> Applied to clk-fixes

Thanks!

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  reply	other threads:[~2023-03-06 22:48 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-01  0:26 [PATCH v3 0/3] Add RISC-V 32 NOMMU support Jesse Taube
2023-03-01  0:26 ` Jesse Taube
2023-03-01  0:26 ` [PATCH v3 1/3] clk: k210: remove an implicit 64-bit division Jesse Taube
2023-03-01  0:26   ` Jesse Taube
2023-03-01  1:19   ` Damien Le Moal
2023-03-01  1:19     ` Damien Le Moal
2023-03-06 22:31   ` Stephen Boyd
2023-03-06 22:31     ` Stephen Boyd
2023-03-06 22:35     ` Conor Dooley
2023-03-06 22:35       ` Conor Dooley
2023-03-06 22:37       ` Stephen Boyd
2023-03-06 22:37         ` Stephen Boyd
2023-03-06 22:41   ` Stephen Boyd
2023-03-06 22:41     ` Stephen Boyd
2023-03-06 22:48     ` Palmer Dabbelt [this message]
2023-03-06 22:48       ` Palmer Dabbelt
2023-03-01  0:26 ` [PATCH v3 2/3] riscv: Kconfig: Allow RV32 to build with no MMU Jesse Taube
2023-03-01  0:26   ` Jesse Taube
2023-03-01  1:22   ` Damien Le Moal
2023-03-01  1:22     ` Damien Le Moal
2023-03-01  0:26 ` [PATCH v3 3/3] riscv: configs: Add nommu PHONY defconfig for RV32 Jesse Taube
2023-03-01  0:26   ` Jesse Taube
2023-03-01  4:07 ` [PATCH v3 0/3] Add RISC-V 32 NOMMU support Randy Dunlap
2023-03-01  4:07   ` Randy Dunlap
2023-03-01  4:42   ` Damien Le Moal
2023-03-01  4:42     ` Damien Le Moal
2023-03-08  1:26     ` Jesse Taube
2023-03-08  1:26       ` Jesse Taube
2023-03-08  2:16       ` Randy Dunlap
2023-03-08  2:16         ` Randy Dunlap
2023-03-08  2:30         ` Jesse Taube
2023-03-08  2:30           ` Jesse Taube
2023-03-08  2:33           ` Randy Dunlap
2023-03-08  2:33             ` Randy Dunlap
2023-03-08  2:51             ` Randy Dunlap
2023-03-08  2:51               ` Randy Dunlap
2023-03-08  2:54               ` Jesse Taube
2023-03-08  2:54                 ` Jesse Taube
2023-03-08  3:23                 ` Randy Dunlap
2023-03-08  3:23                   ` Randy Dunlap
2023-03-08  3:42                   ` Damien Le Moal
2023-03-08  3:42                     ` Damien Le Moal
2023-03-08  3:46                     ` Jesse Taube
2023-03-08  3:46                       ` Jesse Taube
2023-03-08  4:11                       ` Damien Le Moal
2023-03-08  4:11                         ` Damien Le Moal
2023-03-14 18:35                         ` Jesse Taube
2023-03-14 18:35                           ` Jesse Taube
2023-03-14 19:16                           ` Conor Dooley
2023-03-14 19:16                             ` Conor Dooley
2023-03-08  3:51                     ` Randy Dunlap
2023-03-08  3:51                       ` Randy Dunlap
2023-03-25 11:57 ` Conor Dooley
2023-03-25 11:57   ` Conor Dooley
2023-03-28 18:50 ` (subset) " Palmer Dabbelt
2023-03-28 18:50   ` Palmer Dabbelt

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