* [PATCH net-next v3 01/47] dt-bindings: phy: Add Lynx 10G phy binding
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-20 22:17 ` Rob Herring
2022-07-15 21:59 ` [PATCH net-next v3 02/47] dt-bindings: net: Expand pcs-handle to an array Sean Anderson
` (46 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Kishon Vijay Abraham I,
Krzysztof Kozlowski, Rob Herring, Vinod Koul, devicetree,
linux-phy
This adds a binding for the SerDes module found on QorIQ processors. The
phy reference has two cells, one for the first lane and one for the
last. This should allow for good support of multi-lane protocols when
(if) they are added. There is no protocol option, because the driver is
designed to be able to completely reconfigure lanes at runtime.
Generally, the phy consumer can select the appropriate protocol using
set_mode. For the most part there is only one protocol controller
(consumer) per lane/protocol combination. The exception to this is the
B4860 processor, which has some lanes which can be connected to
multiple MACs. For that processor, I anticipate the easiest way to
resolve this will be to add an additional cell with a "protocol
controller instance" property.
Each serdes has a unique set of supported protocols (and lanes). The
support matrix is configured in the device tree. The format of each
PCCR (protocol configuration register) is modeled. Although the general
format is typically the same across different SoCs, the specific
supported protocols (and the values necessary to select them) are
particular to individual SerDes. A nested structure is used to reduce
duplication of data.
There are two PLLs, each of which can be used as the master clock for
each lane. Each PLL has its own reference. For the moment they are
required, because it simplifies the driver implementation. Absent
reference clocks can be modeled by a fixed-clock with a rate of 0.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
Changes in v3:
- Manually expand yaml references
- Add mode configuration to device tree
Changes in v2:
- Rename to fsl,lynx-10g.yaml
- Refer to the device in the documentation, rather than the binding
- Move compatible first
- Document phy cells in the description
- Allow a value of 1 for phy-cells. This allows for compatibility with
the similar (but according to Ioana Ciornei different enough) lynx-28g
binding.
- Remove minItems
- Use list for clock-names
- Fix example binding having too many cells in regs
- Add #clock-cells. This will allow using assigned-clocks* to configure
the PLLs.
- Document the structure of the compatible strings
.../devicetree/bindings/phy/fsl,lynx-10g.yaml | 311 ++++++++++++++++++
1 file changed, 311 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
diff --git a/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml b/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
new file mode 100644
index 000000000000..a2c37225bb67
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
@@ -0,0 +1,311 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/fsl,lynx-10g.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP Lynx 10G SerDes
+
+maintainers:
+ - Sean Anderson <sean.anderson@seco.com>
+
+description: |
+ These Lynx "SerDes" devices are found in NXP's QorIQ line of processors. The
+ SerDes provides up to eight lanes. Each lane may be configured individually,
+ or may be combined with adjacent lanes for a multi-lane protocol. The SerDes
+ supports a variety of protocols, including up to 10G Ethernet, PCIe, SATA, and
+ others. The specific protocols supported for each lane depend on the
+ particular SoC.
+
+definitions:
+ fsl,cfg:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 1
+ description: |
+ The configuration value to program into the field.
+
+ fsl,first-lane:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 7
+ description: |
+ The first lane in the group configured by fsl,cfg. This lane will have
+ the FIRST_LANE bit set in GCR0. The reset direction will also be set
+ based on whether this property is less than or greater than
+ fsl,last-lane.
+
+ fsl,last-lane:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 7
+ description: |
+ The last lane configured by fsl,cfg. If this property is absent,
+ then it will default to the value of fsl,first-lane.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - fsl,ls1046a-serdes
+ - fsl,ls1088a-serdes
+ - const: fsl,lynx-10g
+
+ "#clock-cells":
+ const: 1
+ description: |
+ The cell contains the index of the PLL, starting from 0. Note that when
+ assigning a rate to a PLL, the PLLs' rates are divided by 1000 to avoid
+ overflow. A rate of 5000000 corresponds to 5GHz.
+
+ "#phy-cells":
+ minimum: 1
+ maximum: 2
+ description: |
+ The cells contain the following arguments:
+ - The first lane in the group. Lanes are numbered based on the register
+ offsets, not the I/O ports. This corresponds to the letter-based ("Lane
+ A") naming scheme, and not the number-based ("Lane 0") naming scheme. On
+ most SoCs, "Lane A" is "Lane 0", but not always.
+ - Last lane. For single-lane protocols, this should be the same as the
+ first lane.
+ If no lanes in a SerDes can be grouped, then #phy-cells may be 1, and the
+ first cell will specify the only lane in the group.
+
+ clocks:
+ maxItems: 2
+ description: |
+ Clock for each PLL reference clock input.
+
+ clock-names:
+ minItems: 2
+ maxItems: 2
+ items:
+ enum:
+ - ref0
+ - ref1
+
+ reg:
+ maxItems: 1
+
+patternProperties:
+ '^pccr-':
+ type: object
+
+ description: |
+ One of the protocol configuration registers (PCCRs). These contains
+ several fields, each of which mux a particular protocol onto a particular
+ lane.
+
+ properties:
+ fsl,pccr:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ The index of the PCCR. This is the same as the register name suffix.
+ For example, a node for PCCRB would use a value of '0xb' for an
+ offset of 0x22C (0x200 + 4 * 0xb).
+
+ patternProperties:
+ '^(q?sgmii|xfi|pcie|sata)-':
+ type: object
+
+ description: |
+ A configuration field within a PCCR. Each field configures one
+ protocol controller. The value of the field determines the lanes the
+ controller is connected to, if any.
+
+ properties:
+ fsl,index:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ The index of the field. This corresponds to the suffix in the
+ documentation. For example, PEXa would be 0, PEXb 1, etc.
+ Generally, higher fields occupy lower bits.
+
+ If there are any subnodes present, they will be preferred over
+ fsl,cfg et. al.
+
+ fsl,cfg:
+ $ref: "#/definitions/fsl,cfg"
+
+ fsl,first-lane:
+ $ref: "#/definitions/fsl,first-lane"
+
+ fsl,last-lane:
+ $ref: "#/definitions/fsl,last-lane"
+
+ fsl,proto:
+ $ref: /schemas/types.yaml#/definitions/string
+ enum:
+ - sgmii
+ - sgmii25
+ - qsgmii
+ - xfi
+ - pcie
+ - sata
+ description: |
+ Indicates the basic group protocols supported by this field.
+ Individual protocols are selected by configuring the protocol
+ controller.
+
+ - sgmii: 1000BASE-X, SGMII, and 1000BASE-KX (depending on the
+ SoC)
+ - sgmii25: 2500BASE-X, 1000BASE-X, SGMII, and 1000BASE-KX
+ (depending on the SoC)
+ - qsgmii: QSGMII
+ - xfi: 10GBASE-R and 10GBASE-KR (depending on the SoC)
+ - pcie: PCIe
+ - sata: SATA
+
+ patternProperties:
+ '^cfg-':
+ type: object
+
+ description: |
+ A single field may have multiple values which, when programmed,
+ connect the protocol controller to different lanes. If this is the
+ case, multiple sub-nodes may be provided, each describing a
+ single muxing.
+
+ properties:
+ fsl,cfg:
+ $ref: "#/definitions/fsl,cfg"
+
+ fsl,first-lane:
+ $ref: "#/definitions/fsl,first-lane"
+
+ fsl,last-lane:
+ $ref: "#/definitions/fsl,last-lane"
+
+ required:
+ - fsl,cfg
+ - fsl,first-lane
+
+ dependencies:
+ fsl,last-lane:
+ - fsl,first-lane
+
+ additionalProperties: false
+
+ required:
+ - fsl,index
+ - fsl,proto
+
+ dependencies:
+ fsl,last-lane:
+ - fsl,first-lane
+ fsl,cfg:
+ - fsl,first-lane
+ fsl,first-lane:
+ - fsl,cfg
+
+ # I would like to require either a config subnode or the config
+ # properties (and not both), but from what I can tell that can't be
+ # expressed in json schema. In particular, it is not possible to
+ # require a pattern property.
+
+ additionalProperties: false
+
+ required:
+ - fsl,pccr
+
+ additionalProperties: false
+
+required:
+ - "#clock-cells"
+ - "#phy-cells"
+ - compatible
+ - clocks
+ - clock-names
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ serdes1: phy@1ea0000 {
+ #clock-cells = <1>;
+ #phy-cells = <2>;
+ compatible = "fsl,ls1088a-serdes", "fsl,lynx-10g";
+ reg = <0x1ea0000 0x2000>;
+ clocks = <&clk_100mhz>, <&clk_156_mhz>;
+ clock-names = "ref0", "ref1";
+ assigned-clocks = <&serdes1 0>;
+ assigned-clock-rates = <5000000>;
+
+ pccr-8 {
+ fsl,pccr = <0x8>;
+
+ sgmii-0 {
+ fsl,index = <0>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <3>;
+ fsl,proto = "sgmii";
+ };
+
+ sgmii-1 {
+ fsl,index = <1>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <2>;
+ fsl,proto = "sgmii";
+ };
+
+ sgmii-2 {
+ fsl,index = <2>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <1>;
+ fsl,proto = "sgmii25";
+ };
+
+ sgmii-3 {
+ fsl,index = <3>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <0>;
+ fsl,proto = "sgmii25";
+ };
+ };
+
+ pccr-9 {
+ fsl,pccr = <0x9>;
+
+ qsgmii-0 {
+ fsl,index = <0>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <3>;
+ fsl,proto = "qsgmii";
+ };
+
+ qsgmii-1 {
+ fsl,index = <1>;
+ fsl,proto = "qsgmii";
+
+ cfg-1 {
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <2>;
+ };
+
+ cfg-2 {
+ fsl,cfg = <0x2>;
+ fsl,first-lane = <0>;
+ };
+ };
+ };
+
+ pccr-b {
+ fsl,pccr = <0xb>;
+
+ xfi-0 {
+ fsl,index = <0>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <1>;
+ fsl,proto = "xfi";
+ };
+
+ xfi-1 {
+ fsl,index = <1>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <0>;
+ fsl,proto = "xfi";
+ };
+ };
+ };
+...
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 01/47] dt-bindings: phy: Add Lynx 10G phy binding
2022-07-15 21:59 ` [PATCH net-next v3 01/47] dt-bindings: phy: Add Lynx 10G phy binding Sean Anderson
@ 2022-07-20 22:17 ` Rob Herring
2022-07-21 16:05 ` Sean Anderson
0 siblings, 1 reply; 123+ messages in thread
From: Rob Herring @ 2022-07-20 22:17 UTC (permalink / raw)
To: Sean Anderson
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Kishon Vijay Abraham I, Krzysztof Kozlowski,
Vinod Koul, devicetree, linux-phy
On Fri, Jul 15, 2022 at 05:59:08PM -0400, Sean Anderson wrote:
> This adds a binding for the SerDes module found on QorIQ processors. The
> phy reference has two cells, one for the first lane and one for the
> last. This should allow for good support of multi-lane protocols when
> (if) they are added. There is no protocol option, because the driver is
> designed to be able to completely reconfigure lanes at runtime.
> Generally, the phy consumer can select the appropriate protocol using
> set_mode. For the most part there is only one protocol controller
> (consumer) per lane/protocol combination. The exception to this is the
> B4860 processor, which has some lanes which can be connected to
> multiple MACs. For that processor, I anticipate the easiest way to
> resolve this will be to add an additional cell with a "protocol
> controller instance" property.
>
> Each serdes has a unique set of supported protocols (and lanes). The
> support matrix is configured in the device tree. The format of each
> PCCR (protocol configuration register) is modeled. Although the general
> format is typically the same across different SoCs, the specific
> supported protocols (and the values necessary to select them) are
> particular to individual SerDes. A nested structure is used to reduce
> duplication of data.
>
> There are two PLLs, each of which can be used as the master clock for
> each lane. Each PLL has its own reference. For the moment they are
> required, because it simplifies the driver implementation. Absent
> reference clocks can be modeled by a fixed-clock with a rate of 0.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> ---
>
> Changes in v3:
> - Manually expand yaml references
> - Add mode configuration to device tree
>
> Changes in v2:
> - Rename to fsl,lynx-10g.yaml
> - Refer to the device in the documentation, rather than the binding
> - Move compatible first
> - Document phy cells in the description
> - Allow a value of 1 for phy-cells. This allows for compatibility with
> the similar (but according to Ioana Ciornei different enough) lynx-28g
> binding.
> - Remove minItems
> - Use list for clock-names
> - Fix example binding having too many cells in regs
> - Add #clock-cells. This will allow using assigned-clocks* to configure
> the PLLs.
> - Document the structure of the compatible strings
>
> .../devicetree/bindings/phy/fsl,lynx-10g.yaml | 311 ++++++++++++++++++
> 1 file changed, 311 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
>
> diff --git a/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml b/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
> new file mode 100644
> index 000000000000..a2c37225bb67
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
> @@ -0,0 +1,311 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/fsl,lynx-10g.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP Lynx 10G SerDes
> +
> +maintainers:
> + - Sean Anderson <sean.anderson@seco.com>
> +
> +description: |
> + These Lynx "SerDes" devices are found in NXP's QorIQ line of processors. The
> + SerDes provides up to eight lanes. Each lane may be configured individually,
> + or may be combined with adjacent lanes for a multi-lane protocol. The SerDes
> + supports a variety of protocols, including up to 10G Ethernet, PCIe, SATA, and
> + others. The specific protocols supported for each lane depend on the
> + particular SoC.
> +
> +definitions:
$defs:
> + fsl,cfg:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 1
> + description: |
> + The configuration value to program into the field.
What field?
> +
> + fsl,first-lane:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 7
> + description: |
> + The first lane in the group configured by fsl,cfg. This lane will have
> + the FIRST_LANE bit set in GCR0. The reset direction will also be set
> + based on whether this property is less than or greater than
> + fsl,last-lane.
> +
> + fsl,last-lane:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 7
> + description: |
> + The last lane configured by fsl,cfg. If this property is absent,
> + then it will default to the value of fsl,first-lane.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - fsl,ls1046a-serdes
> + - fsl,ls1088a-serdes
> + - const: fsl,lynx-10g
> +
> + "#clock-cells":
> + const: 1
> + description: |
> + The cell contains the index of the PLL, starting from 0. Note that when
> + assigning a rate to a PLL, the PLLs' rates are divided by 1000 to avoid
> + overflow. A rate of 5000000 corresponds to 5GHz.
> +
> + "#phy-cells":
> + minimum: 1
> + maximum: 2
> + description: |
> + The cells contain the following arguments:
> + - The first lane in the group. Lanes are numbered based on the register
> + offsets, not the I/O ports. This corresponds to the letter-based ("Lane
> + A") naming scheme, and not the number-based ("Lane 0") naming scheme. On
> + most SoCs, "Lane A" is "Lane 0", but not always.
> + - Last lane. For single-lane protocols, this should be the same as the
> + first lane.
Perhaps a single cell with a lane mask would be simpler.
> + If no lanes in a SerDes can be grouped, then #phy-cells may be 1, and the
> + first cell will specify the only lane in the group.
It is generally easier to have a fixed number of cells.
> +
> + clocks:
> + maxItems: 2
> + description: |
> + Clock for each PLL reference clock input.
> +
> + clock-names:
> + minItems: 2
> + maxItems: 2
> + items:
> + enum:
> + - ref0
> + - ref1
> +
> + reg:
> + maxItems: 1
> +
> +patternProperties:
> + '^pccr-':
> + type: object
> +
> + description: |
> + One of the protocol configuration registers (PCCRs). These contains
> + several fields, each of which mux a particular protocol onto a particular
> + lane.
> +
> + properties:
> + fsl,pccr:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + The index of the PCCR. This is the same as the register name suffix.
> + For example, a node for PCCRB would use a value of '0xb' for an
> + offset of 0x22C (0x200 + 4 * 0xb).
> +
> + patternProperties:
> + '^(q?sgmii|xfi|pcie|sata)-':
> + type: object
> +
> + description: |
> + A configuration field within a PCCR. Each field configures one
> + protocol controller. The value of the field determines the lanes the
> + controller is connected to, if any.
> +
> + properties:
> + fsl,index:
indexes are generally a red flag in binding. What is the index, how does
it correspond to the h/w and why do you need it. If we do end up needing
it, 'reg' is generally how we address some component.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + The index of the field. This corresponds to the suffix in the
What field?
> + documentation. For example, PEXa would be 0, PEXb 1, etc.
> + Generally, higher fields occupy lower bits.
> +
> + If there are any subnodes present, they will be preferred over
> + fsl,cfg et. al.
> +
> + fsl,cfg:
> + $ref: "#/definitions/fsl,cfg"
> +
> + fsl,first-lane:
> + $ref: "#/definitions/fsl,first-lane"
> +
> + fsl,last-lane:
> + $ref: "#/definitions/fsl,last-lane"
Why do you have lane assignments here and in the phy cells?
> +
> + fsl,proto:
> + $ref: /schemas/types.yaml#/definitions/string
> + enum:
> + - sgmii
> + - sgmii25
> + - qsgmii
> + - xfi
> + - pcie
> + - sata
We have standard phy modes already for at least most of these types.
Generally the mode is set in the phy cells.
> + description: |
> + Indicates the basic group protocols supported by this field.
> + Individual protocols are selected by configuring the protocol
> + controller.
> +
> + - sgmii: 1000BASE-X, SGMII, and 1000BASE-KX (depending on the
> + SoC)
> + - sgmii25: 2500BASE-X, 1000BASE-X, SGMII, and 1000BASE-KX
> + (depending on the SoC)
> + - qsgmii: QSGMII
> + - xfi: 10GBASE-R and 10GBASE-KR (depending on the SoC)
> + - pcie: PCIe
> + - sata: SATA
> +
> + patternProperties:
> + '^cfg-':
> + type: object
> +
> + description: |
> + A single field may have multiple values which, when programmed,
> + connect the protocol controller to different lanes. If this is the
> + case, multiple sub-nodes may be provided, each describing a
> + single muxing.
> +
> + properties:
> + fsl,cfg:
> + $ref: "#/definitions/fsl,cfg"
> +
> + fsl,first-lane:
> + $ref: "#/definitions/fsl,first-lane"
> +
> + fsl,last-lane:
> + $ref: "#/definitions/fsl,last-lane"
> +
> + required:
> + - fsl,cfg
> + - fsl,first-lane
> +
> + dependencies:
> + fsl,last-lane:
> + - fsl,first-lane
> +
> + additionalProperties: false
> +
> + required:
> + - fsl,index
> + - fsl,proto
> +
> + dependencies:
> + fsl,last-lane:
> + - fsl,first-lane
> + fsl,cfg:
> + - fsl,first-lane
> + fsl,first-lane:
> + - fsl,cfg
> +
> + # I would like to require either a config subnode or the config
> + # properties (and not both), but from what I can tell that can't be
> + # expressed in json schema. In particular, it is not possible to
> + # require a pattern property.
Indeed, it is not. There's been some proposals.
> +
> + additionalProperties: false
> +
> + required:
> + - fsl,pccr
> +
> + additionalProperties: false
> +
> +required:
> + - "#clock-cells"
> + - "#phy-cells"
> + - compatible
> + - clocks
> + - clock-names
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + serdes1: phy@1ea0000 {
> + #clock-cells = <1>;
> + #phy-cells = <2>;
> + compatible = "fsl,ls1088a-serdes", "fsl,lynx-10g";
> + reg = <0x1ea0000 0x2000>;
> + clocks = <&clk_100mhz>, <&clk_156_mhz>;
> + clock-names = "ref0", "ref1";
> + assigned-clocks = <&serdes1 0>;
> + assigned-clock-rates = <5000000>;
> +
> + pccr-8 {
> + fsl,pccr = <0x8>;
> +
> + sgmii-0 {
> + fsl,index = <0>;
> + fsl,cfg = <0x1>;
> + fsl,first-lane = <3>;
> + fsl,proto = "sgmii";
> + };
> +
> + sgmii-1 {
> + fsl,index = <1>;
> + fsl,cfg = <0x1>;
> + fsl,first-lane = <2>;
> + fsl,proto = "sgmii";
> + };
> +
> + sgmii-2 {
> + fsl,index = <2>;
> + fsl,cfg = <0x1>;
> + fsl,first-lane = <1>;
> + fsl,proto = "sgmii25";
> + };
> +
> + sgmii-3 {
> + fsl,index = <3>;
> + fsl,cfg = <0x1>;
> + fsl,first-lane = <0>;
> + fsl,proto = "sgmii25";
> + };
> + };
> +
> + pccr-9 {
> + fsl,pccr = <0x9>;
> +
> + qsgmii-0 {
> + fsl,index = <0>;
> + fsl,cfg = <0x1>;
> + fsl,first-lane = <3>;
> + fsl,proto = "qsgmii";
> + };
> +
> + qsgmii-1 {
> + fsl,index = <1>;
> + fsl,proto = "qsgmii";
> +
> + cfg-1 {
> + fsl,cfg = <0x1>;
> + fsl,first-lane = <2>;
> + };
> +
> + cfg-2 {
> + fsl,cfg = <0x2>;
> + fsl,first-lane = <0>;
> + };
> + };
> + };
> +
> + pccr-b {
> + fsl,pccr = <0xb>;
> +
> + xfi-0 {
> + fsl,index = <0>;
> + fsl,cfg = <0x1>;
> + fsl,first-lane = <1>;
> + fsl,proto = "xfi";
> + };
> +
> + xfi-1 {
> + fsl,index = <1>;
> + fsl,cfg = <0x1>;
> + fsl,first-lane = <0>;
> + fsl,proto = "xfi";
> + };
> + };
> + };
Other than lane assignments and modes, I don't really understand what
you are trying to do. It all looks too complex and I don't see any other
phy bindings needing something this complex.
Rob
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 01/47] dt-bindings: phy: Add Lynx 10G phy binding
2022-07-20 22:17 ` Rob Herring
@ 2022-07-21 16:05 ` Sean Anderson
2022-07-21 18:29 ` Rob Herring
0 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-21 16:05 UTC (permalink / raw)
To: Rob Herring
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Kishon Vijay Abraham I, Krzysztof Kozlowski,
Vinod Koul, devicetree, linux-phy
On 7/20/22 6:17 PM, Rob Herring wrote:
> On Fri, Jul 15, 2022 at 05:59:08PM -0400, Sean Anderson wrote:
>> This adds a binding for the SerDes module found on QorIQ processors. The
>> phy reference has two cells, one for the first lane and one for the
>> last. This should allow for good support of multi-lane protocols when
>> (if) they are added. There is no protocol option, because the driver is
>> designed to be able to completely reconfigure lanes at runtime.
>> Generally, the phy consumer can select the appropriate protocol using
>> set_mode. For the most part there is only one protocol controller
>> (consumer) per lane/protocol combination. The exception to this is the
>> B4860 processor, which has some lanes which can be connected to
>> multiple MACs. For that processor, I anticipate the easiest way to
>> resolve this will be to add an additional cell with a "protocol
>> controller instance" property.
>>
>> Each serdes has a unique set of supported protocols (and lanes). The
>> support matrix is configured in the device tree. The format of each
>> PCCR (protocol configuration register) is modeled. Although the general
>> format is typically the same across different SoCs, the specific
>> supported protocols (and the values necessary to select them) are
>> particular to individual SerDes. A nested structure is used to reduce
>> duplication of data.
>>
>> There are two PLLs, each of which can be used as the master clock for
>> each lane. Each PLL has its own reference. For the moment they are
>> required, because it simplifies the driver implementation. Absent
>> reference clocks can be modeled by a fixed-clock with a rate of 0.
>>
>> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
>> ---
>>
>> Changes in v3:
>> - Manually expand yaml references
>> - Add mode configuration to device tree
>>
>> Changes in v2:
>> - Rename to fsl,lynx-10g.yaml
>> - Refer to the device in the documentation, rather than the binding
>> - Move compatible first
>> - Document phy cells in the description
>> - Allow a value of 1 for phy-cells. This allows for compatibility with
>> the similar (but according to Ioana Ciornei different enough) lynx-28g
>> binding.
>> - Remove minItems
>> - Use list for clock-names
>> - Fix example binding having too many cells in regs
>> - Add #clock-cells. This will allow using assigned-clocks* to configure
>> the PLLs.
>> - Document the structure of the compatible strings
>>
>> .../devicetree/bindings/phy/fsl,lynx-10g.yaml | 311 ++++++++++++++++++
>> 1 file changed, 311 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml b/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
>> new file mode 100644
>> index 000000000000..a2c37225bb67
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
>> @@ -0,0 +1,311 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/phy/fsl,lynx-10g.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: NXP Lynx 10G SerDes
>> +
>> +maintainers:
>> + - Sean Anderson <sean.anderson@seco.com>
>> +
>> +description: |
>> + These Lynx "SerDes" devices are found in NXP's QorIQ line of processors. The
>> + SerDes provides up to eight lanes. Each lane may be configured individually,
>> + or may be combined with adjacent lanes for a multi-lane protocol. The SerDes
>> + supports a variety of protocols, including up to 10G Ethernet, PCIe, SATA, and
>> + others. The specific protocols supported for each lane depend on the
>> + particular SoC.
>> +
>> +definitions:
>
> $defs:
That didn't work until recently :)
I will change this for next revision.
>> + fsl,cfg:
>> + $ref: /schemas/types.yaml#/definitions/uint32
>> + minimum: 1
>> + description: |
>> + The configuration value to program into the field.
>
> What field?
Ah, looks like this lost some context when I moved it. I will expand on this.
>> +
>> + fsl,first-lane:
>> + $ref: /schemas/types.yaml#/definitions/uint32
>> + minimum: 0
>> + maximum: 7
>> + description: |
>> + The first lane in the group configured by fsl,cfg. This lane will have
>> + the FIRST_LANE bit set in GCR0. The reset direction will also be set
>> + based on whether this property is less than or greater than
>> + fsl,last-lane.
>> +
>> + fsl,last-lane:
>> + $ref: /schemas/types.yaml#/definitions/uint32
>> + minimum: 0
>> + maximum: 7
>> + description: |
>> + The last lane configured by fsl,cfg. If this property is absent,
>> + then it will default to the value of fsl,first-lane.
>> +
>> +properties:
>> + compatible:
>> + items:
>> + - enum:
>> + - fsl,ls1046a-serdes
>> + - fsl,ls1088a-serdes
>> + - const: fsl,lynx-10g
>> +
>> + "#clock-cells":
>> + const: 1
>> + description: |
>> + The cell contains the index of the PLL, starting from 0. Note that when
>> + assigning a rate to a PLL, the PLLs' rates are divided by 1000 to avoid
>> + overflow. A rate of 5000000 corresponds to 5GHz.
>> +
>> + "#phy-cells":
>> + minimum: 1
>> + maximum: 2
>> + description: |
>> + The cells contain the following arguments:
>> + - The first lane in the group. Lanes are numbered based on the register
>> + offsets, not the I/O ports. This corresponds to the letter-based ("Lane
>> + A") naming scheme, and not the number-based ("Lane 0") naming scheme. On
>> + most SoCs, "Lane A" is "Lane 0", but not always.
>> + - Last lane. For single-lane protocols, this should be the same as the
>> + first lane.
>
> Perhaps a single cell with a lane mask would be simpler.
Yes.
>> + If no lanes in a SerDes can be grouped, then #phy-cells may be 1, and the
>> + first cell will specify the only lane in the group.
>
> It is generally easier to have a fixed number of cells.
This was remarked on last time. I allowed this for better compatibility with the lynx
28g serdes binding. Is that reasonable? I agree it would simplify the driver to just
have one cell type.
>> +
>> + clocks:
>> + maxItems: 2
>> + description: |
>> + Clock for each PLL reference clock input.
>> +
>> + clock-names:
>> + minItems: 2
>> + maxItems: 2
>> + items:
>> + enum:
>> + - ref0
>> + - ref1
>> +
>> + reg:
>> + maxItems: 1
>> +
>> +patternProperties:
>> + '^pccr-':
>> + type: object
>> +
>> + description: |
>> + One of the protocol configuration registers (PCCRs). These contains
>> + several fields, each of which mux a particular protocol onto a particular
>> + lane.
>> +
>> + properties:
>> + fsl,pccr:
>> + $ref: /schemas/types.yaml#/definitions/uint32
>> + description: |
>> + The index of the PCCR. This is the same as the register name suffix.
>> + For example, a node for PCCRB would use a value of '0xb' for an
>> + offset of 0x22C (0x200 + 4 * 0xb).
>> +
>> + patternProperties:
>> + '^(q?sgmii|xfi|pcie|sata)-':
>> + type: object
>> +
>> + description: |
>> + A configuration field within a PCCR. Each field configures one
>> + protocol controller. The value of the field determines the lanes the
>> + controller is connected to, if any.
>> +
>> + properties:
>> + fsl,index:
>
> indexes are generally a red flag in binding. What is the index, how does
> it correspond to the h/w and why do you need it.
As described in the description below, the "index" is the protocol controller suffix,
corresponding to a particular field (or set of fields) in the protocol configuration
registers.
> If we do end up needing
> it, 'reg' is generally how we address some component.
I originally used reg, but I got warnings about inheriting #size-cells and
#address-cells. These bindings are already quite verbose to write out (there
are around 10-20 configurations per SerDes to describe) and I would like to
minimize the amount of properties to what is necessary. Additionally, this
really describes a particular index of a field, and not a register (or an offset
within a register).
>> + $ref: /schemas/types.yaml#/definitions/uint32
>> + description: |
>> + The index of the field. This corresponds to the suffix in the
>
> What field?
The one from the description above.
>> + documentation. For example, PEXa would be 0, PEXb 1, etc.
>> + Generally, higher fields occupy lower bits.
>> +
>> + If there are any subnodes present, they will be preferred over
>> + fsl,cfg et. al.
>> +
>> + fsl,cfg:
>> + $ref: "#/definitions/fsl,cfg"
>> +
>> + fsl,first-lane:
>> + $ref: "#/definitions/fsl,first-lane"
>> +
>> + fsl,last-lane:
>> + $ref: "#/definitions/fsl,last-lane"
>
> Why do you have lane assignments here and in the phy cells?
For three reasons. First, because we need to know what protocols are valid on what
lanes. The idea is to allow the MAC to configure the protocols at runtime. To do
this, someone has to figure out if the protocol is supported on that lane. The
best place to put this IMO is the serdes.
Second, some serdes have (mostly) unsupported protocols such as PCIe as well as
Ethernet protocols. To allow using Ethernet, we need to know which lanes are
configured (by the firmware/bootloader) for some other protocol. That way, we
can avoid touching them.
Third, as part of the probe sequence, we need to ensure that no protocol controllers
are currently selected. Otherwise, we will get strange problems later when we try
to connect multiple protocol controllers to the same lane.
>> +
>> + fsl,proto:
>> + $ref: /schemas/types.yaml#/definitions/string
>> + enum:
>> + - sgmii
>> + - sgmii25
>> + - qsgmii
>> + - xfi
>> + - pcie
>> + - sata
>
> We have standard phy modes already for at least most of these types.
> Generally the mode is set in the phy cells.
Yes, but this is the "protocol" which may correspond to multiple phy modes.
For example, sgmii25 allows SGMII, 1000BASE-X, 1000BASE-KR, and 2500BASE-X
phy modes.
>> + description: |
>> + Indicates the basic group protocols supported by this field.
>> + Individual protocols are selected by configuring the protocol
>> + controller.
>> +
>> + - sgmii: 1000BASE-X, SGMII, and 1000BASE-KX (depending on the
>> + SoC)
>> + - sgmii25: 2500BASE-X, 1000BASE-X, SGMII, and 1000BASE-KX
>> + (depending on the SoC)
>> + - qsgmii: QSGMII
>> + - xfi: 10GBASE-R and 10GBASE-KR (depending on the SoC)
>> + - pcie: PCIe
>> + - sata: SATA
>> +
>> + patternProperties:
>> + '^cfg-':
>> + type: object
>> +
>> + description: |
>> + A single field may have multiple values which, when programmed,
>> + connect the protocol controller to different lanes. If this is the
>> + case, multiple sub-nodes may be provided, each describing a
>> + single muxing.
>> +
>> + properties:
>> + fsl,cfg:
>> + $ref: "#/definitions/fsl,cfg"
>> +
>> + fsl,first-lane:
>> + $ref: "#/definitions/fsl,first-lane"
>> +
>> + fsl,last-lane:
>> + $ref: "#/definitions/fsl,last-lane"
>> +
>> + required:
>> + - fsl,cfg
>> + - fsl,first-lane
>> +
>> + dependencies:
>> + fsl,last-lane:
>> + - fsl,first-lane
>> +
>> + additionalProperties: false
>> +
>> + required:
>> + - fsl,index
>> + - fsl,proto
>> +
>> + dependencies:
>> + fsl,last-lane:
>> + - fsl,first-lane
>> + fsl,cfg:
>> + - fsl,first-lane
>> + fsl,first-lane:
>> + - fsl,cfg
>> +
>> + # I would like to require either a config subnode or the config
>> + # properties (and not both), but from what I can tell that can't be
>> + # expressed in json schema. In particular, it is not possible to
>> + # require a pattern property.
>
> Indeed, it is not. There's been some proposals.
>
>> +
>> + additionalProperties: false
>> +
>> + required:
>> + - fsl,pccr
>> +
>> + additionalProperties: false
>> +
>> +required:
>> + - "#clock-cells"
>> + - "#phy-cells"
>> + - compatible
>> + - clocks
>> + - clock-names
>> + - reg
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + serdes1: phy@1ea0000 {
>> + #clock-cells = <1>;
>> + #phy-cells = <2>;
>> + compatible = "fsl,ls1088a-serdes", "fsl,lynx-10g";
>> + reg = <0x1ea0000 0x2000>;
>> + clocks = <&clk_100mhz>, <&clk_156_mhz>;
>> + clock-names = "ref0", "ref1";
>> + assigned-clocks = <&serdes1 0>;
>> + assigned-clock-rates = <5000000>;
>> +
>> + pccr-8 {
>> + fsl,pccr = <0x8>;
>> +
>> + sgmii-0 {
>> + fsl,index = <0>;
>> + fsl,cfg = <0x1>;
>> + fsl,first-lane = <3>;
>> + fsl,proto = "sgmii";
>> + };
>> +
>> + sgmii-1 {
>> + fsl,index = <1>;
>> + fsl,cfg = <0x1>;
>> + fsl,first-lane = <2>;
>> + fsl,proto = "sgmii";
>> + };
>> +
>> + sgmii-2 {
>> + fsl,index = <2>;
>> + fsl,cfg = <0x1>;
>> + fsl,first-lane = <1>;
>> + fsl,proto = "sgmii25";
>> + };
>> +
>> + sgmii-3 {
>> + fsl,index = <3>;
>> + fsl,cfg = <0x1>;
>> + fsl,first-lane = <0>;
>> + fsl,proto = "sgmii25";
>> + };
>> + };
>> +
>> + pccr-9 {
>> + fsl,pccr = <0x9>;
>> +
>> + qsgmii-0 {
>> + fsl,index = <0>;
>> + fsl,cfg = <0x1>;
>> + fsl,first-lane = <3>;
>> + fsl,proto = "qsgmii";
>> + };
>> +
>> + qsgmii-1 {
>> + fsl,index = <1>;
>> + fsl,proto = "qsgmii";
>> +
>> + cfg-1 {
>> + fsl,cfg = <0x1>;
>> + fsl,first-lane = <2>;
>> + };
>> +
>> + cfg-2 {
>> + fsl,cfg = <0x2>;
>> + fsl,first-lane = <0>;
>> + };
>> + };
>> + };
>> +
>> + pccr-b {
>> + fsl,pccr = <0xb>;
>> +
>> + xfi-0 {
>> + fsl,index = <0>;
>> + fsl,cfg = <0x1>;
>> + fsl,first-lane = <1>;
>> + fsl,proto = "xfi";
>> + };
>> +
>> + xfi-1 {
>> + fsl,index = <1>;
>> + fsl,cfg = <0x1>;
>> + fsl,first-lane = <0>;
>> + fsl,proto = "xfi";
>> + };
>> + };
>> + };
>
> Other than lane assignments and modes, I don't really understand what
> you are trying to do.
This is touched on a bit above, but the idea here is to allow for dynamic
reconfiguration of the serdes mode in order to support multiple ethernet
phy modes at runtime. To do this, we need to know about all the available
protocol controllers, and the lanes they support. In particular, the
available controllers and the lanes they map to (and the values to
program to select them) differ even between different serdes on the same
SoC.
> It all looks too complex and I don't see any other
> phy bindings needing something this complex.
This was explicitly asked for last time. I also would not like to do this,
but you and Krzysztof Kozlowski were very opposed to having per-device
compatible strings. If you have a suggestion for a different approach, I
am all ears. I find it very frustrating that the primary feedback I get from
the device tree folks is "you can't do this" without a corresponding "do it
this way."
--Sean
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 01/47] dt-bindings: phy: Add Lynx 10G phy binding
2022-07-21 16:05 ` Sean Anderson
@ 2022-07-21 18:29 ` Rob Herring
2022-07-21 23:35 ` Sean Anderson
0 siblings, 1 reply; 123+ messages in thread
From: Rob Herring @ 2022-07-21 18:29 UTC (permalink / raw)
To: Sean Anderson
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Kishon Vijay Abraham I, Krzysztof Kozlowski,
Vinod Koul, devicetree, open list:GENERIC PHY FRAMEWORK
On Thu, Jul 21, 2022 at 10:06 AM Sean Anderson <sean.anderson@seco.com> wrote:
>
>
>
> On 7/20/22 6:17 PM, Rob Herring wrote:
> > On Fri, Jul 15, 2022 at 05:59:08PM -0400, Sean Anderson wrote:
> >> This adds a binding for the SerDes module found on QorIQ processors. The
> >> phy reference has two cells, one for the first lane and one for the
> >> last. This should allow for good support of multi-lane protocols when
> >> (if) they are added. There is no protocol option, because the driver is
> >> designed to be able to completely reconfigure lanes at runtime.
> >> Generally, the phy consumer can select the appropriate protocol using
> >> set_mode. For the most part there is only one protocol controller
> >> (consumer) per lane/protocol combination. The exception to this is the
> >> B4860 processor, which has some lanes which can be connected to
> >> multiple MACs. For that processor, I anticipate the easiest way to
> >> resolve this will be to add an additional cell with a "protocol
> >> controller instance" property.
> >>
> >> Each serdes has a unique set of supported protocols (and lanes). The
> >> support matrix is configured in the device tree. The format of each
> >> PCCR (protocol configuration register) is modeled. Although the general
> >> format is typically the same across different SoCs, the specific
> >> supported protocols (and the values necessary to select them) are
> >> particular to individual SerDes. A nested structure is used to reduce
> >> duplication of data.
> >>
> >> There are two PLLs, each of which can be used as the master clock for
> >> each lane. Each PLL has its own reference. For the moment they are
> >> required, because it simplifies the driver implementation. Absent
> >> reference clocks can be modeled by a fixed-clock with a rate of 0.
> >>
> >> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> >> ---
> >>
> >> Changes in v3:
> >> - Manually expand yaml references
> >> - Add mode configuration to device tree
> >>
> >> Changes in v2:
> >> - Rename to fsl,lynx-10g.yaml
> >> - Refer to the device in the documentation, rather than the binding
> >> - Move compatible first
> >> - Document phy cells in the description
> >> - Allow a value of 1 for phy-cells. This allows for compatibility with
> >> the similar (but according to Ioana Ciornei different enough) lynx-28g
> >> binding.
> >> - Remove minItems
> >> - Use list for clock-names
> >> - Fix example binding having too many cells in regs
> >> - Add #clock-cells. This will allow using assigned-clocks* to configure
> >> the PLLs.
> >> - Document the structure of the compatible strings
> >>
> >> .../devicetree/bindings/phy/fsl,lynx-10g.yaml | 311 ++++++++++++++++++
> >> 1 file changed, 311 insertions(+)
> >> create mode 100644 Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
> >>
> >> diff --git a/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml b/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
> >> new file mode 100644
> >> index 000000000000..a2c37225bb67
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
> >> @@ -0,0 +1,311 @@
> >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> >> +%YAML 1.2
> >> +---
> >> +$id: http://devicetree.org/schemas/phy/fsl,lynx-10g.yaml#
> >> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> >> +
> >> +title: NXP Lynx 10G SerDes
> >> +
> >> +maintainers:
> >> + - Sean Anderson <sean.anderson@seco.com>
> >> +
> >> +description: |
> >> + These Lynx "SerDes" devices are found in NXP's QorIQ line of processors. The
> >> + SerDes provides up to eight lanes. Each lane may be configured individually,
> >> + or may be combined with adjacent lanes for a multi-lane protocol. The SerDes
> >> + supports a variety of protocols, including up to 10G Ethernet, PCIe, SATA, and
> >> + others. The specific protocols supported for each lane depend on the
> >> + particular SoC.
> >> +
> >> +definitions:
> >
> > $defs:
>
> That didn't work until recently :)
>
> I will change this for next revision.
>
> >> + fsl,cfg:
> >> + $ref: /schemas/types.yaml#/definitions/uint32
> >> + minimum: 1
> >> + description: |
> >> + The configuration value to program into the field.
> >
> > What field?
>
> Ah, looks like this lost some context when I moved it. I will expand on this.
>
> >> +
> >> + fsl,first-lane:
> >> + $ref: /schemas/types.yaml#/definitions/uint32
> >> + minimum: 0
> >> + maximum: 7
> >> + description: |
> >> + The first lane in the group configured by fsl,cfg. This lane will have
> >> + the FIRST_LANE bit set in GCR0. The reset direction will also be set
> >> + based on whether this property is less than or greater than
> >> + fsl,last-lane.
> >> +
> >> + fsl,last-lane:
> >> + $ref: /schemas/types.yaml#/definitions/uint32
> >> + minimum: 0
> >> + maximum: 7
> >> + description: |
> >> + The last lane configured by fsl,cfg. If this property is absent,
> >> + then it will default to the value of fsl,first-lane.
> >> +
> >> +properties:
> >> + compatible:
> >> + items:
> >> + - enum:
> >> + - fsl,ls1046a-serdes
> >> + - fsl,ls1088a-serdes
> >> + - const: fsl,lynx-10g
> >> +
> >> + "#clock-cells":
> >> + const: 1
> >> + description: |
> >> + The cell contains the index of the PLL, starting from 0. Note that when
> >> + assigning a rate to a PLL, the PLLs' rates are divided by 1000 to avoid
> >> + overflow. A rate of 5000000 corresponds to 5GHz.
> >> +
> >> + "#phy-cells":
> >> + minimum: 1
> >> + maximum: 2
> >> + description: |
> >> + The cells contain the following arguments:
> >> + - The first lane in the group. Lanes are numbered based on the register
> >> + offsets, not the I/O ports. This corresponds to the letter-based ("Lane
> >> + A") naming scheme, and not the number-based ("Lane 0") naming scheme. On
> >> + most SoCs, "Lane A" is "Lane 0", but not always.
> >> + - Last lane. For single-lane protocols, this should be the same as the
> >> + first lane.
> >
> > Perhaps a single cell with a lane mask would be simpler.
>
> Yes.
>
> >> + If no lanes in a SerDes can be grouped, then #phy-cells may be 1, and the
> >> + first cell will specify the only lane in the group.
> >
> > It is generally easier to have a fixed number of cells.
>
> This was remarked on last time. I allowed this for better compatibility with the lynx
> 28g serdes binding. Is that reasonable? I agree it would simplify the driver to just
> have one cell type.
>
> >> +
> >> + clocks:
> >> + maxItems: 2
> >> + description: |
> >> + Clock for each PLL reference clock input.
> >> +
> >> + clock-names:
> >> + minItems: 2
> >> + maxItems: 2
> >> + items:
> >> + enum:
> >> + - ref0
> >> + - ref1
> >> +
> >> + reg:
> >> + maxItems: 1
> >> +
> >> +patternProperties:
> >> + '^pccr-':
> >> + type: object
> >> +
> >> + description: |
> >> + One of the protocol configuration registers (PCCRs). These contains
> >> + several fields, each of which mux a particular protocol onto a particular
> >> + lane.
> >> +
> >> + properties:
> >> + fsl,pccr:
> >> + $ref: /schemas/types.yaml#/definitions/uint32
> >> + description: |
> >> + The index of the PCCR. This is the same as the register name suffix.
> >> + For example, a node for PCCRB would use a value of '0xb' for an
> >> + offset of 0x22C (0x200 + 4 * 0xb).
> >> +
> >> + patternProperties:
> >> + '^(q?sgmii|xfi|pcie|sata)-':
> >> + type: object
> >> +
> >> + description: |
> >> + A configuration field within a PCCR. Each field configures one
> >> + protocol controller. The value of the field determines the lanes the
> >> + controller is connected to, if any.
> >> +
> >> + properties:
> >> + fsl,index:
> >
> > indexes are generally a red flag in binding. What is the index, how does
> > it correspond to the h/w and why do you need it.
>
> As described in the description below, the "index" is the protocol controller suffix,
> corresponding to a particular field (or set of fields) in the protocol configuration
> registers.
>
> > If we do end up needing
> > it, 'reg' is generally how we address some component.
>
> I originally used reg, but I got warnings about inheriting #size-cells and
> #address-cells. These bindings are already quite verbose to write out (there
> are around 10-20 configurations per SerDes to describe) and I would like to
> minimize the amount of properties to what is necessary. Additionally, this
> really describes a particular index of a field, and not a register (or an offset
> within a register).
Are you trying to describe all possible configurations in DT? Don't.
The DT should be the config for the specific board, not a menu of
possible configurations.
> >> + $ref: /schemas/types.yaml#/definitions/uint32
> >> + description: |
> >> + The index of the field. This corresponds to the suffix in the
> >
> > What field?
>
> The one from the description above.
>
> >> + documentation. For example, PEXa would be 0, PEXb 1, etc.
> >> + Generally, higher fields occupy lower bits.
> >> +
> >> + If there are any subnodes present, they will be preferred over
> >> + fsl,cfg et. al.
> >> +
> >> + fsl,cfg:
> >> + $ref: "#/definitions/fsl,cfg"
> >> +
> >> + fsl,first-lane:
> >> + $ref: "#/definitions/fsl,first-lane"
> >> +
> >> + fsl,last-lane:
> >> + $ref: "#/definitions/fsl,last-lane"
> >
> > Why do you have lane assignments here and in the phy cells?
>
> For three reasons. First, because we need to know what protocols are valid on what
> lanes. The idea is to allow the MAC to configure the protocols at runtime. To do
> this, someone has to figure out if the protocol is supported on that lane. The
> best place to put this IMO is the serdes.
Within ethernet protocols, that makes sense.
> Second, some serdes have (mostly) unsupported protocols such as PCIe as well as
> Ethernet protocols. To allow using Ethernet, we need to know which lanes are
> configured (by the firmware/bootloader) for some other protocol. That way, we
> can avoid touching them.
The ones needed for ethernet are the ones with a connection to the
ethernet MACs with the 'phys' properties. Why don't you just ignore
the !ethernet ones?
> Third, as part of the probe sequence, we need to ensure that no protocol controllers
> are currently selected. Otherwise, we will get strange problems later when we try
> to connect multiple protocol controllers to the same lane.
Sounds like a kernel problem...
>
> >> +
> >> + fsl,proto:
> >> + $ref: /schemas/types.yaml#/definitions/string
> >> + enum:
> >> + - sgmii
> >> + - sgmii25
> >> + - qsgmii
> >> + - xfi
> >> + - pcie
> >> + - sata
> >
> > We have standard phy modes already for at least most of these types.
> > Generally the mode is set in the phy cells.
>
> Yes, but this is the "protocol" which may correspond to multiple phy modes.
> For example, sgmii25 allows SGMII, 1000BASE-X, 1000BASE-KR, and 2500BASE-X
> phy modes.
As phy mode is more specific than protocol (or mode implies protocol),
why do we need protocol in DT?
[...]
> >> + xfi-1 {
> >> + fsl,index = <1>;
> >> + fsl,cfg = <0x1>;
> >> + fsl,first-lane = <0>;
> >> + fsl,proto = "xfi";
> >> + };
> >> + };
> >> + };
> >
> > Other than lane assignments and modes, I don't really understand what
> > you are trying to do.
>
> This is touched on a bit above, but the idea here is to allow for dynamic
> reconfiguration of the serdes mode in order to support multiple ethernet
> phy modes at runtime. To do this, we need to know about all the available
> protocol controllers, and the lanes they support. In particular, the
> available controllers and the lanes they map to (and the values to
> program to select them) differ even between different serdes on the same
> SoC.
>
> > It all looks too complex and I don't see any other
> > phy bindings needing something this complex.
>
> This was explicitly asked for last time. I also would not like to do this,
> but you and Krzysztof Kozlowski were very opposed to having per-device
> compatible strings. If you have a suggestion for a different approach, I
> am all ears. I find it very frustrating that the primary feedback I get from
> the device tree folks is "you can't do this" without a corresponding "do it
> this way."
How much time do you expect that we spend on your binding which is
only 1 out of the 100-200 patches we get a week? We're not experts in
all kinds of h/w and the experts for specific h/w don't always care
about DT bindings. We often get presented with solutions without
sufficient explanations of the problem. If I don't understand the
problem, how can I propose a solution? We can only point out what
doesn't fit within normal DT patterns. PHYs with multiple modes
supported is not a unique problem, so why are existing ways to deal
with that not sufficient and why do you need a *very* specific
binding?
With the phy binding, you know what each lane is connected to. You can
put whatever information you want in the phy cells to configure the
phy for that client. The phy cells are defined by the provider and
opaque to the consumer. Yes, we like to standardize cells when
possible, but that's only a convenience. I'm not saying phy cells is
the answer for everything and define 10 cells worth of data either.
Rob
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 01/47] dt-bindings: phy: Add Lynx 10G phy binding
2022-07-21 18:29 ` Rob Herring
@ 2022-07-21 23:35 ` Sean Anderson
2022-07-26 15:44 ` Sean Anderson
0 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-21 23:35 UTC (permalink / raw)
To: Rob Herring
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Kishon Vijay Abraham I, Krzysztof Kozlowski,
Vinod Koul, devicetree, open list:GENERIC PHY FRAMEWORK
On 7/21/22 2:29 PM, Rob Herring wrote:
> On Thu, Jul 21, 2022 at 10:06 AM Sean Anderson <sean.anderson@seco.com> wrote:
>>
>>
>>
>> On 7/20/22 6:17 PM, Rob Herring wrote:
>> > On Fri, Jul 15, 2022 at 05:59:08PM -0400, Sean Anderson wrote:
>> >> This adds a binding for the SerDes module found on QorIQ processors. The
>> >> phy reference has two cells, one for the first lane and one for the
>> >> last. This should allow for good support of multi-lane protocols when
>> >> (if) they are added. There is no protocol option, because the driver is
>> >> designed to be able to completely reconfigure lanes at runtime.
>> >> Generally, the phy consumer can select the appropriate protocol using
>> >> set_mode. For the most part there is only one protocol controller
>> >> (consumer) per lane/protocol combination. The exception to this is the
>> >> B4860 processor, which has some lanes which can be connected to
>> >> multiple MACs. For that processor, I anticipate the easiest way to
>> >> resolve this will be to add an additional cell with a "protocol
>> >> controller instance" property.
>> >>
>> >> Each serdes has a unique set of supported protocols (and lanes). The
>> >> support matrix is configured in the device tree. The format of each
>> >> PCCR (protocol configuration register) is modeled. Although the general
>> >> format is typically the same across different SoCs, the specific
>> >> supported protocols (and the values necessary to select them) are
>> >> particular to individual SerDes. A nested structure is used to reduce
>> >> duplication of data.
>> >>
>> >> There are two PLLs, each of which can be used as the master clock for
>> >> each lane. Each PLL has its own reference. For the moment they are
>> >> required, because it simplifies the driver implementation. Absent
>> >> reference clocks can be modeled by a fixed-clock with a rate of 0.
>> >>
>> >> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
>> >> ---
>> >>
>> >> Changes in v3:
>> >> - Manually expand yaml references
>> >> - Add mode configuration to device tree
>> >>
>> >> Changes in v2:
>> >> - Rename to fsl,lynx-10g.yaml
>> >> - Refer to the device in the documentation, rather than the binding
>> >> - Move compatible first
>> >> - Document phy cells in the description
>> >> - Allow a value of 1 for phy-cells. This allows for compatibility with
>> >> the similar (but according to Ioana Ciornei different enough) lynx-28g
>> >> binding.
>> >> - Remove minItems
>> >> - Use list for clock-names
>> >> - Fix example binding having too many cells in regs
>> >> - Add #clock-cells. This will allow using assigned-clocks* to configure
>> >> the PLLs.
>> >> - Document the structure of the compatible strings
>> >>
>> >> .../devicetree/bindings/phy/fsl,lynx-10g.yaml | 311 ++++++++++++++++++
>> >> 1 file changed, 311 insertions(+)
>> >> create mode 100644 Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
>> >>
>> >> diff --git a/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml b/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
>> >> new file mode 100644
>> >> index 000000000000..a2c37225bb67
>> >> --- /dev/null
>> >> +++ b/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
>> >> @@ -0,0 +1,311 @@
>> >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> >> +%YAML 1.2
>> >> +---
>> >> +$id: http://devicetree.org/schemas/phy/fsl,lynx-10g.yaml#
>> >> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> >> +
>> >> +title: NXP Lynx 10G SerDes
>> >> +
>> >> +maintainers:
>> >> + - Sean Anderson <sean.anderson@seco.com>
>> >> +
>> >> +description: |
>> >> + These Lynx "SerDes" devices are found in NXP's QorIQ line of processors. The
>> >> + SerDes provides up to eight lanes. Each lane may be configured individually,
>> >> + or may be combined with adjacent lanes for a multi-lane protocol. The SerDes
>> >> + supports a variety of protocols, including up to 10G Ethernet, PCIe, SATA, and
>> >> + others. The specific protocols supported for each lane depend on the
>> >> + particular SoC.
>> >> +
>> >> +definitions:
>> >
>> > $defs:
>>
>> That didn't work until recently :)
>>
>> I will change this for next revision.
>>
>> >> + fsl,cfg:
>> >> + $ref: /schemas/types.yaml#/definitions/uint32
>> >> + minimum: 1
>> >> + description: |
>> >> + The configuration value to program into the field.
>> >
>> > What field?
>>
>> Ah, looks like this lost some context when I moved it. I will expand on this.
>>
>> >> +
>> >> + fsl,first-lane:
>> >> + $ref: /schemas/types.yaml#/definitions/uint32
>> >> + minimum: 0
>> >> + maximum: 7
>> >> + description: |
>> >> + The first lane in the group configured by fsl,cfg. This lane will have
>> >> + the FIRST_LANE bit set in GCR0. The reset direction will also be set
>> >> + based on whether this property is less than or greater than
>> >> + fsl,last-lane.
>> >> +
>> >> + fsl,last-lane:
>> >> + $ref: /schemas/types.yaml#/definitions/uint32
>> >> + minimum: 0
>> >> + maximum: 7
>> >> + description: |
>> >> + The last lane configured by fsl,cfg. If this property is absent,
>> >> + then it will default to the value of fsl,first-lane.
>> >> +
>> >> +properties:
>> >> + compatible:
>> >> + items:
>> >> + - enum:
>> >> + - fsl,ls1046a-serdes
>> >> + - fsl,ls1088a-serdes
>> >> + - const: fsl,lynx-10g
>> >> +
>> >> + "#clock-cells":
>> >> + const: 1
>> >> + description: |
>> >> + The cell contains the index of the PLL, starting from 0. Note that when
>> >> + assigning a rate to a PLL, the PLLs' rates are divided by 1000 to avoid
>> >> + overflow. A rate of 5000000 corresponds to 5GHz.
>> >> +
>> >> + "#phy-cells":
>> >> + minimum: 1
>> >> + maximum: 2
>> >> + description: |
>> >> + The cells contain the following arguments:
>> >> + - The first lane in the group. Lanes are numbered based on the register
>> >> + offsets, not the I/O ports. This corresponds to the letter-based ("Lane
>> >> + A") naming scheme, and not the number-based ("Lane 0") naming scheme. On
>> >> + most SoCs, "Lane A" is "Lane 0", but not always.
>> >> + - Last lane. For single-lane protocols, this should be the same as the
>> >> + first lane.
>> >
>> > Perhaps a single cell with a lane mask would be simpler.
>>
>> Yes.
>>
>> >> + If no lanes in a SerDes can be grouped, then #phy-cells may be 1, and the
>> >> + first cell will specify the only lane in the group.
>> >
>> > It is generally easier to have a fixed number of cells.
>>
>> This was remarked on last time. I allowed this for better compatibility with the lynx
>> 28g serdes binding. Is that reasonable? I agree it would simplify the driver to just
>> have one cell type.
>>
>> >> +
>> >> + clocks:
>> >> + maxItems: 2
>> >> + description: |
>> >> + Clock for each PLL reference clock input.
>> >> +
>> >> + clock-names:
>> >> + minItems: 2
>> >> + maxItems: 2
>> >> + items:
>> >> + enum:
>> >> + - ref0
>> >> + - ref1
>> >> +
>> >> + reg:
>> >> + maxItems: 1
>> >> +
>> >> +patternProperties:
>> >> + '^pccr-':
>> >> + type: object
>> >> +
>> >> + description: |
>> >> + One of the protocol configuration registers (PCCRs). These contains
>> >> + several fields, each of which mux a particular protocol onto a particular
>> >> + lane.
>> >> +
>> >> + properties:
>> >> + fsl,pccr:
>> >> + $ref: /schemas/types.yaml#/definitions/uint32
>> >> + description: |
>> >> + The index of the PCCR. This is the same as the register name suffix.
>> >> + For example, a node for PCCRB would use a value of '0xb' for an
>> >> + offset of 0x22C (0x200 + 4 * 0xb).
>> >> +
>> >> + patternProperties:
>> >> + '^(q?sgmii|xfi|pcie|sata)-':
>> >> + type: object
>> >> +
>> >> + description: |
>> >> + A configuration field within a PCCR. Each field configures one
>> >> + protocol controller. The value of the field determines the lanes the
>> >> + controller is connected to, if any.
>> >> +
>> >> + properties:
>> >> + fsl,index:
>> >
>> > indexes are generally a red flag in binding. What is the index, how does
>> > it correspond to the h/w and why do you need it.
>>
>> As described in the description below, the "index" is the protocol controller suffix,
>> corresponding to a particular field (or set of fields) in the protocol configuration
>> registers.
>>
>> > If we do end up needing
>> > it, 'reg' is generally how we address some component.
>>
>> I originally used reg, but I got warnings about inheriting #size-cells and
>> #address-cells. These bindings are already quite verbose to write out (there
>> are around 10-20 configurations per SerDes to describe) and I would like to
>> minimize the amount of properties to what is necessary. Additionally, this
>> really describes a particular index of a field, and not a register (or an offset
>> within a register).
>
> Are you trying to describe all possible configurations in DT? Don't.
> The DT should be the config for the specific board, not a menu of
> possible configurations.
Reasons 2 and 3 mentioned below.
>> >> + $ref: /schemas/types.yaml#/definitions/uint32
>> >> + description: |
>> >> + The index of the field. This corresponds to the suffix in the
>> >
>> > What field?
>>
>> The one from the description above.
>>
>> >> + documentation. For example, PEXa would be 0, PEXb 1, etc.
>> >> + Generally, higher fields occupy lower bits.
>> >> +
>> >> + If there are any subnodes present, they will be preferred over
>> >> + fsl,cfg et. al.
>> >> +
>> >> + fsl,cfg:
>> >> + $ref: "#/definitions/fsl,cfg"
>> >> +
>> >> + fsl,first-lane:
>> >> + $ref: "#/definitions/fsl,first-lane"
>> >> +
>> >> + fsl,last-lane:
>> >> + $ref: "#/definitions/fsl,last-lane"
>> >
>> > Why do you have lane assignments here and in the phy cells?
>>
>> For three reasons. First, because we need to know what protocols are valid on what
>> lanes. The idea is to allow the MAC to configure the protocols at runtime. To do
>> this, someone has to figure out if the protocol is supported on that lane. The
>> best place to put this IMO is the serdes.
>
> Within ethernet protocols, that makes sense.
>
>> Second, some serdes have (mostly) unsupported protocols such as PCIe as well as
>> Ethernet protocols. To allow using Ethernet, we need to know which lanes are
>> configured (by the firmware/bootloader) for some other protocol. That way, we
>> can avoid touching them.
>
> The ones needed for ethernet are the ones with a connection to the
> ethernet MACs with the 'phys' properties. Why don't you just ignore
> the !ethernet ones?
That's what I try to do. However, non-ethernet modes can use the same
lanes as ethernet modes. So we need to know how the protocol selection
registers are laid out, and what bits select which lanes. Although the
general layout is mostly the same [1], the mapping is specific to the
individual serdes on the individual SoC.
[1] Occasionally, the layout of registers changes between different SoC
revisions. Usually this is because one of the registers ran out of
bits.
>> Third, as part of the probe sequence, we need to ensure that no protocol controllers
>> are currently selected. Otherwise, we will get strange problems later when we try
>> to connect multiple protocol controllers to the same lane.
>
> Sounds like a kernel problem...
Of course, but this stuff has to come from somewhere. Due to the second
reason above we can't just clear out all the PCCRs. We need to know
whether a lane is in use or not,
>>
>> >> +
>> >> + fsl,proto:
>> >> + $ref: /schemas/types.yaml#/definitions/string
>> >> + enum:
>> >> + - sgmii
>> >> + - sgmii25
>> >> + - qsgmii
>> >> + - xfi
>> >> + - pcie
>> >> + - sata
>> >
>> > We have standard phy modes already for at least most of these types.
>> > Generally the mode is set in the phy cells.
>>
>> Yes, but this is the "protocol" which may correspond to multiple phy modes.
>> For example, sgmii25 allows SGMII, 1000BASE-X, 1000BASE-KR, and 2500BASE-X
>> phy modes.
>
> As phy mode is more specific than protocol (or mode implies protocol),
> why do we need protocol in DT?
The protocol (along with the PCCR and the protocol controller index) is
used to determine the bitmask for a particular selector. For example,
PCCR1 on the T1040 has the following layout:
Bits Field name
===== ==========
0- 1 SGMIIA_CFG
2- 3 SGMIIB_CFG
4- 5 SGMIIC_CFG
6- 7 SGMIID_CFG
8- 9 SGMIIE_CFG
10-11 SGMIIF_CFG
12-15 Reserved
16 SGMIIA_KX
17 SGMIIB_KX
18 SGMIIC_KX
19 SGMIID_KX
20 SGMIIE_KX
21 SGMIIF_KX
22-23 Reserved
24-25 QSGMA_CFG
26-27 Reserved
28-29 QSGMB_CFG
30-31 Reserved
Note that the KX bit (determining whether 1000BASE-X/SGMII or
1000BASE-KX is enabled) is not contiguous with the CFG field. Instead,
the "index" of the protocol controller is used to determine the correct
max to use for the CFG field as well as the KX bit. Also note that this
register is inhomogeneous. Just the "index" is not enough: we need to
know what the protocol is as well.
> [...]
>
>> >> + xfi-1 {
>> >> + fsl,index = <1>;
>> >> + fsl,cfg = <0x1>;
>> >> + fsl,first-lane = <0>;
>> >> + fsl,proto = "xfi";
>> >> + };
>> >> + };
>> >> + };
>> >
>> > Other than lane assignments and modes, I don't really understand what
>> > you are trying to do.
>>
>> This is touched on a bit above, but the idea here is to allow for dynamic
>> reconfiguration of the serdes mode in order to support multiple ethernet
>> phy modes at runtime. To do this, we need to know about all the available
>> protocol controllers, and the lanes they support. In particular, the
>> available controllers and the lanes they map to (and the values to
>> program to select them) differ even between different serdes on the same
>> SoC.
>>
>> > It all looks too complex and I don't see any other
>> > phy bindings needing something this complex.
>>
>> This was explicitly asked for last time. I also would not like to do this,
>> but you and Krzysztof Kozlowski were very opposed to having per-device
>> compatible strings. If you have a suggestion for a different approach, I
>> am all ears. I find it very frustrating that the primary feedback I get from
>> the device tree folks is "you can't do this" without a corresponding "do it
>> this way."
>
> How much time do you expect that we spend on your binding which is
> only 1 out of the 100-200 patches we get a week?
I appreciate the work you do on this. But every revision I make without
knowing whether I'm on the right track wastes both of our time. I have
to spend my time coming up with and implementing a new binding and you
have to spend time reviewing it. A nudge in the right direction can
easily save us both time.
> We're not experts in all kinds of h/w and the experts for specific h/w
> don't always care about DT bindings.
Vinod, this is why I (and presumably Rob) would appreciate your feedback.
> We often get presented with solutions without sufficient explanations
> of the problem. If I don't understand the problem, how can I propose a
> solution? We can only point out what doesn't fit within normal DT
> patterns. PHYs with multiple modes supported is not a unique problem,
> so why are existing ways to deal with that not sufficient and why do
> you need a *very* specific binding?
Well, take for example xlnx,zynqmp-psgtr. Although it is not obvious
from the binding, there are several things which simplify the driver.
First, all the modes are completely incompatible. Any consumer will not
need to switch modes at runtime. Second, there is only one GTR device
per SoC. That means that the compatible string which completely
determines the available modes. The mode/lane mapping can be stored in
the driver instead of in the device tree. Last, there is only one
variant of this device. There are no other SoCs with slightly different
register layout, mode support, or lanes.
To contrast with this device, there are several almost-compatible modes.
We cannot just set the mode at boot and be done with it (in fact this is
exactly what I am trying to change by adding a driver). Some modes are
so similar that they reuse protocol controllers, but they still need to
have different lane configuration. There are multiple different SerDes
devices on each SoC. While they have the same register layout, the
connected protocol controllers (and lane mapping) is different. There
are also different SoCs with (ever-so-slightly) different register
layouts, protocol controllers, and lane mappings.
All of this sort of information would normally just be stored in the
driver as a set of struct arrays. In fact, this is what I did the first
time!
> With the phy binding, you know what each lane is connected to. You can
> put whatever information you want in the phy cells to configure the
> phy for that client. The phy cells are defined by the provider and
> opaque to the consumer. Yes, we like to standardize cells when
> possible, but that's only a convenience. I'm not saying phy cells is
> the answer for everything and define 10 cells worth of data either.
Maybe it's better to do something like
// first-lane last-lane protocol pccr idx val
phys = <&serdes1 1 1 PHY_TYPE_SGMII 0x8 2 1>,
<&serdes1 1 1 PHY_TYPE_QSGMII 0x9 0 2>,
<&serdes1 1 1 PHY_TYPE_10GBASER 0xb 1 1>;
phy-names = "sgmii", "qsgmii", "xfi";
(made up values)
But this doesn't play well with the existing idiom of being able to call
phy_set_mode(). Plus, existing drivers expect to have one (devicetree)
phy for one physical serdes.
What about
phys = <&serdes1_lane1>;
and then under the serdes node do something like
serdes1: phy@foo {
...
serdes1_lane1 {
first-lane = <1>;
sgmii {
fsl,pccr = <0x8>;
fsl,idx = <2>;
fsl,cfg = <1>;
fsl,proto = "sgmii";
// or PHY_TYPE_SGMII
};
qsgmii {
...
};
xfi {
...
};
};
};
and this way you could have something like a fsl,reserved property to
deal with not-yet-supported lanes. And this could be added piecemeal by
board configs.
--Sean
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 01/47] dt-bindings: phy: Add Lynx 10G phy binding
2022-07-21 23:35 ` Sean Anderson
@ 2022-07-26 15:44 ` Sean Anderson
0 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-26 15:44 UTC (permalink / raw)
To: Rob Herring
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Kishon Vijay Abraham I, Krzysztof Kozlowski,
Vinod Koul, devicetree, open list:GENERIC PHY FRAMEWORK
Hi Rob,
On 7/21/22 7:35 PM, Sean Anderson wrote:
> What about
>
> phys = <&serdes1_lane1>;
>
> and then under the serdes node do something like
>
> serdes1: phy@foo {
> ...
>
> serdes1_lane1 {
> first-lane = <1>;
>
> sgmii {
> fsl,pccr = <0x8>;
> fsl,idx = <2>;
> fsl,cfg = <1>;
> fsl,proto = "sgmii";
> // or PHY_TYPE_SGMII
> };
>
> qsgmii {
> ...
> };
>
> xfi {
> ...
> };
> };
> };
>
> and this way you could have something like a fsl,reserved property to
> deal with not-yet-supported lanes. And this could be added piecemeal by
> board configs.
Does this sound good? I would like to start working on v4 of this series,
and reworking the binding will be a big part of that. Am I heading in the
right direction? This seems to be a more common approach (e.g. mediatek,tphy).
--Sean
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 02/47] dt-bindings: net: Expand pcs-handle to an array
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 01/47] dt-bindings: phy: Add Lynx 10G phy binding Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 03/47] dt-bindings: net: Convert FMan MAC bindings to yaml Sean Anderson
` (45 subsequent siblings)
47 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
This allows multiple phandles to be specified for pcs-handle, such as
when multiple PCSs are present for a single MAC. To differentiate
between them, also add a pcs-names property.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
This was previously submitted as [1]. I expect to update this series
more, so I have moved it here. Changes from that version include:
- Add maxItems to existing bindings
- Add a depenendency from pcs-names to pcs-handle.
[1] https://lore.kernel.org/netdev/20220711160519.741990-3-sean.anderson@seco.com/
Changes in v3:
- New
.../bindings/net/dsa/renesas,rzn1-a5psw.yaml | 1 +
.../devicetree/bindings/net/ethernet-controller.yaml | 10 +++++++++-
.../devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml | 2 +-
3 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml b/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml
index 4d428f5ad044..b87574549df3 100644
--- a/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml
+++ b/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml
@@ -74,6 +74,7 @@ properties:
properties:
pcs-handle:
+ maxItems: 1
description:
phandle pointing to a PCS sub-node compatible with
renesas,rzn1-miic.yaml#
diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
index 56d9aca8c954..0eb1f3bd6f92 100644
--- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml
+++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
@@ -107,11 +107,16 @@ properties:
$ref: "#/properties/phy-connection-type"
pcs-handle:
- $ref: /schemas/types.yaml#/definitions/phandle
+ $ref: /schemas/types.yaml#/definitions/phandle-array
description:
Specifies a reference to a node representing a PCS PHY device on a MDIO
bus to link with an external PHY (phy-handle) if exists.
+ pcs-names:
+ $ref: /schemas/types.yaml#/definitions/string-array
+ description:
+ The name of each PCS in pcs-handle.
+
phy-handle:
$ref: /schemas/types.yaml#/definitions/phandle
description:
@@ -220,6 +225,9 @@ properties:
required:
- speed
+dependencies:
+ pcs-names: [pcs-handle]
+
allOf:
- if:
properties:
diff --git a/Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml b/Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml
index 7f620a71a972..600240281e8c 100644
--- a/Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml
+++ b/Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml
@@ -31,7 +31,7 @@ properties:
phy-mode: true
pcs-handle:
- $ref: /schemas/types.yaml#/definitions/phandle
+ maxItems: 1
description:
A reference to a node representing a PCS PHY device found on
the internal MDIO bus.
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* [PATCH net-next v3 03/47] dt-bindings: net: Convert FMan MAC bindings to yaml
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 01/47] dt-bindings: phy: Add Lynx 10G phy binding Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 02/47] dt-bindings: net: Expand pcs-handle to an array Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-15 23:06 ` Rob Herring
2022-07-15 21:59 ` [PATCH net-next v3 04/47] dt-bindings: net: fman: Add additional interface properties Sean Anderson
` (44 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Rob Herring, Krzysztof Kozlowski,
Rob Herring, devicetree
This converts the MAC portion of the FMan MAC bindings to yaml.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Changes in v3:
- Incorperate some minor changes into the first FMan binding commit
Changes in v2:
- New
.../bindings/net/fsl,fman-dtsec.yaml | 145 ++++++++++++++++++
.../devicetree/bindings/net/fsl-fman.txt | 128 +---------------
2 files changed, 146 insertions(+), 127 deletions(-)
create mode 100644 Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml
diff --git a/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml b/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml
new file mode 100644
index 000000000000..78579ef839bf
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml
@@ -0,0 +1,145 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/fsl,fman-dtsec.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP FMan MAC
+
+maintainers:
+ - Madalin Bucur <madalin.bucur@nxp.com>
+
+description: |
+ Each FMan has several MACs, each implementing an Ethernet interface. Earlier
+ versions of FMan used the Datapath Three Speed Ethernet Controller (dTSEC) for
+ 10/100/1000 MBit/s speeds, and the 10-Gigabit Ethernet Media Access Controller
+ (10GEC) for 10 Gbit/s speeds. Later versions of FMan use the Multirate
+ Ethernet Media Access Controller (mEMAC) to handle all speeds.
+
+properties:
+ compatible:
+ enum:
+ - fsl,fman-dtsec
+ - fsl,fman-xgec
+ - fsl,fman-memac
+
+ cell-index:
+ maximum: 64
+ description: |
+ FManV2:
+ register[bit] MAC cell-index
+ ============================================================
+ FM_EPI[16] XGEC 8
+ FM_EPI[16+n] dTSECn n-1
+ FM_NPI[11+n] dTSECn n-1
+ n = 1,..,5
+
+ FManV3:
+ register[bit] MAC cell-index
+ ============================================================
+ FM_EPI[16+n] mEMACn n-1
+ FM_EPI[25] mEMAC10 9
+
+ FM_NPI[11+n] mEMACn n-1
+ FM_NPI[10] mEMAC10 9
+ FM_NPI[11] mEMAC9 8
+ n = 1,..8
+
+ FM_EPI and FM_NPI are located in the FMan memory map.
+
+ 2. SoC registers:
+
+ - P2041, P3041, P4080 P5020, P5040:
+ register[bit] FMan MAC cell
+ Unit index
+ ============================================================
+ DCFG_DEVDISR2[7] 1 XGEC 8
+ DCFG_DEVDISR2[7+n] 1 dTSECn n-1
+ DCFG_DEVDISR2[15] 2 XGEC 8
+ DCFG_DEVDISR2[15+n] 2 dTSECn n-1
+ n = 1,..5
+
+ - T1040, T2080, T4240, B4860:
+ register[bit] FMan MAC cell
+ Unit index
+ ============================================================
+ DCFG_CCSR_DEVDISR2[n-1] 1 mEMACn n-1
+ DCFG_CCSR_DEVDISR2[11+n] 2 mEMACn n-1
+ n = 1,..6,9,10
+
+ EVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in
+ the specific SoC "Device Configuration/Pin Control" Memory
+ Map.
+
+ reg:
+ maxItems: 1
+
+ fsl,fman-ports:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ maxItems: 2
+ description: |
+ An array of two references: the first is the FMan RX port and the second
+ is the TX port used by this MAC.
+
+ ptp-timer:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: A reference to the IEEE1588 timer
+
+ pcsphy-handle:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: A reference to the PCS (typically found on the SerDes)
+
+ tbi-handle:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: A reference to the (TBI-based) PCS
+
+required:
+ - compatible
+ - cell-index
+ - reg
+ - fsl,fman-ports
+ - ptp-timer
+
+allOf:
+ - $ref: ethernet-controller.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: fsl,fman-dtsec
+ then:
+ required:
+ - tbi-handle
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: fsl,fman-memac
+ then:
+ required:
+ - pcsphy-handle
+
+additionalProperties: false
+
+examples:
+ - |
+ ethernet@e0000 {
+ compatible = "fsl,fman-dtsec";
+ cell-index = <0>;
+ reg = <0xe0000 0x1000>;
+ fsl,fman-ports = <&fman1_rx8 &fman1_tx28>;
+ ptp-timer = <&ptp_timer>;
+ tbi-handle = <&tbi0>;
+ };
+ - |
+ ethernet@e8000 {
+ cell-index = <4>;
+ compatible = "fsl,fman-memac";
+ reg = <0xe8000 0x1000>;
+ fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;
+ ptp-timer = <&ptp_timer0>;
+ pcsphy-handle = <&pcsphy4>;
+ phy-handle = <&sgmii_phy1>;
+ phy-connection-type = "sgmii";
+ };
+...
diff --git a/Documentation/devicetree/bindings/net/fsl-fman.txt b/Documentation/devicetree/bindings/net/fsl-fman.txt
index 801efc7d6818..b9055335db3b 100644
--- a/Documentation/devicetree/bindings/net/fsl-fman.txt
+++ b/Documentation/devicetree/bindings/net/fsl-fman.txt
@@ -232,133 +232,7 @@ port@81000 {
=============================================================================
FMan dTSEC/XGEC/mEMAC Node
-DESCRIPTION
-
-mEMAC/dTSEC/XGEC are the Ethernet network interfaces
-
-PROPERTIES
-
-- compatible
- Usage: required
- Value type: <stringlist>
- Definition: A standard property.
- Must include one of the following:
- - "fsl,fman-dtsec" for dTSEC MAC
- - "fsl,fman-xgec" for XGEC MAC
- - "fsl,fman-memac" for mEMAC MAC
-
-- cell-index
- Usage: required
- Value type: <u32>
- Definition: Specifies the MAC id.
-
- The cell-index value may be used by the FMan or the SoC, to
- identify the MAC unit in the FMan (or SoC) memory map.
- In the tables below there's a description of the cell-index
- use, there are two tables, one describes the use of cell-index
- by the FMan, the second describes the use by the SoC:
-
- 1. FMan Registers
-
- FManV2:
- register[bit] MAC cell-index
- ============================================================
- FM_EPI[16] XGEC 8
- FM_EPI[16+n] dTSECn n-1
- FM_NPI[11+n] dTSECn n-1
- n = 1,..,5
-
- FManV3:
- register[bit] MAC cell-index
- ============================================================
- FM_EPI[16+n] mEMACn n-1
- FM_EPI[25] mEMAC10 9
-
- FM_NPI[11+n] mEMACn n-1
- FM_NPI[10] mEMAC10 9
- FM_NPI[11] mEMAC9 8
- n = 1,..8
-
- FM_EPI and FM_NPI are located in the FMan memory map.
-
- 2. SoC registers:
-
- - P2041, P3041, P4080 P5020, P5040:
- register[bit] FMan MAC cell
- Unit index
- ============================================================
- DCFG_DEVDISR2[7] 1 XGEC 8
- DCFG_DEVDISR2[7+n] 1 dTSECn n-1
- DCFG_DEVDISR2[15] 2 XGEC 8
- DCFG_DEVDISR2[15+n] 2 dTSECn n-1
- n = 1,..5
-
- - T1040, T2080, T4240, B4860:
- register[bit] FMan MAC cell
- Unit index
- ============================================================
- DCFG_CCSR_DEVDISR2[n-1] 1 mEMACn n-1
- DCFG_CCSR_DEVDISR2[11+n] 2 mEMACn n-1
- n = 1,..6,9,10
-
- EVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in
- the specific SoC "Device Configuration/Pin Control" Memory
- Map.
-
-- reg
- Usage: required
- Value type: <prop-encoded-array>
- Definition: A standard property.
-
-- fsl,fman-ports
- Usage: required
- Value type: <prop-encoded-array>
- Definition: An array of two phandles - the first references is
- the FMan RX port and the second is the TX port used by this
- MAC.
-
-- ptp-timer
- Usage required
- Value type: <phandle>
- Definition: A phandle for 1EEE1588 timer.
-
-- pcsphy-handle
- Usage required for "fsl,fman-memac" MACs
- Value type: <phandle>
- Definition: A phandle for pcsphy.
-
-- tbi-handle
- Usage required for "fsl,fman-dtsec" MACs
- Value type: <phandle>
- Definition: A phandle for tbiphy.
-
-EXAMPLE
-
-fman1_tx28: port@a8000 {
- cell-index = <0x28>;
- compatible = "fsl,fman-v2-port-tx";
- reg = <0xa8000 0x1000>;
-};
-
-fman1_rx8: port@88000 {
- cell-index = <0x8>;
- compatible = "fsl,fman-v2-port-rx";
- reg = <0x88000 0x1000>;
-};
-
-ptp-timer: ptp_timer@fe000 {
- compatible = "fsl,fman-ptp-timer";
- reg = <0xfe000 0x1000>;
-};
-
-ethernet@e0000 {
- compatible = "fsl,fman-dtsec";
- cell-index = <0>;
- reg = <0xe0000 0x1000>;
- fsl,fman-ports = <&fman1_rx8 &fman1_tx28>;
- ptp-timer = <&ptp-timer>;
- tbi-handle = <&tbi0>;
-};
+Refer to Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml
============================================================================
FMan IEEE 1588 Node
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 03/47] dt-bindings: net: Convert FMan MAC bindings to yaml
2022-07-15 21:59 ` [PATCH net-next v3 03/47] dt-bindings: net: Convert FMan MAC bindings to yaml Sean Anderson
@ 2022-07-15 23:06 ` Rob Herring
2022-07-16 22:47 ` Sean Anderson
0 siblings, 1 reply; 123+ messages in thread
From: Rob Herring @ 2022-07-15 23:06 UTC (permalink / raw)
To: Sean Anderson
Cc: devicetree, Rob Herring, Russell King, netdev, Paolo Abeni,
Madalin Bucur, Eric Dumazet, David S . Miller,
Krzysztof Kozlowski, Jakub Kicinski, linux-arm-kernel,
linux-kernel
On Fri, 15 Jul 2022 17:59:10 -0400, Sean Anderson wrote:
> This converts the MAC portion of the FMan MAC bindings to yaml.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
>
> Changes in v3:
> - Incorperate some minor changes into the first FMan binding commit
>
> Changes in v2:
> - New
>
> .../bindings/net/fsl,fman-dtsec.yaml | 145 ++++++++++++++++++
> .../devicetree/bindings/net/fsl-fman.txt | 128 +---------------
> 2 files changed, 146 insertions(+), 127 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/fsl,fman-dtsec.example.dtb: ethernet@e8000: 'phy-connection-type', 'phy-handle' do not match any of the regexes: 'pinctrl-[0-9]+'
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 123+ messages in thread
* Re: [PATCH net-next v3 03/47] dt-bindings: net: Convert FMan MAC bindings to yaml
2022-07-15 23:06 ` Rob Herring
@ 2022-07-16 22:47 ` Sean Anderson
2022-07-21 14:42 ` Krzysztof Kozlowski
0 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-16 22:47 UTC (permalink / raw)
To: Rob Herring
Cc: devicetree, Rob Herring, Russell King, netdev, Paolo Abeni,
Madalin Bucur, Eric Dumazet, David S . Miller,
Krzysztof Kozlowski, Jakub Kicinski, linux-arm-kernel,
linux-kernel
On 7/15/22 7:06 PM, Rob Herring wrote:
> On Fri, 15 Jul 2022 17:59:10 -0400, Sean Anderson wrote:
>> This converts the MAC portion of the FMan MAC bindings to yaml.
>>
>> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
>> Reviewed-by: Rob Herring <robh@kernel.org>
>> ---
>>
>> Changes in v3:
>> - Incorporate some minor changes into the first FMan binding commit
>>
>> Changes in v2:
>> - New
>>
>> .../bindings/net/fsl,fman-dtsec.yaml | 145 ++++++++++++++++++
>> .../devicetree/bindings/net/fsl-fman.txt | 128 +---------------
>> 2 files changed, 146 insertions(+), 127 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml
>>
>
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
>
> yamllint warnings/errors:
>
> dtschema/dtc warnings/errors:
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/fsl,fman-dtsec.example.dtb: ethernet@e8000: 'phy-connection-type', 'phy-handle' do not match any of the regexes: 'pinctrl-[0-9]+'
> From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml
>
> doc reference errors (make refcheckdocs):
What's the correct way to do this? I have '$ref: ethernet-controller.yaml#'
under allOf, but it doesn't seem to apply. IIRC this doesn't occur for actual dts files.
--Sean
^ permalink raw reply [flat|nested] 123+ messages in thread
* Re: [PATCH net-next v3 03/47] dt-bindings: net: Convert FMan MAC bindings to yaml
2022-07-16 22:47 ` Sean Anderson
@ 2022-07-21 14:42 ` Krzysztof Kozlowski
2022-07-22 16:50 ` Sean Anderson
0 siblings, 1 reply; 123+ messages in thread
From: Krzysztof Kozlowski @ 2022-07-21 14:42 UTC (permalink / raw)
To: Sean Anderson, Rob Herring
Cc: devicetree, Rob Herring, Russell King, netdev, Paolo Abeni,
Madalin Bucur, Eric Dumazet, David S . Miller,
Krzysztof Kozlowski, Jakub Kicinski, linux-arm-kernel,
linux-kernel
On 17/07/2022 00:47, Sean Anderson wrote:
> On 7/15/22 7:06 PM, Rob Herring wrote:
>> On Fri, 15 Jul 2022 17:59:10 -0400, Sean Anderson wrote:
>>> This converts the MAC portion of the FMan MAC bindings to yaml.
>>>
>>> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
>>> Reviewed-by: Rob Herring <robh@kernel.org>
>>> ---
>>>
>>> Changes in v3:
>>> - Incorporate some minor changes into the first FMan binding commit
>>>
>>> Changes in v2:
>>> - New
>>>
>>> .../bindings/net/fsl,fman-dtsec.yaml | 145 ++++++++++++++++++
>>> .../devicetree/bindings/net/fsl-fman.txt | 128 +---------------
>>> 2 files changed, 146 insertions(+), 127 deletions(-)
>>> create mode 100644 Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml
>>>
>>
>> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
>> on your patch (DT_CHECKER_FLAGS is new in v5.13):
>>
>> yamllint warnings/errors:
>>
>> dtschema/dtc warnings/errors:
>> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/fsl,fman-dtsec.example.dtb: ethernet@e8000: 'phy-connection-type', 'phy-handle' do not match any of the regexes: 'pinctrl-[0-9]+'
>> From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml
>>
>> doc reference errors (make refcheckdocs):
>
> What's the correct way to do this? I have '$ref: ethernet-controller.yaml#'
> under allOf, but it doesn't seem to apply. IIRC this doesn't occur for actual dts files.
You do not allow any other properties than explicitly listed
(additionalProp:false). If you want to apply all properties from other
schema you need to use unevaluated.
https://elixir.bootlin.com/linux/v5.19-rc7/source/Documentation/devicetree/bindings/writing-bindings.rst#L75
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 123+ messages in thread
* Re: [PATCH net-next v3 03/47] dt-bindings: net: Convert FMan MAC bindings to yaml
2022-07-21 14:42 ` Krzysztof Kozlowski
@ 2022-07-22 16:50 ` Sean Anderson
0 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-22 16:50 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring
Cc: devicetree, Rob Herring, Russell King, netdev, Paolo Abeni,
Madalin Bucur, Eric Dumazet, David S . Miller,
Krzysztof Kozlowski, Jakub Kicinski, linux-arm-kernel,
linux-kernel
On 7/21/22 10:42 AM, Krzysztof Kozlowski wrote:
> On 17/07/2022 00:47, Sean Anderson wrote:
>> On 7/15/22 7:06 PM, Rob Herring wrote:
>>> On Fri, 15 Jul 2022 17:59:10 -0400, Sean Anderson wrote:
>>>> This converts the MAC portion of the FMan MAC bindings to yaml.
>>>>
>>>> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
>>>> Reviewed-by: Rob Herring <robh@kernel.org>
>>>> ---
>>>>
>>>> Changes in v3:
>>>> - Incorporate some minor changes into the first FMan binding commit
>>>>
>>>> Changes in v2:
>>>> - New
>>>>
>>>> .../bindings/net/fsl,fman-dtsec.yaml | 145 ++++++++++++++++++
>>>> .../devicetree/bindings/net/fsl-fman.txt | 128 +---------------
>>>> 2 files changed, 146 insertions(+), 127 deletions(-)
>>>> create mode 100644 Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml
>>>>
>>>
>>> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
>>> on your patch (DT_CHECKER_FLAGS is new in v5.13):
>>>
>>> yamllint warnings/errors:
>>>
>>> dtschema/dtc warnings/errors:
>>> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/fsl,fman-dtsec.example.dtb: ethernet@e8000: 'phy-connection-type', 'phy-handle' do not match any of the regexes: 'pinctrl-[0-9]+'
>>> From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml
>>>
>>> doc reference errors (make refcheckdocs):
>>
>> What's the correct way to do this? I have '$ref: ethernet-controller.yaml#'
>> under allOf, but it doesn't seem to apply. IIRC this doesn't occur for actual dts files.
>
> You do not allow any other properties than explicitly listed
> (additionalProp:false). If you want to apply all properties from other
> schema you need to use unevaluated.
>
> https://elixir.bootlin.com/linux/v5.19-rc7/source/Documentation/devicetree/bindings/writing-bindings.rst#L75
Thanks, I'll fix that.
Although I wasn't able to reproduce this error locally. I'm using the
following command:
CROSS_COMPILE=aarch64-linux-gnu- ARCH=arm64 make O=build -j12 dt_binding_check DT_SCHEMA_FILES=fsl,fman-dtsec.yaml DT_CHECKER_FLAGS=-m
--Sean
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 04/47] dt-bindings: net: fman: Add additional interface properties
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (2 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 03/47] dt-bindings: net: Convert FMan MAC bindings to yaml Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 05/47] net: phy: Add 1000BASE-KX interface mode Sean Anderson
` (43 subsequent siblings)
47 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Krzysztof Kozlowski, Rob Herring,
devicetree
At the moment, mEMACs are configured almost completely based on the
phy-connection-type. That is, if the phy interface is RGMII, it assumed
that RGMII is supported. For some interfaces, it is assumed that the
RCW/bootloader has set up the SerDes properly. This is generally OK, but
restricts runtime reconfiguration. The actual link state is never
reported.
To address these shortcomings, the driver will need additional
information. First, it needs to know how to access the PCS/PMAs (in
order to configure them and get the link status). The SGMII PCS/PMA is
the only currently-described PCS/PMA. Add the XFI and QSGMII PCS/PMAs as
well. The XFI (and 10GBASE-KR) PCS/PMA is a c45 "phy" which sits on the
same MDIO bus as SGMII PCS/PMA. By default they will have conflicting
addresses, but they are also not enabled at the same time by default.
Therefore, we can let the XFI PCS/PMA be the default when
phy-connection-type is xgmii. This will allow for
backwards-compatibility.
QSGMII, however, cannot work with the current binding. This is because
the QSGMII PCS/PMAs are only present on one MAC's MDIO bus. At the
moment this is worked around by having every MAC write to the PCS/PMA
addresses (without checking if they are present). This only works if
each MAC has the same configuration, and only if we don't need to know
the status. Because the QSGMII PCS/PMA will typically be located on a
different MDIO bus than the MAC's SGMII PCS/PMA, there is no fallback
for the QSGMII PCS/PMA.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
Changes in v3:
- Add vendor prefix 'fsl,' to rgmii and mii properties.
- Set maxItems for pcs-names
- Remove phy-* properties from example because dt-schema complains and I
can't be bothered to figure out how to make it work.
- Add pcs-handle as a preferred version of pcsphy-handle
- Deprecate pcsphy-handle
- Remove mii/rmii properties
Changes in v2:
- Better document how we select which PCS to use in the default case
.../bindings/net/fsl,fman-dtsec.yaml | 53 ++++++++++++++-----
.../devicetree/bindings/net/fsl-fman.txt | 5 +-
2 files changed, 43 insertions(+), 15 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml b/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml
index 78579ef839bf..4abf2f93667e 100644
--- a/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml
+++ b/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml
@@ -85,9 +85,39 @@ properties:
$ref: /schemas/types.yaml#/definitions/phandle
description: A reference to the IEEE1588 timer
+ phys:
+ description: A reference to the SerDes lane(s)
+ maxItems: 1
+
+ phy-names:
+ items:
+ - const: serdes
+
pcsphy-handle:
- $ref: /schemas/types.yaml#/definitions/phandle
- description: A reference to the PCS (typically found on the SerDes)
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ minItems: 1
+ maxItems: 3
+ deprecated: true
+ description: See pcs-handle.
+
+ pcs-handle:
+ minItems: 1
+ maxItems: 3
+ description: |
+ A reference to the various PCSs (typically found on the SerDes). If
+ pcs-names is absent, and phy-connection-type is "xgmii", then the first
+ reference will be assumed to be for "xfi". Otherwise, if pcs-names is
+ absent, then the first reference will be assumed to be for "sgmii".
+
+ pcs-names:
+ minItems: 1
+ maxItems: 3
+ items:
+ enum:
+ - sgmii
+ - qsgmii
+ - xfi
+ description: The type of each PCS in pcsphy-handle.
tbi-handle:
$ref: /schemas/types.yaml#/definitions/phandle
@@ -100,6 +130,10 @@ required:
- fsl,fman-ports
- ptp-timer
+dependencies:
+ pcs-names:
+ - pcs-handle
+
allOf:
- $ref: ethernet-controller.yaml#
- if:
@@ -110,14 +144,6 @@ allOf:
then:
required:
- tbi-handle
- - if:
- properties:
- compatible:
- contains:
- const: fsl,fman-memac
- then:
- required:
- - pcsphy-handle
additionalProperties: false
@@ -138,8 +164,9 @@ examples:
reg = <0xe8000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;
ptp-timer = <&ptp_timer0>;
- pcsphy-handle = <&pcsphy4>;
- phy-handle = <&sgmii_phy1>;
- phy-connection-type = "sgmii";
+ pcs-handle = <&pcsphy4>, <&qsgmiib_pcs1>;
+ pcs-names = "sgmii", "qsgmii";
+ phys = <&serdes1 1>;
+ phy-names = "serdes";
};
...
diff --git a/Documentation/devicetree/bindings/net/fsl-fman.txt b/Documentation/devicetree/bindings/net/fsl-fman.txt
index b9055335db3b..bda4b41af074 100644
--- a/Documentation/devicetree/bindings/net/fsl-fman.txt
+++ b/Documentation/devicetree/bindings/net/fsl-fman.txt
@@ -320,8 +320,9 @@ For internal PHY device on internal mdio bus, a PHY node should be created.
See the definition of the PHY node in booting-without-of.txt for an
example of how to define a PHY (Internal PHY has no interrupt line).
- For "fsl,fman-mdio" compatible internal mdio bus, the PHY is TBI PHY.
-- For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY,
- PCS PHY addr must be '0'.
+- For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY.
+ The PCS PHY address should correspond to the value of the appropriate
+ MDEV_PORT.
EXAMPLE
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* [PATCH net-next v3 05/47] net: phy: Add 1000BASE-KX interface mode
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (3 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 04/47] dt-bindings: net: fman: Add additional interface properties Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 06/47] [RFT] phy: fsl: Add Lynx 10G SerDes driver Sean Anderson
` (42 subsequent siblings)
47 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Heiner Kallweit
Add 1000BASE-KX interface mode. This 1G backplane ethernet as described in
clause 70. Clause 73 autonegotiation is mandatory, and only full duplex
operation is supported.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
Changes in v3:
- New
drivers/net/phy/phylink.c | 1 +
include/linux/phy.h | 4 ++++
2 files changed, 5 insertions(+)
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index 9bd69328dc4d..b08716fe22c1 100644
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -344,6 +344,7 @@ void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface,
case PHY_INTERFACE_MODE_1000BASEX:
caps |= MAC_1000HD;
fallthrough;
+ case PHY_INTERFACE_MODE_1000BASEKX:
case PHY_INTERFACE_MODE_TRGMII:
caps |= MAC_1000FD;
break;
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 87638c55d844..81ce76c3e799 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -115,6 +115,7 @@ extern const int phy_10gbit_features_array[1];
* @PHY_INTERFACE_MODE_25GBASER: 25G BaseR
* @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII
* @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
+ * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN
* @PHY_INTERFACE_MODE_MAX: Book keeping
*
* Describes the interface between the MAC and PHY.
@@ -152,6 +153,7 @@ typedef enum {
PHY_INTERFACE_MODE_USXGMII,
/* 10GBASE-KR - with Clause 73 AN */
PHY_INTERFACE_MODE_10GKR,
+ PHY_INTERFACE_MODE_1000BASEKX,
PHY_INTERFACE_MODE_MAX,
} phy_interface_t;
@@ -249,6 +251,8 @@ static inline const char *phy_modes(phy_interface_t interface)
return "trgmii";
case PHY_INTERFACE_MODE_1000BASEX:
return "1000base-x";
+ case PHY_INTERFACE_MODE_1000BASEKX:
+ return "1000base-kx";
case PHY_INTERFACE_MODE_2500BASEX:
return "2500base-x";
case PHY_INTERFACE_MODE_5GBASER:
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* [PATCH net-next v3 06/47] [RFT] phy: fsl: Add Lynx 10G SerDes driver
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (4 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 05/47] net: phy: Add 1000BASE-KX interface mode Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-16 22:39 ` kernel test robot
2022-07-15 21:59 ` [PATCH net-next v3 07/47] net: phy: Add support for rate adaptation Sean Anderson
` (41 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Ioana Ciornei, Jonathan Corbet,
Kishon Vijay Abraham I, Krzysztof Kozlowski, Rob Herring,
Vinod Koul, devicetree, linux-doc, linux-phy
This adds support for the Lynx 10G "SerDes" devices found on various NXP
QorIQ SoCs. There may be up to four SerDes devices on each SoC, each
supporting up to eight lanes. Protocol support for each SerDes is highly
heterogeneous, with each SoC typically having a totally different
selection of supported protocols for each lane. Additionally, the SerDes
devices on each SoC also have differing support. One SerDes will
typically support Ethernet on most lanes, while the other will typically
support PCIe on most lanes.
There is wide hardware support for this SerDes. I have not done
extensive digging, but it seems to be used on almost every QorIQ device,
including the AMP and Layerscape series. Because each SoC typically has
specific instructions and exceptions for its SerDes, I have limited the
initial scope of this module to just the LS1046A and LS1088A.
Additionally, I have only added support for Ethernet protocols. There is
not a great need for dynamic reconfiguration for other protocols (SATA
and PCIe handle rate changes in hardware), so support for them may never
be added.
Nevertheless, I have tried to provide an obvious path for adding support
for other SoCs as well as other protocols. SATA just needs support for
configuring LNmSSCR0. PCIe may need to configure the equalization
registers. It also uses multiple lanes. I have tried to write the driver
with multi-lane support in mind, so there should not need to be any large
changes. Although there are 6 protocols supported, I have only tested SGMII
and XFI. The rest have been implemented as described in the datasheet.
Most of these protocols should work "as-is", but 10GBASE-KR will need
PCS support for link training.
The PLLs are modeled as clocks proper. This lets us take advantage of the
existing clock infrastructure. I have not given the same treatment to the
lane "clocks" (dividers) because they need to be programmed in-concert with
the rest of the lane settings. One tricky thing is that the VCO (pll) rate
exceeds 2^32 (maxing out at around 5GHz). This will be a problem on 32-bit
platforms, since clock rates are stored as unsigned longs. To work around
this, the pll clock rate is generally treated in units of kHz.
The PLLs are configured rather interestingly. Instead of the usual direct
programming of the appropriate divisors, the input and output clock rates
are selected directly. Generally, the only restriction is that the input
and output must be integer multiples of each other. This suggests some kind
of internal look-up table. The datasheets generally list out the supported
combinations explicitly, and not all input/output combinations are
documented. I'm not sure if this is due to lack of support, or due to an
oversight. If this becomes an issue, then some combinations can be
blacklisted (or whitelisted). This may also be necessary for other SoCs
which have more stringent clock requirements.
The general API call list for this PHY is documented under the driver-api
docs. I think this is rather standard, except that most drivers configure
the mode (protocol) at xlate-time. Unlike some other phys where e.g. PCIe
x4 will use 4 separate phys all configured for PCIe, this driver uses one
phy configured to use 4 lanes. This is because while the individual lanes
may be configured individually, the protocol selection acts on all lanes at
once. Additionally, the order which lanes should be configured in is
specified by the datasheet. To coordinate this, lanes are reserved in
phy_init, and released in phy_exit.
When getting a phy (backed by struct lynx_group), if a phy already
exists for those lanes, it is reused. This is to make things like
QSGMII work. Four MACs will all want to ensure that the lane is
configured properly, and we need to ensure they can all call phy_init,
etc. There is refcounting for phy_init and phy_power_on, so the phy will
only be powered on once. However, there is no refcounting for
phy_set_mode. A "rogue" MAC could set the mode to something non-QSGMII
and break the other MACs. Perhaps there is an opportunity for future
enhancement here.
This driver was written with reference to the LS1046A reference manual.
However, it was informed by reference manuals for all processors with
mEMACs, especially the T4240 (which appears to have a "maxed-out"
configuration). The earlier PXXX processors appear to be similar, but
have a different overall register layout (using "banks" instead of
separate SerDes).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
XFI does not work when not selected in the RCW. This will not break any
existing boards (since they all select it if they use it).
Changes in v3:
- Rename remaining references to QorIQ SerDes to Lynx 10G
- Fix PLL enable sequence by waiting for our reset request to be cleared
before continuing. Do the same for the lock, even though it isn't as
critical. Because we will delay for 1.5ms on average, use prepare
instead of enable so we can sleep.
- Document the status of each protocol
- Fix offset of several bitfields in RECR0
- Take into account PLLRST_B, SDRST_B, and SDEN when considering whether
a PLL is "enabled."
- Only power off unused lanes.
- Split mode lane mask into first/last lane (like group)
- Read modes from device tree
- Use caps to determine whether KX/KR are supported
- Move modes to lynx_priv
- Ensure that the protocol controller is not already in-use when we try
to configure a new mode. This should only occur if the device tree is
misconfigured (e.g. when QSGMII is selected on two lanes but there is
only one QSGMII controller).
- Split PLL drivers off into their own file
- Add clock for "ext_dly" instead of writing the bit directly (and
racing with any clock code).
- Use kasprintf instead of open-coding the snprintf dance
- Support 1000BASE-KX in lynx_lookup_proto. This still requires PCS
support, so nothing is truly "enabled" yet.
Changes in v2:
- Rename driver to Lynx 10G (etc.)
- Fix not clearing group->pll after disabling it
- Support 1 and 2 phy-cells
- Power off lanes during probe
- Clear SGMIIaCR1_PCS_EN during probe
- Rename LYNX_PROTO_UNKNOWN to LYNX_PROTO_NONE
- Handle 1000BASE-KX in lynx_proto_mode_prep
Documentation/driver-api/phy/index.rst | 1 +
Documentation/driver-api/phy/lynx_10g.rst | 73 +
MAINTAINERS | 6 +
drivers/phy/freescale/Kconfig | 19 +
drivers/phy/freescale/Makefile | 3 +
drivers/phy/freescale/lynx-10g.h | 36 +
drivers/phy/freescale/phy-fsl-lynx-10g-clk.c | 438 ++++++
drivers/phy/freescale/phy-fsl-lynx-10g.c | 1297 ++++++++++++++++++
8 files changed, 1873 insertions(+)
create mode 100644 Documentation/driver-api/phy/lynx_10g.rst
create mode 100644 drivers/phy/freescale/lynx-10g.h
create mode 100644 drivers/phy/freescale/phy-fsl-lynx-10g-clk.c
create mode 100644 drivers/phy/freescale/phy-fsl-lynx-10g.c
diff --git a/Documentation/driver-api/phy/index.rst b/Documentation/driver-api/phy/index.rst
index 69ba1216de72..c9b7a4698dab 100644
--- a/Documentation/driver-api/phy/index.rst
+++ b/Documentation/driver-api/phy/index.rst
@@ -7,6 +7,7 @@ Generic PHY Framework
.. toctree::
phy
+ lynx_10g
samsung-usb2
.. only:: subproject and html
diff --git a/Documentation/driver-api/phy/lynx_10g.rst b/Documentation/driver-api/phy/lynx_10g.rst
new file mode 100644
index 000000000000..aa445911d77d
--- /dev/null
+++ b/Documentation/driver-api/phy/lynx_10g.rst
@@ -0,0 +1,73 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+===========================
+Lynx 10G Phy (QorIQ SerDes)
+===========================
+
+Using this phy
+--------------
+
+The general order of calls should be::
+
+ [devm_][of_]phy_get()
+ phy_init()
+ phy_power_on()
+ phy_set_mode[_ext]()
+ ...
+ phy_power_off()
+ phy_exit()
+ [[of_]phy_put()]
+
+:c:func:`phy_get` just gets (or creates) a new :c:type:`phy` with the lanes
+described in the phandle. :c:func:`phy_init` is what actually reserves the
+lanes for use. Unlike some other drivers, when the phy is created, there is no
+default protocol. :c:func:`phy_set_mode <phy_set_mode_ext>` must be called in
+order to set the protocol.
+
+Supporting SoCs
+---------------
+
+Each new SoC needs a :c:type:`struct lynx_conf <lynx_conf>`, containing the
+number of lanes in each device, the endianness of the device, and a bitmask of
+capabilities ("caps"). For example, the configuration for the LS1046A is::
+
+ static const struct lynx_conf ls1046a_conf = {
+ .lanes = 4,
+ .caps = BIT(LYNX_HAS_1000BASEKX) | BIT(LYNX_HAS_10GKR),
+ .endian = REGMAP_ENDIAN_BIG,
+ };
+
+In addition, you will need to add a device node as documented in
+``Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml``. It is important
+that the list of modes is complete, even if not all protocols are supported.
+This lets the driver know which lanes are available, and which have been
+configured by the RCW.
+
+If a protocol is missing, add it to :c:type:`enum lynx_protocol
+<lynx_protocol>`, and to ``UNSUPPORTED_PROTOS``. If the PCCR shifts/masks for
+your protocol are missing, you will need to add them to
+:c:func:`lynx_proto_mode_mask` and :c:func:`lynx_proto_mode_shift`. Lastly, you
+will also need to add the mode to :c:func:`lynx_parse_pccrs`.
+
+Supporting Protocols
+--------------------
+
+Each protocol is a combination of values which must be programmed into the lane
+registers. To add a new protocol, first add it to :c:type:`enum lynx_protocol
+<lynx_protocol>`. If it is in ``UNSUPPORTED_PROTOS``, remove it. Add a new
+entry to `lynx_proto_params`, and populate the appropriate fields. You may need
+to add some new members to support new fields. Modify `lynx_lookup_proto` to
+map the :c:type:`enum phy_mode <phy_mode>` to :c:type:`enum lynx_protocol
+<lynx_protocol>`. Ensure that :c:func:`lynx_proto_mode_mask` and
+:c:func:`lynx_proto_mode_shift` have been updated with support for your
+protocol.
+
+You may need to modify :c:func:`lynx_set_mode` in order to support your
+protocol. This can happen when you have added members to :c:type:`struct
+lynx_proto_params <lynx_proto_params>`. It can also happen if you have specific
+clocking requirements, or protocol-specific registers to program.
+
+Internal API Reference
+----------------------
+
+.. kernel-doc:: drivers/phy/freescale/phy-fsl-lynx-10g.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 66738c8330db..085e110da079 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11799,6 +11799,12 @@ S: Maintained
W: http://linux-test-project.github.io/
T: git git://github.com/linux-test-project/ltp.git
+LYNX 10G SERDES DRIVER
+M: Sean Anderson <sean.anderson@seco.com>
+S: Maintained
+F: Documentation/driver-api/phy/lynx_10g.rst
+F: drivers/phy/freescale/phy-fsl-lynx-10g.c
+
LYNX 28G SERDES PHY DRIVER
M: Ioana Ciornei <ioana.ciornei@nxp.com>
L: netdev@vger.kernel.org
diff --git a/drivers/phy/freescale/Kconfig b/drivers/phy/freescale/Kconfig
index f9c54cd02036..fe2a3efe0ba4 100644
--- a/drivers/phy/freescale/Kconfig
+++ b/drivers/phy/freescale/Kconfig
@@ -38,3 +38,22 @@ config PHY_FSL_LYNX_28G
found on NXP's Layerscape platforms such as LX2160A.
Used to change the protocol running on SerDes lanes at runtime.
Only useful for a restricted set of Ethernet protocols.
+
+config PHY_FSL_LYNX_10G
+ tristate "Freescale Layerscale Lynx 10G SerDes support"
+ select GENERIC_PHY
+ select REGMAP_MMIO
+ help
+ This adds support for the Lynx "SerDes" devices found on various QorIQ
+ SoCs. There may be up to four SerDes devices on each SoC, and each
+ device supports up to eight lanes. The SerDes is configured by default
+ by the RCW, but this module is necessary in order to support dynamic
+ reconfiguration (such as to support 1G and 10G ethernet on the same
+ interface). The hardware supports a variety of protocols, including
+ Ethernet, SATA, PCIe, and more exotic links such as Interlaken and
+ Aurora. This driver only supports Ethernet, but it will try not to
+ touch lanes configured for other protocols.
+
+ If you have a QorIQ processor and want to dynamically reconfigure your
+ SerDes, say Y. If this driver is compiled as a module, it will be
+ named phy-fsl-lynx-10g-drv.
diff --git a/drivers/phy/freescale/Makefile b/drivers/phy/freescale/Makefile
index 3518d5dbe8a7..bd54ecef8b48 100644
--- a/drivers/phy/freescale/Makefile
+++ b/drivers/phy/freescale/Makefile
@@ -2,4 +2,7 @@
obj-$(CONFIG_PHY_FSL_IMX8MQ_USB) += phy-fsl-imx8mq-usb.o
obj-$(CONFIG_PHY_MIXEL_MIPI_DPHY) += phy-fsl-imx8-mipi-dphy.o
obj-$(CONFIG_PHY_FSL_IMX8M_PCIE) += phy-fsl-imx8m-pcie.o
+phy-fsl-lynx-10g-drv-y += phy-fsl-lynx-10g.o
+phy-fsl-lynx-10g-drv-y += phy-fsl-lynx-10g-clk.o
+obj-$(CONFIG_PHY_FSL_LYNX_10G) += phy-fsl-lynx-10g-drv.o
obj-$(CONFIG_PHY_FSL_LYNX_28G) += phy-fsl-lynx-28g.o
diff --git a/drivers/phy/freescale/lynx-10g.h b/drivers/phy/freescale/lynx-10g.h
new file mode 100644
index 000000000000..882ab9da00bd
--- /dev/null
+++ b/drivers/phy/freescale/lynx-10g.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com>
+ */
+
+#ifndef LYNX_10G
+#define LYNX_10G
+
+struct device;
+struct regmap;
+
+#include <linux/clk-provider.h>
+
+/**
+ * struct lynx_clk - Driver data for the PLLs
+ * @pll: The PLL clock
+ * @ex_dly: The "PLLa_ex_dly_clk" clock
+ * @ref: Our reference clock
+ * @dev: The serdes device
+ * @regmap: Our registers
+ * @idx: Which PLL this clock is for
+ */
+struct lynx_clk {
+ struct clk_hw pll, ex_dly;
+ struct clk *ref;
+ struct device *dev;
+ struct regmap *regmap;
+ unsigned int idx;
+};
+
+void lynx_pll_disable(struct clk_hw *hw);
+
+int lynx_clks_init(struct lynx_clk clks[2], struct device *dev,
+ struct regmap *regmap);
+
+#endif /* LYNX 10G */
diff --git a/drivers/phy/freescale/phy-fsl-lynx-10g-clk.c b/drivers/phy/freescale/phy-fsl-lynx-10g-clk.c
new file mode 100644
index 000000000000..dac5d2872a27
--- /dev/null
+++ b/drivers/phy/freescale/phy-fsl-lynx-10g-clk.c
@@ -0,0 +1,438 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com>
+ *
+ * This file contains the implementation for the PLLs found on Lynx 10G phys.
+ */
+
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/device.h>
+#include <linux/math64.h>
+#include <linux/regmap.h>
+#include <linux/units.h>
+
+#include "lynx-10g.h"
+
+#define PLL_STRIDE 0x20
+#define PLLa(a, off) ((a) * PLL_STRIDE + (off))
+#define PLLaRSTCTL(a) PLLa(a, 0x00)
+#define PLLaCR0(a) PLLa(a, 0x04)
+
+#define PLLaRSTCTL_RSTREQ BIT(31)
+#define PLLaRSTCTL_RST_DONE BIT(30)
+#define PLLaRSTCTL_RST_ERR BIT(29)
+#define PLLaRSTCTL_PLLRST_B BIT(7)
+#define PLLaRSTCTL_SDRST_B BIT(6)
+#define PLLaRSTCTL_SDEN BIT(5)
+
+#define PLLaRSTCTL_ENABLE_SET (PLLaRSTCTL_RST_DONE | PLLaRSTCTL_PLLRST_B | \
+ PLLaRSTCTL_SDRST_B | PLLaRSTCTL_SDEN)
+#define PLLaRSTCTL_ENABLE_MASK (PLLaRSTCTL_ENABLE_SET | PLLaRSTCTL_RST_ERR)
+
+#define PLLaCR0_POFF BIT(31)
+#define PLLaCR0_RFCLK_SEL GENMASK(30, 28)
+#define PLLaCR0_PLL_LCK BIT(23)
+#define PLLaCR0_FRATE_SEL GENMASK(19, 16)
+#define PLLaCR0_DLYDIV_SEL GENMASK(1, 0)
+
+#define PLLaCR0_DLYDIV_SEL_16 0b01
+
+static u32 lynx_read(struct lynx_clk *clk, u32 reg)
+{
+ unsigned int ret = 0;
+
+ WARN_ON_ONCE(regmap_read(clk->regmap, reg, &ret));
+ return ret;
+}
+
+static void lynx_write(struct lynx_clk *clk, u32 val, u32 reg)
+{
+ WARN_ON_ONCE(regmap_write(clk->regmap, reg, val));
+}
+
+static struct lynx_clk *lynx_pll_to_clk(struct clk_hw *hw)
+{
+ return container_of(hw, struct lynx_clk, pll);
+}
+
+static struct lynx_clk *lynx_ex_dly_to_clk(struct clk_hw *hw)
+{
+ return container_of(hw, struct lynx_clk, ex_dly);
+}
+
+/* XXX: The output rate is in kHz to avoid overflow on 32-bit arches */
+
+void lynx_pll_disable(struct clk_hw *hw)
+{
+ struct lynx_clk *clk = lynx_pll_to_clk(hw);
+ u32 rstctl = lynx_read(clk, PLLaRSTCTL(clk->idx));
+
+ dev_dbg(clk->dev, "%s(pll%d)\n", __func__, clk->idx);
+
+ rstctl &= ~PLLaRSTCTL_SDRST_B;
+ lynx_write(clk, rstctl, PLLaRSTCTL(clk->idx));
+ ndelay(50);
+ rstctl &= ~(PLLaRSTCTL_SDEN | PLLaRSTCTL_PLLRST_B);
+ lynx_write(clk, rstctl, PLLaRSTCTL(clk->idx));
+ ndelay(100);
+}
+
+static int lynx_pll_prepare(struct clk_hw *hw)
+{
+ int ret;
+ struct lynx_clk *clk = lynx_pll_to_clk(hw);
+ u32 rstctl = lynx_read(clk, PLLaRSTCTL(clk->idx));
+
+ dev_dbg(clk->dev, "%s(pll%d) %.8x\n", __func__, clk->idx, rstctl);
+
+ /*
+ * "Enabling" the PLL involves resetting it (and all attached lanes).
+ * Avoid doing this if we are already enabled.
+ */
+ if (clk_hw_is_enabled(hw))
+ return 0;
+
+ rstctl |= PLLaRSTCTL_RSTREQ;
+ lynx_write(clk, rstctl, PLLaRSTCTL(clk->idx));
+ /* Wait for the reset request to clear */
+ ret = read_poll_timeout(lynx_read, rstctl,
+ !(rstctl & PLLaRSTCTL_RSTREQ), 10, 1000, true,
+ clk, PLLaRSTCTL(clk->idx));
+ if (ret) {
+ dev_err(clk->dev,
+ "timed out waiting for reset request to clear\n");
+ return ret;
+ }
+
+ rstctl &= ~PLLaRSTCTL_RSTREQ;
+ rstctl |= PLLaRSTCTL_SDEN | PLLaRSTCTL_PLLRST_B | PLLaRSTCTL_SDRST_B;
+ lynx_write(clk, rstctl, PLLaRSTCTL(clk->idx));
+ ret = read_poll_timeout(lynx_read, rstctl,
+ rstctl & (PLLaRSTCTL_RST_DONE | PLLaRSTCTL_RST_ERR),
+ 100, 5000, true, clk, PLLaRSTCTL(clk->idx));
+ if (ret) {
+ dev_err(clk->dev, "timed out waiting for lock\n");
+ return ret;
+ }
+ return rstctl & PLLaRSTCTL_RST_ERR ? -EIO : 0;
+}
+
+static int lynx_pll_is_enabled(struct clk_hw *hw)
+{
+ struct lynx_clk *clk = lynx_pll_to_clk(hw);
+ u32 rstctl = lynx_read(clk, PLLaRSTCTL(clk->idx));
+
+ dev_dbg(clk->dev, "%s(pll%d)\n", __func__, clk->idx);
+
+ return (rstctl & PLLaRSTCTL_ENABLE_MASK) == PLLaRSTCTL_ENABLE_SET;
+}
+
+static const u32 rfclk_sel_map[8] = {
+ [0b000] = 100000000,
+ [0b001] = 125000000,
+ [0b010] = 156250000,
+ [0b011] = 150000000,
+};
+
+/**
+ * lynx_rfclk_to_sel() - Convert a reference clock rate to a selector
+ * @rate: The reference clock rate
+ *
+ * To allow for some variation in the reference clock rate, up to 100ppm of
+ * error is allowed.
+ *
+ * Return: An appropriate selector for @rate, or -%EINVAL.
+ */
+static int lynx_rfclk_to_sel(u32 rate)
+{
+ int ret;
+
+ for (ret = 0; ret < ARRAY_SIZE(rfclk_sel_map); ret++) {
+ u32 rfclk_rate = rfclk_sel_map[ret];
+ /* Allow an error of 100ppm */
+ u32 error = rfclk_rate / 10000;
+
+ if (rate > rfclk_rate - error && rate < rfclk_rate + error)
+ return ret;
+ }
+
+ return -EINVAL;
+}
+
+static const u32 frate_sel_map[16] = {
+ [0b0000] = 5000000,
+ [0b0101] = 3750000,
+ [0b0110] = 5156250,
+ [0b0111] = 4000000,
+ [0b1001] = 3125000,
+ [0b1010] = 3000000,
+};
+
+/**
+ * lynx_frate_to_sel() - Convert a VCO clock rate to a selector
+ * @rate_khz: The VCO frequency, in kHz
+ *
+ * Return: An appropriate selector for @rate_khz, or -%EINVAL.
+ */
+static int lynx_frate_to_sel(u32 rate_khz)
+{
+ int ret;
+
+ for (ret = 0; ret < ARRAY_SIZE(frate_sel_map); ret++)
+ if (frate_sel_map[ret] == rate_khz)
+ return ret;
+
+ return -EINVAL;
+}
+
+static u32 lynx_pll_ratio(u32 frate_sel, u32 rfclk_sel)
+{
+ u64 frate;
+ u32 rfclk, error, ratio;
+
+ frate = frate_sel_map[frate_sel] * (u64)HZ_PER_KHZ;
+ rfclk = rfclk_sel_map[rfclk_sel];
+
+ if (!frate || !rfclk)
+ return 0;
+
+ ratio = div_u64_rem(frate, rfclk, &error);
+ if (!error)
+ return ratio;
+ return 0;
+}
+
+static unsigned long lynx_pll_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct lynx_clk *clk = lynx_pll_to_clk(hw);
+ u32 cr0 = lynx_read(clk, PLLaCR0(clk->idx));
+ u32 frate_sel = FIELD_GET(PLLaCR0_FRATE_SEL, cr0);
+ u32 rfclk_sel = FIELD_GET(PLLaCR0_RFCLK_SEL, cr0);
+ unsigned long ret;
+
+ dev_dbg(clk->dev, "%s(pll%d, %lu)\n", __func__,
+ clk->idx, parent_rate);
+
+ ret = mult_frac(parent_rate, lynx_pll_ratio(frate_sel, rfclk_sel),
+ HZ_PER_KHZ);
+ return ret;
+}
+
+static long lynx_pll_round_rate(struct clk_hw *hw, unsigned long rate_khz,
+ unsigned long *parent_rate)
+{
+ int frate_sel, rfclk_sel;
+ struct lynx_clk *clk = lynx_pll_to_clk(hw);
+ u32 ratio;
+
+ dev_dbg(clk->dev, "%s(pll%d, %lu, %lu)\n", __func__,
+ clk->idx, rate_khz, *parent_rate);
+
+ frate_sel = lynx_frate_to_sel(rate_khz);
+ if (frate_sel < 0)
+ return frate_sel;
+
+ rfclk_sel = lynx_rfclk_to_sel(*parent_rate);
+ if (rfclk_sel >= 0) {
+ ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
+ if (ratio)
+ return mult_frac(*parent_rate, ratio, HZ_PER_KHZ);
+ }
+
+ for (rfclk_sel = 0;
+ rfclk_sel < ARRAY_SIZE(rfclk_sel_map);
+ rfclk_sel++) {
+ ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
+ if (ratio) {
+ *parent_rate = rfclk_sel_map[rfclk_sel];
+ return mult_frac(*parent_rate, ratio, HZ_PER_KHZ);
+ }
+ }
+
+ return -EINVAL;
+}
+
+static int lynx_pll_set_rate(struct clk_hw *hw, unsigned long rate_khz,
+ unsigned long parent_rate)
+{
+ int frate_sel, rfclk_sel, ret;
+ struct lynx_clk *clk = lynx_pll_to_clk(hw);
+ u32 ratio, cr0 = lynx_read(clk, PLLaCR0(clk->idx));
+
+ dev_dbg(clk->dev, "%s(pll%d, %lu, %lu)\n", __func__,
+ clk->idx, rate_khz, parent_rate);
+
+ frate_sel = lynx_frate_to_sel(rate_khz);
+ if (frate_sel < 0)
+ return frate_sel;
+
+ /* First try the existing rate */
+ rfclk_sel = lynx_rfclk_to_sel(parent_rate);
+ if (rfclk_sel >= 0) {
+ ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
+ if (ratio)
+ goto got_rfclk;
+ }
+
+ for (rfclk_sel = 0;
+ rfclk_sel < ARRAY_SIZE(rfclk_sel_map);
+ rfclk_sel++) {
+ ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
+ if (ratio) {
+ ret = clk_set_rate(clk->ref, rfclk_sel_map[rfclk_sel]);
+ if (!ret)
+ goto got_rfclk;
+ }
+ }
+
+ return ret;
+
+got_rfclk:
+ cr0 &= ~(PLLaCR0_RFCLK_SEL | PLLaCR0_FRATE_SEL);
+ cr0 |= FIELD_PREP(PLLaCR0_RFCLK_SEL, rfclk_sel);
+ cr0 |= FIELD_PREP(PLLaCR0_FRATE_SEL, frate_sel);
+ lynx_write(clk, cr0, PLLaCR0(clk->idx));
+ return 0;
+}
+
+static const struct clk_ops lynx_pll_clk_ops = {
+ .prepare = lynx_pll_prepare,
+ .disable = lynx_pll_disable,
+ .is_enabled = lynx_pll_is_enabled,
+ .recalc_rate = lynx_pll_recalc_rate,
+ .round_rate = lynx_pll_round_rate,
+ .set_rate = lynx_pll_set_rate,
+};
+
+static void lynx_ex_dly_disable(struct clk_hw *hw)
+{
+ struct lynx_clk *clk = lynx_ex_dly_to_clk(hw);
+ u32 cr0 = lynx_read(clk, PLLaCR0(clk->idx));
+
+ cr0 &= ~PLLaCR0_DLYDIV_SEL;
+ lynx_write(clk, PLLaCR0(clk->idx), cr0);
+}
+
+static int lynx_ex_dly_enable(struct clk_hw *hw)
+{
+ struct lynx_clk *clk = lynx_ex_dly_to_clk(hw);
+ u32 cr0 = lynx_read(clk, PLLaCR0(clk->idx));
+
+ cr0 &= ~PLLaCR0_DLYDIV_SEL;
+ cr0 |= FIELD_PREP(PLLaCR0_DLYDIV_SEL, PLLaCR0_DLYDIV_SEL_16);
+ lynx_write(clk, PLLaCR0(clk->idx), cr0);
+ return 0;
+}
+
+static int lynx_ex_dly_is_enabled(struct clk_hw *hw)
+{
+ struct lynx_clk *clk = lynx_ex_dly_to_clk(hw);
+
+ return lynx_read(clk, PLLaCR0(clk->idx)) & PLLaCR0_DLYDIV_SEL;
+}
+
+static unsigned long lynx_ex_dly_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ return parent_rate / 16;
+}
+
+static const struct clk_ops lynx_ex_dly_clk_ops = {
+ .enable = lynx_ex_dly_enable,
+ .disable = lynx_ex_dly_disable,
+ .is_enabled = lynx_ex_dly_is_enabled,
+ .recalc_rate = lynx_ex_dly_recalc_rate,
+};
+
+static int lynx_clk_init(struct lynx_clk *clk, struct device *dev,
+ struct regmap *regmap, unsigned int index)
+{
+ const struct clk_hw *pll_parents, *ex_dly_parents;
+ struct clk_init_data pll_init = {
+ .ops = &lynx_pll_clk_ops,
+ .parent_hws = &pll_parents,
+ .num_parents = 1,
+ .flags = CLK_SET_RATE_GATE | CLK_GET_RATE_NOCACHE |
+ CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
+ };
+ struct clk_init_data ex_dly_init = {
+ .ops = &lynx_ex_dly_clk_ops,
+ .parent_hws = &ex_dly_parents,
+ .num_parents = 1,
+ };
+ char *ref_name;
+ int ret;
+
+ clk->dev = dev;
+ clk->regmap = regmap;
+ clk->idx = index;
+
+ ref_name = kasprintf(GFP_KERNEL, "ref%d", index);
+ pll_init.name = kasprintf(GFP_KERNEL, "%s.pll%d", dev_name(dev), index);
+ ex_dly_init.name = kasprintf(GFP_KERNEL, "%s_ex_dly", pll_init.name);
+ if (!ref_name || !pll_init.name || !ex_dly_init.name) {
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ clk->ref = devm_clk_get(dev, ref_name);
+ if (IS_ERR(clk->ref)) {
+ ret = PTR_ERR(clk->ref);
+ dev_err_probe(dev, ret, "could not get %s\n", ref_name);
+ goto out;
+ }
+
+ pll_parents = __clk_get_hw(clk->ref);
+ clk->pll.init = &pll_init;
+ ret = devm_clk_hw_register(dev, &clk->pll);
+ if (ret) {
+ dev_err_probe(dev, ret, "could not register %s\n",
+ pll_init.name);
+ goto out;
+ }
+
+ ex_dly_parents = &clk->pll;
+ clk->ex_dly.init = &ex_dly_init;
+ ret = devm_clk_hw_register(dev, &clk->ex_dly);
+ if (ret)
+ dev_err_probe(dev, ret, "could not register %s\n",
+ ex_dly_init.name);
+
+out:
+ kfree(ref_name);
+ kfree(pll_init.name);
+ kfree(ex_dly_init.name);
+ return ret;
+}
+
+static struct clk_hw *lynx_clk_get(struct of_phandle_args *clkspec, void *data)
+{
+ struct lynx_clk *clks = data;
+
+ if (clkspec->args_count != 1)
+ return ERR_PTR(-EINVAL);
+
+ if (clkspec->args[0] > 1)
+ return ERR_PTR(-EINVAL);
+
+ return &clks[clkspec->args[0]].pll;
+}
+
+int lynx_clks_init(struct lynx_clk clks[2], struct device *dev,
+ struct regmap *regmap)
+{
+ int ret, i;
+
+ for (i = 0; i < 2; i++) {
+ ret = lynx_clk_init(&clks[i], dev, regmap, i);
+ if (ret)
+ return ret;
+ }
+
+ ret = devm_of_clk_add_hw_provider(dev, lynx_clk_get, clks);
+ if (ret)
+ dev_err_probe(dev, ret, "could not register clock provider\n");
+ return ret;
+}
diff --git a/drivers/phy/freescale/phy-fsl-lynx-10g.c b/drivers/phy/freescale/phy-fsl-lynx-10g.c
new file mode 100644
index 000000000000..675f919092f1
--- /dev/null
+++ b/drivers/phy/freescale/phy-fsl-lynx-10g.c
@@ -0,0 +1,1297 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com>
+ *
+ * This driver is for the Lynx 10G phys found on many QorIQ devices, including
+ * the Layerscape series.
+ */
+
+#include <linux/clk.h>
+#include <linux/platform_device.h>
+#include <linux/phy.h>
+#include <linux/phy/phy.h>
+#include <linux/regmap.h>
+
+#include "lynx-10g.h"
+
+#define PCCR_BASE 0x200
+#define PCCR_STRIDE 0x4
+#define PCCRn(n) (PCCR_BASE + n * PCCR_STRIDE)
+
+#define PCCR0_PEXa_MASK GENMASK(2, 0)
+#define PCCR0_PEXa_SHIFT(a) (28 - (a) * 4)
+
+#define PCCR2_SATAa_MASK GENMASK(2, 0)
+#define PCCR2_SATAa_SHIFT(a) (28 - (a) * 4)
+
+#define PCCR8_SGMIIa_KX BIT(3)
+#define PCCR8_SGMIIa_MASK GENMASK(3, 0)
+#define PCCR8_SGMIIa_SHIFT(a) (28 - (a) * 4)
+
+#define PCCR9_QSGMIIa_MASK GENMASK(2, 0)
+#define PCCR9_QSGMIIa_SHIFT(a) (28 - (a) * 4)
+
+#define PCCRB_XFIa_MASK GENMASK(2, 0)
+#define PCCRB_XFIa_SHIFT(a) (28 - (a) * 4)
+
+#define LANE_BASE 0x800
+#define LANE_STRIDE 0x40
+#define LNm(m, off) (LANE_BASE + (m) * LANE_STRIDE + (off))
+#define LNmGCR0(m) LNm(m, 0x00)
+#define LNmGCR1(m) LNm(m, 0x04)
+#define LNmSSCR0(m) LNm(m, 0x0C)
+#define LNmRECR0(m) LNm(m, 0x10)
+#define LNmRECR1(m) LNm(m, 0x14)
+#define LNmTECR0(m) LNm(m, 0x18)
+#define LNmSSCR1(m) LNm(m, 0x1C)
+#define LNmTTLCR0(m) LNm(m, 0x20)
+
+#define LNmGCR0_RPLL_LES BIT(31)
+#define LNmGCR0_RRAT_SEL GENMASK(29, 28)
+#define LNmGCR0_TPLL_LES BIT(27)
+#define LNmGCR0_TRAT_SEL GENMASK(25, 24)
+#define LNmGCR0_RRST_B BIT(22)
+#define LNmGCR0_TRST_B BIT(21)
+#define LNmGCR0_RX_PD BIT(20)
+#define LNmGCR0_TX_PD BIT(19)
+#define LNmGCR0_IF20BIT_EN BIT(18)
+#define LNmGCR0_FIRST_LANE BIT(16)
+#define LNmGCR0_TTRM_VM_SEL GENMASK(13, 12)
+#define LNmGCR0_PROTS GENMASK(11, 7)
+
+#define LNmGCR0_RAT_SEL_SAME 0b00
+#define LNmGCR0_RAT_SEL_HALF 0b01
+#define LNmGCR0_RAT_SEL_QUARTER 0b10
+#define LNmGCR0_RAT_SEL_DOUBLE 0b11
+
+#define LNmGCR0_PROTS_PCIE 0b00000
+#define LNmGCR0_PROTS_SGMII 0b00001
+#define LNmGCR0_PROTS_SATA 0b00010
+#define LNmGCR0_PROTS_XFI 0b01010
+
+#define LNmGCR1_RDAT_INV BIT(31)
+#define LNmGCR1_TDAT_INV BIT(30)
+#define LNmGCR1_OPAD_CTL BIT(26)
+#define LNmGCR1_REIDL_TH GENMASK(22, 20)
+#define LNmGCR1_REIDL_EX_SEL GENMASK(19, 18)
+#define LNmGCR1_REIDL_ET_SEL GENMASK(17, 16)
+#define LNmGCR1_REIDL_EX_MSB BIT(15)
+#define LNmGCR1_REIDL_ET_MSB BIT(14)
+#define LNmGCR1_REQ_CTL_SNP BIT(13)
+#define LNmGCR1_REQ_CDR_SNP BIT(12)
+#define LNmGCR1_TRSTDIR BIT(7)
+#define LNmGCR1_REQ_BIN_SNP BIT(6)
+#define LNmGCR1_ISLEW_RCTL GENMASK(5, 4)
+#define LNmGCR1_OSLEW_RCTL GENMASK(1, 0)
+
+#define LNmRECR0_RXEQ_BST BIT(28)
+#define LNmRECR0_GK2OVD GENMASK(27, 24)
+#define LNmRECR0_GK3OVD GENMASK(19, 16)
+#define LNmRECR0_GK2OVD_EN BIT(15)
+#define LNmRECR0_GK3OVD_EN BIT(14)
+#define LNmRECR0_OSETOVD_EN BIT(13)
+#define LNmRECR0_BASE_WAND GENMASK(11, 10)
+#define LNmRECR0_OSETOVD GENMASK(6, 0)
+
+#define LNmRECR0_BASE_WAND_OFF 0b00
+#define LNmRECR0_BASE_WAND_DEFAULT 0b01
+#define LNmRECR0_BASE_WAND_ALTERNATE 0b10
+#define LNmRECR0_BASE_WAND_OSETOVD 0b11
+
+#define LNmTECR0_TEQ_TYPE GENMASK(29, 28)
+#define LNmTECR0_SGN_PREQ BIT(26)
+#define LNmTECR0_RATIO_PREQ GENMASK(25, 22)
+#define LNmTECR0_SGN_POST1Q BIT(21)
+#define LNmTECR0_RATIO_PST1Q GENMASK(20, 16)
+#define LNmTECR0_ADPT_EQ GENMASK(13, 8)
+#define LNmTECR0_AMP_RED GENMASK(5, 0)
+
+#define LNmTECR0_TEQ_TYPE_NONE 0b00
+#define LNmTECR0_TEQ_TYPE_PRE 0b01
+#define LNmTECR0_TEQ_TYPE_BOTH 0b10
+
+#define LNmTTLCR0_FLT_SEL GENMASK(29, 24)
+
+#define PCS_STRIDE 0x10
+#define CR_STRIDE 0x4
+#define PCSa(a, base, cr) (base + (a) * PCS_STRIDE + (cr) * CR_STRIDE)
+
+#define PCSaCR1_MDEV_PORT GENMASK(31, 27)
+
+#define SGMII_BASE 0x1800
+#define SGMIIaCR1(a) PCSa(a, SGMII_BASE, 1)
+
+#define SGMIIaCR1_SGPCS_EN BIT(11)
+
+#define QSGMII_OFFSET 0x1880
+#define QSGMIIaCR1(a) PCSa(a, QSGMII_BASE, 1)
+
+#define XFI_OFFSET 0x1980
+#define XFIaCR1(a) PCSa(a, XFI_BASE, 1)
+
+enum lynx_protocol {
+ LYNX_PROTO_NONE = 0,
+ LYNX_PROTO_SGMII,
+ LYNX_PROTO_SGMII25, /* Not tested */
+ LYNX_PROTO_1000BASEKX, /* Not tested */
+ LYNX_PROTO_QSGMII, /* Not tested */
+ LYNX_PROTO_XFI,
+ LYNX_PROTO_10GKR, /* Link training unimplemented */
+ LYNX_PROTO_PCIE, /* Not implemented */
+ LYNX_PROTO_SATA, /* Not implemented */
+ LYNX_PROTO_LAST,
+};
+
+static const char lynx_proto_str[][16] = {
+ [LYNX_PROTO_NONE] = "unknown",
+ [LYNX_PROTO_SGMII] = "SGMII",
+ [LYNX_PROTO_SGMII25] = "2.5G SGMII",
+ [LYNX_PROTO_1000BASEKX] = "1000BASE-KX",
+ [LYNX_PROTO_QSGMII] = "QSGMII",
+ [LYNX_PROTO_XFI] = "XFI",
+ [LYNX_PROTO_10GKR] = "10GBASE-KR",
+ [LYNX_PROTO_PCIE] = "PCIe",
+ [LYNX_PROTO_SATA] = "SATA",
+};
+
+#define PROTO_MASK(proto) BIT(LYNX_PROTO_##proto)
+#define UNSUPPORTED_PROTOS (PROTO_MASK(SATA) | PROTO_MASK(PCIE))
+
+/**
+ * struct lynx_proto_params - Parameters for configuring a protocol
+ * @frate_khz: The PLL rate, in kHz
+ * @rat_sel: The divider to get the line rate
+ * @if20bit: Whether the proto is 20 bits or 10 bits
+ * @prots: Lane protocol select
+ * @reidl_th: Receiver electrical idle detection threshold
+ * @reidl_ex: Exit electrical idle filter
+ * @reidl_et: Enter idle filter
+ * @slew: Slew control
+ * @baseline_wander: Enable baseline wander correction
+ * @gain: Adaptive equalization gain override
+ * @offset_override: Adaptive equalization offset override
+ * @teq: Transmit equalization type (none, precursor, or precursor and
+ * postcursor). The next few values are only used for appropriate
+ * equalization types.
+ * @preq_ratio: Ratio of full swing transition bit to pre-cursor
+ * @postq_ratio: Ratio of full swing transition bit to first post-cursor.
+ * @adpt_eq: Transmitter Adjustments for 8G/10G
+ * @amp_red: Overall TX Amplitude Reduction
+ * @flt_sel: TTL configuration selector
+ */
+struct lynx_proto_params {
+ u32 frate_khz;
+ u8 rat_sel;
+ u8 prots;
+ u8 reidl_th;
+ u8 reidl_ex;
+ u8 reidl_et;
+ u8 slew;
+ u8 gain;
+ u8 baseline_wander;
+ u8 offset_override;
+ u8 teq;
+ u8 preq_ratio;
+ u8 postq_ratio;
+ u8 adpt_eq;
+ u8 amp_red;
+ u8 flt_sel;
+ bool if20bit;
+};
+
+static const struct lynx_proto_params lynx_proto_params[] = {
+ [LYNX_PROTO_SGMII] = {
+ .frate_khz = 5000000,
+ .rat_sel = LNmGCR0_RAT_SEL_QUARTER,
+ .if20bit = false,
+ .prots = LNmGCR0_PROTS_SGMII,
+ .reidl_th = 0b001,
+ .reidl_ex = 0b011,
+ .reidl_et = 0b100,
+ .slew = 0b01,
+ .gain = 0b1111,
+ .offset_override = 0b0011111,
+ .teq = LNmTECR0_TEQ_TYPE_NONE,
+ .adpt_eq = 0b110000,
+ .amp_red = 0b000110,
+ .flt_sel = 0b111001,
+ },
+ [LYNX_PROTO_1000BASEKX] = {
+ .frate_khz = 5000000,
+ .rat_sel = LNmGCR0_RAT_SEL_QUARTER,
+ .if20bit = false,
+ .prots = LNmGCR0_PROTS_SGMII,
+ .slew = 0b01,
+ .gain = 0b1111,
+ .offset_override = 0b0011111,
+ .teq = LNmTECR0_TEQ_TYPE_NONE,
+ .adpt_eq = 0b110000,
+ .flt_sel = 0b111001,
+ },
+ [LYNX_PROTO_SGMII25] = {
+ .frate_khz = 3125000,
+ .rat_sel = LNmGCR0_RAT_SEL_SAME,
+ .if20bit = false,
+ .prots = LNmGCR0_PROTS_SGMII,
+ .slew = 0b10,
+ .offset_override = 0b0011111,
+ .teq = LNmTECR0_TEQ_TYPE_PRE,
+ .postq_ratio = 0b00110,
+ .adpt_eq = 0b110000,
+ },
+ [LYNX_PROTO_QSGMII] = {
+ .frate_khz = 5000000,
+ .rat_sel = LNmGCR0_RAT_SEL_SAME,
+ .if20bit = true,
+ .prots = LNmGCR0_PROTS_SGMII,
+ .slew = 0b01,
+ .offset_override = 0b0011111,
+ .teq = LNmTECR0_TEQ_TYPE_PRE,
+ .postq_ratio = 0b00110,
+ .adpt_eq = 0b110000,
+ .amp_red = 0b000010,
+ },
+ [LYNX_PROTO_XFI] = {
+ .frate_khz = 5156250,
+ .rat_sel = LNmGCR0_RAT_SEL_DOUBLE,
+ .if20bit = true,
+ .prots = LNmGCR0_PROTS_XFI,
+ .slew = 0b01,
+ .baseline_wander = LNmRECR0_BASE_WAND_DEFAULT,
+ .offset_override = 0b1011111,
+ .teq = LNmTECR0_TEQ_TYPE_PRE,
+ .postq_ratio = 0b00011,
+ .adpt_eq = 0b110000,
+ .amp_red = 0b000111,
+ },
+ [LYNX_PROTO_10GKR] = {
+ .frate_khz = 5156250,
+ .rat_sel = LNmGCR0_RAT_SEL_DOUBLE,
+ .prots = LNmGCR0_PROTS_XFI,
+ .slew = 0b01,
+ .baseline_wander = LNmRECR0_BASE_WAND_DEFAULT,
+ .offset_override = 0b1011111,
+ .teq = LNmTECR0_TEQ_TYPE_BOTH,
+ .preq_ratio = 0b0011,
+ .postq_ratio = 0b01100,
+ .adpt_eq = 0b110000,
+ },
+};
+
+/**
+ * struct lynx_mode - A single configuration of a protocol controller
+ * @protos: A bitmask of the &enum lynx_protocol this mode supports
+ * @first_lane: the first lane which will be used when this config is selected
+ * @last_lane: the last lane which will be used when this config is selected
+ * @pccr: The number of the PCCR which contains this mode
+ * @idx: The index of the protocol controller. For example, SGMIIB would have
+ * index 1.
+ * @cfg: The value to program into the controller to select this mode
+ *
+ * The serdes has multiple protocol controllers which can be each be selected
+ * independently. Depending on their configuration, they may use multiple lanes
+ * at once (e.g. AUI or PCIe x4). Additionally, multiple protocols may be
+ * supported by a single mode (XFI and 10GKR differ only in their protocol
+ * parameters).
+ */
+struct lynx_mode {
+ u16 protos;
+ u8 first_lane;
+ u8 last_lane;
+ u8 pccr;
+ u8 idx;
+ u8 cfg;
+};
+
+static_assert(LYNX_PROTO_LAST - 1 <=
+ sizeof_field(struct lynx_mode, protos) * BITS_PER_BYTE);
+
+/**
+ * enum lynx_caps - serdes hardware capabilities
+ * @LYNX_HAS_1000BASEKX: 1000BASE-KX supported
+ * @LYNX_HAS_10GKR: 10GBASE-KR supported
+ */
+enum lynx_caps {
+ LYNX_HAS_1000BASEKX,
+ LYNX_HAS_10GKR,
+};
+
+/**
+ * struct lynx_conf - Configuration for a particular serdes
+ * @lanes: Number of lanes
+ * @caps: A bitmask of &enum lynx_caps
+ * @endian: Endianness of the registers
+ */
+struct lynx_conf {
+ unsigned int lanes;
+ unsigned int caps;
+ enum regmap_endian endian;
+};
+
+struct lynx_priv;
+
+/**
+ * struct lynx_priv - Driver data for the serdes
+ * @lock: A lock protecting "common" registers in @regmap, as well as the
+ * members of this struct. Lane-specific registers are protected by the
+ * phy's lock. PLL registers are protected by the clock's lock.
+ * @clks: The PLL clocks
+ * @dev: The serdes device
+ * @regmap: The backing regmap
+ * @conf: The configuration for this serdes
+ * @modes: Valid protocol controller configurations
+ * @mode_count: Number of modes in @modes
+ * @used_lanes: Bitmap of the lanes currently used by phys
+ * @groups: List of the created groups
+ */
+struct lynx_priv {
+ struct mutex lock;
+ struct lynx_clk clks[2];
+ struct device *dev;
+ struct regmap *regmap;
+ const struct lynx_conf *conf;
+ const struct lynx_mode *modes;
+ size_t mode_count;
+ unsigned int used_lanes;
+ struct list_head groups;
+};
+
+/**
+ * struct lynx_group - Driver data for a group of lanes
+ * @groups: List of other groups; protected by @serdes->lock.
+ * @phy: The associated phy
+ * @serdes: The parent serdes
+ * @pll: The currently-used pll
+ * @ex_dly: The ex_dly clock, if used
+ * @first_lane: The first lane in the group
+ * @last_lane: The last lane in the group
+ * @proto: The currently-configured protocol
+ * @users: Number of current users; protected by @serdes->lock.
+ */
+struct lynx_group {
+ struct list_head groups;
+ struct phy *phy;
+ struct lynx_priv *serdes;
+ struct clk *pll;
+ struct clk *ex_dly;
+ unsigned int first_lane;
+ unsigned int last_lane;
+ enum lynx_protocol proto;
+ unsigned int users;
+};
+
+static u32 lynx_read(struct lynx_priv *serdes, u32 reg)
+{
+ unsigned int ret = 0;
+
+ WARN_ON_ONCE(regmap_read(serdes->regmap, reg, &ret));
+ return ret;
+}
+
+static void lynx_write(struct lynx_priv *serdes, u32 val, u32 reg)
+{
+ WARN_ON_ONCE(regmap_write(serdes->regmap, reg, val));
+}
+
+/**
+ * lynx_lane_bitmap() - Get a bitmap for a group of lanes
+ * @group: The group of lanes
+ *
+ * Return: A mask containing all bits between @group->first and @group->last
+ */
+static unsigned int lynx_lane_bitmap(struct lynx_group *group)
+{
+ if (group->first_lane > group->last_lane)
+ return GENMASK(group->first_lane, group->last_lane);
+ else
+ return GENMASK(group->last_lane, group->first_lane);
+}
+
+static int lynx_init(struct phy *phy)
+{
+ int ret = 0;
+ struct lynx_group *group = phy_get_drvdata(phy);
+ struct lynx_priv *serdes = group->serdes;
+ unsigned int lane_mask = lynx_lane_bitmap(group);
+
+ mutex_lock(&serdes->lock);
+ if (serdes->used_lanes & lane_mask)
+ ret = -EBUSY;
+ else
+ serdes->used_lanes |= lane_mask;
+ mutex_unlock(&serdes->lock);
+ return ret;
+}
+
+static int lynx_exit(struct phy *phy)
+{
+ struct lynx_group *group = phy_get_drvdata(phy);
+ struct lynx_priv *serdes = group->serdes;
+
+ clk_disable_unprepare(group->ex_dly);
+ group->ex_dly = NULL;
+
+ clk_disable_unprepare(group->pll);
+ clk_rate_exclusive_put(group->pll);
+ group->pll = NULL;
+
+ mutex_lock(&serdes->lock);
+ serdes->used_lanes &= ~lynx_lane_bitmap(group);
+ mutex_unlock(&serdes->lock);
+ return 0;
+}
+
+/*
+ * This is tricky. If first_lane=1 and last_lane=0, the condition will see 2,
+ * 1, 0. But the loop body will see 1, 0. We do this to avoid underflow. We
+ * can't pull the same trick when incrementing, because then we might have to
+ * start at -1 if (e.g.) first_lane = 0.
+ */
+#define for_range(val, start, end) \
+ for (val = start < end ? start : start + 1; \
+ start < end ? val <= end : val-- > end; \
+ start < end ? val++ : 0)
+#define for_each_lane(lane, group) \
+ for_range(lane, group->first_lane, group->last_lane)
+#define for_each_lane_reverse(lane, group) \
+ for_range(lane, group->last_lane, group->first_lane)
+
+static int lynx_power_on(struct phy *phy)
+{
+ int i;
+ struct lynx_group *group = phy_get_drvdata(phy);
+ u32 gcr0;
+
+ for_each_lane(i, group) {
+ gcr0 = lynx_read(group->serdes, LNmGCR0(i));
+ gcr0 &= ~(LNmGCR0_RX_PD | LNmGCR0_TX_PD);
+ lynx_write(group->serdes, gcr0, LNmGCR0(i));
+
+ usleep_range(15, 30);
+ gcr0 |= LNmGCR0_RRST_B | LNmGCR0_TRST_B;
+ lynx_write(group->serdes, gcr0, LNmGCR0(i));
+ }
+
+ return 0;
+}
+
+static void lynx_power_off_lane(struct lynx_priv *serdes, unsigned int lane)
+{
+ u32 gcr0 = lynx_read(serdes, LNmGCR0(lane));
+
+ gcr0 |= LNmGCR0_RX_PD | LNmGCR0_TX_PD;
+ gcr0 &= ~(LNmGCR0_RRST_B | LNmGCR0_TRST_B);
+ lynx_write(serdes, gcr0, LNmGCR0(lane));
+}
+
+static int lynx_power_off(struct phy *phy)
+{
+ unsigned int i;
+ struct lynx_group *group = phy_get_drvdata(phy);
+
+ for_each_lane_reverse(i, group)
+ lynx_power_off_lane(group->serdes, i);
+
+ return 0;
+}
+
+/**
+ * lynx_lookup_proto() - Convert a phy-subsystem mode to a protocol
+ * @mode: The mode to convert
+ * @submode: The submode of @mode
+ *
+ * Return: A corresponding serdes-specific mode
+ */
+static enum lynx_protocol lynx_lookup_proto(enum phy_mode mode, int submode)
+{
+ switch (mode) {
+ case PHY_MODE_ETHERNET:
+ switch (submode) {
+ case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_1000BASEX:
+ return LYNX_PROTO_SGMII;
+ case PHY_INTERFACE_MODE_1000BASEKX:
+ return LYNX_PROTO_1000BASEKX;
+ case PHY_INTERFACE_MODE_2500BASEX:
+ return LYNX_PROTO_SGMII25;
+ case PHY_INTERFACE_MODE_QSGMII:
+ return LYNX_PROTO_QSGMII;
+ case PHY_INTERFACE_MODE_XGMII:
+ case PHY_INTERFACE_MODE_10GBASER:
+ return LYNX_PROTO_XFI;
+ case PHY_INTERFACE_MODE_10GKR:
+ return LYNX_PROTO_10GKR;
+ default:
+ return LYNX_PROTO_NONE;
+ }
+ /* Not implemented (yet) */
+ case PHY_MODE_PCIE:
+ case PHY_MODE_SATA:
+ default:
+ return LYNX_PROTO_NONE;
+ }
+}
+
+/**
+ * lynx_lookup_mode() - Get the mode for a group/protocol combination
+ * @group: The group of lanes to use
+ * @proto: The protocol to use
+ *
+ * Return: An appropriate mode to use, or %NULL if none match.
+ */
+static const struct lynx_mode *lynx_lookup_mode(struct lynx_group *group,
+ enum lynx_protocol proto)
+{
+ int i;
+ const struct lynx_priv *serdes = group->serdes;
+
+ for (i = 0; i < serdes->mode_count; i++) {
+ const struct lynx_mode *mode = &serdes->modes[i];
+
+ if (BIT(proto) & mode->protos &&
+ group->first_lane == mode->first_lane &&
+ group->last_lane == mode->last_lane)
+ return mode;
+ }
+
+ return NULL;
+}
+
+static int lynx_validate(struct phy *phy, enum phy_mode phy_mode, int submode,
+ union phy_configure_opts *opts)
+{
+ enum lynx_protocol proto;
+ struct lynx_group *group = phy_get_drvdata(phy);
+ const struct lynx_mode *mode;
+
+ proto = lynx_lookup_proto(phy_mode, submode);
+ if (proto == LYNX_PROTO_NONE)
+ return -EINVAL;
+
+ /* Nothing to do */
+ if (proto == group->proto)
+ return 0;
+
+ mode = lynx_lookup_mode(group, proto);
+ if (!mode)
+ return -EINVAL;
+
+ return 0;
+}
+
+/**
+ * lynx_proto_mode_mask() - Get the mask for a PCCR config
+ * @mode: The mode to use
+ *
+ * Return: The mask, shifted down to the lsb.
+ */
+static u32 lynx_proto_mode_mask(const struct lynx_mode *mode)
+{
+ switch (mode->pccr) {
+ case 0x0:
+ if (mode->protos & PROTO_MASK(PCIE))
+ return PCCR0_PEXa_MASK;
+ break;
+ case 0x2:
+ if (mode->protos & PROTO_MASK(SATA))
+ return PCCR2_SATAa_MASK;
+ break;
+ case 0x8:
+ if (mode->protos & PROTO_MASK(SGMII))
+ return PCCR8_SGMIIa_MASK;
+ break;
+ case 0x9:
+ if (mode->protos & PROTO_MASK(QSGMII))
+ return PCCR9_QSGMIIa_MASK;
+ break;
+ case 0xB:
+ if (mode->protos & PROTO_MASK(XFI))
+ return PCCRB_XFIa_MASK;
+ break;
+ }
+ pr_err("unknown mode PCCR%X %s%c\n", mode->pccr,
+ lynx_proto_str[mode->protos], 'A' + mode->idx);
+ return 0;
+}
+
+/**
+ * lynx_proto_mode_shift() - Get the shift for a PCCR config
+ * @mode: The mode to use
+ *
+ * Return: The amount of bits to shift the mask.
+ */
+static u32 lynx_proto_mode_shift(const struct lynx_mode *mode)
+{
+ switch (mode->pccr) {
+ case 0x0:
+ if (mode->protos & PROTO_MASK(PCIE))
+ return PCCR0_PEXa_SHIFT(mode->idx);
+ break;
+ case 0x2:
+ if (mode->protos & PROTO_MASK(SATA))
+ return PCCR2_SATAa_SHIFT(mode->idx);
+ break;
+ case 0x8:
+ if (mode->protos & PROTO_MASK(SGMII))
+ return PCCR8_SGMIIa_SHIFT(mode->idx);
+ break;
+ case 0x9:
+ if (mode->protos & PROTO_MASK(QSGMII))
+ return PCCR9_QSGMIIa_SHIFT(mode->idx);
+ break;
+ case 0xB:
+ if (mode->protos & PROTO_MASK(XFI))
+ return PCCRB_XFIa_SHIFT(mode->idx);
+ break;
+ }
+ pr_err("unknown mode PCCR%X %s%c\n", mode->pccr,
+ lynx_proto_str[mode->protos], 'A' + mode->idx);
+ return 0;
+}
+
+/**
+ * lynx_proto_mode_get() - Get the current config for a PCCR mode
+ * @mode: The mode to use
+ * @pccr: The current value of the PCCR
+ *
+ * Return: The current value of the PCCR config for this mode
+ */
+static u32 lynx_proto_mode_get(const struct lynx_mode *mode, u32 pccr)
+{
+ return (pccr >> lynx_proto_mode_shift(mode)) &
+ lynx_proto_mode_mask(mode);
+}
+
+/**
+ * lynx_proto_mode_prep() - Configure a PCCR for a protocol
+ * @mode: The mode to use
+ * @pccr: The current value of the PCCR
+ * @proto: The protocol to configure
+ *
+ * This configures a PCCR for a mode and protocol. To disable a mode, pass
+ * %LYNX_PROTO_NONE as @proto. If @proto is 1000BASE-KX, then the KX bit
+ * will be set.
+ *
+ * Return: The new value for the PCCR
+ */
+static u32 lynx_proto_mode_prep(const struct lynx_mode *mode, u32 pccr,
+ enum lynx_protocol proto)
+{
+ u32 shift = lynx_proto_mode_shift(mode);
+
+ pccr &= ~(lynx_proto_mode_mask(mode) << shift);
+ if (proto != LYNX_PROTO_NONE)
+ pccr |= mode->cfg << shift;
+
+ if (proto == LYNX_PROTO_1000BASEKX) {
+ if (mode->pccr == 8)
+ pccr |= PCCR8_SGMIIa_KX << shift;
+ else
+ pr_err("PCCR%X doesn't have a KX bit\n", mode->pccr);
+ }
+
+ return pccr;
+}
+
+#define abs_diff(a, b) ({ \
+ typeof(a) _a = (a); \
+ typeof(b) _b = (b); \
+ _a > _b ? _a - _b : _b - _a; \
+})
+
+static int lynx_set_mode(struct phy *phy, enum phy_mode phy_mode, int submode)
+{
+ enum lynx_protocol proto;
+ const struct lynx_proto_params *params;
+ const struct lynx_mode *old_mode = NULL, *new_mode;
+ int i, pll, ret;
+ struct lynx_group *group = phy_get_drvdata(phy);
+ struct lynx_priv *serdes = group->serdes;
+ u32 tmp;
+ u32 gcr0 = 0, gcr1 = 0, recr0 = 0, tecr0 = 0;
+ u32 gcr0_mask = 0, gcr1_mask = 0, recr0_mask = 0, tecr0_mask = 0;
+
+ proto = lynx_lookup_proto(phy_mode, submode);
+ if (proto == LYNX_PROTO_NONE) {
+ dev_dbg(&phy->dev, "unknown mode/submode %d/%d\n",
+ phy_mode, submode);
+ return -EINVAL;
+ }
+
+ /* Nothing to do */
+ if (proto == group->proto)
+ return 0;
+
+ new_mode = lynx_lookup_mode(group, proto);
+ if (!new_mode) {
+ dev_dbg(&phy->dev, "could not find mode for %s on lanes %u to %u\n",
+ lynx_proto_str[proto], group->first_lane,
+ group->last_lane);
+ return -EINVAL;
+ }
+
+ if (group->proto != LYNX_PROTO_NONE) {
+ old_mode = lynx_lookup_mode(group, group->proto);
+ if (!old_mode) {
+ dev_err(&phy->dev, "could not find mode for %s\n",
+ lynx_proto_str[group->proto]);
+ return -EBUSY;
+ }
+ }
+
+ mutex_lock(&serdes->lock);
+
+ tmp = lynx_read(serdes, PCCRn(new_mode->pccr));
+ if (lynx_proto_mode_get(new_mode, tmp)) {
+ mutex_unlock(&serdes->lock);
+ dev_dbg(&phy->dev, "%s%c already in use\n",
+ lynx_proto_str[new_mode->protos], 'A' + new_mode->idx);
+ return -EBUSY;
+ }
+
+ /* Disable the old controller */
+ if (old_mode) {
+ tmp = lynx_read(serdes, PCCRn(old_mode->pccr));
+ tmp = lynx_proto_mode_prep(old_mode, tmp, LYNX_PROTO_NONE);
+ lynx_write(serdes, tmp, PCCRn(old_mode->pccr));
+
+ if (old_mode->protos & PROTO_MASK(SGMII)) {
+ tmp = lynx_read(serdes, SGMIIaCR1(old_mode->idx));
+ tmp &= SGMIIaCR1_SGPCS_EN;
+ lynx_write(serdes, tmp, SGMIIaCR1(old_mode->idx));
+ }
+ }
+ group->proto = LYNX_PROTO_NONE;
+
+ clk_disable_unprepare(group->ex_dly);
+ group->ex_dly = NULL;
+
+ clk_disable_unprepare(group->pll);
+ clk_rate_exclusive_put(group->pll);
+ group->pll = NULL;
+
+ /* First, try to use a PLL which already has the correct rate */
+ params = &lynx_proto_params[proto];
+ for (pll = 0; pll < ARRAY_SIZE(serdes->clks); pll++) {
+ struct clk *clk = serdes->clks[pll].pll.clk;
+ unsigned long rate = clk_get_rate(clk);
+ unsigned long error = abs_diff(rate, params->frate_khz);
+
+ dev_dbg(&phy->dev, "pll%d has rate %lu\n", pll, rate);
+ /* Accept up to 100ppm deviation */
+ if ((!error || params->frate_khz / error > 10000) &&
+ !clk_set_rate_exclusive(clk, rate))
+ goto got_pll;
+ /* Someone else got a different rate first */
+ }
+
+ /* If neither PLL has the right rate, try setting it */
+ for (pll = 0; pll < 2; pll++) {
+ ret = clk_set_rate_exclusive(serdes->clks[pll].pll.clk,
+ params->frate_khz);
+ if (!ret)
+ goto got_pll;
+ }
+
+ dev_dbg(&phy->dev, "could not get a pll at %ukHz\n",
+ params->frate_khz);
+ return ret;
+
+got_pll:
+ group->pll = serdes->clks[pll].pll.clk;
+ clk_prepare_enable(group->pll);
+
+ gcr0_mask |= LNmGCR0_RRAT_SEL | LNmGCR0_TRAT_SEL;
+ gcr0_mask |= LNmGCR0_RPLL_LES | LNmGCR0_TPLL_LES;
+ gcr0_mask |= LNmGCR0_RRST_B | LNmGCR0_TRST_B;
+ gcr0_mask |= LNmGCR0_RX_PD | LNmGCR0_TX_PD;
+ gcr0_mask |= LNmGCR0_IF20BIT_EN | LNmGCR0_PROTS;
+ gcr0 |= FIELD_PREP(LNmGCR0_RPLL_LES, !pll);
+ gcr0 |= FIELD_PREP(LNmGCR0_TPLL_LES, !pll);
+ gcr0 |= FIELD_PREP(LNmGCR0_RRAT_SEL, params->rat_sel);
+ gcr0 |= FIELD_PREP(LNmGCR0_TRAT_SEL, params->rat_sel);
+ gcr0 |= FIELD_PREP(LNmGCR0_IF20BIT_EN, params->if20bit);
+ gcr0 |= FIELD_PREP(LNmGCR0_PROTS, params->prots);
+
+ gcr1_mask |= LNmGCR1_RDAT_INV | LNmGCR1_TDAT_INV;
+ gcr1_mask |= LNmGCR1_OPAD_CTL | LNmGCR1_REIDL_TH;
+ gcr1_mask |= LNmGCR1_REIDL_EX_SEL | LNmGCR1_REIDL_ET_SEL;
+ gcr1_mask |= LNmGCR1_REIDL_EX_MSB | LNmGCR1_REIDL_ET_MSB;
+ gcr1_mask |= LNmGCR1_REQ_CTL_SNP | LNmGCR1_REQ_CDR_SNP;
+ gcr1_mask |= LNmGCR1_TRSTDIR | LNmGCR1_REQ_BIN_SNP;
+ gcr1_mask |= LNmGCR1_ISLEW_RCTL | LNmGCR1_OSLEW_RCTL;
+ gcr1 |= FIELD_PREP(LNmGCR1_REIDL_TH, params->reidl_th);
+ gcr1 |= FIELD_PREP(LNmGCR1_REIDL_EX_SEL, params->reidl_ex & 3);
+ gcr1 |= FIELD_PREP(LNmGCR1_REIDL_ET_SEL, params->reidl_et & 3);
+ gcr1 |= FIELD_PREP(LNmGCR1_REIDL_EX_MSB, params->reidl_ex >> 2);
+ gcr1 |= FIELD_PREP(LNmGCR1_REIDL_ET_MSB, params->reidl_et >> 2);
+ gcr1 |= FIELD_PREP(LNmGCR1_TRSTDIR,
+ group->first_lane > group->last_lane);
+ gcr1 |= FIELD_PREP(LNmGCR1_ISLEW_RCTL, params->slew);
+ gcr1 |= FIELD_PREP(LNmGCR1_OSLEW_RCTL, params->slew);
+
+ recr0_mask |= LNmRECR0_RXEQ_BST | LNmRECR0_BASE_WAND;
+ recr0_mask |= LNmRECR0_GK2OVD | LNmRECR0_GK3OVD;
+ recr0_mask |= LNmRECR0_GK2OVD_EN | LNmRECR0_GK3OVD_EN;
+ recr0_mask |= LNmRECR0_OSETOVD_EN | LNmRECR0_OSETOVD;
+ if (params->gain) {
+ recr0 |= FIELD_PREP(LNmRECR0_GK2OVD, params->gain);
+ recr0 |= FIELD_PREP(LNmRECR0_GK3OVD, params->gain);
+ recr0 |= LNmRECR0_GK2OVD_EN | LNmRECR0_GK3OVD_EN;
+ }
+ recr0 |= FIELD_PREP(LNmRECR0_BASE_WAND, params->baseline_wander);
+ recr0 |= FIELD_PREP(LNmRECR0_OSETOVD, params->offset_override);
+
+ tecr0_mask |= LNmTECR0_TEQ_TYPE;
+ tecr0_mask |= LNmTECR0_SGN_PREQ | LNmTECR0_RATIO_PREQ;
+ tecr0_mask |= LNmTECR0_SGN_POST1Q | LNmTECR0_RATIO_PST1Q;
+ tecr0_mask |= LNmTECR0_ADPT_EQ | LNmTECR0_AMP_RED;
+ tecr0 |= FIELD_PREP(LNmTECR0_TEQ_TYPE, params->teq);
+ if (params->preq_ratio) {
+ tecr0 |= FIELD_PREP(LNmTECR0_SGN_PREQ, 1);
+ tecr0 |= FIELD_PREP(LNmTECR0_RATIO_PREQ, params->preq_ratio);
+ }
+ if (params->postq_ratio) {
+ tecr0 |= FIELD_PREP(LNmTECR0_SGN_POST1Q, 1);
+ tecr0 |= FIELD_PREP(LNmTECR0_RATIO_PST1Q, params->postq_ratio);
+ }
+ tecr0 |= FIELD_PREP(LNmTECR0_ADPT_EQ, params->adpt_eq);
+ tecr0 |= FIELD_PREP(LNmTECR0_AMP_RED, params->amp_red);
+
+ for_each_lane_reverse(i, group) {
+ tmp = lynx_read(serdes, LNmGCR0(i));
+ tmp &= ~(LNmGCR0_RRST_B | LNmGCR0_TRST_B);
+ lynx_write(serdes, tmp, LNmGCR0(i));
+ ndelay(50);
+
+ tmp &= ~gcr0_mask;
+ tmp |= gcr0;
+ tmp |= FIELD_PREP(LNmGCR0_FIRST_LANE, i == group->first_lane);
+ lynx_write(serdes, tmp, LNmGCR0(i));
+
+ tmp = lynx_read(serdes, LNmGCR1(i));
+ tmp &= ~gcr1_mask;
+ tmp |= gcr1;
+ lynx_write(serdes, tmp, LNmGCR1(i));
+
+ tmp = lynx_read(serdes, LNmRECR0(i));
+ tmp &= ~recr0_mask;
+ tmp |= recr0;
+ lynx_write(serdes, tmp, LNmRECR0(i));
+
+ tmp = lynx_read(serdes, LNmTECR0(i));
+ tmp &= ~tecr0_mask;
+ tmp |= tecr0;
+ lynx_write(serdes, tmp, LNmTECR0(i));
+
+ tmp = lynx_read(serdes, LNmTTLCR0(i));
+ tmp &= ~LNmTTLCR0_FLT_SEL;
+ tmp |= FIELD_PREP(LNmTTLCR0_FLT_SEL, params->flt_sel);
+ lynx_write(serdes, tmp, LNmTTLCR0(i));
+
+ ndelay(120);
+ tmp = lynx_read(serdes, LNmGCR0(i));
+ tmp |= LNmGCR0_RRST_B | LNmGCR0_TRST_B;
+ lynx_write(serdes, tmp, LNmGCR0(i));
+ }
+
+ /* Enable the new controller */
+ tmp = lynx_read(serdes, PCCRn(new_mode->pccr));
+ tmp = lynx_proto_mode_prep(new_mode, tmp, proto);
+ lynx_write(serdes, tmp, PCCRn(new_mode->pccr));
+
+ if (proto == LYNX_PROTO_1000BASEKX) {
+ group->ex_dly = serdes->clks[pll].ex_dly.clk;
+ /* This should never fail since it's from our internal driver */
+ WARN_ON_ONCE(clk_prepare_enable(group->ex_dly));
+ }
+
+ if (new_mode->protos & PROTO_MASK(SGMII)) {
+ tmp = lynx_read(serdes, SGMIIaCR1(new_mode->idx));
+ tmp |= SGMIIaCR1_SGPCS_EN;
+ lynx_write(serdes, tmp, SGMIIaCR1(new_mode->idx));
+ }
+
+ mutex_unlock(&serdes->lock);
+
+ group->proto = proto;
+ dev_dbg(&phy->dev, "set mode to %s on lanes %u to %u\n",
+ lynx_proto_str[proto], group->first_lane, group->last_lane);
+ return 0;
+}
+
+static void lynx_release(struct phy *phy)
+{
+ struct lynx_group *group = phy_get_drvdata(phy);
+ struct lynx_priv *serdes = group->serdes;
+
+ mutex_lock(&serdes->lock);
+ if (--group->users) {
+ mutex_unlock(&serdes->lock);
+ return;
+ }
+ list_del(&group->groups);
+ mutex_unlock(&serdes->lock);
+
+ phy_destroy(phy);
+ kfree(group);
+}
+
+static const struct phy_ops lynx_phy_ops = {
+ .init = lynx_init,
+ .exit = lynx_exit,
+ .power_on = lynx_power_on,
+ .power_off = lynx_power_off,
+ .set_mode = lynx_set_mode,
+ .validate = lynx_validate,
+ .release = lynx_release,
+ .owner = THIS_MODULE,
+};
+
+static struct phy *lynx_xlate(struct device *dev, struct of_phandle_args *args)
+{
+ struct phy *phy;
+ struct list_head *head;
+ struct lynx_group *group;
+ struct lynx_priv *serdes = dev_get_drvdata(dev);
+ unsigned int last_lane;
+
+ if (args->args_count == 1)
+ last_lane = args->args[0];
+ else if (args->args_count == 2)
+ last_lane = args->args[1];
+ else
+ return ERR_PTR(-EINVAL);
+
+ mutex_lock(&serdes->lock);
+
+ /* Look for an existing group */
+ list_for_each(head, &serdes->groups) {
+ group = container_of(head, struct lynx_group, groups);
+ if (group->first_lane == args->args[0] &&
+ group->last_lane == last_lane) {
+ group->users++;
+ phy = group->phy;
+ goto out;
+ }
+ }
+
+ /* None found, create our own */
+ group = kzalloc(sizeof(*group), GFP_KERNEL);
+ if (!group) {
+ phy = ERR_PTR(-ENOMEM);
+ goto out;
+ }
+
+ group->serdes = serdes;
+ group->first_lane = args->args[0];
+ group->last_lane = last_lane;
+ group->users = 1;
+ phy = phy_create(dev, NULL, &lynx_phy_ops);
+ if (IS_ERR(phy)) {
+ kfree(group);
+ } else {
+ group->phy = phy;
+ phy_set_drvdata(phy, group);
+ list_add(&group->groups, &serdes->groups);
+ }
+
+out:
+ mutex_unlock(&serdes->lock);
+ return phy;
+}
+
+static int lynx_read_u32(struct device *dev, struct fwnode_handle *fwnode,
+ const char *prop, u32 *val)
+{
+ int ret;
+
+ ret = fwnode_property_read_u32(fwnode, prop, val);
+ if (ret)
+ dev_err(dev, "could not read %s from %pfwP: %d\n", prop,
+ fwnode, ret);
+ return ret;
+}
+
+static int lynx_parse_mode(struct lynx_priv *serdes, struct fwnode_handle *fwnode,
+ struct lynx_mode *mode, u16 protos, u8 pccr, u8 idx)
+{
+ struct device *dev = serdes->dev;
+ int ret;
+ u32 val;
+
+ ret = lynx_read_u32(dev, fwnode, "fsl,cfg", &val);
+ if (ret)
+ return ret;
+ mode->cfg = val;
+
+ ret = lynx_read_u32(dev, fwnode, "fsl,first-lane", &val);
+ if (ret)
+ return ret;
+ mode->first_lane = val;
+
+ ret = fwnode_property_read_u32(fwnode, "fsl,last-lane", &val);
+ if (ret && ret != -EINVAL) {
+ dev_err(dev, "could not read %s from %pfwP: %d\n",
+ "fsl,last-lane", fwnode, ret);
+ return ret;
+ }
+ mode->last_lane = val;
+
+ if (mode->first_lane >= serdes->conf->lanes) {
+ dev_err(dev,
+ "value of %s (%u) in %pfwP exceeds lane count (%u)\n",
+ "fsl,first-lane", mode->first_lane, fwnode,
+ serdes->conf->lanes);
+ return -EINVAL;
+ } else if (mode->last_lane >= serdes->conf->lanes) {
+ dev_err(dev,
+ "value of %s (%u) in %pfwP exceeds lane count (%u)\n",
+ "fsl,last-lane", mode->last_lane, fwnode,
+ serdes->conf->lanes);
+ return -EINVAL;
+ }
+
+ mode->protos = protos;
+ mode->pccr = pccr;
+ mode->idx = idx;
+ return 0;
+}
+
+static int lynx_parse_pccrs(struct lynx_priv *serdes)
+{
+ struct fwnode_handle *pccr_node, *proto_node, *config_node;
+ struct device *dev = serdes->dev;
+ size_t mode = 0, mode_total = 0;
+ struct lynx_mode *modes;
+ int ret;
+
+ /* To ease memory management, calculate our allocation up-front */
+ device_for_each_child_node(dev, pccr_node) {
+ fwnode_for_each_child_node(pccr_node, proto_node) {
+ size_t mode_subtotal = 0;
+
+ fwnode_for_each_child_node(proto_node, config_node)
+ mode_subtotal++;
+ mode_total += mode_subtotal ?: 1;
+ }
+ }
+
+ modes = devm_kcalloc(dev, mode_total, sizeof(*modes),
+ GFP_KERNEL);
+ if (!modes)
+ return -ENOMEM;
+
+ device_for_each_child_node(dev, pccr_node) {
+ u32 pccr;
+
+ lynx_read_u32(dev, pccr_node, "fsl,pccr", &pccr);
+ if (ret)
+ return ret;
+
+ fwnode_for_each_child_node(pccr_node, proto_node) {
+ const char *proto_str;
+ bool children = false;
+ u16 protos;
+ u32 index;
+
+ lynx_read_u32(dev, proto_node, "fsl,index", &index);
+ if (ret)
+ return ret;
+
+ ret = fwnode_property_read_string(proto_node,
+ "fsl,proto",
+ &proto_str);
+ if (ret) {
+ dev_err(dev,
+ "could not read %s from %pfwP: %d\n",
+ "fsl,proto", proto_node, ret);
+ return ret;
+ }
+
+ if (strstarts(proto_str, "sgmii")) {
+ protos = PROTO_MASK(SGMII);
+ if (serdes->conf->caps &
+ BIT(LYNX_HAS_1000BASEKX))
+ protos |= PROTO_MASK(1000BASEKX);
+ if (!strcmp(proto_str, "sgmii25"))
+ protos |= PROTO_MASK(SGMII25);
+ } else if (!strcmp(proto_str, "qsgmii")) {
+ protos = PROTO_MASK(QSGMII);
+ } else if (!strcmp(proto_str, "xfi")) {
+ protos = PROTO_MASK(XFI);
+ if (serdes->conf->caps & BIT(LYNX_HAS_10GKR))
+ protos |= PROTO_MASK(10GKR);
+ } else if (!strcmp(proto_str, "pcie")) {
+ protos = PROTO_MASK(PCIE);
+ } else if (!strcmp(proto_str, "sata")) {
+ protos = PROTO_MASK(SATA);
+ } else {
+ dev_warn(dev,
+ "unknown protocol %s for fsl,proto in %pfwP\n",
+ proto_str, proto_node);
+ continue;
+ }
+
+ fwnode_for_each_child_node(proto_node, config_node) {
+ children = true;
+ ret = lynx_parse_mode(serdes, config_node,
+ &modes[mode++],
+ protos, pccr, index);
+ if (ret)
+ return ret;
+ }
+
+ if (!children) {
+ ret = lynx_parse_mode(serdes, proto_node,
+ &modes[mode++],
+ protos, pccr, index);
+ if (ret)
+ return ret;
+ }
+ }
+ }
+
+ serdes->modes = modes;
+ WARN_ON(mode != mode_total);
+ serdes->mode_count = mode;
+ return 0;
+}
+
+static int lynx_probe(struct platform_device *pdev)
+{
+ bool grabbed_clocks = false;
+ int i, ret;
+ struct device *dev = &pdev->dev;
+ struct lynx_priv *serdes;
+ struct regmap_config regmap_config = {
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .disable_locking = true,
+ };
+ struct resource *res;
+ void __iomem *base;
+
+ serdes = devm_kzalloc(dev, sizeof(*serdes), GFP_KERNEL);
+ if (!serdes)
+ return -ENOMEM;
+
+ serdes->dev = dev;
+ platform_set_drvdata(pdev, serdes);
+ mutex_init(&serdes->lock);
+ INIT_LIST_HEAD(&serdes->groups);
+ serdes->conf = device_get_match_data(dev);
+
+ ret = lynx_parse_pccrs(serdes);
+ if (ret)
+ return ret;
+
+ base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
+ if (IS_ERR(base)) {
+ ret = PTR_ERR(base);
+ dev_err_probe(dev, ret, "could not get/map registers\n");
+ return ret;
+ }
+
+ regmap_config.val_format_endian = serdes->conf->endian;
+ regmap_config.max_register = res->end - res->start;
+ serdes->regmap = devm_regmap_init_mmio(dev, base, ®map_config);
+ if (IS_ERR(serdes->regmap)) {
+ ret = PTR_ERR(serdes->regmap);
+ dev_err_probe(dev, ret, "could not create regmap\n");
+ return ret;
+ }
+
+ ret = lynx_clks_init(serdes->clks, dev, serdes->regmap);
+ if (ret)
+ return ret;
+
+ /* Deselect anything configured by the RCW/bootloader */
+ for (i = 0; i < serdes->mode_count; i++) {
+ const struct lynx_mode *mode = &serdes->modes[i];
+ u32 pccr = lynx_read(serdes, PCCRn(mode->pccr));
+
+ if (lynx_proto_mode_get(mode, pccr) == mode->cfg) {
+ if (mode->protos & UNSUPPORTED_PROTOS) {
+ /* Don't mess with modes we don't support */
+ if (mode->first_lane > mode->last_lane)
+ serdes->used_lanes |=
+ GENMASK(mode->first_lane,
+ mode->last_lane);
+ else
+ serdes->used_lanes |=
+ GENMASK(mode->last_lane,
+ mode->first_lane);
+ if (grabbed_clocks)
+ continue;
+
+ grabbed_clocks = true;
+ clk_prepare_enable(serdes->clks[0].pll.clk);
+ clk_prepare_enable(serdes->clks[1].pll.clk);
+ clk_rate_exclusive_get(serdes->clks[0].pll.clk);
+ clk_rate_exclusive_get(serdes->clks[1].pll.clk);
+ } else {
+ /* Otherwise, clear out the existing config */
+ pccr = lynx_proto_mode_prep(mode, pccr,
+ LYNX_PROTO_NONE);
+ lynx_write(serdes, pccr, PCCRn(mode->pccr));
+ }
+
+ /* Disable the SGMII PCS until we're ready for it */
+ if (mode->protos & LYNX_PROTO_SGMII) {
+ u32 cr1;
+
+ cr1 = lynx_read(serdes, SGMIIaCR1(mode->idx));
+ cr1 &= ~SGMIIaCR1_SGPCS_EN;
+ lynx_write(serdes, cr1, SGMIIaCR1(mode->idx));
+ }
+ }
+ }
+
+ /* Power off non-used lanes */
+ for (i = 0; i < serdes->conf->lanes; i++) {
+ if (serdes->used_lanes & BIT(i))
+ continue;
+ lynx_power_off_lane(serdes, i);
+ }
+
+ ret = PTR_ERR_OR_ZERO(devm_of_phy_provider_register(dev, lynx_xlate));
+ if (ret)
+ dev_err_probe(dev, ret, "could not register phy provider\n");
+ else
+ dev_info(dev, "probed with %d lanes\n", serdes->conf->lanes);
+ return ret;
+}
+
+static const struct lynx_conf ls1046a_conf = {
+ .lanes = 4,
+ .caps = BIT(LYNX_HAS_1000BASEKX) | BIT(LYNX_HAS_10GKR),
+ .endian = REGMAP_ENDIAN_BIG,
+};
+
+static const struct lynx_conf ls1088a_conf = {
+ .lanes = 4,
+ .caps = BIT(LYNX_HAS_1000BASEKX) | BIT(LYNX_HAS_10GKR),
+ .endian = REGMAP_ENDIAN_LITTLE,
+};
+
+static const struct of_device_id lynx_of_match[] = {
+ { .compatible = "fsl,ls1046a-serdes", .data = &ls1046a_conf },
+ { .compatible = "fsl,ls1088a-serdes", .data = &ls1088a_conf },
+ { },
+};
+MODULE_DEVICE_TABLE(of, lynx_of_match);
+
+static struct platform_driver lynx_driver = {
+ .probe = lynx_probe,
+ .driver = {
+ .name = "lynx_10g",
+ .of_match_table = lynx_of_match,
+ },
+};
+module_platform_driver(lynx_driver);
+
+MODULE_AUTHOR("Sean Anderson <sean.anderson@seco.com>");
+MODULE_DESCRIPTION("Lynx 10G SerDes driver");
+MODULE_LICENSE("GPL");
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 06/47] [RFT] phy: fsl: Add Lynx 10G SerDes driver
2022-07-15 21:59 ` [PATCH net-next v3 06/47] [RFT] phy: fsl: Add Lynx 10G SerDes driver Sean Anderson
@ 2022-07-16 22:39 ` kernel test robot
0 siblings, 0 replies; 123+ messages in thread
From: kernel test robot @ 2022-07-16 22:39 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: kbuild-all, Paolo Abeni, Eric Dumazet, linux-arm-kernel,
Russell King, linux-kernel, Sean Anderson, Ioana Ciornei,
Jonathan Corbet, Kishon Vijay Abraham I, Krzysztof Kozlowski,
Rob Herring, Vinod Koul, devicetree, linux-doc, linux-phy
Hi Sean,
I love your patch! Yet something to improve:
[auto build test ERROR on net-next/master]
url: https://github.com/intel-lab-lkp/linux/commits/Sean-Anderson/net-dpaa-Convert-to-phylink/20220717-002036
base: https://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git 2acd1022549e210edc4cfc9fc65b07b88751f0d9
config: i386-allyesconfig (https://download.01.org/0day-ci/archive/20220717/202207170654.0sfLE3ua-lkp@intel.com/config)
compiler: gcc-11 (Debian 11.3.0-3) 11.3.0
reproduce (this is a W=1 build):
# https://github.com/intel-lab-lkp/linux/commit/fbc22d79121541a0f957e0c209810c37570041b5
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Sean-Anderson/net-dpaa-Convert-to-phylink/20220717-002036
git checkout fbc22d79121541a0f957e0c209810c37570041b5
# save the config file
mkdir build_dir && cp config build_dir/.config
make W=1 O=build_dir ARCH=i386 SHELL=/bin/bash
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/phy/freescale/phy-fsl-lynx-10g-clk.c: In function 'lynx_pll_recalc_rate':
>> drivers/phy/freescale/phy-fsl-lynx-10g-clk.c:211:25: error: implicit declaration of function 'FIELD_GET' [-Werror=implicit-function-declaration]
211 | u32 frate_sel = FIELD_GET(PLLaCR0_FRATE_SEL, cr0);
| ^~~~~~~~~
drivers/phy/freescale/phy-fsl-lynx-10g-clk.c: In function 'lynx_pll_set_rate':
>> drivers/phy/freescale/phy-fsl-lynx-10g-clk.c:294:16: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
294 | cr0 |= FIELD_PREP(PLLaCR0_RFCLK_SEL, rfclk_sel);
| ^~~~~~~~~~
drivers/phy/freescale/phy-fsl-lynx-10g-clk.c: In function 'lynx_clk_init':
>> drivers/phy/freescale/phy-fsl-lynx-10g-clk.c:404:9: error: implicit declaration of function 'kfree'; did you mean 'vfree'? [-Werror=implicit-function-declaration]
404 | kfree(ref_name);
| ^~~~~
| vfree
cc1: some warnings being treated as errors
vim +/FIELD_GET +211 drivers/phy/freescale/phy-fsl-lynx-10g-clk.c
205
206 static unsigned long lynx_pll_recalc_rate(struct clk_hw *hw,
207 unsigned long parent_rate)
208 {
209 struct lynx_clk *clk = lynx_pll_to_clk(hw);
210 u32 cr0 = lynx_read(clk, PLLaCR0(clk->idx));
> 211 u32 frate_sel = FIELD_GET(PLLaCR0_FRATE_SEL, cr0);
212 u32 rfclk_sel = FIELD_GET(PLLaCR0_RFCLK_SEL, cr0);
213 unsigned long ret;
214
215 dev_dbg(clk->dev, "%s(pll%d, %lu)\n", __func__,
216 clk->idx, parent_rate);
217
218 ret = mult_frac(parent_rate, lynx_pll_ratio(frate_sel, rfclk_sel),
219 HZ_PER_KHZ);
220 return ret;
221 }
222
223 static long lynx_pll_round_rate(struct clk_hw *hw, unsigned long rate_khz,
224 unsigned long *parent_rate)
225 {
226 int frate_sel, rfclk_sel;
227 struct lynx_clk *clk = lynx_pll_to_clk(hw);
228 u32 ratio;
229
230 dev_dbg(clk->dev, "%s(pll%d, %lu, %lu)\n", __func__,
231 clk->idx, rate_khz, *parent_rate);
232
233 frate_sel = lynx_frate_to_sel(rate_khz);
234 if (frate_sel < 0)
235 return frate_sel;
236
237 rfclk_sel = lynx_rfclk_to_sel(*parent_rate);
238 if (rfclk_sel >= 0) {
239 ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
240 if (ratio)
241 return mult_frac(*parent_rate, ratio, HZ_PER_KHZ);
242 }
243
244 for (rfclk_sel = 0;
245 rfclk_sel < ARRAY_SIZE(rfclk_sel_map);
246 rfclk_sel++) {
247 ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
248 if (ratio) {
249 *parent_rate = rfclk_sel_map[rfclk_sel];
250 return mult_frac(*parent_rate, ratio, HZ_PER_KHZ);
251 }
252 }
253
254 return -EINVAL;
255 }
256
257 static int lynx_pll_set_rate(struct clk_hw *hw, unsigned long rate_khz,
258 unsigned long parent_rate)
259 {
260 int frate_sel, rfclk_sel, ret;
261 struct lynx_clk *clk = lynx_pll_to_clk(hw);
262 u32 ratio, cr0 = lynx_read(clk, PLLaCR0(clk->idx));
263
264 dev_dbg(clk->dev, "%s(pll%d, %lu, %lu)\n", __func__,
265 clk->idx, rate_khz, parent_rate);
266
267 frate_sel = lynx_frate_to_sel(rate_khz);
268 if (frate_sel < 0)
269 return frate_sel;
270
271 /* First try the existing rate */
272 rfclk_sel = lynx_rfclk_to_sel(parent_rate);
273 if (rfclk_sel >= 0) {
274 ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
275 if (ratio)
276 goto got_rfclk;
277 }
278
279 for (rfclk_sel = 0;
280 rfclk_sel < ARRAY_SIZE(rfclk_sel_map);
281 rfclk_sel++) {
282 ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
283 if (ratio) {
284 ret = clk_set_rate(clk->ref, rfclk_sel_map[rfclk_sel]);
285 if (!ret)
286 goto got_rfclk;
287 }
288 }
289
290 return ret;
291
292 got_rfclk:
293 cr0 &= ~(PLLaCR0_RFCLK_SEL | PLLaCR0_FRATE_SEL);
> 294 cr0 |= FIELD_PREP(PLLaCR0_RFCLK_SEL, rfclk_sel);
295 cr0 |= FIELD_PREP(PLLaCR0_FRATE_SEL, frate_sel);
296 lynx_write(clk, cr0, PLLaCR0(clk->idx));
297 return 0;
298 }
299
300 static const struct clk_ops lynx_pll_clk_ops = {
301 .prepare = lynx_pll_prepare,
302 .disable = lynx_pll_disable,
303 .is_enabled = lynx_pll_is_enabled,
304 .recalc_rate = lynx_pll_recalc_rate,
305 .round_rate = lynx_pll_round_rate,
306 .set_rate = lynx_pll_set_rate,
307 };
308
309 static void lynx_ex_dly_disable(struct clk_hw *hw)
310 {
311 struct lynx_clk *clk = lynx_ex_dly_to_clk(hw);
312 u32 cr0 = lynx_read(clk, PLLaCR0(clk->idx));
313
314 cr0 &= ~PLLaCR0_DLYDIV_SEL;
315 lynx_write(clk, PLLaCR0(clk->idx), cr0);
316 }
317
318 static int lynx_ex_dly_enable(struct clk_hw *hw)
319 {
320 struct lynx_clk *clk = lynx_ex_dly_to_clk(hw);
321 u32 cr0 = lynx_read(clk, PLLaCR0(clk->idx));
322
323 cr0 &= ~PLLaCR0_DLYDIV_SEL;
324 cr0 |= FIELD_PREP(PLLaCR0_DLYDIV_SEL, PLLaCR0_DLYDIV_SEL_16);
325 lynx_write(clk, PLLaCR0(clk->idx), cr0);
326 return 0;
327 }
328
329 static int lynx_ex_dly_is_enabled(struct clk_hw *hw)
330 {
331 struct lynx_clk *clk = lynx_ex_dly_to_clk(hw);
332
333 return lynx_read(clk, PLLaCR0(clk->idx)) & PLLaCR0_DLYDIV_SEL;
334 }
335
336 static unsigned long lynx_ex_dly_recalc_rate(struct clk_hw *hw,
337 unsigned long parent_rate)
338 {
339 return parent_rate / 16;
340 }
341
342 static const struct clk_ops lynx_ex_dly_clk_ops = {
343 .enable = lynx_ex_dly_enable,
344 .disable = lynx_ex_dly_disable,
345 .is_enabled = lynx_ex_dly_is_enabled,
346 .recalc_rate = lynx_ex_dly_recalc_rate,
347 };
348
349 static int lynx_clk_init(struct lynx_clk *clk, struct device *dev,
350 struct regmap *regmap, unsigned int index)
351 {
352 const struct clk_hw *pll_parents, *ex_dly_parents;
353 struct clk_init_data pll_init = {
354 .ops = &lynx_pll_clk_ops,
355 .parent_hws = &pll_parents,
356 .num_parents = 1,
357 .flags = CLK_SET_RATE_GATE | CLK_GET_RATE_NOCACHE |
358 CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
359 };
360 struct clk_init_data ex_dly_init = {
361 .ops = &lynx_ex_dly_clk_ops,
362 .parent_hws = &ex_dly_parents,
363 .num_parents = 1,
364 };
365 char *ref_name;
366 int ret;
367
368 clk->dev = dev;
369 clk->regmap = regmap;
370 clk->idx = index;
371
372 ref_name = kasprintf(GFP_KERNEL, "ref%d", index);
373 pll_init.name = kasprintf(GFP_KERNEL, "%s.pll%d", dev_name(dev), index);
374 ex_dly_init.name = kasprintf(GFP_KERNEL, "%s_ex_dly", pll_init.name);
375 if (!ref_name || !pll_init.name || !ex_dly_init.name) {
376 ret = -ENOMEM;
377 goto out;
378 }
379
380 clk->ref = devm_clk_get(dev, ref_name);
381 if (IS_ERR(clk->ref)) {
382 ret = PTR_ERR(clk->ref);
383 dev_err_probe(dev, ret, "could not get %s\n", ref_name);
384 goto out;
385 }
386
387 pll_parents = __clk_get_hw(clk->ref);
388 clk->pll.init = &pll_init;
389 ret = devm_clk_hw_register(dev, &clk->pll);
390 if (ret) {
391 dev_err_probe(dev, ret, "could not register %s\n",
392 pll_init.name);
393 goto out;
394 }
395
396 ex_dly_parents = &clk->pll;
397 clk->ex_dly.init = &ex_dly_init;
398 ret = devm_clk_hw_register(dev, &clk->ex_dly);
399 if (ret)
400 dev_err_probe(dev, ret, "could not register %s\n",
401 ex_dly_init.name);
402
403 out:
> 404 kfree(ref_name);
405 kfree(pll_init.name);
406 kfree(ex_dly_init.name);
407 return ret;
408 }
409
--
0-DAY CI Kernel Test Service
https://01.org/lkp
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 07/47] net: phy: Add support for rate adaptation
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (5 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 06/47] [RFT] phy: fsl: Add Lynx 10G SerDes driver Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-16 19:39 ` Andrew Lunn
2022-07-15 21:59 ` [PATCH net-next v3 08/47] net: phylink: Support differing link speeds and interface speeds Sean Anderson
` (40 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Alexandru Marginean, Andrew Lunn,
Heiner Kallweit, Vladimir Oltean
This adds general support for rate adaptation to the phy subsystem. The
general idea is that the phy interface runs at one speed, and the MAC
throttles the rate at which it sends packets to the link speed. There's a
good overview of several techniques for achieving this at [1]. This patch
adds support for three: pause-frame based (such as in Aquantia phys),
CRS-based (such as in 10PASS-TS and 2BASE-TL), and open-loop-based (such as
in 10GBASE-W).
This patch makes a few assumptions and a few non assumptions about the
types of rate adaptation available. First, it assumes that different phys
may use different forms of rate adaptation. Second, it assumes that phys
can use rate adaptation for any of their supported link speeds (e.g. if a
phy supports 10BASE-T and XGMII, then it can adapt XGMII to 10BASE-T).
Third, it does not assume that all interface modes will use the same form
of rate adaptation. Fourth, it does not assume that all phy devices will
support rate adaptation (even some do). Relaxing or strengthening these
(non-)assumptions could result in a different API. For example, if all
interface modes were assumed to use the same form of rate adaptation, then
a bitmask of interface modes supportting rate adaptation would suffice.
We need support for rate adaptation for two reasons. First, the phy
consumer needs to know if the phy will perform rate adaptation in order to
program the correct advertising. An unaware consumer will only program
support for link modes at the phy interface mode's native speed. This will
cause autonegotiation to fail if the link partner only advertises support
for lower speed link modes.
Second, to reduce packet loss it may be desirable to throttle packet
throughput. In past discussions [2-4], this behavior has been
controversial. It is the opinion of several developers that it is the
responsibility of the system integrator or end user to set the link
settings appropriately for rate adaptation. In particular, it was argued
that it is difficult to determine whether a particular phy has rate
adaptation enabled, and it is simpler to keep such determinations out of
the kernel. Another criticism is that packet loss may happen anyway, such
as if a faster link is used with a switch or repeater that does not support
pause frames.
I believe that our current approach is limiting, especially when
considering that rate adaptation (in two forms) has made it into IEEE
standards. In general, When we have appropriate information we should set
sensible defaults. To consider use a contrasting example, we enable pause
frames by default for switches which autonegotiate for them. When it's the
phy itself generating these frames, we don't even have to autonegotiate to
know that we should enable pause frames.
Our current approach also encourages workarounds, such as commit
73a21fa817f0 ("dpaa_eth: support all modes with rate adapting PHYs").
These workarounds are fine for phylib drivers, but phylink drivers cannot
use this approach (since there is no direct access to the phy). Note that
even when we determine (e.g.) the pause settings based on whether rate
adaptation is enabled, they can still be overridden by userspace (using
ethtool). It might be prudent to allow disabling of rate adaptation
generally in ethtool as well.
[1] https://www.ieee802.org/3/efm/baseline/marris_1_0302.pdf
[2] https://lore.kernel.org/netdev/1579701573-6609-1-git-send-email-madalin.bucur@oss.nxp.com/
[3] https://lore.kernel.org/netdev/1580137671-22081-1-git-send-email-madalin.bucur@oss.nxp.com/
[4] https://lore.kernel.org/netdev/20200116181933.32765-1-olteanv@gmail.com/
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
Changes in v3:
- New
drivers/net/phy/phy.c | 21 +++++++++++++++++++++
include/linux/phy.h | 38 ++++++++++++++++++++++++++++++++++++++
2 files changed, 59 insertions(+)
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 8d3ee3a6495b..cf4a8b055a42 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -114,6 +114,27 @@ void phy_print_status(struct phy_device *phydev)
}
EXPORT_SYMBOL(phy_print_status);
+/**
+ * phy_get_rate_adaptation - determine if rate adaptation is supported
+ * @phydev: The phy device to return rate adaptation for
+ * @iface: The interface mode to use
+ *
+ * This determines the type of rate adaptation (if any) that @phy supports
+ * using @iface. @iface may be %PHY_INTERFACE_MODE_NA to determine if any
+ * interface supports rate adaptation.
+ *
+ * Return: The type of rate adaptation @phy supports for @iface, or
+ * %RATE_ADAPT_NONE.
+ */
+enum rate_adaptation phy_get_rate_adaptation(struct phy_device *phydev,
+ phy_interface_t iface)
+{
+ if (phydev->drv->get_rate_adaptation)
+ return phydev->drv->get_rate_adaptation(phydev, iface);
+ return RATE_ADAPT_NONE;
+}
+EXPORT_SYMBOL_GPL(phy_get_rate_adaptation);
+
/**
* phy_config_interrupt - configure the PHY device for the requested interrupts
* @phydev: the phy_device struct
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 81ce76c3e799..e983711f6c8b 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -276,6 +276,24 @@ static inline const char *phy_modes(phy_interface_t interface)
}
}
+/**
+ * enum rate_adaptation - methods of rate adaptation
+ * @RATE_ADAPT_NONE: No rate adaptation performed.
+ * @RATE_ADAPT_PAUSE: The phy sends pause frames to throttle the MAC.
+ * @RATE_ADAPT_CRS: The phy asserts CRS to prevent the MAC from transmitting.
+ * @RATE_ADAPT_OPEN_LOOP: The MAC is programmed with a sufficiently-large IPG.
+ *
+ * These are used to throttle the rate of data on the phy interface when the
+ * native speed of the interface is higher than the link speed. These should
+ * not be used for phy interfaces which natively support multiple speeds (e.g.
+ * MII or SGMII).
+ */
+enum rate_adaptation {
+ RATE_ADAPT_NONE = 0,
+ RATE_ADAPT_PAUSE,
+ RATE_ADAPT_CRS,
+ RATE_ADAPT_OPEN_LOOP,
+};
#define PHY_INIT_TIMEOUT 100000
#define PHY_FORCE_TIMEOUT 10
@@ -570,6 +588,7 @@ struct macsec_ops;
* @lp_advertising: Current link partner advertised linkmodes
* @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
* @autoneg: Flag autoneg being used
+ * @rate_adaptation: Current rate adaptation mode
* @link: Current link state
* @autoneg_complete: Flag auto negotiation of the link has completed
* @mdix: Current crossover
@@ -637,6 +656,8 @@ struct phy_device {
unsigned irq_suspended:1;
unsigned irq_rerun:1;
+ enum rate_adaptation rate_adaptation;
+
enum phy_state state;
u32 dev_flags;
@@ -801,6 +822,21 @@ struct phy_driver {
*/
int (*get_features)(struct phy_device *phydev);
+ /**
+ * @get_rate_adaptation: Get the supported type of rate adaptation for a
+ * particular phy interface. This is used by phy consumers to determine
+ * whether to advertise lower-speed modes for that interface. It is
+ * assumed that if a rate adaptation mode is supported on an interface,
+ * then that interface's rate can be adapted to all slower link speeds
+ * supported by the phy. If iface is %PHY_INTERFACE_MODE_NA, and the phy
+ * supports any kind of rate adaptation for any interface, then it must
+ * return that rate adaptation mode (preferring %RATE_ADAPT_PAUSE, to
+ * %RATE_ADAPT_CRS). If the interface is not supported, this should
+ * return %RATE_ADAPT_NONE.
+ */
+ enum rate_adaptation (*get_rate_adaptation)(struct phy_device *phydev,
+ phy_interface_t iface);
+
/* PHY Power Management */
/** @suspend: Suspend the hardware, saving state if needed */
int (*suspend)(struct phy_device *phydev);
@@ -1681,6 +1717,8 @@ int phy_disable_interrupts(struct phy_device *phydev);
void phy_request_interrupt(struct phy_device *phydev);
void phy_free_interrupt(struct phy_device *phydev);
void phy_print_status(struct phy_device *phydev);
+enum rate_adaptation phy_get_rate_adaptation(struct phy_device *phydev,
+ phy_interface_t iface);
void phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
void phy_advertise_supported(struct phy_device *phydev);
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 07/47] net: phy: Add support for rate adaptation
2022-07-15 21:59 ` [PATCH net-next v3 07/47] net: phy: Add support for rate adaptation Sean Anderson
@ 2022-07-16 19:39 ` Andrew Lunn
2022-07-16 21:55 ` Sean Anderson
0 siblings, 1 reply; 123+ messages in thread
From: Andrew Lunn @ 2022-07-16 19:39 UTC (permalink / raw)
To: Sean Anderson
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
> drivers/net/phy/phy.c | 21 +++++++++++++++++++++
> include/linux/phy.h | 38 ++++++++++++++++++++++++++++++++++++++
> 2 files changed, 59 insertions(+)
>
> diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
> index 8d3ee3a6495b..cf4a8b055a42 100644
> --- a/drivers/net/phy/phy.c
> +++ b/drivers/net/phy/phy.c
> @@ -114,6 +114,27 @@ void phy_print_status(struct phy_device *phydev)
> }
> EXPORT_SYMBOL(phy_print_status);
>
> +/**
> + * phy_get_rate_adaptation - determine if rate adaptation is supported
> + * @phydev: The phy device to return rate adaptation for
> + * @iface: The interface mode to use
> + *
> + * This determines the type of rate adaptation (if any) that @phy supports
> + * using @iface. @iface may be %PHY_INTERFACE_MODE_NA to determine if any
> + * interface supports rate adaptation.
> + *
> + * Return: The type of rate adaptation @phy supports for @iface, or
> + * %RATE_ADAPT_NONE.
> + */
> +enum rate_adaptation phy_get_rate_adaptation(struct phy_device *phydev,
> + phy_interface_t iface)
> +{
> + if (phydev->drv->get_rate_adaptation)
> + return phydev->drv->get_rate_adaptation(phydev, iface);
It is normal that any call into the driver is performed with the
phydev->lock held.
> #define PHY_INIT_TIMEOUT 100000
> #define PHY_FORCE_TIMEOUT 10
> @@ -570,6 +588,7 @@ struct macsec_ops;
> * @lp_advertising: Current link partner advertised linkmodes
> * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
> * @autoneg: Flag autoneg being used
> + * @rate_adaptation: Current rate adaptation mode
> * @link: Current link state
> * @autoneg_complete: Flag auto negotiation of the link has completed
> * @mdix: Current crossover
> @@ -637,6 +656,8 @@ struct phy_device {
> unsigned irq_suspended:1;
> unsigned irq_rerun:1;
>
> + enum rate_adaptation rate_adaptation;
It is not clear what the locking is on this member. Is it only safe to
access it during the adjust_link callback, when it is guaranteed that
the phydev->lock is held, so the value is consistent? Or is the MAC
allowed to access this at other times?
Andrew
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 07/47] net: phy: Add support for rate adaptation
2022-07-16 19:39 ` Andrew Lunn
@ 2022-07-16 21:55 ` Sean Anderson
0 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-16 21:55 UTC (permalink / raw)
To: Andrew Lunn
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
On 7/16/22 3:39 PM, Andrew Lunn wrote:
>> drivers/net/phy/phy.c | 21 +++++++++++++++++++++
>> include/linux/phy.h | 38 ++++++++++++++++++++++++++++++++++++++
>> 2 files changed, 59 insertions(+)
>>
>> diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
>> index 8d3ee3a6495b..cf4a8b055a42 100644
>> --- a/drivers/net/phy/phy.c
>> +++ b/drivers/net/phy/phy.c
>> @@ -114,6 +114,27 @@ void phy_print_status(struct phy_device *phydev)
>> }
>> EXPORT_SYMBOL(phy_print_status);
>>
>> +/**
>> + * phy_get_rate_adaptation - determine if rate adaptation is supported
>> + * @phydev: The phy device to return rate adaptation for
>> + * @iface: The interface mode to use
>> + *
>> + * This determines the type of rate adaptation (if any) that @phy supports
>> + * using @iface. @iface may be %PHY_INTERFACE_MODE_NA to determine if any
>> + * interface supports rate adaptation.
>> + *
>> + * Return: The type of rate adaptation @phy supports for @iface, or
>> + * %RATE_ADAPT_NONE.
>> + */
>> +enum rate_adaptation phy_get_rate_adaptation(struct phy_device *phydev,
>> + phy_interface_t iface)
>> +{
>> + if (phydev->drv->get_rate_adaptation)
>> + return phydev->drv->get_rate_adaptation(phydev, iface);
>
> It is normal that any call into the driver is performed with the
> phydev->lock held.
Ah, so like phy_ethtool_get_strings.
>> #define PHY_INIT_TIMEOUT 100000
>> #define PHY_FORCE_TIMEOUT 10
>> @@ -570,6 +588,7 @@ struct macsec_ops;
>> * @lp_advertising: Current link partner advertised linkmodes
>> * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
>> * @autoneg: Flag autoneg being used
>> + * @rate_adaptation: Current rate adaptation mode
>> * @link: Current link state
>> * @autoneg_complete: Flag auto negotiation of the link has completed
>> * @mdix: Current crossover
>> @@ -637,6 +656,8 @@ struct phy_device {
>> unsigned irq_suspended:1;
>> unsigned irq_rerun:1;
>>
>> + enum rate_adaptation rate_adaptation;
>
> It is not clear what the locking is on this member. Is it only safe to
> access it during the adjust_link callback, when it is guaranteed that
> the phydev->lock is held, so the value is consistent? Or is the MAC
> allowed to access this at other times?
The former. My intention is that this has the same access as link/interface/speed/duplex.
--Sean
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 08/47] net: phylink: Support differing link speeds and interface speeds
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (6 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 07/47] net: phy: Add support for rate adaptation Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-16 20:06 ` Andrew Lunn
2022-07-15 21:59 ` [PATCH net-next v3 09/47] net: phylink: Adjust advertisement based on rate adaptation Sean Anderson
` (39 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Alexandru Marginean, Andrew Lunn,
Heiner Kallweit, Vladimir Oltean
This adds support for cases when the link speed differs from the speed of
the phy interface mode. Such cases can occur when some kind of rate
adaptation is occurring. The interface speed is used for the link state
speed member. This is done for compatibility with existing drivers. For
example, if the link mode is 1000BASE-T, and the phy interface mode is
XGMII, then the MAC will expect SPEED_10000 for speed (which is what would
have been passed previously). On the other hand, external APIs use
link_speed instead of speed. This is so the speed reported to userspace
matches the resolved link mode.
phy_interface_speed assumes that certain interfaces adapt to the link rate
and others do not. Generally, interface speed adaptation occurs by changing
the clock rate (such as for MII), or by repeating symbols (such as for
SGMII). This assumptation precludes using rate adaptation for interfaces
which already adapt their speed. For example, a phy which performed rate
adaptation with GMII (keeping the frequency at 125MHz) would not be
supported.
Although speed is one of the more prominent ways the link mode can differ
from the phy interface mode, they can also differ in duplex. With
pause-based rate adaptation, both the interface and link must be full
duplex. However, with CRS-based rate adaptation, the interface must be
half duplex, but the link mode may be full duplex. This can occur with
10PASS-TS and 2BASE-TL. In these cases, ethtool will report the "wrong"
duplex. To fix this, a similar process could be performed for duplex.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
Changes in v3:
- New
drivers/net/phy/phylink.c | 105 +++++++++++++++++++++++++++++++++-----
include/linux/phylink.h | 6 ++-
2 files changed, 97 insertions(+), 14 deletions(-)
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index b08716fe22c1..a952cdc7c96e 100644
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -296,6 +296,75 @@ static void phylink_caps_to_linkmodes(unsigned long *linkmodes,
}
}
+/**
+ * phy_interface_speed() - get the speed of a phy interface
+ * @interface: phy interface mode defined by &typedef phy_interface_t
+ * @link_speed: the speed of the link
+ *
+ * Some phy interfaces modes adapt to the speed of the underlying link (such as
+ * by duplicating data or changing the clock rate). Others, however, are fixed
+ * at a particular rate. Determine the speed of a phy interface mode for a
+ * particular link speed.
+ *
+ * Return: The speed of @interface
+ */
+static int phy_interface_speed(phy_interface_t interface, int link_speed)
+{
+ switch (interface) {
+ case PHY_INTERFACE_MODE_100BASEX:
+ return SPEED_100;
+
+ case PHY_INTERFACE_MODE_TBI:
+ case PHY_INTERFACE_MODE_MOCA:
+ case PHY_INTERFACE_MODE_RTBI:
+ case PHY_INTERFACE_MODE_1000BASEX:
+ case PHY_INTERFACE_MODE_1000BASEKX:
+ case PHY_INTERFACE_MODE_TRGMII:
+ return SPEED_1000;
+
+ case PHY_INTERFACE_MODE_2500BASEX:
+ return SPEED_2500;
+
+ case PHY_INTERFACE_MODE_5GBASER:
+ return SPEED_5000;
+
+ case PHY_INTERFACE_MODE_XGMII:
+ case PHY_INTERFACE_MODE_RXAUI:
+ case PHY_INTERFACE_MODE_XAUI:
+ case PHY_INTERFACE_MODE_10GBASER:
+ case PHY_INTERFACE_MODE_10GKR:
+ return SPEED_10000;
+
+ case PHY_INTERFACE_MODE_25GBASER:
+ return SPEED_25000;
+
+ case PHY_INTERFACE_MODE_XLGMII:
+ return SPEED_40000;
+
+ case PHY_INTERFACE_MODE_USXGMII:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_QSGMII:
+ case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_GMII:
+ case PHY_INTERFACE_MODE_REVRMII:
+ case PHY_INTERFACE_MODE_RMII:
+ case PHY_INTERFACE_MODE_SMII:
+ case PHY_INTERFACE_MODE_REVMII:
+ case PHY_INTERFACE_MODE_MII:
+ case PHY_INTERFACE_MODE_INTERNAL:
+ return link_speed;
+
+ case PHY_INTERFACE_MODE_NA:
+ case PHY_INTERFACE_MODE_MAX:
+ break;
+ }
+
+ return SPEED_UNKNOWN;
+}
+
/**
* phylink_get_linkmodes() - get acceptable link modes
* @linkmodes: ethtool linkmode mask (must be already initialised)
@@ -515,7 +584,7 @@ static int phylink_parse_fixedlink(struct phylink *pl,
if (fixed_node) {
ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
- pl->link_config.speed = speed;
+ pl->link_config.link_speed = speed;
pl->link_config.duplex = DUPLEX_HALF;
if (fwnode_property_read_bool(fixed_node, "full-duplex"))
@@ -559,7 +628,7 @@ static int phylink_parse_fixedlink(struct phylink *pl,
if (!ret) {
pl->link_config.duplex = prop[1] ?
DUPLEX_FULL : DUPLEX_HALF;
- pl->link_config.speed = prop[2];
+ pl->link_config.link_speed = prop[2];
if (prop[3])
__set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
pl->link_config.lp_advertising);
@@ -569,11 +638,13 @@ static int phylink_parse_fixedlink(struct phylink *pl,
}
}
- if (pl->link_config.speed > SPEED_1000 &&
+ if (pl->link_config.link_speed > SPEED_1000 &&
pl->link_config.duplex != DUPLEX_FULL)
phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
- pl->link_config.speed);
+ pl->link_config.link_speed);
+ pl->link_config.speed = phy_interface_speed(pl->link_config.interface,
+ pl->link_config.link_speed);
bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
linkmode_copy(pl->link_config.advertising, pl->supported);
phylink_validate(pl, pl->supported, &pl->link_config);
@@ -1270,7 +1341,8 @@ struct phylink *phylink_create(struct phylink_config *config,
pl->link_port = PORT_MII;
pl->link_config.interface = iface;
pl->link_config.pause = MLO_PAUSE_AN;
- pl->link_config.speed = SPEED_UNKNOWN;
+ pl->link_config.link_speed = SPEED_UNKNOWN;
+ pl->link_config.speed = phy_interface_speed(iface, SPEED_UNKNOWN);
pl->link_config.duplex = DUPLEX_UNKNOWN;
pl->link_config.an_enabled = true;
pl->mac_ops = mac_ops;
@@ -1335,7 +1407,9 @@ static void phylink_phy_change(struct phy_device *phydev, bool up)
phy_get_pause(phydev, &tx_pause, &rx_pause);
mutex_lock(&pl->state_mutex);
- pl->phy_state.speed = phydev->speed;
+ pl->phy_state.link_speed = phydev->speed;
+ pl->phy_state.speed = phy_interface_speed(phydev->interface,
+ phydev->speed);
pl->phy_state.duplex = phydev->duplex;
pl->phy_state.pause = MLO_PAUSE_NONE;
if (tx_pause)
@@ -1413,7 +1487,8 @@ static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
pl->phydev = phy;
pl->phy_state.interface = interface;
pl->phy_state.pause = MLO_PAUSE_NONE;
- pl->phy_state.speed = SPEED_UNKNOWN;
+ pl->phy_state.link_speed = SPEED_UNKNOWN;
+ pl->phy_state.speed = phy_interface_speed(interface, SPEED_UNKNOWN);
pl->phy_state.duplex = DUPLEX_UNKNOWN;
linkmode_copy(pl->supported, supported);
linkmode_copy(pl->link_config.advertising, config.advertising);
@@ -1857,7 +1932,7 @@ static void phylink_get_ksettings(const struct phylink_link_state *state,
{
phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
- kset->base.speed = state->speed;
+ kset->base.speed = state->link_speed;
kset->base.duplex = state->duplex;
kset->base.autoneg = state->an_enabled ? AUTONEG_ENABLE :
AUTONEG_DISABLE;
@@ -1974,13 +2049,13 @@ int phylink_ethtool_ksettings_set(struct phylink *pl,
* If the link parameters match, accept them but do nothing.
*/
if (pl->cur_link_an_mode == MLO_AN_FIXED) {
- if (s->speed != pl->link_config.speed ||
+ if (s->speed != pl->link_config.link_speed ||
s->duplex != pl->link_config.duplex)
return -EINVAL;
return 0;
}
- config.speed = s->speed;
+ config.link_speed = s->speed;
config.duplex = s->duplex;
break;
@@ -1996,7 +2071,7 @@ int phylink_ethtool_ksettings_set(struct phylink *pl,
return 0;
}
- config.speed = SPEED_UNKNOWN;
+ config.link_speed = SPEED_UNKNOWN;
config.duplex = DUPLEX_UNKNOWN;
break;
@@ -2046,7 +2121,10 @@ int phylink_ethtool_ksettings_set(struct phylink *pl,
if (config.an_enabled && phylink_is_empty_linkmode(config.advertising))
return -EINVAL;
+ config.speed = phy_interface_speed(config.interface, config.link_speed);
+
mutex_lock(&pl->state_mutex);
+ pl->link_config.link_speed = config.link_speed;
pl->link_config.speed = config.speed;
pl->link_config.duplex = config.duplex;
pl->link_config.an_enabled = config.an_enabled;
@@ -2291,7 +2369,7 @@ static int phylink_mii_emul_read(unsigned int reg,
int val;
fs.link = state->link;
- fs.speed = state->speed;
+ fs.speed = state->link_speed;
fs.duplex = state->duplex;
fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
@@ -2588,7 +2666,8 @@ static int phylink_sfp_config(struct phylink *pl, u8 mode,
memset(&config, 0, sizeof(config));
linkmode_copy(config.advertising, advertising);
config.interface = PHY_INTERFACE_MODE_NA;
- config.speed = SPEED_UNKNOWN;
+ config.link_speed = SPEED_UNKNOWN;
+ config.speed = PHY_INTERFACE_MODE_NA;
config.duplex = DUPLEX_UNKNOWN;
config.pause = MLO_PAUSE_AN;
config.an_enabled = pl->link_config.an_enabled;
diff --git a/include/linux/phylink.h b/include/linux/phylink.h
index 6d06896fc20d..30e3fbe19fb4 100644
--- a/include/linux/phylink.h
+++ b/include/linux/phylink.h
@@ -56,7 +56,10 @@ static inline bool phylink_autoneg_inband(unsigned int mode)
* @lp_advertising: ethtool bitmask containing link partner advertised link
* modes
* @interface: link &typedef phy_interface_t mode
- * @speed: link speed, one of the SPEED_* constants.
+ * @speed: interface speed, one of the SPEED_* constants. If
+ * @rate_adaptation is being performed, this will be different from
+ * @link_speed.
+ * @link_speed: link speed, one of the SPEED_* constants.
* @duplex: link duplex mode, one of DUPLEX_* constants.
* @pause: link pause state, described by MLO_PAUSE_* constants.
* @link: true if the link is up.
@@ -68,6 +71,7 @@ struct phylink_link_state {
__ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
phy_interface_t interface;
int speed;
+ int link_speed;
int duplex;
int pause;
unsigned int link:1;
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 08/47] net: phylink: Support differing link speeds and interface speeds
2022-07-15 21:59 ` [PATCH net-next v3 08/47] net: phylink: Support differing link speeds and interface speeds Sean Anderson
@ 2022-07-16 20:06 ` Andrew Lunn
2022-07-16 22:29 ` Sean Anderson
2022-07-18 16:06 ` Russell King (Oracle)
0 siblings, 2 replies; 123+ messages in thread
From: Andrew Lunn @ 2022-07-16 20:06 UTC (permalink / raw)
To: Sean Anderson
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
> +/**
> + * phy_interface_speed() - get the speed of a phy interface
> + * @interface: phy interface mode defined by &typedef phy_interface_t
> + * @link_speed: the speed of the link
> + *
> + * Some phy interfaces modes adapt to the speed of the underlying link (such as
> + * by duplicating data or changing the clock rate). Others, however, are fixed
> + * at a particular rate. Determine the speed of a phy interface mode for a
> + * particular link speed.
> + *
> + * Return: The speed of @interface
> + */
> +static int phy_interface_speed(phy_interface_t interface, int link_speed)
> +{
> + switch (interface) {
> + case PHY_INTERFACE_MODE_100BASEX:
> + return SPEED_100;
> +
> + case PHY_INTERFACE_MODE_TBI:
> + case PHY_INTERFACE_MODE_MOCA:
> + case PHY_INTERFACE_MODE_RTBI:
> + case PHY_INTERFACE_MODE_1000BASEX:
> + case PHY_INTERFACE_MODE_1000BASEKX:
> + case PHY_INTERFACE_MODE_TRGMII:
> + return SPEED_1000;
> +
> + case PHY_INTERFACE_MODE_2500BASEX:
> + return SPEED_2500;
> +
> + case PHY_INTERFACE_MODE_5GBASER:
> + return SPEED_5000;
> +
> + case PHY_INTERFACE_MODE_XGMII:
> + case PHY_INTERFACE_MODE_RXAUI:
> + case PHY_INTERFACE_MODE_XAUI:
> + case PHY_INTERFACE_MODE_10GBASER:
> + case PHY_INTERFACE_MODE_10GKR:
> + return SPEED_10000;
> +
> + case PHY_INTERFACE_MODE_25GBASER:
> + return SPEED_25000;
> +
> + case PHY_INTERFACE_MODE_XLGMII:
> + return SPEED_40000;
> +
> + case PHY_INTERFACE_MODE_USXGMII:
> + case PHY_INTERFACE_MODE_RGMII_TXID:
> + case PHY_INTERFACE_MODE_RGMII_RXID:
> + case PHY_INTERFACE_MODE_RGMII_ID:
> + case PHY_INTERFACE_MODE_RGMII:
> + case PHY_INTERFACE_MODE_QSGMII:
> + case PHY_INTERFACE_MODE_SGMII:
> + case PHY_INTERFACE_MODE_GMII:
> + case PHY_INTERFACE_MODE_REVRMII:
> + case PHY_INTERFACE_MODE_RMII:
> + case PHY_INTERFACE_MODE_SMII:
> + case PHY_INTERFACE_MODE_REVMII:
> + case PHY_INTERFACE_MODE_MII:
> + case PHY_INTERFACE_MODE_INTERNAL:
> + return link_speed;
> +
> + case PHY_INTERFACE_MODE_NA:
> + case PHY_INTERFACE_MODE_MAX:
> + break;
> + }
> +
> + return SPEED_UNKNOWN;
This seem error prone when new PHY_INTERFACE_MODES are added. I would
prefer a WARN_ON_ONCE() in the default: so we get to know about such
problems.
I'm also wondering if we need a sanity check here. I've seen quite a
few boards a Fast Ethernet MAC, but a 1G PHY because they are
cheap. In such cases, the MAC is supposed to call phy_set_max_speed()
to indicate it can only do 100Mbs. PHY_INTERFACE_MODE_MII but a
link_speed of 1G is clearly wrong. Are there other cases where we
could have a link speed faster than what the interface mode allows?
Bike shedding a bit, but would it be better to use host_side_speed and
line_side_speed? When you say link_speed, which link are your
referring to? Since we are talking about the different sides of the
PHY doing different speeds, the naming does need to be clear.
Andrew
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 08/47] net: phylink: Support differing link speeds and interface speeds
2022-07-16 20:06 ` Andrew Lunn
@ 2022-07-16 22:29 ` Sean Anderson
2022-07-17 1:26 ` Andrew Lunn
2022-07-18 16:06 ` Russell King (Oracle)
1 sibling, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-16 22:29 UTC (permalink / raw)
To: Andrew Lunn
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
On 7/16/22 4:06 PM, Andrew Lunn wrote:
>> +/**
>> + * phy_interface_speed() - get the speed of a phy interface
>> + * @interface: phy interface mode defined by &typedef phy_interface_t
>> + * @link_speed: the speed of the link
>> + *
>> + * Some phy interfaces modes adapt to the speed of the underlying link (such as
>> + * by duplicating data or changing the clock rate). Others, however, are fixed
>> + * at a particular rate. Determine the speed of a phy interface mode for a
>> + * particular link speed.
>> + *
>> + * Return: The speed of @interface
>> + */
>> +static int phy_interface_speed(phy_interface_t interface, int link_speed)
>> +{
>> + switch (interface) {
>> + case PHY_INTERFACE_MODE_100BASEX:
>> + return SPEED_100;
>> +
>> + case PHY_INTERFACE_MODE_TBI:
>> + case PHY_INTERFACE_MODE_MOCA:
>> + case PHY_INTERFACE_MODE_RTBI:
>> + case PHY_INTERFACE_MODE_1000BASEX:
>> + case PHY_INTERFACE_MODE_1000BASEKX:
>> + case PHY_INTERFACE_MODE_TRGMII:
>> + return SPEED_1000;
>> +
>> + case PHY_INTERFACE_MODE_2500BASEX:
>> + return SPEED_2500;
>> +
>> + case PHY_INTERFACE_MODE_5GBASER:
>> + return SPEED_5000;
>> +
>> + case PHY_INTERFACE_MODE_XGMII:
>> + case PHY_INTERFACE_MODE_RXAUI:
>> + case PHY_INTERFACE_MODE_XAUI:
>> + case PHY_INTERFACE_MODE_10GBASER:
>> + case PHY_INTERFACE_MODE_10GKR:
>> + return SPEED_10000;
>> +
>> + case PHY_INTERFACE_MODE_25GBASER:
>> + return SPEED_25000;
>> +
>> + case PHY_INTERFACE_MODE_XLGMII:
>> + return SPEED_40000;
>> +
>> + case PHY_INTERFACE_MODE_USXGMII:
>> + case PHY_INTERFACE_MODE_RGMII_TXID:
>> + case PHY_INTERFACE_MODE_RGMII_RXID:
>> + case PHY_INTERFACE_MODE_RGMII_ID:
>> + case PHY_INTERFACE_MODE_RGMII:
>> + case PHY_INTERFACE_MODE_QSGMII:
>> + case PHY_INTERFACE_MODE_SGMII:
>> + case PHY_INTERFACE_MODE_GMII:
>> + case PHY_INTERFACE_MODE_REVRMII:
>> + case PHY_INTERFACE_MODE_RMII:
>> + case PHY_INTERFACE_MODE_SMII:
>> + case PHY_INTERFACE_MODE_REVMII:
>> + case PHY_INTERFACE_MODE_MII:
>> + case PHY_INTERFACE_MODE_INTERNAL:
>> + return link_speed;
>> +
>> + case PHY_INTERFACE_MODE_NA:
>> + case PHY_INTERFACE_MODE_MAX:
>> + break;
>> + }
>> +
>> + return SPEED_UNKNOWN;
>
> This seem error prone when new PHY_INTERFACE_MODES are added. I would
> prefer a WARN_ON_ONCE() in the default: so we get to know about such
> problems.
Actually, this is the reason I did not add a default: clause to the
switch (and instead listed everything out). If a new interface mode is
added, there will be a warning (as I discovered when preparing this
patch). I can still add a warning here if you'd like; the return there
should effectively be dead code.
> I'm also wondering if we need a sanity check here. I've seen quite a
> few boards a Fast Ethernet MAC, but a 1G PHY because they are
> cheap. In such cases, the MAC is supposed to call phy_set_max_speed()
> to indicate it can only do 100Mbs. PHY_INTERFACE_MODE_MII but a
> link_speed of 1G is clearly wrong. Are there other cases where we
> could have a link speed faster than what the interface mode allows?
AFAIK the phy must report SPEED_100 here, since many MACs set their
configuration based on the resolved speed. So if a phy reported
SPEED_1000 then the MAC would be confused.
> Bike shedding a bit, but would it be better to use host_side_speed and
> line_side_speed? When you say link_speed, which link are your
> referring to? Since we are talking about the different sides of the
> PHY doing different speeds, the naming does need to be clear.
When I say "link" I mean the thing that the PMD speaks. That is, one of
the ethtool link mode bits. I am thinking of a topology like
MAC (+PCS) <-- phy interface mode (MII) --> phy <-- link mode --> far-end phy
The way it has been done up to now, the phy interface mode and the link
mode have the same speed. For some MIIs, (such as MII or GMII) this is
actually the case, since the data clock changes depending on the data
speed. For others (SGMII/USXGMII) the data is repeated, but the clock
rate stays the same. In particular, the MAC doesn't care what the actual
link speed is, just what configuration it has to use (so it selects the
right clock etc).
The exception to the above is when you have no phy (such as for
1000BASE-X):
MAC (+PCS) <-- MDI --> PMD <-- link mode --> far-end PMD
All of the phy interface modes which can be used this way are
"non-adaptive." That is, in the above case they have a fixed speed.
That said, I would like to keep the "phy interface mode speed" named
"speed" so I don't have to write up a semantic patch to rename it in all
the drivers.
---
One thing I thought about is that it might be better to set this based
on the phy adaptation as well. Something like
static void phylink_set_speed(struct phylink_link_state *state)
{
if (state->rate_adaptation == RATE_ADAPT_NONE) {
state->speed = state->link_speed;
return;
}
switch (state->interface) {
case PHY_INTERFACE_MODE_REVRMII:
case PHY_INTERFACE_MODE_RMII:
case PHY_INTERFACE_MODE_SMII:
case PHY_INTERFACE_MODE_REVMII:
case PHY_INTERFACE_MODE_MII:
case PHY_INTERFACE_MODE_100BASEX:
state->speed = SPEED_100;
return;
case PHY_INTERFACE_MODE_RGMII_TXID:
case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII:
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_SGMII:
case PHY_INTERFACE_MODE_GMII:
case PHY_INTERFACE_MODE_TBI:
case PHY_INTERFACE_MODE_MOCA:
case PHY_INTERFACE_MODE_RTBI:
case PHY_INTERFACE_MODE_1000BASEX:
case PHY_INTERFACE_MODE_1000BASEKX:
case PHY_INTERFACE_MODE_TRGMII:
state->speed = SPEED_1000;
return;
case PHY_INTERFACE_MODE_2500BASEX:
state->speed = SPEED_2500;
return;
case PHY_INTERFACE_MODE_5GBASER:
state->speed = SPEED_5000;
return;
case PHY_INTERFACE_MODE_USXGMII:
case PHY_INTERFACE_MODE_XGMII:
case PHY_INTERFACE_MODE_RXAUI:
case PHY_INTERFACE_MODE_XAUI:
case PHY_INTERFACE_MODE_10GBASER:
case PHY_INTERFACE_MODE_10GKR:
state->speed = SPEED_10000;
return;
case PHY_INTERFACE_MODE_25GBASER:
state->speed = SPEED_25000;
return;
case PHY_INTERFACE_MODE_XLGMII:
state->speed = SPEED_40000;
return;
case PHY_INTERFACE_MODE_INTERNAL:
state->speed = link_speed;
return;
case PHY_INTERFACE_MODE_NA:
case PHY_INTERFACE_MODE_MAX:
state->speed = SPEED_UNKNOWN;
return;
}
WARN();
}
The reason being that this would allow for rate adaptation for "rate
adapting" phy interface modes such as MII. This would be necessary for
things like RATE_ADAPT_CRS modes like 10PASS-TS which always use 100M
MII, but have a variable link speed.
--Sean
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 08/47] net: phylink: Support differing link speeds and interface speeds
2022-07-16 22:29 ` Sean Anderson
@ 2022-07-17 1:26 ` Andrew Lunn
2022-07-18 15:49 ` Sean Anderson
0 siblings, 1 reply; 123+ messages in thread
From: Andrew Lunn @ 2022-07-17 1:26 UTC (permalink / raw)
To: Sean Anderson
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
> > This seem error prone when new PHY_INTERFACE_MODES are added. I would
> > prefer a WARN_ON_ONCE() in the default: so we get to know about such
> > problems.
>
> Actually, this is the reason I did not add a default: clause to the
> switch (and instead listed everything out). If a new interface mode is
> added, there will be a warning (as I discovered when preparing this
> patch).
Ah, the compiler produces a warning. O.K. that is good. Better than an
WARN_ON_ONCE at runtime.
> > Bike shedding a bit, but would it be better to use host_side_speed and
> > line_side_speed? When you say link_speed, which link are your
> > referring to? Since we are talking about the different sides of the
> > PHY doing different speeds, the naming does need to be clear.
> When I say "link" I mean the thing that the PMD speaks. That is, one of
> the ethtool link mode bits. I am thinking of a topology like
>
>
> MAC (+PCS) <-- phy interface mode (MII) --> phy <-- link mode --> far-end phy
>
> The way it has been done up to now, the phy interface mode and the link
> mode have the same speed. For some MIIs, (such as MII or GMII) this is
> actually the case, since the data clock changes depending on the data
> speed. For others (SGMII/USXGMII) the data is repeated, but the clock
> rate stays the same. In particular, the MAC doesn't care what the actual
> link speed is, just what configuration it has to use (so it selects the
> right clock etc).
>
> The exception to the above is when you have no phy (such as for
> 1000BASE-X):
>
> MAC (+PCS) <-- MDI --> PMD <-- link mode --> far-end PMD
>
> All of the phy interface modes which can be used this way are
> "non-adaptive." That is, in the above case they have a fixed speed.
>
> That said, I would like to keep the "phy interface mode speed" named
> "speed" so I don't have to write up a semantic patch to rename it in all
> the drivers.
So you want phydev->speed to be the host side speed. That leaves the
line side speed as a new variable, so it can be called line_side_speed?
I just find link_speed ambiguous, and line_side_speed less so.
The documentation for phydev->speed needs updating to make it clear it
is the host side speed.
Andrew
^ permalink raw reply [flat|nested] 123+ messages in thread
* Re: [PATCH net-next v3 08/47] net: phylink: Support differing link speeds and interface speeds
2022-07-17 1:26 ` Andrew Lunn
@ 2022-07-18 15:49 ` Sean Anderson
0 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-18 15:49 UTC (permalink / raw)
To: Andrew Lunn
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
On 7/16/22 9:26 PM, Andrew Lunn wrote:
>> > This seem error prone when new PHY_INTERFACE_MODES are added. I would
>> > prefer a WARN_ON_ONCE() in the default: so we get to know about such
>> > problems.
>>
>> Actually, this is the reason I did not add a default: clause to the
>> switch (and instead listed everything out). If a new interface mode is
>> added, there will be a warning (as I discovered when preparing this
>> patch).
>
> Ah, the compiler produces a warning. O.K. that is good. Better than an
> WARN_ON_ONCE at runtime.
>
>> > Bike shedding a bit, but would it be better to use host_side_speed and
>> > line_side_speed? When you say link_speed, which link are your
>> > referring to? Since we are talking about the different sides of the
>> > PHY doing different speeds, the naming does need to be clear.
>> When I say "link" I mean the thing that the PMD speaks. That is, one of
>> the ethtool link mode bits. I am thinking of a topology like
>>
>>
>> MAC (+PCS) <-- phy interface mode (MII) --> phy <-- link mode --> far-end phy
>>
>> The way it has been done up to now, the phy interface mode and the link
>> mode have the same speed. For some MIIs, (such as MII or GMII) this is
>> actually the case, since the data clock changes depending on the data
>> speed. For others (SGMII/USXGMII) the data is repeated, but the clock
>> rate stays the same. In particular, the MAC doesn't care what the actual
>> link speed is, just what configuration it has to use (so it selects the
>> right clock etc).
>>
>> The exception to the above is when you have no phy (such as for
>> 1000BASE-X):
>>
>> MAC (+PCS) <-- MDI --> PMD <-- link mode --> far-end PMD
>>
>> All of the phy interface modes which can be used this way are
>> "non-adaptive." That is, in the above case they have a fixed speed.
>>
>> That said, I would like to keep the "phy interface mode speed" named
>> "speed" so I don't have to write up a semantic patch to rename it in all
>> the drivers.
>
> So you want phydev->speed to be the host side speed. That leaves the
> line side speed as a new variable, so it can be called line_side_speed?
>
> I just find link_speed ambiguous, and line_side_speed less so.
I would rather use something with "link" to match up with
ETHTOOL_LINK_MODE_*. Ideally "speed" would be something like
"interface_speed" to match up with PHY_INTERFACE_MODE_*.
> The documentation for phydev->speed needs updating to make it clear it
> is the host side speed.
OK
--Sean
^ permalink raw reply [flat|nested] 123+ messages in thread
* Re: [PATCH net-next v3 08/47] net: phylink: Support differing link speeds and interface speeds
2022-07-16 20:06 ` Andrew Lunn
2022-07-16 22:29 ` Sean Anderson
@ 2022-07-18 16:06 ` Russell King (Oracle)
2022-07-18 16:38 ` Sean Anderson
1 sibling, 1 reply; 123+ messages in thread
From: Russell King (Oracle) @ 2022-07-18 16:06 UTC (permalink / raw)
To: Andrew Lunn
Cc: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur,
netdev, Paolo Abeni, Eric Dumazet, linux-arm-kernel,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
On Sat, Jul 16, 2022 at 10:06:01PM +0200, Andrew Lunn wrote:
> This seem error prone when new PHY_INTERFACE_MODES are added. I would
> prefer a WARN_ON_ONCE() in the default: so we get to know about such
> problems.
>
> I'm also wondering if we need a sanity check here. I've seen quite a
> few boards a Fast Ethernet MAC, but a 1G PHY because they are
> cheap. In such cases, the MAC is supposed to call phy_set_max_speed()
> to indicate it can only do 100Mbs. PHY_INTERFACE_MODE_MII but a
> link_speed of 1G is clearly wrong. Are there other cases where we
> could have a link speed faster than what the interface mode allows?
Currently, phylink will deal with that situation - the MAC will report
that it only supports 10/100, and when the PHY is brought up, the
supported/advertisement masks will be restricted to those speeds.
> Bike shedding a bit, but would it be better to use host_side_speed and
> line_side_speed? When you say link_speed, which link are your
> referring to? Since we are talking about the different sides of the
> PHY doing different speeds, the naming does need to be clear.
Yes, we definitely need that clarification.
I am rather worried that we have drivers using ->speed today in their
mac_config and we're redefining what that means in this patch. Also,
the value that we pass to the *_link_up() calls appears to be the
phy <-> (pcs|mac) speed not the media speed. It's also ->speed and
->duplex that we report to the user in the "Link is Up" message,
which will be confusing if it always says 10G despite the media link
being e.g. 100M.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
^ permalink raw reply [flat|nested] 123+ messages in thread
* Re: [PATCH net-next v3 08/47] net: phylink: Support differing link speeds and interface speeds
2022-07-18 16:06 ` Russell King (Oracle)
@ 2022-07-18 16:38 ` Sean Anderson
2022-07-18 17:28 ` Andrew Lunn
0 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-18 16:38 UTC (permalink / raw)
To: Russell King (Oracle), Andrew Lunn
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, linux-kernel,
Alexandru Marginean, Heiner Kallweit, Vladimir Oltean
On 7/18/22 12:06 PM, Russell King (Oracle) wrote:
> On Sat, Jul 16, 2022 at 10:06:01PM +0200, Andrew Lunn wrote:
>> This seem error prone when new PHY_INTERFACE_MODES are added. I would
>> prefer a WARN_ON_ONCE() in the default: so we get to know about such
>> problems.
>>
>> I'm also wondering if we need a sanity check here. I've seen quite a
>> few boards a Fast Ethernet MAC, but a 1G PHY because they are
>> cheap. In such cases, the MAC is supposed to call phy_set_max_speed()
>> to indicate it can only do 100Mbs. PHY_INTERFACE_MODE_MII but a
>> link_speed of 1G is clearly wrong. Are there other cases where we
>> could have a link speed faster than what the interface mode allows?
>
> Currently, phylink will deal with that situation - the MAC will report
> that it only supports 10/100, and when the PHY is brought up, the
> supported/advertisement masks will be restricted to those speeds.
>
>> Bike shedding a bit, but would it be better to use host_side_speed and
>> line_side_speed? When you say link_speed, which link are your
>> referring to? Since we are talking about the different sides of the
>> PHY doing different speeds, the naming does need to be clear.
>
> Yes, we definitely need that clarification.
>
> I am rather worried that we have drivers using ->speed today in their
> mac_config and we're redefining what that means in this patch.
Well, kind of. Previously, interface speed was defined to be link speed,
and both were just "speed". The MAC driver doesn't really care what the
link speed is if there is a phy, just how fast the phy interface mode
speed is.
> Also,
> the value that we pass to the *_link_up() calls appears to be the
> phy <-> (pcs|mac) speed not the media speed.
This is by design, to avoid breaking existing drivers.
> It's also ->speed and
> ->duplex that we report to the user in the "Link is Up" message,
> which will be confusing if it always says 10G despite the media link
> being e.g. 100M.
>
Ah, I should probably change that message as well. The ethtool stuff
is already updated by this patch to report the link speed.
--Sean
^ permalink raw reply [flat|nested] 123+ messages in thread
* Re: [PATCH net-next v3 08/47] net: phylink: Support differing link speeds and interface speeds
2022-07-18 16:38 ` Sean Anderson
@ 2022-07-18 17:28 ` Andrew Lunn
2022-07-18 17:40 ` Sean Anderson
2022-07-18 18:01 ` Russell King (Oracle)
0 siblings, 2 replies; 123+ messages in thread
From: Andrew Lunn @ 2022-07-18 17:28 UTC (permalink / raw)
To: Sean Anderson
Cc: Russell King (Oracle),
David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, linux-kernel,
Alexandru Marginean, Heiner Kallweit, Vladimir Oltean
> > I am rather worried that we have drivers using ->speed today in their
> > mac_config and we're redefining what that means in this patch.
>
> Well, kind of. Previously, interface speed was defined to be link speed,
> and both were just "speed". The MAC driver doesn't really care what the
> link speed is if there is a phy, just how fast the phy interface mode
> speed is.
I'm not sure that is true. At least for SGMII, the MAC is passed the
line side speed, which can be 10, 100, or 1G. The PHY interface mode
speed is fixed at 1G, since it is SGMII, but the MAC needs to know if
it needs to repeat symbols because the line side speed is lower than
the host side speed.
Andrew
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 08/47] net: phylink: Support differing link speeds and interface speeds
2022-07-18 17:28 ` Andrew Lunn
@ 2022-07-18 17:40 ` Sean Anderson
2022-07-18 18:01 ` Russell King (Oracle)
1 sibling, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-18 17:40 UTC (permalink / raw)
To: Andrew Lunn
Cc: Russell King (Oracle),
David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, linux-kernel,
Alexandru Marginean, Heiner Kallweit, Vladimir Oltean
On 7/18/22 1:28 PM, Andrew Lunn wrote:
>> > I am rather worried that we have drivers using ->speed today in their
>> > mac_config and we're redefining what that means in this patch.
>>
>> Well, kind of. Previously, interface speed was defined to be link speed,
>> and both were just "speed". The MAC driver doesn't really care what the
>> link speed is if there is a phy, just how fast the phy interface mode
>> speed is.
>
> I'm not sure that is true. At least for SGMII, the MAC is passed the
> line side speed, which can be 10, 100, or 1G. The PHY interface mode
> speed is fixed at 1G, since it is SGMII, but the MAC needs to know if
> it needs to repeat symbols because the line side speed is lower than
> the host side speed.
Right. In this case the phy interface speed is changing, so the MAC
needs to know about it. I suppose a more precise definition would be
something like
> The data rate of the media-independent interface between the MAC and
> the phy, without taking into account protocol overhead or flow control,
> but including encoding overhead.
as opposed to the link speed which is
> The data rate of the medium between the local device and the link
> partner, without ...
--Sean
^ permalink raw reply [flat|nested] 123+ messages in thread
* Re: [PATCH net-next v3 08/47] net: phylink: Support differing link speeds and interface speeds
2022-07-18 17:28 ` Andrew Lunn
2022-07-18 17:40 ` Sean Anderson
@ 2022-07-18 18:01 ` Russell King (Oracle)
1 sibling, 0 replies; 123+ messages in thread
From: Russell King (Oracle) @ 2022-07-18 18:01 UTC (permalink / raw)
To: Andrew Lunn
Cc: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur,
netdev, Paolo Abeni, Eric Dumazet, linux-arm-kernel,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
On Mon, Jul 18, 2022 at 07:28:58PM +0200, Andrew Lunn wrote:
> > > I am rather worried that we have drivers using ->speed today in their
> > > mac_config and we're redefining what that means in this patch.
> >
> > Well, kind of. Previously, interface speed was defined to be link speed,
> > and both were just "speed". The MAC driver doesn't really care what the
> > link speed is if there is a phy, just how fast the phy interface mode
> > speed is.
>
> I'm not sure that is true. At least for SGMII, the MAC is passed the
> line side speed, which can be 10, 100, or 1G. The PHY interface mode
> speed is fixed at 1G, since it is SGMII, but the MAC needs to know if
> it needs to repeat symbols because the line side speed is lower than
> the host side speed.
... and passing the SGMII link speed (1G) will break a lot of stuff
where the MAC/PCS may need to know the media speed to do the right
number of symbol replication.
So I don't think we can get away with just saying ->speed is the link
speed which will prevent drivers breaking. I don't think it's that
simple. Like everything with phylink, all the drivers need to be looked
at and tweaked with every damn change, which makes phylink development
painfully slow.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 09/47] net: phylink: Adjust advertisement based on rate adaptation
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (7 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 08/47] net: phylink: Support differing link speeds and interface speeds Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 10/47] net: phylink: Adjust link settings " Sean Anderson
` (38 subsequent siblings)
47 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Alexandru Marginean, Andrew Lunn,
Heiner Kallweit, Vladimir Oltean
This adds support for adjusting the advertisement for pause-based rate
adaptation. This may result in a lossy link, since the final link settings
are not adjusted. Asymmetric pause support is necessary. It would be
possible for a MAC supporting only symmetric pause to use pause-based rate
adaptation, but only if pause reception was enabled as well.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
Changes in v3:
- New
drivers/net/phy/phylink.c | 41 ++++++++++++++++++++++++++++++++++++---
include/linux/phylink.h | 6 +++++-
2 files changed, 43 insertions(+), 4 deletions(-)
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index a952cdc7c96e..7fa21941878e 100644
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -370,13 +370,15 @@ static int phy_interface_speed(phy_interface_t interface, int link_speed)
* @linkmodes: ethtool linkmode mask (must be already initialised)
* @interface: phy interface mode defined by &typedef phy_interface_t
* @mac_capabilities: bitmask of MAC capabilities
+ * @rate_adaptation: type of rate adaptation being performed
*
* Set all possible pause, speed and duplex linkmodes in @linkmodes that
* are supported by the @interface mode and @mac_capabilities. @linkmodes
* must have been initialised previously.
*/
void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface,
- unsigned long mac_capabilities)
+ unsigned long mac_capabilities,
+ enum rate_adaptation rate_adaptation)
{
unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
@@ -451,7 +453,38 @@ void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface,
break;
}
- phylink_caps_to_linkmodes(linkmodes, caps & mac_capabilities);
+ caps = caps & mac_capabilities;
+
+ switch (rate_adaptation) {
+ case RATE_ADAPT_NONE:
+ break;
+ case RATE_ADAPT_PAUSE: {
+ unsigned long adapted_caps;
+
+ /* The mac must support pause for this */
+ if (!(caps & MAC_ASYM_PAUSE))
+ goto open_loop;
+
+ /* Can't adapt if there's nothing slower */
+ if (__fls(caps) <= __fls(MAC_10))
+ break;
+
+ adapted_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
+ /* We can't use pause frames in half-duplex mode */
+ adapted_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD);
+ caps |= adapted_caps;
+ break;
+ }
+ case RATE_ADAPT_CRS:
+ /* TODO */
+ break;
+ case RATE_ADAPT_OPEN_LOOP:
+open_loop:
+ /* TODO */
+ break;
+ }
+
+ phylink_caps_to_linkmodes(linkmodes, caps);
}
EXPORT_SYMBOL_GPL(phylink_get_linkmodes);
@@ -473,7 +506,8 @@ void phylink_generic_validate(struct phylink_config *config,
phylink_set_port_modes(mask);
phylink_set(mask, Autoneg);
- phylink_get_linkmodes(mask, state->interface, config->mac_capabilities);
+ phylink_get_linkmodes(mask, state->interface, config->mac_capabilities,
+ state->rate_adaptation);
linkmode_and(supported, supported, mask);
linkmode_and(state->advertising, state->advertising, mask);
@@ -1462,6 +1496,7 @@ static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
config.interface = PHY_INTERFACE_MODE_NA;
else
config.interface = interface;
+ config.rate_adaptation = phy_get_rate_adaptation(phy, config.interface);
ret = phylink_validate(pl, supported, &config);
if (ret) {
diff --git a/include/linux/phylink.h b/include/linux/phylink.h
index 30e3fbe19fb4..f990f8eab655 100644
--- a/include/linux/phylink.h
+++ b/include/linux/phylink.h
@@ -65,6 +65,8 @@ static inline bool phylink_autoneg_inband(unsigned int mode)
* @link: true if the link is up.
* @an_enabled: true if autonegotiation is enabled/desired.
* @an_complete: true if autonegotiation has completed.
+ * @rate_adaptation: method of throttling @interface_speed to @speed, one of
+ * RATE_ADAPT_* constants.
*/
struct phylink_link_state {
__ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
@@ -74,6 +76,7 @@ struct phylink_link_state {
int link_speed;
int duplex;
int pause;
+ enum rate_adaptation rate_adaptation;
unsigned int link:1;
unsigned int an_enabled:1;
unsigned int an_complete:1;
@@ -523,7 +526,8 @@ void pcs_link_up(struct phylink_pcs *pcs, unsigned int mode,
#endif
void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface,
- unsigned long mac_capabilities);
+ unsigned long mac_capabilities,
+ enum rate_adaptation rate_adaptation);
void phylink_generic_validate(struct phylink_config *config,
unsigned long *supported,
struct phylink_link_state *state);
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* [PATCH net-next v3 10/47] net: phylink: Adjust link settings based on rate adaptation
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (8 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 09/47] net: phylink: Adjust advertisement based on rate adaptation Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-16 20:17 ` Andrew Lunn
2022-07-18 16:12 ` Russell King (Oracle)
2022-07-15 21:59 ` [PATCH net-next v3 11/47] [RFC] net: phylink: Add support for CRS-based " Sean Anderson
` (37 subsequent siblings)
47 siblings, 2 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Alexandru Marginean, Andrew Lunn,
Heiner Kallweit, Vladimir Oltean
If the phy is configured to use pause-based rate adaptation, ensure that
the link is full duplex with pause frame reception enabled. Note that these
settings may be overridden by ethtool.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
Changes in v3:
- New
drivers/net/phy/phylink.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index 7fa21941878e..7f65413aa778 100644
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -1445,6 +1445,10 @@ static void phylink_phy_change(struct phy_device *phydev, bool up)
pl->phy_state.speed = phy_interface_speed(phydev->interface,
phydev->speed);
pl->phy_state.duplex = phydev->duplex;
+ if (phydev->rate_adaptation == RATE_ADAPT_PAUSE) {
+ pl->phy_state.duplex = DUPLEX_FULL;
+ rx_pause = true;
+ }
pl->phy_state.pause = MLO_PAUSE_NONE;
if (tx_pause)
pl->phy_state.pause |= MLO_PAUSE_TX;
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 10/47] net: phylink: Adjust link settings based on rate adaptation
2022-07-15 21:59 ` [PATCH net-next v3 10/47] net: phylink: Adjust link settings " Sean Anderson
@ 2022-07-16 20:17 ` Andrew Lunn
2022-07-16 22:37 ` Sean Anderson
2022-07-18 16:12 ` Russell King (Oracle)
1 sibling, 1 reply; 123+ messages in thread
From: Andrew Lunn @ 2022-07-16 20:17 UTC (permalink / raw)
To: Sean Anderson
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
On Fri, Jul 15, 2022 at 05:59:17PM -0400, Sean Anderson wrote:
> If the phy is configured to use pause-based rate adaptation, ensure that
> the link is full duplex with pause frame reception enabled. Note that these
> settings may be overridden by ethtool.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> ---
>
> Changes in v3:
> - New
>
> drivers/net/phy/phylink.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
> index 7fa21941878e..7f65413aa778 100644
> --- a/drivers/net/phy/phylink.c
> +++ b/drivers/net/phy/phylink.c
> @@ -1445,6 +1445,10 @@ static void phylink_phy_change(struct phy_device *phydev, bool up)
> pl->phy_state.speed = phy_interface_speed(phydev->interface,
> phydev->speed);
> pl->phy_state.duplex = phydev->duplex;
> + if (phydev->rate_adaptation == RATE_ADAPT_PAUSE) {
> + pl->phy_state.duplex = DUPLEX_FULL;
> + rx_pause = true;
> + }
I would not do this. If the requirements for rate adaptation are not
fulfilled, you should turn off rate adaptation.
A MAC which knows rate adaptation is going on can help out, by not
advertising 10Half, 100Half etc. Autoneg will then fail for modes
where rate adaptation does not work.
The MAC should also be declaring what sort of pause it supports, so
disable rate adaptation if it does not have async pause.
Andrew
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 10/47] net: phylink: Adjust link settings based on rate adaptation
2022-07-16 20:17 ` Andrew Lunn
@ 2022-07-16 22:37 ` Sean Anderson
2022-07-17 1:39 ` Andrew Lunn
2022-07-18 16:14 ` Russell King (Oracle)
0 siblings, 2 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-16 22:37 UTC (permalink / raw)
To: Andrew Lunn
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
On 7/16/22 4:17 PM, Andrew Lunn wrote:
> On Fri, Jul 15, 2022 at 05:59:17PM -0400, Sean Anderson wrote:
>> If the phy is configured to use pause-based rate adaptation, ensure that
>> the link is full duplex with pause frame reception enabled. Note that these
>> settings may be overridden by ethtool.
>>
>> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
>> ---
>>
>> Changes in v3:
>> - New
>>
>> drivers/net/phy/phylink.c | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
>> index 7fa21941878e..7f65413aa778 100644
>> --- a/drivers/net/phy/phylink.c
>> +++ b/drivers/net/phy/phylink.c
>> @@ -1445,6 +1445,10 @@ static void phylink_phy_change(struct phy_device *phydev, bool up)
>> pl->phy_state.speed = phy_interface_speed(phydev->interface,
>> phydev->speed);
>> pl->phy_state.duplex = phydev->duplex;
>> + if (phydev->rate_adaptation == RATE_ADAPT_PAUSE) {
>> + pl->phy_state.duplex = DUPLEX_FULL;
>> + rx_pause = true;
>> + }
>
> I would not do this. If the requirements for rate adaptation are not
> fulfilled, you should turn off rate adaptation.
>
> A MAC which knows rate adaptation is going on can help out, by not
> advertising 10Half, 100Half etc. Autoneg will then fail for modes
> where rate adaptation does not work.
OK, so maybe it is better to phylink_warn here. Something along the
lines of "phy using pause-based rate adaptation, but duplex is %s".
> The MAC should also be declaring what sort of pause it supports, so
> disable rate adaptation if it does not have async pause.
That's what we do in the previous patch.
The problem is that rx_pause and tx_pause are resolved based on our
advertisement and the link partner's advertisement. However, the link
partner may not support pause frames at all. In that case, we will get
rx_pause and tx_pause as false. However, we still want to enable rx_pause,
because we know that the phy will be emitting pause frames. And of course
the user can always force disable pause frames anyway through ethtool.
--Sean
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 10/47] net: phylink: Adjust link settings based on rate adaptation
2022-07-16 22:37 ` Sean Anderson
@ 2022-07-17 1:39 ` Andrew Lunn
2022-07-18 16:22 ` Russell King (Oracle)
2022-07-18 16:29 ` Sean Anderson
2022-07-18 16:14 ` Russell King (Oracle)
1 sibling, 2 replies; 123+ messages in thread
From: Andrew Lunn @ 2022-07-17 1:39 UTC (permalink / raw)
To: Sean Anderson
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
> > I would not do this. If the requirements for rate adaptation are not
> > fulfilled, you should turn off rate adaptation.
> >
> > A MAC which knows rate adaptation is going on can help out, by not
> > advertising 10Half, 100Half etc. Autoneg will then fail for modes
> > where rate adaptation does not work.
>
> OK, so maybe it is better to phylink_warn here. Something along the
> lines of "phy using pause-based rate adaptation, but duplex is %s".
You say 1/2 duplex simply does not work with rate adaptation. So i
would actually return -EINVAL at the point the MAC indicates what
modes it supports if there is a 1/2 duplex mode in the list.
>
> > The MAC should also be declaring what sort of pause it supports, so
> > disable rate adaptation if it does not have async pause.
>
> That's what we do in the previous patch.
>
> The problem is that rx_pause and tx_pause are resolved based on our
> advertisement and the link partner's advertisement. However, the link
> partner may not support pause frames at all. In that case, we will get
> rx_pause and tx_pause as false. However, we still want to enable rx_pause,
> because we know that the phy will be emitting pause frames. And of course
> the user can always force disable pause frames anyway through ethtool.
Right, so we need a table somewhere in the documentation listing the
different combinations and what should happen.
If the MAC does not support rx_pause, rate adaptation is turned off.
If the negotiation results in no rx_pause, force it on anyway with
Pause based adaptation. If ethtool turns pause off, turn off rate
adaptation.
Does 802.3 say anything about this?
We might also want to add an additional state to the ethtool get for
pause, to indicate rx_pause is enabled because of rate adaptation, not
because of autoneg.
Andrew
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 10/47] net: phylink: Adjust link settings based on rate adaptation
2022-07-17 1:39 ` Andrew Lunn
@ 2022-07-18 16:22 ` Russell King (Oracle)
2022-07-18 16:29 ` Sean Anderson
1 sibling, 0 replies; 123+ messages in thread
From: Russell King (Oracle) @ 2022-07-18 16:22 UTC (permalink / raw)
To: Andrew Lunn
Cc: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur,
netdev, Paolo Abeni, Eric Dumazet, linux-arm-kernel,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
On Sun, Jul 17, 2022 at 03:39:39AM +0200, Andrew Lunn wrote:
> > > I would not do this. If the requirements for rate adaptation are not
> > > fulfilled, you should turn off rate adaptation.
> > >
> > > A MAC which knows rate adaptation is going on can help out, by not
> > > advertising 10Half, 100Half etc. Autoneg will then fail for modes
> > > where rate adaptation does not work.
> >
> > OK, so maybe it is better to phylink_warn here. Something along the
> > lines of "phy using pause-based rate adaptation, but duplex is %s".
>
> You say 1/2 duplex simply does not work with rate adaptation. So i
> would actually return -EINVAL at the point the MAC indicates what
> modes it supports if there is a 1/2 duplex mode in the list.
If we have a PHY that supports rate adaption using pause frames, which
implies a full duplex link between the PHY and MAC, one would hope that
someone isn't silly enough to integrate it with a half-duplex only MAC.
This ought to be handled while bringing up the PHY. If the PHY uses
pause frames but the MAC doesn't support full-duplex at the PHY
interface speed, then we should not allow the PHY to do rate adaption.
The easiest way to achieve that is to not allow the PHY to advertise
anything except the PHY interface speed on its media. If that means
there's nothing to advertise, then we fail.
> Right, so we need a table somewhere in the documentation listing the
> different combinations and what should happen.
>
> If the MAC does not support rx_pause, rate adaptation is turned off.
> If the negotiation results in no rx_pause, force it on anyway with
> Pause based adaptation. If ethtool turns pause off, turn off rate
> adaptation.
That last bit is really awkward - what if the link partner is doing 100M
on the media because that's the fastest it's capable of, but our local
PHY is doing rate adaption to 1G, and we turn pause off, causing rate
adaption in the PHY to be turned off. We need to reconfigure the
advertisement to drop anything except the 1G speed and renegotiate the
link, which will cause the link to go down.
That's going to be really odd behaviour for a user to get their head
around.
> Does 802.3 say anything about this?
I think rate adaption is out of scope of 802.3.
> We might also want to add an additional state to the ethtool get for
> pause, to indicate rx_pause is enabled because of rate adaptation, not
> because of autoneg.
That may well be a much better approach; it lets the user see what is
going on and it becomes more understandable to the user IMHO.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
^ permalink raw reply [flat|nested] 123+ messages in thread
* Re: [PATCH net-next v3 10/47] net: phylink: Adjust link settings based on rate adaptation
2022-07-17 1:39 ` Andrew Lunn
2022-07-18 16:22 ` Russell King (Oracle)
@ 2022-07-18 16:29 ` Sean Anderson
1 sibling, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-18 16:29 UTC (permalink / raw)
To: Andrew Lunn
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
On 7/16/22 9:39 PM, Andrew Lunn wrote:
>> > I would not do this. If the requirements for rate adaptation are not
>> > fulfilled, you should turn off rate adaptation.
>> >
>> > A MAC which knows rate adaptation is going on can help out, by not
>> > advertising 10Half, 100Half etc. Autoneg will then fail for modes
>> > where rate adaptation does not work.
>>
>> OK, so maybe it is better to phylink_warn here. Something along the
>> lines of "phy using pause-based rate adaptation, but duplex is %s".
>
> You say 1/2 duplex simply does not work with rate adaptation.
It doesn't work with pause-based rate adaptation. This is because we can't
enable pause frames in half duplex (see phy_get_pause). I don't know if this
is a technical limitation (or something else), but presumably there exists a
MAC out there which can't enable pause frames unless it's in full-duplex mode.
> So i
> would actually return -EINVAL at the point the MAC indicates what
> modes it supports if there is a 1/2 duplex mode in the list.
Well, half duplex is still valid if we are at the full line rate. This is more
of a sanity check on what we get back from the phy. That is, we should never
get anything but full duplex if the phy indicates that pause-based rate
adaptation is being performed. So maybe this should live in phy_read_status?
And of course, CRS-based adaptation requires half-duplex (or a MAC which
respects CRS in full-duplex mode).
>>
>> > The MAC should also be declaring what sort of pause it supports, so
>> > disable rate adaptation if it does not have async pause.
>>
>> That's what we do in the previous patch.
>>
>> The problem is that rx_pause and tx_pause are resolved based on our
>> advertisement and the link partner's advertisement. However, the link
>> partner may not support pause frames at all. In that case, we will get
>> rx_pause and tx_pause as false. However, we still want to enable rx_pause,
>> because we know that the phy will be emitting pause frames. And of course
>> the user can always force disable pause frames anyway through ethtool.
>
> Right, so we need a table somewhere in the documentation listing the
> different combinations and what should happen.
OK, so first here's table 28B-3 (e.g. linkmode_resolve_pause):
Local device Link partner Local resolution Partner resolution
============= ============= ================ ==================
PAUSE ASM_DIR PAUSE ASM_DIR Transmit Receive Transmit Receive
===== ======= ===== ======= ======== ======= ======== =======
0 0 X X N N N N
0 1 0 X N N N N
0 1 1 0 N N N N
0 1 1 1 Y N N Y
1 0 0 X N N N N
1 X 1 X Y Y Y Y
1 1 0 0 N N N N
1 1 0 1 N Y Y N
And now here's the same table, but assuming that we have a local phy
performing rate adaptation
Local device Link partner Local resolution Partner resolution
============= ============= ================ ==================
PAUSE ASM_DIR PAUSE ASM_DIR Transmit Receive Transmit Receive
===== ======= ===== ======= ======== ======= ======== =======
0 0 X X N N N N # Broken
0 1 0 X N N N N # Broken
0 1 1 0 N N N N # Broken
0 1 1 1 Y N N Y # Broken
1 0 0 X ? ? N N # Semi-broken
1 X 1 X Y Y Y Y
1 1 0 0 N Y N N
1 1 0 1 N Y Y N
The rows marked as "Broken" don't have local receive pause enabled.
These should never occur, since we can detect that the local MAC doesn't
support pause reception and disable advertisement of pause-based
rate-adapted modes.
On the row marked as "Semi-broken", the local MAC supports only
symmetric pause, and the link partner doesn't support pause. We're not
supposed to send pause frames, so we disable pause, but this breaks rate
adaptation. In this case, we could renegotiate with rate-adapted modes
disabled. Alternatively, we could just decline to advertise rate-adapted
modes for symmetric-pause MACs. This avoids the semi-broken line above,
but also prevents the line below from using rate adaptation.
> If the MAC does not support rx_pause, rate adaptation is turned off.
>> If the negotiation results in no rx_pause, force it on anyway with
> Pause based adaptation. If ethtool turns pause off, turn off rate
> adaptation.
>
> Does 802.3 say anything about this?
Only IPG-based and CRS-based rate adaptation are defined in 802.3.
> We might also want to add an additional state to the ethtool get for
> pause, to indicate rx_pause is enabled because of rate adaptation, not
> because of autoneg.
Probably a good idea.
--Sean
^ permalink raw reply [flat|nested] 123+ messages in thread
* Re: [PATCH net-next v3 10/47] net: phylink: Adjust link settings based on rate adaptation
2022-07-16 22:37 ` Sean Anderson
2022-07-17 1:39 ` Andrew Lunn
@ 2022-07-18 16:14 ` Russell King (Oracle)
1 sibling, 0 replies; 123+ messages in thread
From: Russell King (Oracle) @ 2022-07-18 16:14 UTC (permalink / raw)
To: Sean Anderson
Cc: Andrew Lunn, David S . Miller, Jakub Kicinski, Madalin Bucur,
netdev, Paolo Abeni, Eric Dumazet, linux-arm-kernel,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
On Sat, Jul 16, 2022 at 06:37:22PM -0400, Sean Anderson wrote:
> On 7/16/22 4:17 PM, Andrew Lunn wrote:
> > On Fri, Jul 15, 2022 at 05:59:17PM -0400, Sean Anderson wrote:
> > > If the phy is configured to use pause-based rate adaptation, ensure that
> > > the link is full duplex with pause frame reception enabled. Note that these
> > > settings may be overridden by ethtool.
> > >
> > > Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> > > ---
> > >
> > > Changes in v3:
> > > - New
> > >
> > > drivers/net/phy/phylink.c | 4 ++++
> > > 1 file changed, 4 insertions(+)
> > >
> > > diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
> > > index 7fa21941878e..7f65413aa778 100644
> > > --- a/drivers/net/phy/phylink.c
> > > +++ b/drivers/net/phy/phylink.c
> > > @@ -1445,6 +1445,10 @@ static void phylink_phy_change(struct phy_device *phydev, bool up)
> > > pl->phy_state.speed = phy_interface_speed(phydev->interface,
> > > phydev->speed);
> > > pl->phy_state.duplex = phydev->duplex;
> > > + if (phydev->rate_adaptation == RATE_ADAPT_PAUSE) {
> > > + pl->phy_state.duplex = DUPLEX_FULL;
> > > + rx_pause = true;
> > > + }
> >
> > I would not do this. If the requirements for rate adaptation are not
> > fulfilled, you should turn off rate adaptation.
> >
> > A MAC which knows rate adaptation is going on can help out, by not
> > advertising 10Half, 100Half etc. Autoneg will then fail for modes
> > where rate adaptation does not work.
>
> OK, so maybe it is better to phylink_warn here. Something along the
> lines of "phy using pause-based rate adaptation, but duplex is %s".
>
> > The MAC should also be declaring what sort of pause it supports, so
> > disable rate adaptation if it does not have async pause.
>
> That's what we do in the previous patch.
>
> The problem is that rx_pause and tx_pause are resolved based on our
> advertisement and the link partner's advertisement. However, the link
> partner may not support pause frames at all. In that case, we will get
> rx_pause and tx_pause as false. However, we still want to enable rx_pause,
> because we know that the phy will be emitting pause frames. And of course
> the user can always force disable pause frames anyway through ethtool.
If you want the MAC to enable rx_pause, that ought to be handled
separately in the mac_link_up() method, IMHO.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
^ permalink raw reply [flat|nested] 123+ messages in thread
* Re: [PATCH net-next v3 10/47] net: phylink: Adjust link settings based on rate adaptation
2022-07-15 21:59 ` [PATCH net-next v3 10/47] net: phylink: Adjust link settings " Sean Anderson
2022-07-16 20:17 ` Andrew Lunn
@ 2022-07-18 16:12 ` Russell King (Oracle)
2022-07-18 16:45 ` Sean Anderson
1 sibling, 1 reply; 123+ messages in thread
From: Russell King (Oracle) @ 2022-07-18 16:12 UTC (permalink / raw)
To: Sean Anderson
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, linux-kernel,
Alexandru Marginean, Andrew Lunn, Heiner Kallweit,
Vladimir Oltean
On Fri, Jul 15, 2022 at 05:59:17PM -0400, Sean Anderson wrote:
> If the phy is configured to use pause-based rate adaptation, ensure that
> the link is full duplex with pause frame reception enabled. Note that these
> settings may be overridden by ethtool.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> ---
>
> Changes in v3:
> - New
>
> drivers/net/phy/phylink.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
> index 7fa21941878e..7f65413aa778 100644
> --- a/drivers/net/phy/phylink.c
> +++ b/drivers/net/phy/phylink.c
> @@ -1445,6 +1445,10 @@ static void phylink_phy_change(struct phy_device *phydev, bool up)
> pl->phy_state.speed = phy_interface_speed(phydev->interface,
> phydev->speed);
> pl->phy_state.duplex = phydev->duplex;
> + if (phydev->rate_adaptation == RATE_ADAPT_PAUSE) {
> + pl->phy_state.duplex = DUPLEX_FULL;
> + rx_pause = true;
> + }
I really don't like this - as I've pointed out in my previous email, the
reporting in the kernel message log for "Link is Up" will be incorrect
if you force the phy_state here like this. If the media side link has
been negotiated to be half duplex, we should state that in the "Link is
Up" message.
It's only the PCS and MAC that care about this, so this should be dealt
with when calling into the PCS and MAC's link_up() method.
The problem we have are the legacy drivers (of which mv88e6xxx and
mtk_eth_soc are the only two I'm aware of) that make use of the
state->speed and state->duplex when configuring stuff. We could've been
down to just mv88e6xxx had the DSA and mv88e6xxx patches been sorted
out, but sadly that's now going to be some time off due to reviewer
failure.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 10/47] net: phylink: Adjust link settings based on rate adaptation
2022-07-18 16:12 ` Russell King (Oracle)
@ 2022-07-18 16:45 ` Sean Anderson
2022-07-18 17:58 ` Russell King (Oracle)
0 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-18 16:45 UTC (permalink / raw)
To: Russell King (Oracle)
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, linux-kernel,
Alexandru Marginean, Andrew Lunn, Heiner Kallweit,
Vladimir Oltean
On 7/18/22 12:12 PM, Russell King (Oracle) wrote:
> On Fri, Jul 15, 2022 at 05:59:17PM -0400, Sean Anderson wrote:
>> If the phy is configured to use pause-based rate adaptation, ensure that
>> the link is full duplex with pause frame reception enabled. Note that these
>> settings may be overridden by ethtool.
>>
>> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
>> ---
>>
>> Changes in v3:
>> - New
>>
>> drivers/net/phy/phylink.c | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
>> index 7fa21941878e..7f65413aa778 100644
>> --- a/drivers/net/phy/phylink.c
>> +++ b/drivers/net/phy/phylink.c
>> @@ -1445,6 +1445,10 @@ static void phylink_phy_change(struct phy_device *phydev, bool up)
>> pl->phy_state.speed = phy_interface_speed(phydev->interface,
>> phydev->speed);
>> pl->phy_state.duplex = phydev->duplex;
>> + if (phydev->rate_adaptation == RATE_ADAPT_PAUSE) {
>> + pl->phy_state.duplex = DUPLEX_FULL;
Just form context, as discussed with Andrew, this should never change
anything. That is, it could be replaced with
WARN_ON_ONCE(pl->phy_state.duplex != DUPLEX_FULL);
Since the phy should never report that it is using rate_adaptation
unless it is using full duplex.
>> + rx_pause = true;
>> + }
>
> I really don't like this - as I've pointed out in my previous email, the
> reporting in the kernel message log for "Link is Up" will be incorrect
> if you force the phy_state here like this. If the media side link has
> been negotiated to be half duplex, we should state that in the "Link is
> Up" message.
So I guess the question here is whether there are phys which do duplex
adaptation. There definitely are phys which support a half-duplex
interface mode and a full duplex link mode (such as discussed in patch 08/47).
If it's important to get this right, I can do the same treatment for duplex
as I did for speed.
> It's only the PCS and MAC that care about this, so this should be dealt
> with when calling into the PCS and MAC's link_up() method.
>
> The problem we have are the legacy drivers (of which mv88e6xxx and
> mtk_eth_soc are the only two I'm aware of) that make use of the
> state->speed and state->duplex when configuring stuff. We could've been
> down to just mv88e6xxx had the DSA and mv88e6xxx patches been sorted
> out, but sadly that's now going to be some time off due to reviewer
> failure.
>
--Sean
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 10/47] net: phylink: Adjust link settings based on rate adaptation
2022-07-18 16:45 ` Sean Anderson
@ 2022-07-18 17:58 ` Russell King (Oracle)
0 siblings, 0 replies; 123+ messages in thread
From: Russell King (Oracle) @ 2022-07-18 17:58 UTC (permalink / raw)
To: Sean Anderson
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, linux-kernel,
Alexandru Marginean, Andrew Lunn, Heiner Kallweit,
Vladimir Oltean
On Mon, Jul 18, 2022 at 12:45:01PM -0400, Sean Anderson wrote:
>
>
> On 7/18/22 12:12 PM, Russell King (Oracle) wrote:
> > On Fri, Jul 15, 2022 at 05:59:17PM -0400, Sean Anderson wrote:
> >> If the phy is configured to use pause-based rate adaptation, ensure that
> >> the link is full duplex with pause frame reception enabled. Note that these
> >> settings may be overridden by ethtool.
> >>
> >> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> >> ---
> >>
> >> Changes in v3:
> >> - New
> >>
> >> drivers/net/phy/phylink.c | 4 ++++
> >> 1 file changed, 4 insertions(+)
> >>
> >> diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
> >> index 7fa21941878e..7f65413aa778 100644
> >> --- a/drivers/net/phy/phylink.c
> >> +++ b/drivers/net/phy/phylink.c
> >> @@ -1445,6 +1445,10 @@ static void phylink_phy_change(struct phy_device *phydev, bool up)
> >> pl->phy_state.speed = phy_interface_speed(phydev->interface,
> >> phydev->speed);
> >> pl->phy_state.duplex = phydev->duplex;
> >> + if (phydev->rate_adaptation == RATE_ADAPT_PAUSE) {
> >> + pl->phy_state.duplex = DUPLEX_FULL;
>
> Just form context, as discussed with Andrew, this should never change
> anything. That is, it could be replaced with
>
> WARN_ON_ONCE(pl->phy_state.duplex != DUPLEX_FULL);
>
> Since the phy should never report that it is using rate_adaptation
> unless it is using full duplex.
The "rate adaption" thing tends not to be a result of negotiation with
the link partner, but more a configuration issue. At least that is the
case with 88x3310 PHYs. There is no mention of any kind of restriction
on duplex when operating in rate adaption mode (whether it's the MACSEC
version that can generate pause frames, or the non-MACSEC that can't.)
> >> + rx_pause = true;
> >> + }
> >
> > I really don't like this - as I've pointed out in my previous email, the
> > reporting in the kernel message log for "Link is Up" will be incorrect
> > if you force the phy_state here like this. If the media side link has
> > been negotiated to be half duplex, we should state that in the "Link is
> > Up" message.
>
> So I guess the question here is whether there are phys which do duplex
> adaptation. There definitely are phys which support a half-duplex
> interface mode and a full duplex link mode (such as discussed in patch 08/47).
> If it's important to get this right, I can do the same treatment for duplex
> as I did for speed.
I guess it's something we don't know.
The sensible thing is not to add a WARN_ON() for the case, but to
restrict the PHY advertisement so the half-duplex case can't happen if
the host link is operating in a mode that requires rate adaption to
gain the other speeds.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 11/47] [RFC] net: phylink: Add support for CRS-based rate adaptation
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (9 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 10/47] net: phylink: Adjust link settings " Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 12/47] net: phy: aquantia: Add support for AQR115 Sean Anderson
` (36 subsequent siblings)
47 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
This adds support for CRS-based rate adaptation, such as the type used
for 10PASS-TS and 2BASE-TL. As these link modes are not supported by any
in-tree phy, this patch is marked as RFC. It serves chiefly to
illustrate the approach to adding support for another rate adaptation
type.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
Changes in v3:
- New
drivers/net/phy/phylink.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index 7f65413aa778..d27f6d23861c 100644
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -476,7 +476,15 @@ void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface,
break;
}
case RATE_ADAPT_CRS:
- /* TODO */
+ /* We can only adapt if the MAC supports half-duplex at the
+ * interface speed
+ */
+ if (caps & MAC_1000) {
+ if (mac_capabilities & MAC_1000HD)
+ caps |= MAC_100 | MAC_10;
+ } else if (caps & MAC_100 && mac_capabilities & MAC_100HD) {
+ caps |= MAC_10;
+ }
break;
case RATE_ADAPT_OPEN_LOOP:
open_loop:
@@ -1448,6 +1456,8 @@ static void phylink_phy_change(struct phy_device *phydev, bool up)
if (phydev->rate_adaptation == RATE_ADAPT_PAUSE) {
pl->phy_state.duplex = DUPLEX_FULL;
rx_pause = true;
+ } else if (phydev->rate_adaptation == RATE_ADAPT_CRS) {
+ pl->phy_state.duplex = DUPLEX_HALF;
}
pl->phy_state.pause = MLO_PAUSE_NONE;
if (tx_pause)
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* [PATCH net-next v3 12/47] net: phy: aquantia: Add support for AQR115
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (10 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 11/47] [RFC] net: phylink: Add support for CRS-based " Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-16 18:17 ` Andrew Lunn
2022-07-15 21:59 ` [PATCH net-next v3 13/47] net: phy: aquantia: Add some additional phy interfaces Sean Anderson
` (35 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Alexandru Marginean, Andrew Lunn,
Heiner Kallweit, Vladimir Oltean
This adds support for the AQR115 (which I have on my LS1046A RDB). I had a
quick look over the registers, and it seems to be compatible with the
AQR107. I couldn't find this oui anywhere, but that's what I have on my
board. It's possible that NXP used a substitute here; I can't confirm
the part number since there is a heatsink on top of the phy.
To avoid breaking <10G ethernet on the LS1046ARDB, we must add this
vendor id as an exception to dpaa_phy_init. This will be removed once
the DPAA driver is converted to phylink.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
Changes in v3:
- New
.../net/ethernet/freescale/dpaa/dpaa_eth.c | 6 +++++-
drivers/net/phy/aquantia_main.c | 20 +++++++++++++++++++
2 files changed, 25 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
index 45634579adb6..a770bab4d1ed 100644
--- a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
+++ b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
@@ -2886,6 +2886,7 @@ static void dpaa_adjust_link(struct net_device *net_dev)
/* The Aquantia PHYs are capable of performing rate adaptation */
#define PHY_VEND_AQUANTIA 0x03a1b400
+#define PHY_VEND_AQUANTIA2 0x31c31c00
static int dpaa_phy_init(struct net_device *net_dev)
{
@@ -2893,6 +2894,7 @@ static int dpaa_phy_init(struct net_device *net_dev)
struct mac_device *mac_dev;
struct phy_device *phy_dev;
struct dpaa_priv *priv;
+ u32 phy_vendor;
priv = netdev_priv(net_dev);
mac_dev = priv->mac_dev;
@@ -2905,9 +2907,11 @@ static int dpaa_phy_init(struct net_device *net_dev)
return -ENODEV;
}
+ phy_vendor = phy_dev->drv->phy_id & GENMASK(31, 10);
/* Unless the PHY is capable of rate adaptation */
if (mac_dev->phy_if != PHY_INTERFACE_MODE_XGMII ||
- ((phy_dev->drv->phy_id & GENMASK(31, 10)) != PHY_VEND_AQUANTIA)) {
+ (phy_vendor != PHY_VEND_AQUANTIA &&
+ phy_vendor != PHY_VEND_AQUANTIA2)) {
/* remove any features not supported by the controller */
ethtool_convert_legacy_u32_to_link_mode(mask,
mac_dev->if_support);
diff --git a/drivers/net/phy/aquantia_main.c b/drivers/net/phy/aquantia_main.c
index 8b7a46db30e0..f9e2d20d0ec5 100644
--- a/drivers/net/phy/aquantia_main.c
+++ b/drivers/net/phy/aquantia_main.c
@@ -21,6 +21,7 @@
#define PHY_ID_AQR106 0x03a1b4d0
#define PHY_ID_AQR107 0x03a1b4e0
#define PHY_ID_AQCS109 0x03a1b5c2
+#define PHY_ID_AQR115 0x31c31c12
#define PHY_ID_AQR405 0x03a1b4b0
#define PHY_ID_AQR113C 0x31c31c12
@@ -672,6 +673,24 @@ static struct phy_driver aqr_driver[] = {
.get_stats = aqr107_get_stats,
.link_change_notify = aqr107_link_change_notify,
},
+{
+ PHY_ID_MATCH_MODEL(PHY_ID_AQR115),
+ .name = "Aquantia AQR115",
+ .probe = aqr107_probe,
+ .config_init = aqr107_config_init,
+ .config_aneg = aqr_config_aneg,
+ .config_intr = aqr_config_intr,
+ .handle_interrupt = aqr_handle_interrupt,
+ .read_status = aqr107_read_status,
+ .get_tunable = aqr107_get_tunable,
+ .set_tunable = aqr107_set_tunable,
+ .suspend = aqr107_suspend,
+ .resume = aqr107_resume,
+ .get_sset_count = aqr107_get_sset_count,
+ .get_strings = aqr107_get_strings,
+ .get_stats = aqr107_get_stats,
+ .link_change_notify = aqr107_link_change_notify,
+},
{
PHY_ID_MATCH_MODEL(PHY_ID_AQCS109),
.name = "Aquantia AQCS109",
@@ -726,6 +745,7 @@ static struct mdio_device_id __maybe_unused aqr_tbl[] = {
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR105) },
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR106) },
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR107) },
+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR115) },
{ PHY_ID_MATCH_MODEL(PHY_ID_AQCS109) },
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR405) },
{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 12/47] net: phy: aquantia: Add support for AQR115
2022-07-15 21:59 ` [PATCH net-next v3 12/47] net: phy: aquantia: Add support for AQR115 Sean Anderson
@ 2022-07-16 18:17 ` Andrew Lunn
2022-07-16 22:42 ` Sean Anderson
0 siblings, 1 reply; 123+ messages in thread
From: Andrew Lunn @ 2022-07-16 18:17 UTC (permalink / raw)
To: Sean Anderson
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
On Fri, Jul 15, 2022 at 05:59:19PM -0400, Sean Anderson wrote:
> This adds support for the AQR115 (which I have on my LS1046A RDB). I had a
> quick look over the registers, and it seems to be compatible with the
> AQR107. I couldn't find this oui anywhere, but that's what I have on my
> board. It's possible that NXP used a substitute here; I can't confirm
> the part number since there is a heatsink on top of the phy.
If i remember correctly, the OUI can be part of the provisioning for
Aquantia PHYs. And i think there is often per board provisioning,
specially for the SERDEs configuration. So aQuantia/Marvell probably
set this OUI, but maybe at NXP request.
Did you get the part number from the schematic? That should be enough
to confirm it is a AQR115.
> To avoid breaking <10G ethernet on the LS1046ARDB, we must add this
> vendor id as an exception to dpaa_phy_init. This will be removed once
> the DPAA driver is converted to phylink.
I suggest you split this into two. The PHY changes can be merged right
away, and is independent of the DPAA. Given the size of this patchset,
the more you can split it up into parallel submissions the better. So
please submit the PHY patches independent of the rest.
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
For the aquantia_main.c change only:
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 12/47] net: phy: aquantia: Add support for AQR115
2022-07-16 18:17 ` Andrew Lunn
@ 2022-07-16 22:42 ` Sean Anderson
0 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-16 22:42 UTC (permalink / raw)
To: Andrew Lunn
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
On 7/16/22 2:17 PM, Andrew Lunn wrote:
> On Fri, Jul 15, 2022 at 05:59:19PM -0400, Sean Anderson wrote:
>> This adds support for the AQR115 (which I have on my LS1046A RDB). I had a
>> quick look over the registers, and it seems to be compatible with the
>> AQR107. I couldn't find this oui anywhere, but that's what I have on my
>> board. It's possible that NXP used a substitute here; I can't confirm
>> the part number since there is a heatsink on top of the phy.
>
> If i remember correctly, the OUI can be part of the provisioning for
> Aquantia PHYs. And i think there is often per board provisioning,
> specially for the SERDEs configuration. So aQuantia/Marvell probably
> set this OUI, but maybe at NXP request.
Ah, interesting.
> Did you get the part number from the schematic? That should be enough
> to confirm it is a AQR115.
Yes, I got it off the schematic.
>> To avoid breaking <10G ethernet on the LS1046ARDB, we must add this
>> vendor id as an exception to dpaa_phy_init. This will be removed once
>> the DPAA driver is converted to phylink.
>
> I suggest you split this into two. The PHY changes can be merged right
> away, and is independent of the DPAA.
The DPAA changes must be merged before the phy changes. At the moment,
sub-10G ethernet still works on the LS1046ARDB. This is because even though
we program an advertisement of only 10G link modes, the phy by default
ignores the programmed advertisement. But by adding a driver for this phy,
the 10G-only advertisement will take effect and no link will be established.
So the DPAA change must come before the phy change.
Since there is no harm, I will split the DPAA change into its own patch and
place it before this one.
> Given the size of this patchset,
> the more you can split it up into parallel submissions the better. So
> please submit the PHY patches independent of the rest.
Yes, that is the strategy outlined in the cover letter.
>> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
>
> For the aquantia_main.c change only:
>
> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
>
> Andrew
>
--Sean
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 13/47] net: phy: aquantia: Add some additional phy interfaces
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (11 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 12/47] net: phy: aquantia: Add support for AQR115 Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-16 18:18 ` Andrew Lunn
2022-07-15 21:59 ` [PATCH net-next v3 14/47] net: phy: aquantia: Add support for rate adaptation Sean Anderson
` (34 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Alexandru Marginean, Andrew Lunn,
Heiner Kallweit, Vladimir Oltean
These are documented in the AQR115 register reference. I haven't tested
them, but perhaps they'll be useful to someone.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
Changes in v3:
- New
drivers/net/phy/aquantia_main.c | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/aquantia_main.c b/drivers/net/phy/aquantia_main.c
index f9e2d20d0ec5..0a2f8c4aa845 100644
--- a/drivers/net/phy/aquantia_main.c
+++ b/drivers/net/phy/aquantia_main.c
@@ -28,9 +28,12 @@
#define MDIO_PHYXS_VEND_IF_STATUS 0xe812
#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3)
#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_KR 0
+#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_KX 1
#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_XFI 2
#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_USXGMII 3
+#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_XAUI 4
#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_SGMII 6
+#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_RXAUI 7
#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_OCSGMII 10
#define MDIO_AN_VEND_PROV 0xc400
@@ -393,15 +396,24 @@ static int aqr107_read_status(struct phy_device *phydev)
case MDIO_PHYXS_VEND_IF_STATUS_TYPE_KR:
phydev->interface = PHY_INTERFACE_MODE_10GKR;
break;
+ case MDIO_PHYXS_VEND_IF_STATUS_TYPE_KX:
+ phydev->interface = PHY_INTERFACE_MODE_1000BASEKX;
+ break;
case MDIO_PHYXS_VEND_IF_STATUS_TYPE_XFI:
phydev->interface = PHY_INTERFACE_MODE_10GBASER;
break;
case MDIO_PHYXS_VEND_IF_STATUS_TYPE_USXGMII:
phydev->interface = PHY_INTERFACE_MODE_USXGMII;
break;
+ case MDIO_PHYXS_VEND_IF_STATUS_TYPE_XAUI:
+ phydev->interface = PHY_INTERFACE_MODE_XAUI;
+ break;
case MDIO_PHYXS_VEND_IF_STATUS_TYPE_SGMII:
phydev->interface = PHY_INTERFACE_MODE_SGMII;
break;
+ case MDIO_PHYXS_VEND_IF_STATUS_TYPE_RXAUI:
+ phydev->interface = PHY_INTERFACE_MODE_RXAUI;
+ break;
case MDIO_PHYXS_VEND_IF_STATUS_TYPE_OCSGMII:
phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
break;
@@ -514,11 +526,14 @@ static int aqr107_config_init(struct phy_device *phydev)
/* Check that the PHY interface type is compatible */
if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
+ phydev->interface != PHY_INTERFACE_MODE_1000BASEKX &&
phydev->interface != PHY_INTERFACE_MODE_2500BASEX &&
phydev->interface != PHY_INTERFACE_MODE_XGMII &&
phydev->interface != PHY_INTERFACE_MODE_USXGMII &&
phydev->interface != PHY_INTERFACE_MODE_10GKR &&
- phydev->interface != PHY_INTERFACE_MODE_10GBASER)
+ phydev->interface != PHY_INTERFACE_MODE_10GBASER &&
+ phydev->interface != PHY_INTERFACE_MODE_XAUI &&
+ phydev->interface != PHY_INTERFACE_MODE_RXAUI)
return -ENODEV;
WARN(phydev->interface == PHY_INTERFACE_MODE_XGMII,
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 13/47] net: phy: aquantia: Add some additional phy interfaces
2022-07-15 21:59 ` [PATCH net-next v3 13/47] net: phy: aquantia: Add some additional phy interfaces Sean Anderson
@ 2022-07-16 18:18 ` Andrew Lunn
0 siblings, 0 replies; 123+ messages in thread
From: Andrew Lunn @ 2022-07-16 18:18 UTC (permalink / raw)
To: Sean Anderson
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
On Fri, Jul 15, 2022 at 05:59:20PM -0400, Sean Anderson wrote:
> These are documented in the AQR115 register reference. I haven't tested
> them, but perhaps they'll be useful to someone.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 14/47] net: phy: aquantia: Add support for rate adaptation
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (12 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 13/47] net: phy: aquantia: Add some additional phy interfaces Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-16 18:38 ` Andrew Lunn
2022-07-15 21:59 ` [PATCH net-next v3 15/47] net: fman: Convert to SPDX identifiers Sean Anderson
` (33 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Alexandru Marginean, Andrew Lunn,
Heiner Kallweit, Vladimir Oltean
This adds support for rate adaptation for phys similar to the AQR107. We
assume that all phys using aqr107_read_status support rate adaptation.
However, it could be possible to determine support based on the firmware
revision if there are phys discovered which do not support rate adaptation.
However, as rate adaptation is advertised in the datasheets for these phys,
I suspect it is supported most boards.
Despite the name, the "config" registers are updated with the current rate
adaptation method (if any). Because they appear to be updated
automatically, I don't know if these registers can be used to disable rate
adaptation.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
Changes in v3:
- New
drivers/net/phy/aquantia_main.c | 49 ++++++++++++++++++++++++++++++---
1 file changed, 45 insertions(+), 4 deletions(-)
diff --git a/drivers/net/phy/aquantia_main.c b/drivers/net/phy/aquantia_main.c
index 0a2f8c4aa845..e2ddcf0a68fc 100644
--- a/drivers/net/phy/aquantia_main.c
+++ b/drivers/net/phy/aquantia_main.c
@@ -95,6 +95,17 @@
#define VEND1_GLOBAL_FW_ID_MAJOR GENMASK(15, 8)
#define VEND1_GLOBAL_FW_ID_MINOR GENMASK(7, 0)
+#define VEND1_GLOBAL_CFG_10M 0x0310
+#define VEND1_GLOBAL_CFG_100M 0x031b
+#define VEND1_GLOBAL_CFG_1G 0x031c
+#define VEND1_GLOBAL_CFG_2_5G 0x031d
+#define VEND1_GLOBAL_CFG_5G 0x031e
+#define VEND1_GLOBAL_CFG_10G 0x031f
+#define VEND1_GLOBAL_CFG_RATE_ADAPT GENMASK(8, 7)
+#define VEND1_GLOBAL_CFG_RATE_ADAPT_NONE 0
+#define VEND1_GLOBAL_CFG_RATE_ADAPT_USX 1
+#define VEND1_GLOBAL_CFG_RATE_ADAPT_PAUSE 2
+
#define VEND1_GLOBAL_RSVD_STAT1 0xc885
#define VEND1_GLOBAL_RSVD_STAT1_FW_BUILD_ID GENMASK(7, 4)
#define VEND1_GLOBAL_RSVD_STAT1_PROV_ID GENMASK(3, 0)
@@ -340,39 +351,56 @@ static int aqr_read_status(struct phy_device *phydev)
static int aqr107_read_rate(struct phy_device *phydev)
{
int val;
+ u32 config_reg;
val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_STATUS1);
if (val < 0)
return val;
+ if (val & MDIO_AN_TX_VEND_STATUS1_FULL_DUPLEX)
+ phydev->duplex = DUPLEX_FULL;
+ else
+ phydev->duplex = DUPLEX_HALF;
+
switch (FIELD_GET(MDIO_AN_TX_VEND_STATUS1_RATE_MASK, val)) {
case MDIO_AN_TX_VEND_STATUS1_10BASET:
phydev->speed = SPEED_10;
+ config_reg = VEND1_GLOBAL_CFG_10M;
break;
case MDIO_AN_TX_VEND_STATUS1_100BASETX:
phydev->speed = SPEED_100;
+ config_reg = VEND1_GLOBAL_CFG_100M;
break;
case MDIO_AN_TX_VEND_STATUS1_1000BASET:
phydev->speed = SPEED_1000;
+ config_reg = VEND1_GLOBAL_CFG_1G;
break;
case MDIO_AN_TX_VEND_STATUS1_2500BASET:
phydev->speed = SPEED_2500;
+ config_reg = VEND1_GLOBAL_CFG_2_5G;
break;
case MDIO_AN_TX_VEND_STATUS1_5000BASET:
phydev->speed = SPEED_5000;
+ config_reg = VEND1_GLOBAL_CFG_5G;
break;
case MDIO_AN_TX_VEND_STATUS1_10GBASET:
phydev->speed = SPEED_10000;
+ config_reg = VEND1_GLOBAL_CFG_10G;
break;
default:
phydev->speed = SPEED_UNKNOWN;
- break;
+ return 0;
}
- if (val & MDIO_AN_TX_VEND_STATUS1_FULL_DUPLEX)
- phydev->duplex = DUPLEX_FULL;
+ val = phy_read_mmd(phydev, MDIO_MMD_VEND1, config_reg);
+ if (val < 0)
+ return val;
+
+ if (FIELD_GET(VEND1_GLOBAL_CFG_RATE_ADAPT, val) ==
+ VEND1_GLOBAL_CFG_RATE_ADAPT_PAUSE)
+ phydev->rate_adaptation = RATE_ADAPT_PAUSE;
else
- phydev->duplex = DUPLEX_HALF;
+ phydev->rate_adaptation = RATE_ADAPT_NONE;
return 0;
}
@@ -613,6 +641,16 @@ static void aqr107_link_change_notify(struct phy_device *phydev)
phydev_info(phydev, "Aquantia 1000Base-T2 mode active\n");
}
+static enum rate_adaptation
+aqr107_get_rate_adaptation(struct phy_device *phydev, phy_interface_t iface)
+{
+ if (iface == PHY_INTERFACE_MODE_10GBASER ||
+ iface == PHY_INTERFACE_MODE_2500BASEX ||
+ iface == PHY_INTERFACE_MODE_NA)
+ return RATE_ADAPT_PAUSE;
+ return RATE_ADAPT_NONE;
+}
+
static int aqr107_suspend(struct phy_device *phydev)
{
return phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MDIO_CTRL1,
@@ -674,6 +712,7 @@ static struct phy_driver aqr_driver[] = {
PHY_ID_MATCH_MODEL(PHY_ID_AQR107),
.name = "Aquantia AQR107",
.probe = aqr107_probe,
+ .get_rate_adaptation = aqr107_get_rate_adaptation,
.config_init = aqr107_config_init,
.config_aneg = aqr_config_aneg,
.config_intr = aqr_config_intr,
@@ -692,6 +731,7 @@ static struct phy_driver aqr_driver[] = {
PHY_ID_MATCH_MODEL(PHY_ID_AQR115),
.name = "Aquantia AQR115",
.probe = aqr107_probe,
+ .get_rate_adaptation = aqr107_get_rate_adaptation,
.config_init = aqr107_config_init,
.config_aneg = aqr_config_aneg,
.config_intr = aqr_config_intr,
@@ -710,6 +750,7 @@ static struct phy_driver aqr_driver[] = {
PHY_ID_MATCH_MODEL(PHY_ID_AQCS109),
.name = "Aquantia AQCS109",
.probe = aqr107_probe,
+ .get_rate_adaptation = aqr107_get_rate_adaptation,
.config_init = aqcs109_config_init,
.config_aneg = aqr_config_aneg,
.config_intr = aqr_config_intr,
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 14/47] net: phy: aquantia: Add support for rate adaptation
2022-07-15 21:59 ` [PATCH net-next v3 14/47] net: phy: aquantia: Add support for rate adaptation Sean Anderson
@ 2022-07-16 18:38 ` Andrew Lunn
2022-07-16 22:45 ` Sean Anderson
0 siblings, 1 reply; 123+ messages in thread
From: Andrew Lunn @ 2022-07-16 18:38 UTC (permalink / raw)
To: Sean Anderson
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
> +#define VEND1_GLOBAL_CFG_10M 0x0310
> +#define VEND1_GLOBAL_CFG_100M 0x031b
> +#define VEND1_GLOBAL_CFG_1G 0x031c
> +#define VEND1_GLOBAL_CFG_2_5G 0x031d
> +#define VEND1_GLOBAL_CFG_5G 0x031e
> +#define VEND1_GLOBAL_CFG_10G 0x031f
I completely read this wrong the first time... The common meaning of
#defines line this is
VEND1_GLOBAL_CFG_ is the register and what follows indicates some bits
in the register.
However, this is not true here, these are all registers. Maybe add
_REG to the end? It makes them different to other defines for
registers, but if i parsed it wrong, probably other will as well?
> static int aqr107_read_rate(struct phy_device *phydev)
> {
> int val;
> + u32 config_reg;
Revere Christmass tree. config_reg should be first.
Andrew
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 14/47] net: phy: aquantia: Add support for rate adaptation
2022-07-16 18:38 ` Andrew Lunn
@ 2022-07-16 22:45 ` Sean Anderson
2022-07-17 1:42 ` Andrew Lunn
0 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-16 22:45 UTC (permalink / raw)
To: Andrew Lunn
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
On 7/16/22 2:38 PM, Andrew Lunn wrote:
>> +#define VEND1_GLOBAL_CFG_10M 0x0310
>> +#define VEND1_GLOBAL_CFG_100M 0x031b
>> +#define VEND1_GLOBAL_CFG_1G 0x031c
>> +#define VEND1_GLOBAL_CFG_2_5G 0x031d
>> +#define VEND1_GLOBAL_CFG_5G 0x031e
>> +#define VEND1_GLOBAL_CFG_10G 0x031f
>
> I completely read this wrong the first time... The common meaning of
> #defines line this is
>
> VEND1_GLOBAL_CFG_ is the register and what follows indicates some bits
> in the register.
>
> However, this is not true here, these are all registers. Maybe add
> _REG to the end? It makes them different to other defines for
> registers, but if i parsed it wrong, probably other will as well?
How about a comment like
/* The following registers all have similar layouts; first the registers... */
#define VEND1_GLOBAL_CFG_10M 0x0310
...
/* ... and now the fields */
#define VEND1_GLOBAL_CFG_RATE_ADAPT GENMASK(8, 7)
>> static int aqr107_read_rate(struct phy_device *phydev)
>> {
>> int val;
>> + u32 config_reg;
>
> Revere Christmass tree. config_reg should be first.
OK
--Sean
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 14/47] net: phy: aquantia: Add support for rate adaptation
2022-07-16 22:45 ` Sean Anderson
@ 2022-07-17 1:42 ` Andrew Lunn
0 siblings, 0 replies; 123+ messages in thread
From: Andrew Lunn @ 2022-07-17 1:42 UTC (permalink / raw)
To: Sean Anderson
Cc: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev,
Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Alexandru Marginean, Heiner Kallweit,
Vladimir Oltean
> /* The following registers all have similar layouts; first the registers... */
> #define VEND1_GLOBAL_CFG_10M 0x0310
> ...
> /* ... and now the fields */
> #define VEND1_GLOBAL_CFG_RATE_ADAPT GENMASK(8, 7)
O.K, that will also help prevent the misunderstanding i had.
Andrew
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 15/47] net: fman: Convert to SPDX identifiers
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (13 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 14/47] net: phy: aquantia: Add support for rate adaptation Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 16/47] net: fman: Don't pass comm_mode to enable/disable Sean Anderson
` (32 subsequent siblings)
47 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Camelia Groza
This converts the license text of files in the fman directory to use
SPDX license identifiers instead.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
Tested-by: Camelia Groza <camelia.groza@nxp.com>
---
(no changes since v1)
drivers/net/ethernet/freescale/fman/fman.c | 31 ++----------------
drivers/net/ethernet/freescale/fman/fman.h | 31 ++----------------
.../net/ethernet/freescale/fman/fman_dtsec.c | 31 ++----------------
.../net/ethernet/freescale/fman/fman_dtsec.h | 31 ++----------------
.../net/ethernet/freescale/fman/fman_keygen.c | 29 +----------------
.../net/ethernet/freescale/fman/fman_keygen.h | 29 +----------------
.../net/ethernet/freescale/fman/fman_memac.c | 31 ++----------------
.../net/ethernet/freescale/fman/fman_memac.h | 31 ++----------------
.../net/ethernet/freescale/fman/fman_muram.c | 31 ++----------------
.../net/ethernet/freescale/fman/fman_muram.h | 32 ++-----------------
.../net/ethernet/freescale/fman/fman_port.c | 29 +----------------
.../net/ethernet/freescale/fman/fman_port.h | 29 +----------------
drivers/net/ethernet/freescale/fman/fman_sp.c | 29 +----------------
drivers/net/ethernet/freescale/fman/fman_sp.h | 28 +---------------
.../net/ethernet/freescale/fman/fman_tgec.c | 31 ++----------------
.../net/ethernet/freescale/fman/fman_tgec.h | 31 ++----------------
drivers/net/ethernet/freescale/fman/mac.c | 32 ++-----------------
drivers/net/ethernet/freescale/fman/mac.h | 32 ++-----------------
18 files changed, 33 insertions(+), 515 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/fman.c b/drivers/net/ethernet/freescale/fman/fman.c
index 8f0db61cb1f6..9d85fb136e34 100644
--- a/drivers/net/ethernet/freescale/fman/fman.c
+++ b/drivers/net/ethernet/freescale/fman/fman.c
@@ -1,34 +1,7 @@
+// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
/*
- * Copyright 2008-2015 Freescale Semiconductor Inc.
+ * Copyright 2008 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
diff --git a/drivers/net/ethernet/freescale/fman/fman.h b/drivers/net/ethernet/freescale/fman/fman.h
index f2ede1360f03..2ea575a46675 100644
--- a/drivers/net/ethernet/freescale/fman/fman.h
+++ b/drivers/net/ethernet/freescale/fman/fman.h
@@ -1,34 +1,7 @@
+/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later */
/*
- * Copyright 2008-2015 Freescale Semiconductor Inc.
+ * Copyright 2008 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __FM_H
diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.c b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
index 1950a8936bc0..a39d57347d59 100644
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
@@ -1,33 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
/*
- * Copyright 2008-2015 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * Copyright 2008 - 2015 Freescale Semiconductor Inc.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.h b/drivers/net/ethernet/freescale/fman/fman_dtsec.h
index 68512c3bd6e5..3c26b97f8ced 100644
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.h
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.h
@@ -1,33 +1,6 @@
+/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later */
/*
- * Copyright 2008-2015 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * Copyright 2008 - 2015 Freescale Semiconductor Inc.
*/
#ifndef __DTSEC_H
diff --git a/drivers/net/ethernet/freescale/fman/fman_keygen.c b/drivers/net/ethernet/freescale/fman/fman_keygen.c
index e1bdfed16134..e73f6ef3c6ee 100644
--- a/drivers/net/ethernet/freescale/fman/fman_keygen.c
+++ b/drivers/net/ethernet/freescale/fman/fman_keygen.c
@@ -1,33 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
/*
* Copyright 2017 NXP
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of NXP nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY NXP ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NXP BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
diff --git a/drivers/net/ethernet/freescale/fman/fman_keygen.h b/drivers/net/ethernet/freescale/fman/fman_keygen.h
index c4640de3f4cb..2cb0df453074 100644
--- a/drivers/net/ethernet/freescale/fman/fman_keygen.h
+++ b/drivers/net/ethernet/freescale/fman/fman_keygen.h
@@ -1,33 +1,6 @@
+/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later */
/*
* Copyright 2017 NXP
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of NXP nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY NXP ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NXP BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __KEYGEN_H
diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.c b/drivers/net/ethernet/freescale/fman/fman_memac.c
index 2216b7f51d26..d47e5d282143 100644
--- a/drivers/net/ethernet/freescale/fman/fman_memac.c
+++ b/drivers/net/ethernet/freescale/fman/fman_memac.c
@@ -1,33 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
/*
- * Copyright 2008-2015 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * Copyright 2008 - 2015 Freescale Semiconductor Inc.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.h b/drivers/net/ethernet/freescale/fman/fman_memac.h
index 3820f7a22983..702df2aa43f9 100644
--- a/drivers/net/ethernet/freescale/fman/fman_memac.h
+++ b/drivers/net/ethernet/freescale/fman/fman_memac.h
@@ -1,33 +1,6 @@
+/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later */
/*
- * Copyright 2008-2015 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * Copyright 2008 - 2015 Freescale Semiconductor Inc.
*/
#ifndef __MEMAC_H
diff --git a/drivers/net/ethernet/freescale/fman/fman_muram.c b/drivers/net/ethernet/freescale/fman/fman_muram.c
index 7ad317e622bc..f557d68e5b76 100644
--- a/drivers/net/ethernet/freescale/fman/fman_muram.c
+++ b/drivers/net/ethernet/freescale/fman/fman_muram.c
@@ -1,33 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
/*
- * Copyright 2008-2015 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * Copyright 2008 - 2015 Freescale Semiconductor Inc.
*/
#include "fman_muram.h"
diff --git a/drivers/net/ethernet/freescale/fman/fman_muram.h b/drivers/net/ethernet/freescale/fman/fman_muram.h
index 453bf849eee1..3643af61bae2 100644
--- a/drivers/net/ethernet/freescale/fman/fman_muram.h
+++ b/drivers/net/ethernet/freescale/fman/fman_muram.h
@@ -1,34 +1,8 @@
+/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later */
/*
- * Copyright 2008-2015 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * Copyright 2008 - 2015 Freescale Semiconductor Inc.
*/
+
#ifndef __FM_MURAM_EXT
#define __FM_MURAM_EXT
diff --git a/drivers/net/ethernet/freescale/fman/fman_port.c b/drivers/net/ethernet/freescale/fman/fman_port.c
index 4c9d05c45c03..ab90fe2bee5e 100644
--- a/drivers/net/ethernet/freescale/fman/fman_port.c
+++ b/drivers/net/ethernet/freescale/fman/fman_port.c
@@ -1,33 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
/*
* Copyright 2008 - 2015 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
diff --git a/drivers/net/ethernet/freescale/fman/fman_port.h b/drivers/net/ethernet/freescale/fman/fman_port.h
index 82f12661a46d..4917fe8f0617 100644
--- a/drivers/net/ethernet/freescale/fman/fman_port.h
+++ b/drivers/net/ethernet/freescale/fman/fman_port.h
@@ -1,33 +1,6 @@
+/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later */
/*
* Copyright 2008 - 2015 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __FMAN_PORT_H
diff --git a/drivers/net/ethernet/freescale/fman/fman_sp.c b/drivers/net/ethernet/freescale/fman/fman_sp.c
index 248f5bcca468..0fac60aa5283 100644
--- a/drivers/net/ethernet/freescale/fman/fman_sp.c
+++ b/drivers/net/ethernet/freescale/fman/fman_sp.c
@@ -1,33 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
/*
* Copyright 2008 - 2015 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "fman_sp.h"
diff --git a/drivers/net/ethernet/freescale/fman/fman_sp.h b/drivers/net/ethernet/freescale/fman/fman_sp.h
index 820b7f63088f..a62dd21c81f1 100644
--- a/drivers/net/ethernet/freescale/fman/fman_sp.h
+++ b/drivers/net/ethernet/freescale/fman/fman_sp.h
@@ -1,32 +1,6 @@
+/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later */
/*
* Copyright 2008 - 2015 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __FM_SP_H
diff --git a/drivers/net/ethernet/freescale/fman/fman_tgec.c b/drivers/net/ethernet/freescale/fman/fman_tgec.c
index 311c1906e044..a3c6576dd99d 100644
--- a/drivers/net/ethernet/freescale/fman/fman_tgec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_tgec.c
@@ -1,33 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
/*
- * Copyright 2008-2015 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * Copyright 2008 - 2015 Freescale Semiconductor Inc.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
diff --git a/drivers/net/ethernet/freescale/fman/fman_tgec.h b/drivers/net/ethernet/freescale/fman/fman_tgec.h
index b28b20b26148..8df90054495c 100644
--- a/drivers/net/ethernet/freescale/fman/fman_tgec.h
+++ b/drivers/net/ethernet/freescale/fman/fman_tgec.h
@@ -1,33 +1,6 @@
+/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later */
/*
- * Copyright 2008-2015 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * Copyright 2008 - 2015 Freescale Semiconductor Inc.
*/
#ifndef __TGEC_H
diff --git a/drivers/net/ethernet/freescale/fman/mac.c b/drivers/net/ethernet/freescale/fman/mac.c
index 39ae965cd4f6..2b3c6cbefef6 100644
--- a/drivers/net/ethernet/freescale/fman/mac.c
+++ b/drivers/net/ethernet/freescale/fman/mac.c
@@ -1,32 +1,6 @@
-/* Copyright 2008-2015 Freescale Semiconductor, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
+/*
+ * Copyright 2008 - 2015 Freescale Semiconductor Inc.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
diff --git a/drivers/net/ethernet/freescale/fman/mac.h b/drivers/net/ethernet/freescale/fman/mac.h
index daa285a9b8b2..909faf5fa2fe 100644
--- a/drivers/net/ethernet/freescale/fman/mac.h
+++ b/drivers/net/ethernet/freescale/fman/mac.h
@@ -1,32 +1,6 @@
-/* Copyright 2008-2015 Freescale Semiconductor, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later */
+/*
+ * Copyright 2008 - 2015 Freescale Semiconductor Inc.
*/
#ifndef __MAC_H
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* [PATCH net-next v3 16/47] net: fman: Don't pass comm_mode to enable/disable
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (14 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 15/47] net: fman: Convert to SPDX identifiers Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 17/47] net: fman: Store en/disable in mac_device instead of mac_priv_s Sean Anderson
` (31 subsequent siblings)
47 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Camelia Groza
mac_priv_s->enable() and ->disable() are always called with
a comm_mode of COMM_MODE_RX_AND_TX. Remove this parameter, and refactor
the macs appropriately.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
Tested-by: Camelia Groza <camelia.groza@nxp.com>
---
(no changes since v1)
.../net/ethernet/freescale/fman/fman_dtsec.c | 20 ++++++-------------
.../net/ethernet/freescale/fman/fman_dtsec.h | 4 ++--
.../net/ethernet/freescale/fman/fman_memac.c | 16 ++++-----------
.../net/ethernet/freescale/fman/fman_memac.h | 4 ++--
.../net/ethernet/freescale/fman/fman_tgec.c | 14 ++++---------
.../net/ethernet/freescale/fman/fman_tgec.h | 4 ++--
drivers/net/ethernet/freescale/fman/mac.c | 8 ++++----
7 files changed, 24 insertions(+), 46 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.c b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
index a39d57347d59..167843941fa4 100644
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
@@ -879,7 +879,7 @@ static void graceful_stop(struct fman_mac *dtsec, enum comm_mode mode)
}
}
-int dtsec_enable(struct fman_mac *dtsec, enum comm_mode mode)
+int dtsec_enable(struct fman_mac *dtsec)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
u32 tmp;
@@ -889,20 +889,16 @@ int dtsec_enable(struct fman_mac *dtsec, enum comm_mode mode)
/* Enable */
tmp = ioread32be(®s->maccfg1);
- if (mode & COMM_MODE_RX)
- tmp |= MACCFG1_RX_EN;
- if (mode & COMM_MODE_TX)
- tmp |= MACCFG1_TX_EN;
-
+ tmp |= MACCFG1_RX_EN | MACCFG1_TX_EN;
iowrite32be(tmp, ®s->maccfg1);
/* Graceful start - clear the graceful Rx/Tx stop bit */
- graceful_start(dtsec, mode);
+ graceful_start(dtsec, COMM_MODE_RX_AND_TX);
return 0;
}
-int dtsec_disable(struct fman_mac *dtsec, enum comm_mode mode)
+int dtsec_disable(struct fman_mac *dtsec)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
u32 tmp;
@@ -911,14 +907,10 @@ int dtsec_disable(struct fman_mac *dtsec, enum comm_mode mode)
return -EINVAL;
/* Graceful stop - Assert the graceful Rx/Tx stop bit */
- graceful_stop(dtsec, mode);
+ graceful_stop(dtsec, COMM_MODE_RX_AND_TX);
tmp = ioread32be(®s->maccfg1);
- if (mode & COMM_MODE_RX)
- tmp &= ~MACCFG1_RX_EN;
- if (mode & COMM_MODE_TX)
- tmp &= ~MACCFG1_TX_EN;
-
+ tmp &= ~(MACCFG1_RX_EN | MACCFG1_TX_EN);
iowrite32be(tmp, ®s->maccfg1);
return 0;
diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.h b/drivers/net/ethernet/freescale/fman/fman_dtsec.h
index 3c26b97f8ced..f072cdc560ba 100644
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.h
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.h
@@ -16,8 +16,8 @@ int dtsec_adjust_link(struct fman_mac *dtsec,
int dtsec_restart_autoneg(struct fman_mac *dtsec);
int dtsec_cfg_max_frame_len(struct fman_mac *dtsec, u16 new_val);
int dtsec_cfg_pad_and_crc(struct fman_mac *dtsec, bool new_val);
-int dtsec_enable(struct fman_mac *dtsec, enum comm_mode mode);
-int dtsec_disable(struct fman_mac *dtsec, enum comm_mode mode);
+int dtsec_enable(struct fman_mac *dtsec);
+int dtsec_disable(struct fman_mac *dtsec);
int dtsec_init(struct fman_mac *dtsec);
int dtsec_free(struct fman_mac *dtsec);
int dtsec_accept_rx_pause_frames(struct fman_mac *dtsec, bool en);
diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.c b/drivers/net/ethernet/freescale/fman/fman_memac.c
index d47e5d282143..c34da49aed31 100644
--- a/drivers/net/ethernet/freescale/fman/fman_memac.c
+++ b/drivers/net/ethernet/freescale/fman/fman_memac.c
@@ -685,7 +685,7 @@ static bool is_init_done(struct memac_cfg *memac_drv_params)
return false;
}
-int memac_enable(struct fman_mac *memac, enum comm_mode mode)
+int memac_enable(struct fman_mac *memac)
{
struct memac_regs __iomem *regs = memac->regs;
u32 tmp;
@@ -694,17 +694,13 @@ int memac_enable(struct fman_mac *memac, enum comm_mode mode)
return -EINVAL;
tmp = ioread32be(®s->command_config);
- if (mode & COMM_MODE_RX)
- tmp |= CMD_CFG_RX_EN;
- if (mode & COMM_MODE_TX)
- tmp |= CMD_CFG_TX_EN;
-
+ tmp |= CMD_CFG_RX_EN | CMD_CFG_TX_EN;
iowrite32be(tmp, ®s->command_config);
return 0;
}
-int memac_disable(struct fman_mac *memac, enum comm_mode mode)
+int memac_disable(struct fman_mac *memac)
{
struct memac_regs __iomem *regs = memac->regs;
u32 tmp;
@@ -713,11 +709,7 @@ int memac_disable(struct fman_mac *memac, enum comm_mode mode)
return -EINVAL;
tmp = ioread32be(®s->command_config);
- if (mode & COMM_MODE_RX)
- tmp &= ~CMD_CFG_RX_EN;
- if (mode & COMM_MODE_TX)
- tmp &= ~CMD_CFG_TX_EN;
-
+ tmp &= ~(CMD_CFG_RX_EN | CMD_CFG_TX_EN);
iowrite32be(tmp, ®s->command_config);
return 0;
diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.h b/drivers/net/ethernet/freescale/fman/fman_memac.h
index 702df2aa43f9..535ecd2b2ab4 100644
--- a/drivers/net/ethernet/freescale/fman/fman_memac.h
+++ b/drivers/net/ethernet/freescale/fman/fman_memac.h
@@ -19,8 +19,8 @@ int memac_cfg_max_frame_len(struct fman_mac *memac, u16 new_val);
int memac_cfg_reset_on_init(struct fman_mac *memac, bool enable);
int memac_cfg_fixed_link(struct fman_mac *memac,
struct fixed_phy_status *fixed_link);
-int memac_enable(struct fman_mac *memac, enum comm_mode mode);
-int memac_disable(struct fman_mac *memac, enum comm_mode mode);
+int memac_enable(struct fman_mac *memac);
+int memac_disable(struct fman_mac *memac);
int memac_init(struct fman_mac *memac);
int memac_free(struct fman_mac *memac);
int memac_accept_rx_pause_frames(struct fman_mac *memac, bool en);
diff --git a/drivers/net/ethernet/freescale/fman/fman_tgec.c b/drivers/net/ethernet/freescale/fman/fman_tgec.c
index a3c6576dd99d..2b38d22c863d 100644
--- a/drivers/net/ethernet/freescale/fman/fman_tgec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_tgec.c
@@ -392,7 +392,7 @@ static bool is_init_done(struct tgec_cfg *cfg)
return false;
}
-int tgec_enable(struct fman_mac *tgec, enum comm_mode mode)
+int tgec_enable(struct fman_mac *tgec)
{
struct tgec_regs __iomem *regs = tgec->regs;
u32 tmp;
@@ -401,16 +401,13 @@ int tgec_enable(struct fman_mac *tgec, enum comm_mode mode)
return -EINVAL;
tmp = ioread32be(®s->command_config);
- if (mode & COMM_MODE_RX)
- tmp |= CMD_CFG_RX_EN;
- if (mode & COMM_MODE_TX)
- tmp |= CMD_CFG_TX_EN;
+ tmp |= CMD_CFG_RX_EN | CMD_CFG_TX_EN;
iowrite32be(tmp, ®s->command_config);
return 0;
}
-int tgec_disable(struct fman_mac *tgec, enum comm_mode mode)
+int tgec_disable(struct fman_mac *tgec)
{
struct tgec_regs __iomem *regs = tgec->regs;
u32 tmp;
@@ -419,10 +416,7 @@ int tgec_disable(struct fman_mac *tgec, enum comm_mode mode)
return -EINVAL;
tmp = ioread32be(®s->command_config);
- if (mode & COMM_MODE_RX)
- tmp &= ~CMD_CFG_RX_EN;
- if (mode & COMM_MODE_TX)
- tmp &= ~CMD_CFG_TX_EN;
+ tmp &= ~(CMD_CFG_RX_EN | CMD_CFG_TX_EN);
iowrite32be(tmp, ®s->command_config);
return 0;
diff --git a/drivers/net/ethernet/freescale/fman/fman_tgec.h b/drivers/net/ethernet/freescale/fman/fman_tgec.h
index 8df90054495c..5b256758cbec 100644
--- a/drivers/net/ethernet/freescale/fman/fman_tgec.h
+++ b/drivers/net/ethernet/freescale/fman/fman_tgec.h
@@ -12,8 +12,8 @@ struct fman_mac *tgec_config(struct fman_mac_params *params);
int tgec_set_promiscuous(struct fman_mac *tgec, bool new_val);
int tgec_modify_mac_address(struct fman_mac *tgec, const enet_addr_t *enet_addr);
int tgec_cfg_max_frame_len(struct fman_mac *tgec, u16 new_val);
-int tgec_enable(struct fman_mac *tgec, enum comm_mode mode);
-int tgec_disable(struct fman_mac *tgec, enum comm_mode mode);
+int tgec_enable(struct fman_mac *tgec);
+int tgec_disable(struct fman_mac *tgec);
int tgec_init(struct fman_mac *tgec);
int tgec_free(struct fman_mac *tgec);
int tgec_accept_rx_pause_frames(struct fman_mac *tgec, bool en);
diff --git a/drivers/net/ethernet/freescale/fman/mac.c b/drivers/net/ethernet/freescale/fman/mac.c
index 2b3c6cbefef6..a8d521760ffc 100644
--- a/drivers/net/ethernet/freescale/fman/mac.c
+++ b/drivers/net/ethernet/freescale/fman/mac.c
@@ -40,8 +40,8 @@ struct mac_priv_s {
u16 speed;
u16 max_speed;
- int (*enable)(struct fman_mac *mac_dev, enum comm_mode mode);
- int (*disable)(struct fman_mac *mac_dev, enum comm_mode mode);
+ int (*enable)(struct fman_mac *mac_dev);
+ int (*disable)(struct fman_mac *mac_dev);
};
struct mac_address {
@@ -247,7 +247,7 @@ static int start(struct mac_device *mac_dev)
struct phy_device *phy_dev = mac_dev->phy_dev;
struct mac_priv_s *priv = mac_dev->priv;
- err = priv->enable(mac_dev->fman_mac, COMM_MODE_RX_AND_TX);
+ err = priv->enable(mac_dev->fman_mac);
if (!err && phy_dev)
phy_start(phy_dev);
@@ -261,7 +261,7 @@ static int stop(struct mac_device *mac_dev)
if (mac_dev->phy_dev)
phy_stop(mac_dev->phy_dev);
- return priv->disable(mac_dev->fman_mac, COMM_MODE_RX_AND_TX);
+ return priv->disable(mac_dev->fman_mac);
}
static int set_multi(struct net_device *net_dev, struct mac_device *mac_dev)
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* [PATCH net-next v3 17/47] net: fman: Store en/disable in mac_device instead of mac_priv_s
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (15 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 16/47] net: fman: Don't pass comm_mode to enable/disable Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 18/47] net: fman: dtsec: Always gracefully stop/start Sean Anderson
` (30 subsequent siblings)
47 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Camelia Groza
All macs use the same start/stop functions. The actual mac-specific code
lives in enable/disable. Move these functions to an appropriate struct,
and inline the phy enable/disable calls to the caller of start/stop.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
Tested-by: Camelia Groza <camelia.groza@nxp.com>
---
(no changes since v1)
.../net/ethernet/freescale/dpaa/dpaa_eth.c | 11 +++--
drivers/net/ethernet/freescale/fman/mac.c | 44 +++----------------
drivers/net/ethernet/freescale/fman/mac.h | 4 +-
3 files changed, 15 insertions(+), 44 deletions(-)
diff --git a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
index a770bab4d1ed..e974d90f15e3 100644
--- a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
+++ b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
@@ -288,9 +288,11 @@ static int dpaa_stop(struct net_device *net_dev)
*/
msleep(200);
- err = mac_dev->stop(mac_dev);
+ if (mac_dev->phy_dev)
+ phy_stop(mac_dev->phy_dev);
+ err = mac_dev->disable(mac_dev->fman_mac);
if (err < 0)
- netif_err(priv, ifdown, net_dev, "mac_dev->stop() = %d\n",
+ netif_err(priv, ifdown, net_dev, "mac_dev->disable() = %d\n",
err);
for (i = 0; i < ARRAY_SIZE(mac_dev->port); i++) {
@@ -2946,11 +2948,12 @@ static int dpaa_open(struct net_device *net_dev)
goto mac_start_failed;
}
- err = priv->mac_dev->start(mac_dev);
+ err = priv->mac_dev->enable(mac_dev->fman_mac);
if (err < 0) {
- netif_err(priv, ifup, net_dev, "mac_dev->start() = %d\n", err);
+ netif_err(priv, ifup, net_dev, "mac_dev->enable() = %d\n", err);
goto mac_start_failed;
}
+ phy_start(priv->mac_dev->phy_dev);
netif_tx_start_all_queues(net_dev);
diff --git a/drivers/net/ethernet/freescale/fman/mac.c b/drivers/net/ethernet/freescale/fman/mac.c
index a8d521760ffc..6a4eaca83700 100644
--- a/drivers/net/ethernet/freescale/fman/mac.c
+++ b/drivers/net/ethernet/freescale/fman/mac.c
@@ -39,9 +39,6 @@ struct mac_priv_s {
struct fixed_phy_status *fixed_link;
u16 speed;
u16 max_speed;
-
- int (*enable)(struct fman_mac *mac_dev);
- int (*disable)(struct fman_mac *mac_dev);
};
struct mac_address {
@@ -241,29 +238,6 @@ static int memac_initialization(struct mac_device *mac_dev)
return err;
}
-static int start(struct mac_device *mac_dev)
-{
- int err;
- struct phy_device *phy_dev = mac_dev->phy_dev;
- struct mac_priv_s *priv = mac_dev->priv;
-
- err = priv->enable(mac_dev->fman_mac);
- if (!err && phy_dev)
- phy_start(phy_dev);
-
- return err;
-}
-
-static int stop(struct mac_device *mac_dev)
-{
- struct mac_priv_s *priv = mac_dev->priv;
-
- if (mac_dev->phy_dev)
- phy_stop(mac_dev->phy_dev);
-
- return priv->disable(mac_dev->fman_mac);
-}
-
static int set_multi(struct net_device *net_dev, struct mac_device *mac_dev)
{
struct mac_priv_s *priv;
@@ -454,11 +428,9 @@ static void setup_dtsec(struct mac_device *mac_dev)
mac_dev->set_allmulti = dtsec_set_allmulti;
mac_dev->set_tstamp = dtsec_set_tstamp;
mac_dev->set_multi = set_multi;
- mac_dev->start = start;
- mac_dev->stop = stop;
mac_dev->adjust_link = adjust_link_dtsec;
- mac_dev->priv->enable = dtsec_enable;
- mac_dev->priv->disable = dtsec_disable;
+ mac_dev->enable = dtsec_enable;
+ mac_dev->disable = dtsec_disable;
}
static void setup_tgec(struct mac_device *mac_dev)
@@ -474,11 +446,9 @@ static void setup_tgec(struct mac_device *mac_dev)
mac_dev->set_allmulti = tgec_set_allmulti;
mac_dev->set_tstamp = tgec_set_tstamp;
mac_dev->set_multi = set_multi;
- mac_dev->start = start;
- mac_dev->stop = stop;
mac_dev->adjust_link = adjust_link_void;
- mac_dev->priv->enable = tgec_enable;
- mac_dev->priv->disable = tgec_disable;
+ mac_dev->enable = tgec_enable;
+ mac_dev->disable = tgec_disable;
}
static void setup_memac(struct mac_device *mac_dev)
@@ -494,11 +464,9 @@ static void setup_memac(struct mac_device *mac_dev)
mac_dev->set_allmulti = memac_set_allmulti;
mac_dev->set_tstamp = memac_set_tstamp;
mac_dev->set_multi = set_multi;
- mac_dev->start = start;
- mac_dev->stop = stop;
mac_dev->adjust_link = adjust_link_memac;
- mac_dev->priv->enable = memac_enable;
- mac_dev->priv->disable = memac_disable;
+ mac_dev->enable = memac_enable;
+ mac_dev->disable = memac_disable;
}
#define DTSEC_SUPPORTED \
diff --git a/drivers/net/ethernet/freescale/fman/mac.h b/drivers/net/ethernet/freescale/fman/mac.h
index 909faf5fa2fe..95f67b4efb61 100644
--- a/drivers/net/ethernet/freescale/fman/mac.h
+++ b/drivers/net/ethernet/freescale/fman/mac.h
@@ -36,8 +36,8 @@ struct mac_device {
bool allmulti;
int (*init)(struct mac_device *mac_dev);
- int (*start)(struct mac_device *mac_dev);
- int (*stop)(struct mac_device *mac_dev);
+ int (*enable)(struct fman_mac *mac_dev);
+ int (*disable)(struct fman_mac *mac_dev);
void (*adjust_link)(struct mac_device *mac_dev);
int (*set_promisc)(struct fman_mac *mac_dev, bool enable);
int (*change_addr)(struct fman_mac *mac_dev, const enet_addr_t *enet_addr);
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* [PATCH net-next v3 18/47] net: fman: dtsec: Always gracefully stop/start
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (16 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 17/47] net: fman: Store en/disable in mac_device instead of mac_priv_s Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 19/47] net: fman: Get PCS node in per-mac init Sean Anderson
` (29 subsequent siblings)
47 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Camelia Groza
There are two ways that GRS can be set: graceful_stop and dtsec_isr. It
is cleared by graceful_start. If it is already set before calling
graceful_stop, then that means that dtsec_isr set it. In that case, we
will not set GRS nor will we clear it (which seems like a bug?). For GTS
the logic is similar, except that there is no one else messing with this
bit (so we will always set and clear it). Simplify the logic by always
setting/clearing GRS/GTS. This is less racy that the previous behavior,
and ensures that we always end up clearing the bits. This can of course
clear GRS while dtsec_isr is waiting, but because we have already done
our own waiting it should be fine.
This is the last user of enum comm_mode, so remove it.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
Tested-by: Camelia Groza <camelia.groza@nxp.com>
---
Changes since previous series:
- Fix unused variable warning in dtsec_modify_mac_address
(no changes since v1)
.../net/ethernet/freescale/fman/fman_dtsec.c | 94 ++++++-------------
.../net/ethernet/freescale/fman/fman_mac.h | 10 --
2 files changed, 30 insertions(+), 74 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.c b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
index 167843941fa4..7f4f3d797a8d 100644
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
@@ -833,49 +833,41 @@ int dtsec_cfg_pad_and_crc(struct fman_mac *dtsec, bool new_val)
return 0;
}
-static void graceful_start(struct fman_mac *dtsec, enum comm_mode mode)
+static void graceful_start(struct fman_mac *dtsec)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
- if (mode & COMM_MODE_TX)
- iowrite32be(ioread32be(®s->tctrl) &
- ~TCTRL_GTS, ®s->tctrl);
- if (mode & COMM_MODE_RX)
- iowrite32be(ioread32be(®s->rctrl) &
- ~RCTRL_GRS, ®s->rctrl);
+ iowrite32be(ioread32be(®s->tctrl) & ~TCTRL_GTS, ®s->tctrl);
+ iowrite32be(ioread32be(®s->rctrl) & ~RCTRL_GRS, ®s->rctrl);
}
-static void graceful_stop(struct fman_mac *dtsec, enum comm_mode mode)
+static void graceful_stop(struct fman_mac *dtsec)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
u32 tmp;
/* Graceful stop - Assert the graceful Rx stop bit */
- if (mode & COMM_MODE_RX) {
- tmp = ioread32be(®s->rctrl) | RCTRL_GRS;
- iowrite32be(tmp, ®s->rctrl);
+ tmp = ioread32be(®s->rctrl) | RCTRL_GRS;
+ iowrite32be(tmp, ®s->rctrl);
- if (dtsec->fm_rev_info.major == 2) {
- /* Workaround for dTSEC Errata A002 */
- usleep_range(100, 200);
- } else {
- /* Workaround for dTSEC Errata A004839 */
- usleep_range(10, 50);
- }
+ if (dtsec->fm_rev_info.major == 2) {
+ /* Workaround for dTSEC Errata A002 */
+ usleep_range(100, 200);
+ } else {
+ /* Workaround for dTSEC Errata A004839 */
+ usleep_range(10, 50);
}
/* Graceful stop - Assert the graceful Tx stop bit */
- if (mode & COMM_MODE_TX) {
- if (dtsec->fm_rev_info.major == 2) {
- /* dTSEC Errata A004: Do not use TCTRL[GTS]=1 */
- pr_debug("GTS not supported due to DTSEC_A004 Errata.\n");
- } else {
- tmp = ioread32be(®s->tctrl) | TCTRL_GTS;
- iowrite32be(tmp, ®s->tctrl);
+ if (dtsec->fm_rev_info.major == 2) {
+ /* dTSEC Errata A004: Do not use TCTRL[GTS]=1 */
+ pr_debug("GTS not supported due to DTSEC_A004 Errata.\n");
+ } else {
+ tmp = ioread32be(®s->tctrl) | TCTRL_GTS;
+ iowrite32be(tmp, ®s->tctrl);
- /* Workaround for dTSEC Errata A0012, A0014 */
- usleep_range(10, 50);
- }
+ /* Workaround for dTSEC Errata A0012, A0014 */
+ usleep_range(10, 50);
}
}
@@ -893,7 +885,7 @@ int dtsec_enable(struct fman_mac *dtsec)
iowrite32be(tmp, ®s->maccfg1);
/* Graceful start - clear the graceful Rx/Tx stop bit */
- graceful_start(dtsec, COMM_MODE_RX_AND_TX);
+ graceful_start(dtsec);
return 0;
}
@@ -907,7 +899,7 @@ int dtsec_disable(struct fman_mac *dtsec)
return -EINVAL;
/* Graceful stop - Assert the graceful Rx/Tx stop bit */
- graceful_stop(dtsec, COMM_MODE_RX_AND_TX);
+ graceful_stop(dtsec);
tmp = ioread32be(®s->maccfg1);
tmp &= ~(MACCFG1_RX_EN | MACCFG1_TX_EN);
@@ -921,18 +913,12 @@ int dtsec_set_tx_pause_frames(struct fman_mac *dtsec,
u16 pause_time, u16 __maybe_unused thresh_time)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
- enum comm_mode mode = COMM_MODE_NONE;
u32 ptv = 0;
if (!is_init_done(dtsec->dtsec_drv_param))
return -EINVAL;
- if ((ioread32be(®s->rctrl) & RCTRL_GRS) == 0)
- mode |= COMM_MODE_RX;
- if ((ioread32be(®s->tctrl) & TCTRL_GTS) == 0)
- mode |= COMM_MODE_TX;
-
- graceful_stop(dtsec, mode);
+ graceful_stop(dtsec);
if (pause_time) {
/* FM_BAD_TX_TS_IN_B_2_B_ERRATA_DTSEC_A003 Errata workaround */
@@ -954,7 +940,7 @@ int dtsec_set_tx_pause_frames(struct fman_mac *dtsec,
iowrite32be(ioread32be(®s->maccfg1) & ~MACCFG1_TX_FLOW,
®s->maccfg1);
- graceful_start(dtsec, mode);
+ graceful_start(dtsec);
return 0;
}
@@ -962,18 +948,12 @@ int dtsec_set_tx_pause_frames(struct fman_mac *dtsec,
int dtsec_accept_rx_pause_frames(struct fman_mac *dtsec, bool en)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
- enum comm_mode mode = COMM_MODE_NONE;
u32 tmp;
if (!is_init_done(dtsec->dtsec_drv_param))
return -EINVAL;
- if ((ioread32be(®s->rctrl) & RCTRL_GRS) == 0)
- mode |= COMM_MODE_RX;
- if ((ioread32be(®s->tctrl) & TCTRL_GTS) == 0)
- mode |= COMM_MODE_TX;
-
- graceful_stop(dtsec, mode);
+ graceful_stop(dtsec);
tmp = ioread32be(®s->maccfg1);
if (en)
@@ -982,25 +962,17 @@ int dtsec_accept_rx_pause_frames(struct fman_mac *dtsec, bool en)
tmp &= ~MACCFG1_RX_FLOW;
iowrite32be(tmp, ®s->maccfg1);
- graceful_start(dtsec, mode);
+ graceful_start(dtsec);
return 0;
}
int dtsec_modify_mac_address(struct fman_mac *dtsec, const enet_addr_t *enet_addr)
{
- struct dtsec_regs __iomem *regs = dtsec->regs;
- enum comm_mode mode = COMM_MODE_NONE;
-
if (!is_init_done(dtsec->dtsec_drv_param))
return -EINVAL;
- if ((ioread32be(®s->rctrl) & RCTRL_GRS) == 0)
- mode |= COMM_MODE_RX;
- if ((ioread32be(®s->tctrl) & TCTRL_GTS) == 0)
- mode |= COMM_MODE_TX;
-
- graceful_stop(dtsec, mode);
+ graceful_stop(dtsec);
/* Initialize MAC Station Address registers (1 & 2)
* Station address have to be swapped (big endian to little endian
@@ -1008,7 +980,7 @@ int dtsec_modify_mac_address(struct fman_mac *dtsec, const enet_addr_t *enet_add
dtsec->addr = ENET_ADDR_TO_UINT64(*enet_addr);
set_mac_address(dtsec->regs, (const u8 *)(*enet_addr));
- graceful_start(dtsec, mode);
+ graceful_start(dtsec);
return 0;
}
@@ -1226,18 +1198,12 @@ int dtsec_set_promiscuous(struct fman_mac *dtsec, bool new_val)
int dtsec_adjust_link(struct fman_mac *dtsec, u16 speed)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
- enum comm_mode mode = COMM_MODE_NONE;
u32 tmp;
if (!is_init_done(dtsec->dtsec_drv_param))
return -EINVAL;
- if ((ioread32be(®s->rctrl) & RCTRL_GRS) == 0)
- mode |= COMM_MODE_RX;
- if ((ioread32be(®s->tctrl) & TCTRL_GTS) == 0)
- mode |= COMM_MODE_TX;
-
- graceful_stop(dtsec, mode);
+ graceful_stop(dtsec);
tmp = ioread32be(®s->maccfg2);
@@ -1258,7 +1224,7 @@ int dtsec_adjust_link(struct fman_mac *dtsec, u16 speed)
tmp &= ~DTSEC_ECNTRL_R100M;
iowrite32be(tmp, ®s->ecntrl);
- graceful_start(dtsec, mode);
+ graceful_start(dtsec);
return 0;
}
diff --git a/drivers/net/ethernet/freescale/fman/fman_mac.h b/drivers/net/ethernet/freescale/fman/fman_mac.h
index 19f327efdaff..418d1de85702 100644
--- a/drivers/net/ethernet/freescale/fman/fman_mac.h
+++ b/drivers/net/ethernet/freescale/fman/fman_mac.h
@@ -75,16 +75,6 @@ typedef u8 enet_addr_t[ETH_ALEN];
#define ETH_HASH_ENTRY_OBJ(ptr) \
hlist_entry_safe(ptr, struct eth_hash_entry, node)
-/* Enumeration (bit flags) of communication modes (Transmit,
- * receive or both).
- */
-enum comm_mode {
- COMM_MODE_NONE = 0, /* No transmit/receive communication */
- COMM_MODE_RX = 1, /* Only receive communication */
- COMM_MODE_TX = 2, /* Only transmit communication */
- COMM_MODE_RX_AND_TX = 3 /* Both transmit and receive communication */
-};
-
/* FM MAC Exceptions */
enum fman_mac_exceptions {
FM_MAC_EX_10G_MDIO_SCAN_EVENT = 0
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* [PATCH net-next v3 19/47] net: fman: Get PCS node in per-mac init
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (17 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 18/47] net: fman: dtsec: Always gracefully stop/start Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 12:39 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 20/47] net: fman: Store initialization function in match data Sean Anderson
` (28 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
This moves the reading of the PCS property out of the generic probe and
into the mac-specific initialization function. This reduces the
mac-specific jobs done in the top-level probe function.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v1)
drivers/net/ethernet/freescale/fman/mac.c | 19 +++++++++----------
drivers/net/ethernet/freescale/fman/mac.h | 2 +-
2 files changed, 10 insertions(+), 11 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/mac.c b/drivers/net/ethernet/freescale/fman/mac.c
index 6a4eaca83700..0af6f6c49284 100644
--- a/drivers/net/ethernet/freescale/fman/mac.c
+++ b/drivers/net/ethernet/freescale/fman/mac.c
@@ -32,7 +32,6 @@ struct mac_priv_s {
void __iomem *vaddr;
u8 cell_index;
struct fman *fman;
- struct device_node *internal_phy_node;
/* List of multicast addresses */
struct list_head mc_addr_list;
struct platform_device *eth_dev;
@@ -85,12 +84,12 @@ static int set_fman_mac_params(struct mac_device *mac_dev,
params->exception_cb = mac_exception;
params->event_cb = mac_exception;
params->dev_id = mac_dev;
- params->internal_phy_node = priv->internal_phy_node;
return 0;
}
-static int tgec_initialization(struct mac_device *mac_dev)
+static int tgec_initialization(struct mac_device *mac_dev,
+ struct device_node *mac_node)
{
int err;
struct mac_priv_s *priv;
@@ -138,7 +137,8 @@ static int tgec_initialization(struct mac_device *mac_dev)
return err;
}
-static int dtsec_initialization(struct mac_device *mac_dev)
+static int dtsec_initialization(struct mac_device *mac_dev,
+ struct device_node *mac_node)
{
int err;
struct mac_priv_s *priv;
@@ -150,6 +150,7 @@ static int dtsec_initialization(struct mac_device *mac_dev)
err = set_fman_mac_params(mac_dev, ¶ms);
if (err)
goto _return;
+ params.internal_phy_node = of_parse_phandle(mac_node, "tbi-handle", 0);
mac_dev->fman_mac = dtsec_config(¶ms);
if (!mac_dev->fman_mac) {
@@ -190,7 +191,8 @@ static int dtsec_initialization(struct mac_device *mac_dev)
return err;
}
-static int memac_initialization(struct mac_device *mac_dev)
+static int memac_initialization(struct mac_device *mac_dev,
+ struct device_node *mac_node)
{
int err;
struct mac_priv_s *priv;
@@ -201,6 +203,7 @@ static int memac_initialization(struct mac_device *mac_dev)
err = set_fman_mac_params(mac_dev, ¶ms);
if (err)
goto _return;
+ params.internal_phy_node = of_parse_phandle(mac_node, "pcsphy-handle", 0);
if (priv->max_speed == SPEED_10000)
params.phy_if = PHY_INTERFACE_MODE_XGMII;
@@ -583,14 +586,10 @@ static int mac_probe(struct platform_device *_of_dev)
if (of_device_is_compatible(mac_node, "fsl,fman-dtsec")) {
setup_dtsec(mac_dev);
- priv->internal_phy_node = of_parse_phandle(mac_node,
- "tbi-handle", 0);
} else if (of_device_is_compatible(mac_node, "fsl,fman-xgec")) {
setup_tgec(mac_dev);
} else if (of_device_is_compatible(mac_node, "fsl,fman-memac")) {
setup_memac(mac_dev);
- priv->internal_phy_node = of_parse_phandle(mac_node,
- "pcsphy-handle", 0);
} else {
dev_err(dev, "MAC node (%pOF) contains unsupported MAC\n",
mac_node);
@@ -783,7 +782,7 @@ static int mac_probe(struct platform_device *_of_dev)
put_device(&phy->mdio.dev);
}
- err = mac_dev->init(mac_dev);
+ err = mac_dev->init(mac_dev, mac_node);
if (err < 0) {
dev_err(dev, "mac_dev->init() = %d\n", err);
of_node_put(mac_dev->phy_node);
diff --git a/drivers/net/ethernet/freescale/fman/mac.h b/drivers/net/ethernet/freescale/fman/mac.h
index 95f67b4efb61..e4329c7d5001 100644
--- a/drivers/net/ethernet/freescale/fman/mac.h
+++ b/drivers/net/ethernet/freescale/fman/mac.h
@@ -35,7 +35,7 @@ struct mac_device {
bool promisc;
bool allmulti;
- int (*init)(struct mac_device *mac_dev);
+ int (*init)(struct mac_device *mac_dev, struct device_node *mac_node);
int (*enable)(struct fman_mac *mac_dev);
int (*disable)(struct fman_mac *mac_dev);
void (*adjust_link)(struct mac_device *mac_dev);
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 19/47] net: fman: Get PCS node in per-mac init
2022-07-15 21:59 ` [PATCH net-next v3 19/47] net: fman: Get PCS node in per-mac init Sean Anderson
@ 2022-07-21 12:39 ` Camelia Alexandra Groza
0 siblings, 0 replies; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 12:39 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 0:59
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>
> Subject: [PATCH net-next v3 19/47] net: fman: Get PCS node in per-mac init
>
> This moves the reading of the PCS property out of the generic probe and
> into the mac-specific initialization function. This reduces the
> mac-specific jobs done in the top-level probe function.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 20/47] net: fman: Store initialization function in match data
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (18 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 19/47] net: fman: Get PCS node in per-mac init Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 12:51 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 21/47] net: fman: Move struct dev to mac_device Sean Anderson
` (27 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
Instead of re-matching the compatible string in order to determine the
init function, just store it in the match data. This also move the setting
of the rest of the functions into init as well. To ensure everything
compiles correctly, we move them to the bottom of the file.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v1)
drivers/net/ethernet/freescale/fman/mac.c | 356 ++++++++++------------
drivers/net/ethernet/freescale/fman/mac.h | 1 -
2 files changed, 165 insertions(+), 192 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/mac.c b/drivers/net/ethernet/freescale/fman/mac.c
index 0af6f6c49284..8dd6a5b12922 100644
--- a/drivers/net/ethernet/freescale/fman/mac.c
+++ b/drivers/net/ethernet/freescale/fman/mac.c
@@ -88,159 +88,6 @@ static int set_fman_mac_params(struct mac_device *mac_dev,
return 0;
}
-static int tgec_initialization(struct mac_device *mac_dev,
- struct device_node *mac_node)
-{
- int err;
- struct mac_priv_s *priv;
- struct fman_mac_params params;
- u32 version;
-
- priv = mac_dev->priv;
-
- err = set_fman_mac_params(mac_dev, ¶ms);
- if (err)
- goto _return;
-
- mac_dev->fman_mac = tgec_config(¶ms);
- if (!mac_dev->fman_mac) {
- err = -EINVAL;
- goto _return;
- }
-
- err = tgec_cfg_max_frame_len(mac_dev->fman_mac, fman_get_max_frm());
- if (err < 0)
- goto _return_fm_mac_free;
-
- err = tgec_init(mac_dev->fman_mac);
- if (err < 0)
- goto _return_fm_mac_free;
-
- /* For 10G MAC, disable Tx ECC exception */
- err = mac_dev->set_exception(mac_dev->fman_mac,
- FM_MAC_EX_10G_TX_ECC_ER, false);
- if (err < 0)
- goto _return_fm_mac_free;
-
- err = tgec_get_version(mac_dev->fman_mac, &version);
- if (err < 0)
- goto _return_fm_mac_free;
-
- dev_info(priv->dev, "FMan XGEC version: 0x%08x\n", version);
-
- goto _return;
-
-_return_fm_mac_free:
- tgec_free(mac_dev->fman_mac);
-
-_return:
- return err;
-}
-
-static int dtsec_initialization(struct mac_device *mac_dev,
- struct device_node *mac_node)
-{
- int err;
- struct mac_priv_s *priv;
- struct fman_mac_params params;
- u32 version;
-
- priv = mac_dev->priv;
-
- err = set_fman_mac_params(mac_dev, ¶ms);
- if (err)
- goto _return;
- params.internal_phy_node = of_parse_phandle(mac_node, "tbi-handle", 0);
-
- mac_dev->fman_mac = dtsec_config(¶ms);
- if (!mac_dev->fman_mac) {
- err = -EINVAL;
- goto _return;
- }
-
- err = dtsec_cfg_max_frame_len(mac_dev->fman_mac, fman_get_max_frm());
- if (err < 0)
- goto _return_fm_mac_free;
-
- err = dtsec_cfg_pad_and_crc(mac_dev->fman_mac, true);
- if (err < 0)
- goto _return_fm_mac_free;
-
- err = dtsec_init(mac_dev->fman_mac);
- if (err < 0)
- goto _return_fm_mac_free;
-
- /* For 1G MAC, disable by default the MIB counters overflow interrupt */
- err = mac_dev->set_exception(mac_dev->fman_mac,
- FM_MAC_EX_1G_RX_MIB_CNT_OVFL, false);
- if (err < 0)
- goto _return_fm_mac_free;
-
- err = dtsec_get_version(mac_dev->fman_mac, &version);
- if (err < 0)
- goto _return_fm_mac_free;
-
- dev_info(priv->dev, "FMan dTSEC version: 0x%08x\n", version);
-
- goto _return;
-
-_return_fm_mac_free:
- dtsec_free(mac_dev->fman_mac);
-
-_return:
- return err;
-}
-
-static int memac_initialization(struct mac_device *mac_dev,
- struct device_node *mac_node)
-{
- int err;
- struct mac_priv_s *priv;
- struct fman_mac_params params;
-
- priv = mac_dev->priv;
-
- err = set_fman_mac_params(mac_dev, ¶ms);
- if (err)
- goto _return;
- params.internal_phy_node = of_parse_phandle(mac_node, "pcsphy-handle", 0);
-
- if (priv->max_speed == SPEED_10000)
- params.phy_if = PHY_INTERFACE_MODE_XGMII;
-
- mac_dev->fman_mac = memac_config(¶ms);
- if (!mac_dev->fman_mac) {
- err = -EINVAL;
- goto _return;
- }
-
- err = memac_cfg_max_frame_len(mac_dev->fman_mac, fman_get_max_frm());
- if (err < 0)
- goto _return_fm_mac_free;
-
- err = memac_cfg_reset_on_init(mac_dev->fman_mac, true);
- if (err < 0)
- goto _return_fm_mac_free;
-
- err = memac_cfg_fixed_link(mac_dev->fman_mac, priv->fixed_link);
- if (err < 0)
- goto _return_fm_mac_free;
-
- err = memac_init(mac_dev->fman_mac);
- if (err < 0)
- goto _return_fm_mac_free;
-
- dev_info(priv->dev, "FMan MEMAC\n");
-
- goto _return;
-
-_return_fm_mac_free:
- memac_free(mac_dev->fman_mac);
-
-_return:
- return err;
-}
-
static int set_multi(struct net_device *net_dev, struct mac_device *mac_dev)
{
struct mac_priv_s *priv;
@@ -418,27 +265,15 @@ static void adjust_link_memac(struct mac_device *mac_dev)
err);
}
-static void setup_dtsec(struct mac_device *mac_dev)
+static int tgec_initialization(struct mac_device *mac_dev,
+ struct device_node *mac_node)
{
- mac_dev->init = dtsec_initialization;
- mac_dev->set_promisc = dtsec_set_promiscuous;
- mac_dev->change_addr = dtsec_modify_mac_address;
- mac_dev->add_hash_mac_addr = dtsec_add_hash_mac_address;
- mac_dev->remove_hash_mac_addr = dtsec_del_hash_mac_address;
- mac_dev->set_tx_pause = dtsec_set_tx_pause_frames;
- mac_dev->set_rx_pause = dtsec_accept_rx_pause_frames;
- mac_dev->set_exception = dtsec_set_exception;
- mac_dev->set_allmulti = dtsec_set_allmulti;
- mac_dev->set_tstamp = dtsec_set_tstamp;
- mac_dev->set_multi = set_multi;
- mac_dev->adjust_link = adjust_link_dtsec;
- mac_dev->enable = dtsec_enable;
- mac_dev->disable = dtsec_disable;
-}
+ int err;
+ struct mac_priv_s *priv;
+ struct fman_mac_params params;
+ u32 version;
-static void setup_tgec(struct mac_device *mac_dev)
-{
- mac_dev->init = tgec_initialization;
+ priv = mac_dev->priv;
mac_dev->set_promisc = tgec_set_promiscuous;
mac_dev->change_addr = tgec_modify_mac_address;
mac_dev->add_hash_mac_addr = tgec_add_hash_mac_address;
@@ -452,11 +287,121 @@ static void setup_tgec(struct mac_device *mac_dev)
mac_dev->adjust_link = adjust_link_void;
mac_dev->enable = tgec_enable;
mac_dev->disable = tgec_disable;
+
+ err = set_fman_mac_params(mac_dev, ¶ms);
+ if (err)
+ goto _return;
+
+ mac_dev->fman_mac = tgec_config(¶ms);
+ if (!mac_dev->fman_mac) {
+ err = -EINVAL;
+ goto _return;
+ }
+
+ err = tgec_cfg_max_frame_len(mac_dev->fman_mac, fman_get_max_frm());
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ err = tgec_init(mac_dev->fman_mac);
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ /* For 10G MAC, disable Tx ECC exception */
+ err = mac_dev->set_exception(mac_dev->fman_mac,
+ FM_MAC_EX_10G_TX_ECC_ER, false);
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ err = tgec_get_version(mac_dev->fman_mac, &version);
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ dev_info(priv->dev, "FMan XGEC version: 0x%08x\n", version);
+
+ goto _return;
+
+_return_fm_mac_free:
+ tgec_free(mac_dev->fman_mac);
+
+_return:
+ return err;
+}
+
+static int dtsec_initialization(struct mac_device *mac_dev,
+ struct device_node *mac_node)
+{
+ int err;
+ struct mac_priv_s *priv;
+ struct fman_mac_params params;
+ u32 version;
+
+ priv = mac_dev->priv;
+ mac_dev->set_promisc = dtsec_set_promiscuous;
+ mac_dev->change_addr = dtsec_modify_mac_address;
+ mac_dev->add_hash_mac_addr = dtsec_add_hash_mac_address;
+ mac_dev->remove_hash_mac_addr = dtsec_del_hash_mac_address;
+ mac_dev->set_tx_pause = dtsec_set_tx_pause_frames;
+ mac_dev->set_rx_pause = dtsec_accept_rx_pause_frames;
+ mac_dev->set_exception = dtsec_set_exception;
+ mac_dev->set_allmulti = dtsec_set_allmulti;
+ mac_dev->set_tstamp = dtsec_set_tstamp;
+ mac_dev->set_multi = set_multi;
+ mac_dev->adjust_link = adjust_link_dtsec;
+ mac_dev->enable = dtsec_enable;
+ mac_dev->disable = dtsec_disable;
+
+ err = set_fman_mac_params(mac_dev, ¶ms);
+ if (err)
+ goto _return;
+ params.internal_phy_node = of_parse_phandle(mac_node, "tbi-handle", 0);
+
+ mac_dev->fman_mac = dtsec_config(¶ms);
+ if (!mac_dev->fman_mac) {
+ err = -EINVAL;
+ goto _return;
+ }
+
+ err = dtsec_cfg_max_frame_len(mac_dev->fman_mac, fman_get_max_frm());
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ err = dtsec_cfg_pad_and_crc(mac_dev->fman_mac, true);
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ err = dtsec_init(mac_dev->fman_mac);
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ /* For 1G MAC, disable by default the MIB counters overflow interrupt */
+ err = mac_dev->set_exception(mac_dev->fman_mac,
+ FM_MAC_EX_1G_RX_MIB_CNT_OVFL, false);
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ err = dtsec_get_version(mac_dev->fman_mac, &version);
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ dev_info(priv->dev, "FMan dTSEC version: 0x%08x\n", version);
+
+ goto _return;
+
+_return_fm_mac_free:
+ dtsec_free(mac_dev->fman_mac);
+
+_return:
+ return err;
}
-static void setup_memac(struct mac_device *mac_dev)
+static int memac_initialization(struct mac_device *mac_dev,
+ struct device_node *mac_node)
{
- mac_dev->init = memac_initialization;
+ int err;
+ struct mac_priv_s *priv;
+ struct fman_mac_params params;
+
+ priv = mac_dev->priv;
mac_dev->set_promisc = memac_set_promiscuous;
mac_dev->change_addr = memac_modify_mac_address;
mac_dev->add_hash_mac_addr = memac_add_hash_mac_address;
@@ -470,6 +415,46 @@ static void setup_memac(struct mac_device *mac_dev)
mac_dev->adjust_link = adjust_link_memac;
mac_dev->enable = memac_enable;
mac_dev->disable = memac_disable;
+
+ err = set_fman_mac_params(mac_dev, ¶ms);
+ if (err)
+ goto _return;
+ params.internal_phy_node = of_parse_phandle(mac_node, "pcsphy-handle", 0);
+
+ if (priv->max_speed == SPEED_10000)
+ params.phy_if = PHY_INTERFACE_MODE_XGMII;
+
+ mac_dev->fman_mac = memac_config(¶ms);
+ if (!mac_dev->fman_mac) {
+ err = -EINVAL;
+ goto _return;
+ }
+
+ err = memac_cfg_max_frame_len(mac_dev->fman_mac, fman_get_max_frm());
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ err = memac_cfg_reset_on_init(mac_dev->fman_mac, true);
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ err = memac_cfg_fixed_link(mac_dev->fman_mac, priv->fixed_link);
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ err = memac_init(mac_dev->fman_mac);
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ dev_info(priv->dev, "FMan MEMAC\n");
+
+ goto _return;
+
+_return_fm_mac_free:
+ memac_free(mac_dev->fman_mac);
+
+_return:
+ return err;
}
#define DTSEC_SUPPORTED \
@@ -546,9 +531,9 @@ static struct platform_device *dpaa_eth_add_device(int fman_id,
}
static const struct of_device_id mac_match[] = {
- { .compatible = "fsl,fman-dtsec" },
- { .compatible = "fsl,fman-xgec" },
- { .compatible = "fsl,fman-memac" },
+ { .compatible = "fsl,fman-dtsec", .data = dtsec_initialization },
+ { .compatible = "fsl,fman-xgec", .data = tgec_initialization },
+ { .compatible = "fsl,fman-memac", .data = memac_initialization },
{}
};
MODULE_DEVICE_TABLE(of, mac_match);
@@ -556,6 +541,7 @@ MODULE_DEVICE_TABLE(of, mac_match);
static int mac_probe(struct platform_device *_of_dev)
{
int err, i, nph;
+ int (*init)(struct mac_device *mac_dev, struct device_node *mac_node);
struct device *dev;
struct device_node *mac_node, *dev_node;
struct mac_device *mac_dev;
@@ -568,6 +554,7 @@ static int mac_probe(struct platform_device *_of_dev)
dev = &_of_dev->dev;
mac_node = dev->of_node;
+ init = of_device_get_match_data(dev);
mac_dev = devm_kzalloc(dev, sizeof(*mac_dev), GFP_KERNEL);
if (!mac_dev) {
@@ -584,19 +571,6 @@ static int mac_probe(struct platform_device *_of_dev)
mac_dev->priv = priv;
priv->dev = dev;
- if (of_device_is_compatible(mac_node, "fsl,fman-dtsec")) {
- setup_dtsec(mac_dev);
- } else if (of_device_is_compatible(mac_node, "fsl,fman-xgec")) {
- setup_tgec(mac_dev);
- } else if (of_device_is_compatible(mac_node, "fsl,fman-memac")) {
- setup_memac(mac_dev);
- } else {
- dev_err(dev, "MAC node (%pOF) contains unsupported MAC\n",
- mac_node);
- err = -EINVAL;
- goto _return;
- }
-
INIT_LIST_HEAD(&priv->mc_addr_list);
/* Get the FM node */
@@ -782,7 +756,7 @@ static int mac_probe(struct platform_device *_of_dev)
put_device(&phy->mdio.dev);
}
- err = mac_dev->init(mac_dev, mac_node);
+ err = init(mac_dev, mac_node);
if (err < 0) {
dev_err(dev, "mac_dev->init() = %d\n", err);
of_node_put(mac_dev->phy_node);
diff --git a/drivers/net/ethernet/freescale/fman/mac.h b/drivers/net/ethernet/freescale/fman/mac.h
index e4329c7d5001..fed3835a8473 100644
--- a/drivers/net/ethernet/freescale/fman/mac.h
+++ b/drivers/net/ethernet/freescale/fman/mac.h
@@ -35,7 +35,6 @@ struct mac_device {
bool promisc;
bool allmulti;
- int (*init)(struct mac_device *mac_dev, struct device_node *mac_node);
int (*enable)(struct fman_mac *mac_dev);
int (*disable)(struct fman_mac *mac_dev);
void (*adjust_link)(struct mac_device *mac_dev);
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 20/47] net: fman: Store initialization function in match data
2022-07-15 21:59 ` [PATCH net-next v3 20/47] net: fman: Store initialization function in match data Sean Anderson
@ 2022-07-21 12:51 ` Camelia Alexandra Groza
2022-07-21 15:34 ` Sean Anderson
0 siblings, 1 reply; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 12:51 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 0:59
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>
> Subject: [PATCH net-next v3 20/47] net: fman: Store initialization function in
> match data
>
> Instead of re-matching the compatible string in order to determine the
> init function, just store it in the match data. This also move the setting
> of the rest of the functions into init as well.
This last sentence can be rephrased to be clearer. Maybe something like:
The separate setup functions aren't needed anymore. Merge their content
into init as well.
> To ensure everything
> compiles correctly, we move them to the bottom of the file.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
^ permalink raw reply [flat|nested] 123+ messages in thread
* Re: [PATCH net-next v3 20/47] net: fman: Store initialization function in match data
2022-07-21 12:51 ` Camelia Alexandra Groza
@ 2022-07-21 15:34 ` Sean Anderson
0 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-21 15:34 UTC (permalink / raw)
To: Camelia Alexandra Groza, David S . Miller, Jakub Kicinski,
Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King, linux-kernel
On 7/21/22 8:51 AM, Camelia Alexandra Groza wrote:
>> -----Original Message-----
>> From: Sean Anderson <sean.anderson@seco.com>
>> Sent: Saturday, July 16, 2022 0:59
>> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
>> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
>> netdev@vger.kernel.org
>> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
>> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
>> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
>> <sean.anderson@seco.com>
>> Subject: [PATCH net-next v3 20/47] net: fman: Store initialization function in
>> match data
>>
>> Instead of re-matching the compatible string in order to determine the
>> init function, just store it in the match data. This also move the setting
>> of the rest of the functions into init as well.
>
> This last sentence can be rephrased to be clearer. Maybe something like:
> The separate setup functions aren't needed anymore. Merge their content
> into init as well.
You're right, this is not really clear. I will revise the wording.
--Sean
>> To ensure everything
>> compiles correctly, we move them to the bottom of the file.
>>
>> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
>
> Acked-by: Camelia Groza <camelia.groza@nxp.com>
>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 21/47] net: fman: Move struct dev to mac_device
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (19 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 20/47] net: fman: Store initialization function in match data Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 12:52 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 22/47] net: fman: Configure fixed link in memac_initialization Sean Anderson
` (26 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
Move the reference to our device to mac_device. This way, macs can use
it in their log messages.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v2)
Changes in v2:
- Remove some unused variables
drivers/net/ethernet/freescale/fman/mac.c | 31 ++++++++---------------
drivers/net/ethernet/freescale/fman/mac.h | 1 +
2 files changed, 12 insertions(+), 20 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/mac.c b/drivers/net/ethernet/freescale/fman/mac.c
index 8dd6a5b12922..5b3a6ea2d0e2 100644
--- a/drivers/net/ethernet/freescale/fman/mac.c
+++ b/drivers/net/ethernet/freescale/fman/mac.c
@@ -28,7 +28,6 @@ MODULE_LICENSE("Dual BSD/GPL");
MODULE_DESCRIPTION("FSL FMan MAC API based driver");
struct mac_priv_s {
- struct device *dev;
void __iomem *vaddr;
u8 cell_index;
struct fman *fman;
@@ -47,20 +46,16 @@ struct mac_address {
static void mac_exception(void *handle, enum fman_mac_exceptions ex)
{
- struct mac_device *mac_dev;
- struct mac_priv_s *priv;
-
- mac_dev = handle;
- priv = mac_dev->priv;
+ struct mac_device *mac_dev = handle;
if (ex == FM_MAC_EX_10G_RX_FIFO_OVFL) {
/* don't flag RX FIFO after the first */
mac_dev->set_exception(mac_dev->fman_mac,
FM_MAC_EX_10G_RX_FIFO_OVFL, false);
- dev_err(priv->dev, "10G MAC got RX FIFO Error = %x\n", ex);
+ dev_err(mac_dev->dev, "10G MAC got RX FIFO Error = %x\n", ex);
}
- dev_dbg(priv->dev, "%s:%s() -> %d\n", KBUILD_BASENAME ".c",
+ dev_dbg(mac_dev->dev, "%s:%s() -> %d\n", KBUILD_BASENAME ".c",
__func__, ex);
}
@@ -70,7 +65,7 @@ static int set_fman_mac_params(struct mac_device *mac_dev,
struct mac_priv_s *priv = mac_dev->priv;
params->base_addr = (typeof(params->base_addr))
- devm_ioremap(priv->dev, mac_dev->res->start,
+ devm_ioremap(mac_dev->dev, mac_dev->res->start,
resource_size(mac_dev->res));
if (!params->base_addr)
return -ENOMEM;
@@ -244,7 +239,7 @@ static void adjust_link_dtsec(struct mac_device *mac_dev)
fman_get_pause_cfg(mac_dev, &rx_pause, &tx_pause);
err = fman_set_mac_active_pause(mac_dev, rx_pause, tx_pause);
if (err < 0)
- dev_err(mac_dev->priv->dev, "fman_set_mac_active_pause() = %d\n",
+ dev_err(mac_dev->dev, "fman_set_mac_active_pause() = %d\n",
err);
}
@@ -261,7 +256,7 @@ static void adjust_link_memac(struct mac_device *mac_dev)
fman_get_pause_cfg(mac_dev, &rx_pause, &tx_pause);
err = fman_set_mac_active_pause(mac_dev, rx_pause, tx_pause);
if (err < 0)
- dev_err(mac_dev->priv->dev, "fman_set_mac_active_pause() = %d\n",
+ dev_err(mac_dev->dev, "fman_set_mac_active_pause() = %d\n",
err);
}
@@ -269,11 +264,9 @@ static int tgec_initialization(struct mac_device *mac_dev,
struct device_node *mac_node)
{
int err;
- struct mac_priv_s *priv;
struct fman_mac_params params;
u32 version;
- priv = mac_dev->priv;
mac_dev->set_promisc = tgec_set_promiscuous;
mac_dev->change_addr = tgec_modify_mac_address;
mac_dev->add_hash_mac_addr = tgec_add_hash_mac_address;
@@ -316,7 +309,7 @@ static int tgec_initialization(struct mac_device *mac_dev,
if (err < 0)
goto _return_fm_mac_free;
- dev_info(priv->dev, "FMan XGEC version: 0x%08x\n", version);
+ dev_info(mac_dev->dev, "FMan XGEC version: 0x%08x\n", version);
goto _return;
@@ -331,11 +324,9 @@ static int dtsec_initialization(struct mac_device *mac_dev,
struct device_node *mac_node)
{
int err;
- struct mac_priv_s *priv;
struct fman_mac_params params;
u32 version;
- priv = mac_dev->priv;
mac_dev->set_promisc = dtsec_set_promiscuous;
mac_dev->change_addr = dtsec_modify_mac_address;
mac_dev->add_hash_mac_addr = dtsec_add_hash_mac_address;
@@ -383,7 +374,7 @@ static int dtsec_initialization(struct mac_device *mac_dev,
if (err < 0)
goto _return_fm_mac_free;
- dev_info(priv->dev, "FMan dTSEC version: 0x%08x\n", version);
+ dev_info(mac_dev->dev, "FMan dTSEC version: 0x%08x\n", version);
goto _return;
@@ -446,7 +437,7 @@ static int memac_initialization(struct mac_device *mac_dev,
if (err < 0)
goto _return_fm_mac_free;
- dev_info(priv->dev, "FMan MEMAC\n");
+ dev_info(mac_dev->dev, "FMan MEMAC\n");
goto _return;
@@ -507,7 +498,7 @@ static struct platform_device *dpaa_eth_add_device(int fman_id,
goto no_mem;
}
- pdev->dev.parent = priv->dev;
+ pdev->dev.parent = mac_dev->dev;
ret = platform_device_add_data(pdev, &data, sizeof(data));
if (ret)
@@ -569,7 +560,7 @@ static int mac_probe(struct platform_device *_of_dev)
/* Save private information */
mac_dev->priv = priv;
- priv->dev = dev;
+ mac_dev->dev = dev;
INIT_LIST_HEAD(&priv->mc_addr_list);
diff --git a/drivers/net/ethernet/freescale/fman/mac.h b/drivers/net/ethernet/freescale/fman/mac.h
index fed3835a8473..05dbb8b5a704 100644
--- a/drivers/net/ethernet/freescale/fman/mac.h
+++ b/drivers/net/ethernet/freescale/fman/mac.h
@@ -19,6 +19,7 @@ struct fman_mac;
struct mac_priv_s;
struct mac_device {
+ struct device *dev;
struct resource *res;
u8 addr[ETH_ALEN];
struct fman_port *port[2];
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 21/47] net: fman: Move struct dev to mac_device
2022-07-15 21:59 ` [PATCH net-next v3 21/47] net: fman: Move struct dev to mac_device Sean Anderson
@ 2022-07-21 12:52 ` Camelia Alexandra Groza
0 siblings, 0 replies; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 12:52 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 0:59
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>
> Subject: [PATCH net-next v3 21/47] net: fman: Move struct dev to
> mac_device
>
> Move the reference to our device to mac_device. This way, macs can use
> it in their log messages.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 22/47] net: fman: Configure fixed link in memac_initialization
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (20 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 21/47] net: fman: Move struct dev to mac_device Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 12:57 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 23/47] net: fman: Export/rename some common functions Sean Anderson
` (25 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
memac is the only mac which parses fixed links. Move the
parsing/configuring to its initialization function.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v1)
drivers/net/ethernet/freescale/fman/mac.c | 93 +++++++++++------------
1 file changed, 46 insertions(+), 47 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/mac.c b/drivers/net/ethernet/freescale/fman/mac.c
index 5b3a6ea2d0e2..af5e5d98e23e 100644
--- a/drivers/net/ethernet/freescale/fman/mac.c
+++ b/drivers/net/ethernet/freescale/fman/mac.c
@@ -34,7 +34,6 @@ struct mac_priv_s {
/* List of multicast addresses */
struct list_head mc_addr_list;
struct platform_device *eth_dev;
- struct fixed_phy_status *fixed_link;
u16 speed;
u16 max_speed;
};
@@ -391,6 +390,7 @@ static int memac_initialization(struct mac_device *mac_dev,
int err;
struct mac_priv_s *priv;
struct fman_mac_params params;
+ struct fixed_phy_status *fixed_link;
priv = mac_dev->priv;
mac_dev->set_promisc = memac_set_promiscuous;
@@ -429,21 +429,52 @@ static int memac_initialization(struct mac_device *mac_dev,
if (err < 0)
goto _return_fm_mac_free;
- err = memac_cfg_fixed_link(mac_dev->fman_mac, priv->fixed_link);
- if (err < 0)
- goto _return_fm_mac_free;
+ if (!mac_dev->phy_node && of_phy_is_fixed_link(mac_node)) {
+ struct phy_device *phy;
+
+ err = of_phy_register_fixed_link(mac_node);
+ if (err)
+ goto _return_fm_mac_free;
+
+ fixed_link = kzalloc(sizeof(*fixed_link), GFP_KERNEL);
+ if (!fixed_link) {
+ err = -ENOMEM;
+ goto _return_fm_mac_free;
+ }
+
+ mac_dev->phy_node = of_node_get(mac_node);
+ phy = of_phy_find_device(mac_dev->phy_node);
+ if (!phy) {
+ err = -EINVAL;
+ of_node_put(mac_dev->phy_node);
+ goto _return_fixed_link_free;
+ }
+
+ fixed_link->link = phy->link;
+ fixed_link->speed = phy->speed;
+ fixed_link->duplex = phy->duplex;
+ fixed_link->pause = phy->pause;
+ fixed_link->asym_pause = phy->asym_pause;
+
+ put_device(&phy->mdio.dev);
+
+ err = memac_cfg_fixed_link(mac_dev->fman_mac, fixed_link);
+ if (err < 0)
+ goto _return_fixed_link_free;
+ }
err = memac_init(mac_dev->fman_mac);
if (err < 0)
- goto _return_fm_mac_free;
+ goto _return_fixed_link_free;
dev_info(mac_dev->dev, "FMan MEMAC\n");
goto _return;
+_return_fixed_link_free:
+ kfree(fixed_link);
_return_fm_mac_free:
memac_free(mac_dev->fman_mac);
-
_return:
return err;
}
@@ -570,7 +601,7 @@ static int mac_probe(struct platform_device *_of_dev)
dev_err(dev, "of_get_parent(%pOF) failed\n",
mac_node);
err = -EINVAL;
- goto _return_of_get_parent;
+ goto _return_of_node_put;
}
of_dev = of_find_device_by_node(dev_node);
@@ -604,7 +635,7 @@ static int mac_probe(struct platform_device *_of_dev)
if (err < 0) {
dev_err(dev, "of_address_to_resource(%pOF) = %d\n",
mac_node, err);
- goto _return_of_get_parent;
+ goto _return_of_node_put;
}
mac_dev->res = __devm_request_region(dev,
@@ -614,7 +645,7 @@ static int mac_probe(struct platform_device *_of_dev)
if (!mac_dev->res) {
dev_err(dev, "__devm_request_mem_region(mac) failed\n");
err = -EBUSY;
- goto _return_of_get_parent;
+ goto _return_of_node_put;
}
priv->vaddr = devm_ioremap(dev, mac_dev->res->start,
@@ -622,12 +653,12 @@ static int mac_probe(struct platform_device *_of_dev)
if (!priv->vaddr) {
dev_err(dev, "devm_ioremap() failed\n");
err = -EIO;
- goto _return_of_get_parent;
+ goto _return_of_node_put;
}
if (!of_device_is_available(mac_node)) {
err = -ENODEV;
- goto _return_of_get_parent;
+ goto _return_of_node_put;
}
/* Get the cell-index */
@@ -635,7 +666,7 @@ static int mac_probe(struct platform_device *_of_dev)
if (err) {
dev_err(dev, "failed to read cell-index for %pOF\n", mac_node);
err = -EINVAL;
- goto _return_of_get_parent;
+ goto _return_of_node_put;
}
priv->cell_index = (u8)val;
@@ -650,14 +681,14 @@ static int mac_probe(struct platform_device *_of_dev)
dev_err(dev, "of_count_phandle_with_args(%pOF, fsl,fman-ports) failed\n",
mac_node);
err = nph;
- goto _return_of_get_parent;
+ goto _return_of_node_put;
}
if (nph != ARRAY_SIZE(mac_dev->port)) {
dev_err(dev, "Not supported number of fman-ports handles of mac node %pOF from device tree\n",
mac_node);
err = -EINVAL;
- goto _return_of_get_parent;
+ goto _return_of_node_put;
}
for (i = 0; i < ARRAY_SIZE(mac_dev->port); i++) {
@@ -716,42 +747,12 @@ static int mac_probe(struct platform_device *_of_dev)
/* Get the rest of the PHY information */
mac_dev->phy_node = of_parse_phandle(mac_node, "phy-handle", 0);
- if (!mac_dev->phy_node && of_phy_is_fixed_link(mac_node)) {
- struct phy_device *phy;
-
- err = of_phy_register_fixed_link(mac_node);
- if (err)
- goto _return_of_get_parent;
-
- priv->fixed_link = kzalloc(sizeof(*priv->fixed_link),
- GFP_KERNEL);
- if (!priv->fixed_link) {
- err = -ENOMEM;
- goto _return_of_get_parent;
- }
-
- mac_dev->phy_node = of_node_get(mac_node);
- phy = of_phy_find_device(mac_dev->phy_node);
- if (!phy) {
- err = -EINVAL;
- of_node_put(mac_dev->phy_node);
- goto _return_of_get_parent;
- }
-
- priv->fixed_link->link = phy->link;
- priv->fixed_link->speed = phy->speed;
- priv->fixed_link->duplex = phy->duplex;
- priv->fixed_link->pause = phy->pause;
- priv->fixed_link->asym_pause = phy->asym_pause;
-
- put_device(&phy->mdio.dev);
- }
err = init(mac_dev, mac_node);
if (err < 0) {
dev_err(dev, "mac_dev->init() = %d\n", err);
of_node_put(mac_dev->phy_node);
- goto _return_of_get_parent;
+ goto _return_of_node_put;
}
/* pause frame autonegotiation enabled */
@@ -782,8 +783,6 @@ static int mac_probe(struct platform_device *_of_dev)
_return_of_node_put:
of_node_put(dev_node);
-_return_of_get_parent:
- kfree(priv->fixed_link);
_return:
return err;
}
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 22/47] net: fman: Configure fixed link in memac_initialization
2022-07-15 21:59 ` [PATCH net-next v3 22/47] net: fman: Configure fixed link in memac_initialization Sean Anderson
@ 2022-07-21 12:57 ` Camelia Alexandra Groza
0 siblings, 0 replies; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 12:57 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 0:59
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>
> Subject: [PATCH net-next v3 22/47] net: fman: Configure fixed link in
> memac_initialization
>
> memac is the only mac which parses fixed links. Move the
> parsing/configuring to its initialization function.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 23/47] net: fman: Export/rename some common functions
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (21 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 22/47] net: fman: Configure fixed link in memac_initialization Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 12:58 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 24/47] net: fman: memac: Use params instead of priv for max_speed Sean Anderson
` (24 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
In preparation for moving each of the initialization functions to their
own file, export some common functions so they can be re-used. This adds
an fman prefix to set_multi to make it a bit less genericly-named.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v1)
drivers/net/ethernet/freescale/fman/mac.c | 12 ++++++------
drivers/net/ethernet/freescale/fman/mac.h | 3 +++
2 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/mac.c b/drivers/net/ethernet/freescale/fman/mac.c
index af5e5d98e23e..0ac8df87308a 100644
--- a/drivers/net/ethernet/freescale/fman/mac.c
+++ b/drivers/net/ethernet/freescale/fman/mac.c
@@ -58,8 +58,8 @@ static void mac_exception(void *handle, enum fman_mac_exceptions ex)
__func__, ex);
}
-static int set_fman_mac_params(struct mac_device *mac_dev,
- struct fman_mac_params *params)
+int set_fman_mac_params(struct mac_device *mac_dev,
+ struct fman_mac_params *params)
{
struct mac_priv_s *priv = mac_dev->priv;
@@ -82,7 +82,7 @@ static int set_fman_mac_params(struct mac_device *mac_dev,
return 0;
}
-static int set_multi(struct net_device *net_dev, struct mac_device *mac_dev)
+int fman_set_multi(struct net_device *net_dev, struct mac_device *mac_dev)
{
struct mac_priv_s *priv;
struct mac_address *old_addr, *tmp;
@@ -275,7 +275,7 @@ static int tgec_initialization(struct mac_device *mac_dev,
mac_dev->set_exception = tgec_set_exception;
mac_dev->set_allmulti = tgec_set_allmulti;
mac_dev->set_tstamp = tgec_set_tstamp;
- mac_dev->set_multi = set_multi;
+ mac_dev->set_multi = fman_set_multi;
mac_dev->adjust_link = adjust_link_void;
mac_dev->enable = tgec_enable;
mac_dev->disable = tgec_disable;
@@ -335,7 +335,7 @@ static int dtsec_initialization(struct mac_device *mac_dev,
mac_dev->set_exception = dtsec_set_exception;
mac_dev->set_allmulti = dtsec_set_allmulti;
mac_dev->set_tstamp = dtsec_set_tstamp;
- mac_dev->set_multi = set_multi;
+ mac_dev->set_multi = fman_set_multi;
mac_dev->adjust_link = adjust_link_dtsec;
mac_dev->enable = dtsec_enable;
mac_dev->disable = dtsec_disable;
@@ -402,7 +402,7 @@ static int memac_initialization(struct mac_device *mac_dev,
mac_dev->set_exception = memac_set_exception;
mac_dev->set_allmulti = memac_set_allmulti;
mac_dev->set_tstamp = memac_set_tstamp;
- mac_dev->set_multi = set_multi;
+ mac_dev->set_multi = fman_set_multi;
mac_dev->adjust_link = adjust_link_memac;
mac_dev->enable = memac_enable;
mac_dev->disable = memac_disable;
diff --git a/drivers/net/ethernet/freescale/fman/mac.h b/drivers/net/ethernet/freescale/fman/mac.h
index 05dbb8b5a704..da410a7d00c9 100644
--- a/drivers/net/ethernet/freescale/fman/mac.h
+++ b/drivers/net/ethernet/freescale/fman/mac.h
@@ -71,5 +71,8 @@ int fman_set_mac_active_pause(struct mac_device *mac_dev, bool rx, bool tx);
void fman_get_pause_cfg(struct mac_device *mac_dev, bool *rx_pause,
bool *tx_pause);
+int set_fman_mac_params(struct mac_device *mac_dev,
+ struct fman_mac_params *params);
+int fman_set_multi(struct net_device *net_dev, struct mac_device *mac_dev);
#endif /* __MAC_H */
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 23/47] net: fman: Export/rename some common functions
2022-07-15 21:59 ` [PATCH net-next v3 23/47] net: fman: Export/rename some common functions Sean Anderson
@ 2022-07-21 12:58 ` Camelia Alexandra Groza
0 siblings, 0 replies; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 12:58 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>
> Subject: [PATCH net-next v3 23/47] net: fman: Export/rename some
> common functions
>
> In preparation for moving each of the initialization functions to their
> own file, export some common functions so they can be re-used. This adds
> an fman prefix to set_multi to make it a bit less genericly-named.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 24/47] net: fman: memac: Use params instead of priv for max_speed
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (22 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 23/47] net: fman: Export/rename some common functions Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 12:58 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 25/47] net: fman: Move initialization to mac-specific files Sean Anderson
` (23 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
This option is present in params, so use it instead of the fman private
version.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v1)
drivers/net/ethernet/freescale/fman/mac.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/mac.c b/drivers/net/ethernet/freescale/fman/mac.c
index 0ac8df87308a..c376b9bf657d 100644
--- a/drivers/net/ethernet/freescale/fman/mac.c
+++ b/drivers/net/ethernet/freescale/fman/mac.c
@@ -388,11 +388,9 @@ static int memac_initialization(struct mac_device *mac_dev,
struct device_node *mac_node)
{
int err;
- struct mac_priv_s *priv;
struct fman_mac_params params;
struct fixed_phy_status *fixed_link;
- priv = mac_dev->priv;
mac_dev->set_promisc = memac_set_promiscuous;
mac_dev->change_addr = memac_modify_mac_address;
mac_dev->add_hash_mac_addr = memac_add_hash_mac_address;
@@ -412,7 +410,7 @@ static int memac_initialization(struct mac_device *mac_dev,
goto _return;
params.internal_phy_node = of_parse_phandle(mac_node, "pcsphy-handle", 0);
- if (priv->max_speed == SPEED_10000)
+ if (params.max_speed == SPEED_10000)
params.phy_if = PHY_INTERFACE_MODE_XGMII;
mac_dev->fman_mac = memac_config(¶ms);
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 24/47] net: fman: memac: Use params instead of priv for max_speed
2022-07-15 21:59 ` [PATCH net-next v3 24/47] net: fman: memac: Use params instead of priv for max_speed Sean Anderson
@ 2022-07-21 12:58 ` Camelia Alexandra Groza
0 siblings, 0 replies; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 12:58 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>
> Subject: [PATCH net-next v3 24/47] net: fman: memac: Use params instead
> of priv for max_speed
>
> This option is present in params, so use it instead of the fman private
> version.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 25/47] net: fman: Move initialization to mac-specific files
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (23 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 24/47] net: fman: memac: Use params instead of priv for max_speed Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 12:59 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 26/47] net: fman: Mark mac methods static Sean Anderson
` (22 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
This moves mac-specific initialization to mac-specific files. This will
make it easier to work with individual macs. It will also make it easier
to refactor the initialization to simplify the control flow. No
functional change intended.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v2)
Changes in v2:
- Fix prototype for dtsec_initialization
.../net/ethernet/freescale/fman/fman_dtsec.c | 88 ++++++
.../net/ethernet/freescale/fman/fman_dtsec.h | 26 +-
.../net/ethernet/freescale/fman/fman_memac.c | 111 ++++++++
.../net/ethernet/freescale/fman/fman_memac.h | 25 +-
.../net/ethernet/freescale/fman/fman_tgec.c | 65 +++++
.../net/ethernet/freescale/fman/fman_tgec.h | 22 +-
drivers/net/ethernet/freescale/fman/mac.c | 261 ------------------
7 files changed, 276 insertions(+), 322 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.c b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
index 7f4f3d797a8d..92c2e35d3b4f 100644
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
@@ -7,6 +7,7 @@
#include "fman_dtsec.h"
#include "fman.h"
+#include "mac.h"
#include <linux/slab.h>
#include <linux/bitrev.h>
@@ -1247,6 +1248,28 @@ int dtsec_restart_autoneg(struct fman_mac *dtsec)
return 0;
}
+static void adjust_link_dtsec(struct mac_device *mac_dev)
+{
+ struct phy_device *phy_dev = mac_dev->phy_dev;
+ struct fman_mac *fman_mac;
+ bool rx_pause, tx_pause;
+ int err;
+
+ fman_mac = mac_dev->fman_mac;
+ if (!phy_dev->link) {
+ dtsec_restart_autoneg(fman_mac);
+
+ return;
+ }
+
+ dtsec_adjust_link(fman_mac, phy_dev->speed);
+ fman_get_pause_cfg(mac_dev, &rx_pause, &tx_pause);
+ err = fman_set_mac_active_pause(mac_dev, rx_pause, tx_pause);
+ if (err < 0)
+ dev_err(mac_dev->dev, "fman_set_mac_active_pause() = %d\n",
+ err);
+}
+
int dtsec_get_version(struct fman_mac *dtsec, u32 *mac_version)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
@@ -1492,3 +1515,68 @@ struct fman_mac *dtsec_config(struct fman_mac_params *params)
kfree(dtsec);
return NULL;
}
+
+int dtsec_initialization(struct mac_device *mac_dev,
+ struct device_node *mac_node)
+{
+ int err;
+ struct fman_mac_params params;
+ u32 version;
+
+ mac_dev->set_promisc = dtsec_set_promiscuous;
+ mac_dev->change_addr = dtsec_modify_mac_address;
+ mac_dev->add_hash_mac_addr = dtsec_add_hash_mac_address;
+ mac_dev->remove_hash_mac_addr = dtsec_del_hash_mac_address;
+ mac_dev->set_tx_pause = dtsec_set_tx_pause_frames;
+ mac_dev->set_rx_pause = dtsec_accept_rx_pause_frames;
+ mac_dev->set_exception = dtsec_set_exception;
+ mac_dev->set_allmulti = dtsec_set_allmulti;
+ mac_dev->set_tstamp = dtsec_set_tstamp;
+ mac_dev->set_multi = fman_set_multi;
+ mac_dev->adjust_link = adjust_link_dtsec;
+ mac_dev->enable = dtsec_enable;
+ mac_dev->disable = dtsec_disable;
+
+ err = set_fman_mac_params(mac_dev, ¶ms);
+ if (err)
+ goto _return;
+ params.internal_phy_node = of_parse_phandle(mac_node, "tbi-handle", 0);
+
+ mac_dev->fman_mac = dtsec_config(¶ms);
+ if (!mac_dev->fman_mac) {
+ err = -EINVAL;
+ goto _return;
+ }
+
+ err = dtsec_cfg_max_frame_len(mac_dev->fman_mac, fman_get_max_frm());
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ err = dtsec_cfg_pad_and_crc(mac_dev->fman_mac, true);
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ err = dtsec_init(mac_dev->fman_mac);
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ /* For 1G MAC, disable by default the MIB counters overflow interrupt */
+ err = mac_dev->set_exception(mac_dev->fman_mac,
+ FM_MAC_EX_1G_RX_MIB_CNT_OVFL, false);
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ err = dtsec_get_version(mac_dev->fman_mac, &version);
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ dev_info(mac_dev->dev, "FMan dTSEC version: 0x%08x\n", version);
+
+ goto _return;
+
+_return_fm_mac_free:
+ dtsec_free(mac_dev->fman_mac);
+
+_return:
+ return err;
+}
diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.h b/drivers/net/ethernet/freescale/fman/fman_dtsec.h
index f072cdc560ba..cf3e683c089c 100644
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.h
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.h
@@ -8,27 +8,9 @@
#include "fman_mac.h"
-struct fman_mac *dtsec_config(struct fman_mac_params *params);
-int dtsec_set_promiscuous(struct fman_mac *dtsec, bool new_val);
-int dtsec_modify_mac_address(struct fman_mac *dtsec, const enet_addr_t *enet_addr);
-int dtsec_adjust_link(struct fman_mac *dtsec,
- u16 speed);
-int dtsec_restart_autoneg(struct fman_mac *dtsec);
-int dtsec_cfg_max_frame_len(struct fman_mac *dtsec, u16 new_val);
-int dtsec_cfg_pad_and_crc(struct fman_mac *dtsec, bool new_val);
-int dtsec_enable(struct fman_mac *dtsec);
-int dtsec_disable(struct fman_mac *dtsec);
-int dtsec_init(struct fman_mac *dtsec);
-int dtsec_free(struct fman_mac *dtsec);
-int dtsec_accept_rx_pause_frames(struct fman_mac *dtsec, bool en);
-int dtsec_set_tx_pause_frames(struct fman_mac *dtsec, u8 priority,
- u16 pause_time, u16 thresh_time);
-int dtsec_set_exception(struct fman_mac *dtsec,
- enum fman_mac_exceptions exception, bool enable);
-int dtsec_add_hash_mac_address(struct fman_mac *dtsec, enet_addr_t *eth_addr);
-int dtsec_del_hash_mac_address(struct fman_mac *dtsec, enet_addr_t *eth_addr);
-int dtsec_get_version(struct fman_mac *dtsec, u32 *mac_version);
-int dtsec_set_allmulti(struct fman_mac *dtsec, bool enable);
-int dtsec_set_tstamp(struct fman_mac *dtsec, bool enable);
+struct mac_device;
+
+int dtsec_initialization(struct mac_device *mac_dev,
+ struct device_node *mac_node);
#endif /* __DTSEC_H */
diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.c b/drivers/net/ethernet/freescale/fman/fman_memac.c
index c34da49aed31..b2a592a77a2a 100644
--- a/drivers/net/ethernet/freescale/fman/fman_memac.c
+++ b/drivers/net/ethernet/freescale/fman/fman_memac.c
@@ -7,6 +7,7 @@
#include "fman_memac.h"
#include "fman.h"
+#include "mac.h"
#include <linux/slab.h>
#include <linux/io.h>
@@ -774,6 +775,23 @@ int memac_adjust_link(struct fman_mac *memac, u16 speed)
return 0;
}
+static void adjust_link_memac(struct mac_device *mac_dev)
+{
+ struct phy_device *phy_dev = mac_dev->phy_dev;
+ struct fman_mac *fman_mac;
+ bool rx_pause, tx_pause;
+ int err;
+
+ fman_mac = mac_dev->fman_mac;
+ memac_adjust_link(fman_mac, phy_dev->speed);
+
+ fman_get_pause_cfg(mac_dev, &rx_pause, &tx_pause);
+ err = fman_set_mac_active_pause(mac_dev, rx_pause, tx_pause);
+ if (err < 0)
+ dev_err(mac_dev->dev, "fman_set_mac_active_pause() = %d\n",
+ err);
+}
+
int memac_cfg_max_frame_len(struct fman_mac *memac, u16 new_val)
{
if (is_init_done(memac->memac_drv_param))
@@ -1178,3 +1196,96 @@ struct fman_mac *memac_config(struct fman_mac_params *params)
return memac;
}
+
+int memac_initialization(struct mac_device *mac_dev,
+ struct device_node *mac_node)
+{
+ int err;
+ struct fman_mac_params params;
+ struct fixed_phy_status *fixed_link;
+
+ mac_dev->set_promisc = memac_set_promiscuous;
+ mac_dev->change_addr = memac_modify_mac_address;
+ mac_dev->add_hash_mac_addr = memac_add_hash_mac_address;
+ mac_dev->remove_hash_mac_addr = memac_del_hash_mac_address;
+ mac_dev->set_tx_pause = memac_set_tx_pause_frames;
+ mac_dev->set_rx_pause = memac_accept_rx_pause_frames;
+ mac_dev->set_exception = memac_set_exception;
+ mac_dev->set_allmulti = memac_set_allmulti;
+ mac_dev->set_tstamp = memac_set_tstamp;
+ mac_dev->set_multi = fman_set_multi;
+ mac_dev->adjust_link = adjust_link_memac;
+ mac_dev->enable = memac_enable;
+ mac_dev->disable = memac_disable;
+
+ err = set_fman_mac_params(mac_dev, ¶ms);
+ if (err)
+ goto _return;
+ params.internal_phy_node = of_parse_phandle(mac_node, "pcsphy-handle", 0);
+
+ if (params.max_speed == SPEED_10000)
+ params.phy_if = PHY_INTERFACE_MODE_XGMII;
+
+ mac_dev->fman_mac = memac_config(¶ms);
+ if (!mac_dev->fman_mac) {
+ err = -EINVAL;
+ goto _return;
+ }
+
+ err = memac_cfg_max_frame_len(mac_dev->fman_mac, fman_get_max_frm());
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ err = memac_cfg_reset_on_init(mac_dev->fman_mac, true);
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ if (!mac_dev->phy_node && of_phy_is_fixed_link(mac_node)) {
+ struct phy_device *phy;
+
+ err = of_phy_register_fixed_link(mac_node);
+ if (err)
+ goto _return_fm_mac_free;
+
+ fixed_link = kzalloc(sizeof(*fixed_link), GFP_KERNEL);
+ if (!fixed_link) {
+ err = -ENOMEM;
+ goto _return_fm_mac_free;
+ }
+
+ mac_dev->phy_node = of_node_get(mac_node);
+ phy = of_phy_find_device(mac_dev->phy_node);
+ if (!phy) {
+ err = -EINVAL;
+ of_node_put(mac_dev->phy_node);
+ goto _return_fixed_link_free;
+ }
+
+ fixed_link->link = phy->link;
+ fixed_link->speed = phy->speed;
+ fixed_link->duplex = phy->duplex;
+ fixed_link->pause = phy->pause;
+ fixed_link->asym_pause = phy->asym_pause;
+
+ put_device(&phy->mdio.dev);
+
+ err = memac_cfg_fixed_link(mac_dev->fman_mac, fixed_link);
+ if (err < 0)
+ goto _return_fixed_link_free;
+ }
+
+ err = memac_init(mac_dev->fman_mac);
+ if (err < 0)
+ goto _return_fixed_link_free;
+
+ dev_info(mac_dev->dev, "FMan MEMAC\n");
+
+ goto _return;
+
+_return_fixed_link_free:
+ kfree(fixed_link);
+_return_fm_mac_free:
+ memac_free(mac_dev->fman_mac);
+_return:
+ return err;
+}
diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.h b/drivers/net/ethernet/freescale/fman/fman_memac.h
index 535ecd2b2ab4..a58215a3b1d9 100644
--- a/drivers/net/ethernet/freescale/fman/fman_memac.h
+++ b/drivers/net/ethernet/freescale/fman/fman_memac.h
@@ -11,26 +11,9 @@
#include <linux/netdevice.h>
#include <linux/phy_fixed.h>
-struct fman_mac *memac_config(struct fman_mac_params *params);
-int memac_set_promiscuous(struct fman_mac *memac, bool new_val);
-int memac_modify_mac_address(struct fman_mac *memac, const enet_addr_t *enet_addr);
-int memac_adjust_link(struct fman_mac *memac, u16 speed);
-int memac_cfg_max_frame_len(struct fman_mac *memac, u16 new_val);
-int memac_cfg_reset_on_init(struct fman_mac *memac, bool enable);
-int memac_cfg_fixed_link(struct fman_mac *memac,
- struct fixed_phy_status *fixed_link);
-int memac_enable(struct fman_mac *memac);
-int memac_disable(struct fman_mac *memac);
-int memac_init(struct fman_mac *memac);
-int memac_free(struct fman_mac *memac);
-int memac_accept_rx_pause_frames(struct fman_mac *memac, bool en);
-int memac_set_tx_pause_frames(struct fman_mac *memac, u8 priority,
- u16 pause_time, u16 thresh_time);
-int memac_set_exception(struct fman_mac *memac,
- enum fman_mac_exceptions exception, bool enable);
-int memac_add_hash_mac_address(struct fman_mac *memac, enet_addr_t *eth_addr);
-int memac_del_hash_mac_address(struct fman_mac *memac, enet_addr_t *eth_addr);
-int memac_set_allmulti(struct fman_mac *memac, bool enable);
-int memac_set_tstamp(struct fman_mac *memac, bool enable);
+struct mac_device;
+
+int memac_initialization(struct mac_device *mac_dev,
+ struct device_node *mac_node);
#endif /* __MEMAC_H */
diff --git a/drivers/net/ethernet/freescale/fman/fman_tgec.c b/drivers/net/ethernet/freescale/fman/fman_tgec.c
index 2b38d22c863d..2f2c4ef45f6f 100644
--- a/drivers/net/ethernet/freescale/fman/fman_tgec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_tgec.c
@@ -7,6 +7,7 @@
#include "fman_tgec.h"
#include "fman.h"
+#include "mac.h"
#include <linux/slab.h>
#include <linux/bitrev.h>
@@ -609,6 +610,10 @@ int tgec_del_hash_mac_address(struct fman_mac *tgec, enet_addr_t *eth_addr)
return 0;
}
+static void adjust_link_void(struct mac_device *mac_dev)
+{
+}
+
int tgec_get_version(struct fman_mac *tgec, u32 *mac_version)
{
struct tgec_regs __iomem *regs = tgec->regs;
@@ -794,3 +799,63 @@ struct fman_mac *tgec_config(struct fman_mac_params *params)
return tgec;
}
+
+int tgec_initialization(struct mac_device *mac_dev,
+ struct device_node *mac_node)
+{
+ int err;
+ struct fman_mac_params params;
+ u32 version;
+
+ mac_dev->set_promisc = tgec_set_promiscuous;
+ mac_dev->change_addr = tgec_modify_mac_address;
+ mac_dev->add_hash_mac_addr = tgec_add_hash_mac_address;
+ mac_dev->remove_hash_mac_addr = tgec_del_hash_mac_address;
+ mac_dev->set_tx_pause = tgec_set_tx_pause_frames;
+ mac_dev->set_rx_pause = tgec_accept_rx_pause_frames;
+ mac_dev->set_exception = tgec_set_exception;
+ mac_dev->set_allmulti = tgec_set_allmulti;
+ mac_dev->set_tstamp = tgec_set_tstamp;
+ mac_dev->set_multi = fman_set_multi;
+ mac_dev->adjust_link = adjust_link_void;
+ mac_dev->enable = tgec_enable;
+ mac_dev->disable = tgec_disable;
+
+ err = set_fman_mac_params(mac_dev, ¶ms);
+ if (err)
+ goto _return;
+
+ mac_dev->fman_mac = tgec_config(¶ms);
+ if (!mac_dev->fman_mac) {
+ err = -EINVAL;
+ goto _return;
+ }
+
+ err = tgec_cfg_max_frame_len(mac_dev->fman_mac, fman_get_max_frm());
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ err = tgec_init(mac_dev->fman_mac);
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ /* For 10G MAC, disable Tx ECC exception */
+ err = mac_dev->set_exception(mac_dev->fman_mac,
+ FM_MAC_EX_10G_TX_ECC_ER, false);
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ err = tgec_get_version(mac_dev->fman_mac, &version);
+ if (err < 0)
+ goto _return_fm_mac_free;
+
+ pr_info("FMan XGEC version: 0x%08x\n", version);
+
+ goto _return;
+
+_return_fm_mac_free:
+ tgec_free(mac_dev->fman_mac);
+
+_return:
+ return err;
+}
diff --git a/drivers/net/ethernet/freescale/fman/fman_tgec.h b/drivers/net/ethernet/freescale/fman/fman_tgec.h
index 5b256758cbec..2e45b9fea352 100644
--- a/drivers/net/ethernet/freescale/fman/fman_tgec.h
+++ b/drivers/net/ethernet/freescale/fman/fman_tgec.h
@@ -8,23 +8,9 @@
#include "fman_mac.h"
-struct fman_mac *tgec_config(struct fman_mac_params *params);
-int tgec_set_promiscuous(struct fman_mac *tgec, bool new_val);
-int tgec_modify_mac_address(struct fman_mac *tgec, const enet_addr_t *enet_addr);
-int tgec_cfg_max_frame_len(struct fman_mac *tgec, u16 new_val);
-int tgec_enable(struct fman_mac *tgec);
-int tgec_disable(struct fman_mac *tgec);
-int tgec_init(struct fman_mac *tgec);
-int tgec_free(struct fman_mac *tgec);
-int tgec_accept_rx_pause_frames(struct fman_mac *tgec, bool en);
-int tgec_set_tx_pause_frames(struct fman_mac *tgec, u8 priority,
- u16 pause_time, u16 thresh_time);
-int tgec_set_exception(struct fman_mac *tgec,
- enum fman_mac_exceptions exception, bool enable);
-int tgec_add_hash_mac_address(struct fman_mac *tgec, enet_addr_t *eth_addr);
-int tgec_del_hash_mac_address(struct fman_mac *tgec, enet_addr_t *eth_addr);
-int tgec_get_version(struct fman_mac *tgec, u32 *mac_version);
-int tgec_set_allmulti(struct fman_mac *tgec, bool enable);
-int tgec_set_tstamp(struct fman_mac *tgec, bool enable);
+struct mac_device;
+
+int tgec_initialization(struct mac_device *mac_dev,
+ struct device_node *mac_node);
#endif /* __TGEC_H */
diff --git a/drivers/net/ethernet/freescale/fman/mac.c b/drivers/net/ethernet/freescale/fman/mac.c
index c376b9bf657d..7afedd4995c9 100644
--- a/drivers/net/ethernet/freescale/fman/mac.c
+++ b/drivers/net/ethernet/freescale/fman/mac.c
@@ -216,267 +216,6 @@ void fman_get_pause_cfg(struct mac_device *mac_dev, bool *rx_pause,
}
EXPORT_SYMBOL(fman_get_pause_cfg);
-static void adjust_link_void(struct mac_device *mac_dev)
-{
-}
-
-static void adjust_link_dtsec(struct mac_device *mac_dev)
-{
- struct phy_device *phy_dev = mac_dev->phy_dev;
- struct fman_mac *fman_mac;
- bool rx_pause, tx_pause;
- int err;
-
- fman_mac = mac_dev->fman_mac;
- if (!phy_dev->link) {
- dtsec_restart_autoneg(fman_mac);
-
- return;
- }
-
- dtsec_adjust_link(fman_mac, phy_dev->speed);
- fman_get_pause_cfg(mac_dev, &rx_pause, &tx_pause);
- err = fman_set_mac_active_pause(mac_dev, rx_pause, tx_pause);
- if (err < 0)
- dev_err(mac_dev->dev, "fman_set_mac_active_pause() = %d\n",
- err);
-}
-
-static void adjust_link_memac(struct mac_device *mac_dev)
-{
- struct phy_device *phy_dev = mac_dev->phy_dev;
- struct fman_mac *fman_mac;
- bool rx_pause, tx_pause;
- int err;
-
- fman_mac = mac_dev->fman_mac;
- memac_adjust_link(fman_mac, phy_dev->speed);
-
- fman_get_pause_cfg(mac_dev, &rx_pause, &tx_pause);
- err = fman_set_mac_active_pause(mac_dev, rx_pause, tx_pause);
- if (err < 0)
- dev_err(mac_dev->dev, "fman_set_mac_active_pause() = %d\n",
- err);
-}
-
-static int tgec_initialization(struct mac_device *mac_dev,
- struct device_node *mac_node)
-{
- int err;
- struct fman_mac_params params;
- u32 version;
-
- mac_dev->set_promisc = tgec_set_promiscuous;
- mac_dev->change_addr = tgec_modify_mac_address;
- mac_dev->add_hash_mac_addr = tgec_add_hash_mac_address;
- mac_dev->remove_hash_mac_addr = tgec_del_hash_mac_address;
- mac_dev->set_tx_pause = tgec_set_tx_pause_frames;
- mac_dev->set_rx_pause = tgec_accept_rx_pause_frames;
- mac_dev->set_exception = tgec_set_exception;
- mac_dev->set_allmulti = tgec_set_allmulti;
- mac_dev->set_tstamp = tgec_set_tstamp;
- mac_dev->set_multi = fman_set_multi;
- mac_dev->adjust_link = adjust_link_void;
- mac_dev->enable = tgec_enable;
- mac_dev->disable = tgec_disable;
-
- err = set_fman_mac_params(mac_dev, ¶ms);
- if (err)
- goto _return;
-
- mac_dev->fman_mac = tgec_config(¶ms);
- if (!mac_dev->fman_mac) {
- err = -EINVAL;
- goto _return;
- }
-
- err = tgec_cfg_max_frame_len(mac_dev->fman_mac, fman_get_max_frm());
- if (err < 0)
- goto _return_fm_mac_free;
-
- err = tgec_init(mac_dev->fman_mac);
- if (err < 0)
- goto _return_fm_mac_free;
-
- /* For 10G MAC, disable Tx ECC exception */
- err = mac_dev->set_exception(mac_dev->fman_mac,
- FM_MAC_EX_10G_TX_ECC_ER, false);
- if (err < 0)
- goto _return_fm_mac_free;
-
- err = tgec_get_version(mac_dev->fman_mac, &version);
- if (err < 0)
- goto _return_fm_mac_free;
-
- dev_info(mac_dev->dev, "FMan XGEC version: 0x%08x\n", version);
-
- goto _return;
-
-_return_fm_mac_free:
- tgec_free(mac_dev->fman_mac);
-
-_return:
- return err;
-}
-
-static int dtsec_initialization(struct mac_device *mac_dev,
- struct device_node *mac_node)
-{
- int err;
- struct fman_mac_params params;
- u32 version;
-
- mac_dev->set_promisc = dtsec_set_promiscuous;
- mac_dev->change_addr = dtsec_modify_mac_address;
- mac_dev->add_hash_mac_addr = dtsec_add_hash_mac_address;
- mac_dev->remove_hash_mac_addr = dtsec_del_hash_mac_address;
- mac_dev->set_tx_pause = dtsec_set_tx_pause_frames;
- mac_dev->set_rx_pause = dtsec_accept_rx_pause_frames;
- mac_dev->set_exception = dtsec_set_exception;
- mac_dev->set_allmulti = dtsec_set_allmulti;
- mac_dev->set_tstamp = dtsec_set_tstamp;
- mac_dev->set_multi = fman_set_multi;
- mac_dev->adjust_link = adjust_link_dtsec;
- mac_dev->enable = dtsec_enable;
- mac_dev->disable = dtsec_disable;
-
- err = set_fman_mac_params(mac_dev, ¶ms);
- if (err)
- goto _return;
- params.internal_phy_node = of_parse_phandle(mac_node, "tbi-handle", 0);
-
- mac_dev->fman_mac = dtsec_config(¶ms);
- if (!mac_dev->fman_mac) {
- err = -EINVAL;
- goto _return;
- }
-
- err = dtsec_cfg_max_frame_len(mac_dev->fman_mac, fman_get_max_frm());
- if (err < 0)
- goto _return_fm_mac_free;
-
- err = dtsec_cfg_pad_and_crc(mac_dev->fman_mac, true);
- if (err < 0)
- goto _return_fm_mac_free;
-
- err = dtsec_init(mac_dev->fman_mac);
- if (err < 0)
- goto _return_fm_mac_free;
-
- /* For 1G MAC, disable by default the MIB counters overflow interrupt */
- err = mac_dev->set_exception(mac_dev->fman_mac,
- FM_MAC_EX_1G_RX_MIB_CNT_OVFL, false);
- if (err < 0)
- goto _return_fm_mac_free;
-
- err = dtsec_get_version(mac_dev->fman_mac, &version);
- if (err < 0)
- goto _return_fm_mac_free;
-
- dev_info(mac_dev->dev, "FMan dTSEC version: 0x%08x\n", version);
-
- goto _return;
-
-_return_fm_mac_free:
- dtsec_free(mac_dev->fman_mac);
-
-_return:
- return err;
-}
-
-static int memac_initialization(struct mac_device *mac_dev,
- struct device_node *mac_node)
-{
- int err;
- struct fman_mac_params params;
- struct fixed_phy_status *fixed_link;
-
- mac_dev->set_promisc = memac_set_promiscuous;
- mac_dev->change_addr = memac_modify_mac_address;
- mac_dev->add_hash_mac_addr = memac_add_hash_mac_address;
- mac_dev->remove_hash_mac_addr = memac_del_hash_mac_address;
- mac_dev->set_tx_pause = memac_set_tx_pause_frames;
- mac_dev->set_rx_pause = memac_accept_rx_pause_frames;
- mac_dev->set_exception = memac_set_exception;
- mac_dev->set_allmulti = memac_set_allmulti;
- mac_dev->set_tstamp = memac_set_tstamp;
- mac_dev->set_multi = fman_set_multi;
- mac_dev->adjust_link = adjust_link_memac;
- mac_dev->enable = memac_enable;
- mac_dev->disable = memac_disable;
-
- err = set_fman_mac_params(mac_dev, ¶ms);
- if (err)
- goto _return;
- params.internal_phy_node = of_parse_phandle(mac_node, "pcsphy-handle", 0);
-
- if (params.max_speed == SPEED_10000)
- params.phy_if = PHY_INTERFACE_MODE_XGMII;
-
- mac_dev->fman_mac = memac_config(¶ms);
- if (!mac_dev->fman_mac) {
- err = -EINVAL;
- goto _return;
- }
-
- err = memac_cfg_max_frame_len(mac_dev->fman_mac, fman_get_max_frm());
- if (err < 0)
- goto _return_fm_mac_free;
-
- err = memac_cfg_reset_on_init(mac_dev->fman_mac, true);
- if (err < 0)
- goto _return_fm_mac_free;
-
- if (!mac_dev->phy_node && of_phy_is_fixed_link(mac_node)) {
- struct phy_device *phy;
-
- err = of_phy_register_fixed_link(mac_node);
- if (err)
- goto _return_fm_mac_free;
-
- fixed_link = kzalloc(sizeof(*fixed_link), GFP_KERNEL);
- if (!fixed_link) {
- err = -ENOMEM;
- goto _return_fm_mac_free;
- }
-
- mac_dev->phy_node = of_node_get(mac_node);
- phy = of_phy_find_device(mac_dev->phy_node);
- if (!phy) {
- err = -EINVAL;
- of_node_put(mac_dev->phy_node);
- goto _return_fixed_link_free;
- }
-
- fixed_link->link = phy->link;
- fixed_link->speed = phy->speed;
- fixed_link->duplex = phy->duplex;
- fixed_link->pause = phy->pause;
- fixed_link->asym_pause = phy->asym_pause;
-
- put_device(&phy->mdio.dev);
-
- err = memac_cfg_fixed_link(mac_dev->fman_mac, fixed_link);
- if (err < 0)
- goto _return_fixed_link_free;
- }
-
- err = memac_init(mac_dev->fman_mac);
- if (err < 0)
- goto _return_fixed_link_free;
-
- dev_info(mac_dev->dev, "FMan MEMAC\n");
-
- goto _return;
-
-_return_fixed_link_free:
- kfree(fixed_link);
-_return_fm_mac_free:
- memac_free(mac_dev->fman_mac);
-_return:
- return err;
-}
-
#define DTSEC_SUPPORTED \
(SUPPORTED_10baseT_Half \
| SUPPORTED_10baseT_Full \
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 25/47] net: fman: Move initialization to mac-specific files
2022-07-15 21:59 ` [PATCH net-next v3 25/47] net: fman: Move initialization to mac-specific files Sean Anderson
@ 2022-07-21 12:59 ` Camelia Alexandra Groza
0 siblings, 0 replies; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 12:59 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>
> Subject: [PATCH net-next v3 25/47] net: fman: Move initialization to mac-
> specific files
>
> This moves mac-specific initialization to mac-specific files. This will
> make it easier to work with individual macs. It will also make it easier
> to refactor the initialization to simplify the control flow. No
> functional change intended.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 26/47] net: fman: Mark mac methods static
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (24 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 25/47] net: fman: Move initialization to mac-specific files Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 12:59 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 27/47] net: fman: Inline several functions into initialization Sean Anderson
` (21 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
These methods are no longer accessed outside of the driver file, so mark
them as static.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v1)
.../net/ethernet/freescale/fman/fman_dtsec.c | 48 ++++++++++---------
.../net/ethernet/freescale/fman/fman_memac.c | 45 +++++++++--------
.../net/ethernet/freescale/fman/fman_tgec.c | 40 +++++++++-------
3 files changed, 72 insertions(+), 61 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.c b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
index 92c2e35d3b4f..6991586165d7 100644
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
@@ -814,7 +814,7 @@ static void free_init_resources(struct fman_mac *dtsec)
dtsec->unicast_addr_hash = NULL;
}
-int dtsec_cfg_max_frame_len(struct fman_mac *dtsec, u16 new_val)
+static int dtsec_cfg_max_frame_len(struct fman_mac *dtsec, u16 new_val)
{
if (is_init_done(dtsec->dtsec_drv_param))
return -EINVAL;
@@ -824,7 +824,7 @@ int dtsec_cfg_max_frame_len(struct fman_mac *dtsec, u16 new_val)
return 0;
}
-int dtsec_cfg_pad_and_crc(struct fman_mac *dtsec, bool new_val)
+static int dtsec_cfg_pad_and_crc(struct fman_mac *dtsec, bool new_val)
{
if (is_init_done(dtsec->dtsec_drv_param))
return -EINVAL;
@@ -872,7 +872,7 @@ static void graceful_stop(struct fman_mac *dtsec)
}
}
-int dtsec_enable(struct fman_mac *dtsec)
+static int dtsec_enable(struct fman_mac *dtsec)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
u32 tmp;
@@ -891,7 +891,7 @@ int dtsec_enable(struct fman_mac *dtsec)
return 0;
}
-int dtsec_disable(struct fman_mac *dtsec)
+static int dtsec_disable(struct fman_mac *dtsec)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
u32 tmp;
@@ -909,9 +909,10 @@ int dtsec_disable(struct fman_mac *dtsec)
return 0;
}
-int dtsec_set_tx_pause_frames(struct fman_mac *dtsec,
- u8 __maybe_unused priority,
- u16 pause_time, u16 __maybe_unused thresh_time)
+static int dtsec_set_tx_pause_frames(struct fman_mac *dtsec,
+ u8 __maybe_unused priority,
+ u16 pause_time,
+ u16 __maybe_unused thresh_time)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
u32 ptv = 0;
@@ -946,7 +947,7 @@ int dtsec_set_tx_pause_frames(struct fman_mac *dtsec,
return 0;
}
-int dtsec_accept_rx_pause_frames(struct fman_mac *dtsec, bool en)
+static int dtsec_accept_rx_pause_frames(struct fman_mac *dtsec, bool en)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
u32 tmp;
@@ -968,7 +969,8 @@ int dtsec_accept_rx_pause_frames(struct fman_mac *dtsec, bool en)
return 0;
}
-int dtsec_modify_mac_address(struct fman_mac *dtsec, const enet_addr_t *enet_addr)
+static int dtsec_modify_mac_address(struct fman_mac *dtsec,
+ const enet_addr_t *enet_addr)
{
if (!is_init_done(dtsec->dtsec_drv_param))
return -EINVAL;
@@ -986,7 +988,8 @@ int dtsec_modify_mac_address(struct fman_mac *dtsec, const enet_addr_t *enet_add
return 0;
}
-int dtsec_add_hash_mac_address(struct fman_mac *dtsec, enet_addr_t *eth_addr)
+static int dtsec_add_hash_mac_address(struct fman_mac *dtsec,
+ enet_addr_t *eth_addr)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
struct eth_hash_entry *hash_entry;
@@ -1052,7 +1055,7 @@ int dtsec_add_hash_mac_address(struct fman_mac *dtsec, enet_addr_t *eth_addr)
return 0;
}
-int dtsec_set_allmulti(struct fman_mac *dtsec, bool enable)
+static int dtsec_set_allmulti(struct fman_mac *dtsec, bool enable)
{
u32 tmp;
struct dtsec_regs __iomem *regs = dtsec->regs;
@@ -1071,7 +1074,7 @@ int dtsec_set_allmulti(struct fman_mac *dtsec, bool enable)
return 0;
}
-int dtsec_set_tstamp(struct fman_mac *dtsec, bool enable)
+static int dtsec_set_tstamp(struct fman_mac *dtsec, bool enable)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
u32 rctrl, tctrl;
@@ -1096,7 +1099,8 @@ int dtsec_set_tstamp(struct fman_mac *dtsec, bool enable)
return 0;
}
-int dtsec_del_hash_mac_address(struct fman_mac *dtsec, enet_addr_t *eth_addr)
+static int dtsec_del_hash_mac_address(struct fman_mac *dtsec,
+ enet_addr_t *eth_addr)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
struct list_head *pos;
@@ -1167,7 +1171,7 @@ int dtsec_del_hash_mac_address(struct fman_mac *dtsec, enet_addr_t *eth_addr)
return 0;
}
-int dtsec_set_promiscuous(struct fman_mac *dtsec, bool new_val)
+static int dtsec_set_promiscuous(struct fman_mac *dtsec, bool new_val)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
u32 tmp;
@@ -1196,7 +1200,7 @@ int dtsec_set_promiscuous(struct fman_mac *dtsec, bool new_val)
return 0;
}
-int dtsec_adjust_link(struct fman_mac *dtsec, u16 speed)
+static int dtsec_adjust_link(struct fman_mac *dtsec, u16 speed)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
u32 tmp;
@@ -1230,7 +1234,7 @@ int dtsec_adjust_link(struct fman_mac *dtsec, u16 speed)
return 0;
}
-int dtsec_restart_autoneg(struct fman_mac *dtsec)
+static int dtsec_restart_autoneg(struct fman_mac *dtsec)
{
u16 tmp_reg16;
@@ -1270,7 +1274,7 @@ static void adjust_link_dtsec(struct mac_device *mac_dev)
err);
}
-int dtsec_get_version(struct fman_mac *dtsec, u32 *mac_version)
+static int dtsec_get_version(struct fman_mac *dtsec, u32 *mac_version)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
@@ -1282,8 +1286,8 @@ int dtsec_get_version(struct fman_mac *dtsec, u32 *mac_version)
return 0;
}
-int dtsec_set_exception(struct fman_mac *dtsec,
- enum fman_mac_exceptions exception, bool enable)
+static int dtsec_set_exception(struct fman_mac *dtsec,
+ enum fman_mac_exceptions exception, bool enable)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
u32 bit_mask = 0;
@@ -1336,7 +1340,7 @@ int dtsec_set_exception(struct fman_mac *dtsec,
return 0;
}
-int dtsec_init(struct fman_mac *dtsec)
+static int dtsec_init(struct fman_mac *dtsec)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
struct dtsec_cfg *dtsec_drv_param;
@@ -1430,7 +1434,7 @@ int dtsec_init(struct fman_mac *dtsec)
return 0;
}
-int dtsec_free(struct fman_mac *dtsec)
+static int dtsec_free(struct fman_mac *dtsec)
{
free_init_resources(dtsec);
@@ -1441,7 +1445,7 @@ int dtsec_free(struct fman_mac *dtsec)
return 0;
}
-struct fman_mac *dtsec_config(struct fman_mac_params *params)
+static struct fman_mac *dtsec_config(struct fman_mac_params *params)
{
struct fman_mac *dtsec;
struct dtsec_cfg *dtsec_drv_param;
diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.c b/drivers/net/ethernet/freescale/fman/fman_memac.c
index b2a592a77a2a..d3f4c3ec58c5 100644
--- a/drivers/net/ethernet/freescale/fman/fman_memac.c
+++ b/drivers/net/ethernet/freescale/fman/fman_memac.c
@@ -686,7 +686,7 @@ static bool is_init_done(struct memac_cfg *memac_drv_params)
return false;
}
-int memac_enable(struct fman_mac *memac)
+static int memac_enable(struct fman_mac *memac)
{
struct memac_regs __iomem *regs = memac->regs;
u32 tmp;
@@ -701,7 +701,7 @@ int memac_enable(struct fman_mac *memac)
return 0;
}
-int memac_disable(struct fman_mac *memac)
+static int memac_disable(struct fman_mac *memac)
{
struct memac_regs __iomem *regs = memac->regs;
u32 tmp;
@@ -716,7 +716,7 @@ int memac_disable(struct fman_mac *memac)
return 0;
}
-int memac_set_promiscuous(struct fman_mac *memac, bool new_val)
+static int memac_set_promiscuous(struct fman_mac *memac, bool new_val)
{
struct memac_regs __iomem *regs = memac->regs;
u32 tmp;
@@ -735,7 +735,7 @@ int memac_set_promiscuous(struct fman_mac *memac, bool new_val)
return 0;
}
-int memac_adjust_link(struct fman_mac *memac, u16 speed)
+static int memac_adjust_link(struct fman_mac *memac, u16 speed)
{
struct memac_regs __iomem *regs = memac->regs;
u32 tmp;
@@ -792,7 +792,7 @@ static void adjust_link_memac(struct mac_device *mac_dev)
err);
}
-int memac_cfg_max_frame_len(struct fman_mac *memac, u16 new_val)
+static int memac_cfg_max_frame_len(struct fman_mac *memac, u16 new_val)
{
if (is_init_done(memac->memac_drv_param))
return -EINVAL;
@@ -802,7 +802,7 @@ int memac_cfg_max_frame_len(struct fman_mac *memac, u16 new_val)
return 0;
}
-int memac_cfg_reset_on_init(struct fman_mac *memac, bool enable)
+static int memac_cfg_reset_on_init(struct fman_mac *memac, bool enable)
{
if (is_init_done(memac->memac_drv_param))
return -EINVAL;
@@ -812,8 +812,8 @@ int memac_cfg_reset_on_init(struct fman_mac *memac, bool enable)
return 0;
}
-int memac_cfg_fixed_link(struct fman_mac *memac,
- struct fixed_phy_status *fixed_link)
+static int memac_cfg_fixed_link(struct fman_mac *memac,
+ struct fixed_phy_status *fixed_link)
{
if (is_init_done(memac->memac_drv_param))
return -EINVAL;
@@ -823,8 +823,8 @@ int memac_cfg_fixed_link(struct fman_mac *memac,
return 0;
}
-int memac_set_tx_pause_frames(struct fman_mac *memac, u8 priority,
- u16 pause_time, u16 thresh_time)
+static int memac_set_tx_pause_frames(struct fman_mac *memac, u8 priority,
+ u16 pause_time, u16 thresh_time)
{
struct memac_regs __iomem *regs = memac->regs;
u32 tmp;
@@ -861,7 +861,7 @@ int memac_set_tx_pause_frames(struct fman_mac *memac, u8 priority,
return 0;
}
-int memac_accept_rx_pause_frames(struct fman_mac *memac, bool en)
+static int memac_accept_rx_pause_frames(struct fman_mac *memac, bool en)
{
struct memac_regs __iomem *regs = memac->regs;
u32 tmp;
@@ -880,7 +880,8 @@ int memac_accept_rx_pause_frames(struct fman_mac *memac, bool en)
return 0;
}
-int memac_modify_mac_address(struct fman_mac *memac, const enet_addr_t *enet_addr)
+static int memac_modify_mac_address(struct fman_mac *memac,
+ const enet_addr_t *enet_addr)
{
if (!is_init_done(memac->memac_drv_param))
return -EINVAL;
@@ -890,7 +891,8 @@ int memac_modify_mac_address(struct fman_mac *memac, const enet_addr_t *enet_add
return 0;
}
-int memac_add_hash_mac_address(struct fman_mac *memac, enet_addr_t *eth_addr)
+static int memac_add_hash_mac_address(struct fman_mac *memac,
+ enet_addr_t *eth_addr)
{
struct memac_regs __iomem *regs = memac->regs;
struct eth_hash_entry *hash_entry;
@@ -923,7 +925,7 @@ int memac_add_hash_mac_address(struct fman_mac *memac, enet_addr_t *eth_addr)
return 0;
}
-int memac_set_allmulti(struct fman_mac *memac, bool enable)
+static int memac_set_allmulti(struct fman_mac *memac, bool enable)
{
u32 entry;
struct memac_regs __iomem *regs = memac->regs;
@@ -946,12 +948,13 @@ int memac_set_allmulti(struct fman_mac *memac, bool enable)
return 0;
}
-int memac_set_tstamp(struct fman_mac *memac, bool enable)
+static int memac_set_tstamp(struct fman_mac *memac, bool enable)
{
return 0; /* Always enabled. */
}
-int memac_del_hash_mac_address(struct fman_mac *memac, enet_addr_t *eth_addr)
+static int memac_del_hash_mac_address(struct fman_mac *memac,
+ enet_addr_t *eth_addr)
{
struct memac_regs __iomem *regs = memac->regs;
struct eth_hash_entry *hash_entry = NULL;
@@ -984,8 +987,8 @@ int memac_del_hash_mac_address(struct fman_mac *memac, enet_addr_t *eth_addr)
return 0;
}
-int memac_set_exception(struct fman_mac *memac,
- enum fman_mac_exceptions exception, bool enable)
+static int memac_set_exception(struct fman_mac *memac,
+ enum fman_mac_exceptions exception, bool enable)
{
u32 bit_mask = 0;
@@ -1007,7 +1010,7 @@ int memac_set_exception(struct fman_mac *memac,
return 0;
}
-int memac_init(struct fman_mac *memac)
+static int memac_init(struct fman_mac *memac)
{
struct memac_cfg *memac_drv_param;
u8 i;
@@ -1124,7 +1127,7 @@ int memac_init(struct fman_mac *memac)
return 0;
}
-int memac_free(struct fman_mac *memac)
+static int memac_free(struct fman_mac *memac)
{
free_init_resources(memac);
@@ -1137,7 +1140,7 @@ int memac_free(struct fman_mac *memac)
return 0;
}
-struct fman_mac *memac_config(struct fman_mac_params *params)
+static struct fman_mac *memac_config(struct fman_mac_params *params)
{
struct fman_mac *memac;
struct memac_cfg *memac_drv_param;
diff --git a/drivers/net/ethernet/freescale/fman/fman_tgec.c b/drivers/net/ethernet/freescale/fman/fman_tgec.c
index 2f2c4ef45f6f..ca0e00386c66 100644
--- a/drivers/net/ethernet/freescale/fman/fman_tgec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_tgec.c
@@ -393,7 +393,7 @@ static bool is_init_done(struct tgec_cfg *cfg)
return false;
}
-int tgec_enable(struct fman_mac *tgec)
+static int tgec_enable(struct fman_mac *tgec)
{
struct tgec_regs __iomem *regs = tgec->regs;
u32 tmp;
@@ -408,7 +408,7 @@ int tgec_enable(struct fman_mac *tgec)
return 0;
}
-int tgec_disable(struct fman_mac *tgec)
+static int tgec_disable(struct fman_mac *tgec)
{
struct tgec_regs __iomem *regs = tgec->regs;
u32 tmp;
@@ -423,7 +423,7 @@ int tgec_disable(struct fman_mac *tgec)
return 0;
}
-int tgec_set_promiscuous(struct fman_mac *tgec, bool new_val)
+static int tgec_set_promiscuous(struct fman_mac *tgec, bool new_val)
{
struct tgec_regs __iomem *regs = tgec->regs;
u32 tmp;
@@ -441,7 +441,7 @@ int tgec_set_promiscuous(struct fman_mac *tgec, bool new_val)
return 0;
}
-int tgec_cfg_max_frame_len(struct fman_mac *tgec, u16 new_val)
+static int tgec_cfg_max_frame_len(struct fman_mac *tgec, u16 new_val)
{
if (is_init_done(tgec->cfg))
return -EINVAL;
@@ -451,8 +451,9 @@ int tgec_cfg_max_frame_len(struct fman_mac *tgec, u16 new_val)
return 0;
}
-int tgec_set_tx_pause_frames(struct fman_mac *tgec, u8 __maybe_unused priority,
- u16 pause_time, u16 __maybe_unused thresh_time)
+static int tgec_set_tx_pause_frames(struct fman_mac *tgec,
+ u8 __maybe_unused priority, u16 pause_time,
+ u16 __maybe_unused thresh_time)
{
struct tgec_regs __iomem *regs = tgec->regs;
@@ -464,7 +465,7 @@ int tgec_set_tx_pause_frames(struct fman_mac *tgec, u8 __maybe_unused priority,
return 0;
}
-int tgec_accept_rx_pause_frames(struct fman_mac *tgec, bool en)
+static int tgec_accept_rx_pause_frames(struct fman_mac *tgec, bool en)
{
struct tgec_regs __iomem *regs = tgec->regs;
u32 tmp;
@@ -482,7 +483,8 @@ int tgec_accept_rx_pause_frames(struct fman_mac *tgec, bool en)
return 0;
}
-int tgec_modify_mac_address(struct fman_mac *tgec, const enet_addr_t *p_enet_addr)
+static int tgec_modify_mac_address(struct fman_mac *tgec,
+ const enet_addr_t *p_enet_addr)
{
if (!is_init_done(tgec->cfg))
return -EINVAL;
@@ -493,7 +495,8 @@ int tgec_modify_mac_address(struct fman_mac *tgec, const enet_addr_t *p_enet_add
return 0;
}
-int tgec_add_hash_mac_address(struct fman_mac *tgec, enet_addr_t *eth_addr)
+static int tgec_add_hash_mac_address(struct fman_mac *tgec,
+ enet_addr_t *eth_addr)
{
struct tgec_regs __iomem *regs = tgec->regs;
struct eth_hash_entry *hash_entry;
@@ -530,7 +533,7 @@ int tgec_add_hash_mac_address(struct fman_mac *tgec, enet_addr_t *eth_addr)
return 0;
}
-int tgec_set_allmulti(struct fman_mac *tgec, bool enable)
+static int tgec_set_allmulti(struct fman_mac *tgec, bool enable)
{
u32 entry;
struct tgec_regs __iomem *regs = tgec->regs;
@@ -553,7 +556,7 @@ int tgec_set_allmulti(struct fman_mac *tgec, bool enable)
return 0;
}
-int tgec_set_tstamp(struct fman_mac *tgec, bool enable)
+static int tgec_set_tstamp(struct fman_mac *tgec, bool enable)
{
struct tgec_regs __iomem *regs = tgec->regs;
u32 tmp;
@@ -573,7 +576,8 @@ int tgec_set_tstamp(struct fman_mac *tgec, bool enable)
return 0;
}
-int tgec_del_hash_mac_address(struct fman_mac *tgec, enet_addr_t *eth_addr)
+static int tgec_del_hash_mac_address(struct fman_mac *tgec,
+ enet_addr_t *eth_addr)
{
struct tgec_regs __iomem *regs = tgec->regs;
struct eth_hash_entry *hash_entry = NULL;
@@ -614,7 +618,7 @@ static void adjust_link_void(struct mac_device *mac_dev)
{
}
-int tgec_get_version(struct fman_mac *tgec, u32 *mac_version)
+static int tgec_get_version(struct fman_mac *tgec, u32 *mac_version)
{
struct tgec_regs __iomem *regs = tgec->regs;
@@ -626,8 +630,8 @@ int tgec_get_version(struct fman_mac *tgec, u32 *mac_version)
return 0;
}
-int tgec_set_exception(struct fman_mac *tgec,
- enum fman_mac_exceptions exception, bool enable)
+static int tgec_set_exception(struct fman_mac *tgec,
+ enum fman_mac_exceptions exception, bool enable)
{
struct tgec_regs __iomem *regs = tgec->regs;
u32 bit_mask = 0;
@@ -653,7 +657,7 @@ int tgec_set_exception(struct fman_mac *tgec,
return 0;
}
-int tgec_init(struct fman_mac *tgec)
+static int tgec_init(struct fman_mac *tgec)
{
struct tgec_cfg *cfg;
enet_addr_t eth_addr;
@@ -736,7 +740,7 @@ int tgec_init(struct fman_mac *tgec)
return 0;
}
-int tgec_free(struct fman_mac *tgec)
+static int tgec_free(struct fman_mac *tgec)
{
free_init_resources(tgec);
@@ -746,7 +750,7 @@ int tgec_free(struct fman_mac *tgec)
return 0;
}
-struct fman_mac *tgec_config(struct fman_mac_params *params)
+static struct fman_mac *tgec_config(struct fman_mac_params *params)
{
struct fman_mac *tgec;
struct tgec_cfg *cfg;
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 26/47] net: fman: Mark mac methods static
2022-07-15 21:59 ` [PATCH net-next v3 26/47] net: fman: Mark mac methods static Sean Anderson
@ 2022-07-21 12:59 ` Camelia Alexandra Groza
0 siblings, 0 replies; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 12:59 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>
> Subject: [PATCH net-next v3 26/47] net: fman: Mark mac methods static
>
> These methods are no longer accessed outside of the driver file, so mark
> them as static.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 27/47] net: fman: Inline several functions into initialization
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (25 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 26/47] net: fman: Mark mac methods static Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:01 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 28/47] net: fman: Remove internal_phy_node from params Sean Anderson
` (20 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
There are several small functions which weer only necessary because the
initialization functions didn't have access to the mac private data. Now
that they do, just do things directly.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v1)
.../net/ethernet/freescale/fman/fman_dtsec.c | 59 +++----------------
.../net/ethernet/freescale/fman/fman_memac.c | 47 ++-------------
.../net/ethernet/freescale/fman/fman_tgec.c | 43 +++-----------
3 files changed, 21 insertions(+), 128 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.c b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
index 6991586165d7..84205be3a817 100644
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
@@ -814,26 +814,6 @@ static void free_init_resources(struct fman_mac *dtsec)
dtsec->unicast_addr_hash = NULL;
}
-static int dtsec_cfg_max_frame_len(struct fman_mac *dtsec, u16 new_val)
-{
- if (is_init_done(dtsec->dtsec_drv_param))
- return -EINVAL;
-
- dtsec->dtsec_drv_param->maximum_frame = new_val;
-
- return 0;
-}
-
-static int dtsec_cfg_pad_and_crc(struct fman_mac *dtsec, bool new_val)
-{
- if (is_init_done(dtsec->dtsec_drv_param))
- return -EINVAL;
-
- dtsec->dtsec_drv_param->tx_pad_crc = new_val;
-
- return 0;
-}
-
static void graceful_start(struct fman_mac *dtsec)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
@@ -1274,18 +1254,6 @@ static void adjust_link_dtsec(struct mac_device *mac_dev)
err);
}
-static int dtsec_get_version(struct fman_mac *dtsec, u32 *mac_version)
-{
- struct dtsec_regs __iomem *regs = dtsec->regs;
-
- if (!is_init_done(dtsec->dtsec_drv_param))
- return -EINVAL;
-
- *mac_version = ioread32be(®s->tsec_id);
-
- return 0;
-}
-
static int dtsec_set_exception(struct fman_mac *dtsec,
enum fman_mac_exceptions exception, bool enable)
{
@@ -1525,7 +1493,7 @@ int dtsec_initialization(struct mac_device *mac_dev,
{
int err;
struct fman_mac_params params;
- u32 version;
+ struct fman_mac *dtsec;
mac_dev->set_promisc = dtsec_set_promiscuous;
mac_dev->change_addr = dtsec_modify_mac_address;
@@ -1552,34 +1520,25 @@ int dtsec_initialization(struct mac_device *mac_dev,
goto _return;
}
- err = dtsec_cfg_max_frame_len(mac_dev->fman_mac, fman_get_max_frm());
- if (err < 0)
- goto _return_fm_mac_free;
-
- err = dtsec_cfg_pad_and_crc(mac_dev->fman_mac, true);
- if (err < 0)
- goto _return_fm_mac_free;
-
- err = dtsec_init(mac_dev->fman_mac);
+ dtsec = mac_dev->fman_mac;
+ dtsec->dtsec_drv_param->maximum_frame = fman_get_max_frm();
+ dtsec->dtsec_drv_param->tx_pad_crc = true;
+ err = dtsec_init(dtsec);
if (err < 0)
goto _return_fm_mac_free;
/* For 1G MAC, disable by default the MIB counters overflow interrupt */
- err = mac_dev->set_exception(mac_dev->fman_mac,
- FM_MAC_EX_1G_RX_MIB_CNT_OVFL, false);
+ err = dtsec_set_exception(dtsec, FM_MAC_EX_1G_RX_MIB_CNT_OVFL, false);
if (err < 0)
goto _return_fm_mac_free;
- err = dtsec_get_version(mac_dev->fman_mac, &version);
- if (err < 0)
- goto _return_fm_mac_free;
-
- dev_info(mac_dev->dev, "FMan dTSEC version: 0x%08x\n", version);
+ dev_info(mac_dev->dev, "FMan dTSEC version: 0x%08x\n",
+ ioread32be(&dtsec->regs->tsec_id));
goto _return;
_return_fm_mac_free:
- dtsec_free(mac_dev->fman_mac);
+ dtsec_free(dtsec);
_return:
return err;
diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.c b/drivers/net/ethernet/freescale/fman/fman_memac.c
index d3f4c3ec58c5..039f71e31efc 100644
--- a/drivers/net/ethernet/freescale/fman/fman_memac.c
+++ b/drivers/net/ethernet/freescale/fman/fman_memac.c
@@ -792,37 +792,6 @@ static void adjust_link_memac(struct mac_device *mac_dev)
err);
}
-static int memac_cfg_max_frame_len(struct fman_mac *memac, u16 new_val)
-{
- if (is_init_done(memac->memac_drv_param))
- return -EINVAL;
-
- memac->memac_drv_param->max_frame_length = new_val;
-
- return 0;
-}
-
-static int memac_cfg_reset_on_init(struct fman_mac *memac, bool enable)
-{
- if (is_init_done(memac->memac_drv_param))
- return -EINVAL;
-
- memac->memac_drv_param->reset_on_init = enable;
-
- return 0;
-}
-
-static int memac_cfg_fixed_link(struct fman_mac *memac,
- struct fixed_phy_status *fixed_link)
-{
- if (is_init_done(memac->memac_drv_param))
- return -EINVAL;
-
- memac->memac_drv_param->fixed_link = fixed_link;
-
- return 0;
-}
-
static int memac_set_tx_pause_frames(struct fman_mac *memac, u8 priority,
u16 pause_time, u16 thresh_time)
{
@@ -1206,6 +1175,7 @@ int memac_initialization(struct mac_device *mac_dev,
int err;
struct fman_mac_params params;
struct fixed_phy_status *fixed_link;
+ struct fman_mac *memac;
mac_dev->set_promisc = memac_set_promiscuous;
mac_dev->change_addr = memac_modify_mac_address;
@@ -1235,13 +1205,9 @@ int memac_initialization(struct mac_device *mac_dev,
goto _return;
}
- err = memac_cfg_max_frame_len(mac_dev->fman_mac, fman_get_max_frm());
- if (err < 0)
- goto _return_fm_mac_free;
-
- err = memac_cfg_reset_on_init(mac_dev->fman_mac, true);
- if (err < 0)
- goto _return_fm_mac_free;
+ memac = mac_dev->fman_mac;
+ memac->memac_drv_param->max_frame_length = fman_get_max_frm();
+ memac->memac_drv_param->reset_on_init = true;
if (!mac_dev->phy_node && of_phy_is_fixed_link(mac_node)) {
struct phy_device *phy;
@@ -1271,10 +1237,7 @@ int memac_initialization(struct mac_device *mac_dev,
fixed_link->asym_pause = phy->asym_pause;
put_device(&phy->mdio.dev);
-
- err = memac_cfg_fixed_link(mac_dev->fman_mac, fixed_link);
- if (err < 0)
- goto _return_fixed_link_free;
+ memac->memac_drv_param->fixed_link = fixed_link;
}
err = memac_init(mac_dev->fman_mac);
diff --git a/drivers/net/ethernet/freescale/fman/fman_tgec.c b/drivers/net/ethernet/freescale/fman/fman_tgec.c
index ca0e00386c66..32ee1674ff2f 100644
--- a/drivers/net/ethernet/freescale/fman/fman_tgec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_tgec.c
@@ -441,16 +441,6 @@ static int tgec_set_promiscuous(struct fman_mac *tgec, bool new_val)
return 0;
}
-static int tgec_cfg_max_frame_len(struct fman_mac *tgec, u16 new_val)
-{
- if (is_init_done(tgec->cfg))
- return -EINVAL;
-
- tgec->cfg->max_frame_length = new_val;
-
- return 0;
-}
-
static int tgec_set_tx_pause_frames(struct fman_mac *tgec,
u8 __maybe_unused priority, u16 pause_time,
u16 __maybe_unused thresh_time)
@@ -618,18 +608,6 @@ static void adjust_link_void(struct mac_device *mac_dev)
{
}
-static int tgec_get_version(struct fman_mac *tgec, u32 *mac_version)
-{
- struct tgec_regs __iomem *regs = tgec->regs;
-
- if (!is_init_done(tgec->cfg))
- return -EINVAL;
-
- *mac_version = ioread32be(®s->tgec_id);
-
- return 0;
-}
-
static int tgec_set_exception(struct fman_mac *tgec,
enum fman_mac_exceptions exception, bool enable)
{
@@ -809,7 +787,7 @@ int tgec_initialization(struct mac_device *mac_dev,
{
int err;
struct fman_mac_params params;
- u32 version;
+ struct fman_mac *tgec;
mac_dev->set_promisc = tgec_set_promiscuous;
mac_dev->change_addr = tgec_modify_mac_address;
@@ -835,26 +813,19 @@ int tgec_initialization(struct mac_device *mac_dev,
goto _return;
}
- err = tgec_cfg_max_frame_len(mac_dev->fman_mac, fman_get_max_frm());
- if (err < 0)
- goto _return_fm_mac_free;
-
- err = tgec_init(mac_dev->fman_mac);
+ tgec = mac_dev->fman_mac;
+ tgec->cfg->max_frame_length = fman_get_max_frm();
+ err = tgec_init(tgec);
if (err < 0)
goto _return_fm_mac_free;
/* For 10G MAC, disable Tx ECC exception */
- err = mac_dev->set_exception(mac_dev->fman_mac,
- FM_MAC_EX_10G_TX_ECC_ER, false);
+ err = tgec_set_exception(tgec, FM_MAC_EX_10G_TX_ECC_ER, false);
if (err < 0)
goto _return_fm_mac_free;
- err = tgec_get_version(mac_dev->fman_mac, &version);
- if (err < 0)
- goto _return_fm_mac_free;
-
- pr_info("FMan XGEC version: 0x%08x\n", version);
-
+ pr_info("FMan XGEC version: 0x%08x\n",
+ ioread32be(&tgec->regs->tgec_id));
goto _return;
_return_fm_mac_free:
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 27/47] net: fman: Inline several functions into initialization
2022-07-15 21:59 ` [PATCH net-next v3 27/47] net: fman: Inline several functions into initialization Sean Anderson
@ 2022-07-21 13:01 ` Camelia Alexandra Groza
2022-07-21 15:33 ` Sean Anderson
0 siblings, 1 reply; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 13:01 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>
> Subject: [PATCH net-next v3 27/47] net: fman: Inline several functions into
> initialization
>
> There are several small functions which weer only necessary because the
*were* typo.
> initialization functions didn't have access to the mac private data. Now
> that they do, just do things directly.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
^ permalink raw reply [flat|nested] 123+ messages in thread
* Re: [PATCH net-next v3 27/47] net: fman: Inline several functions into initialization
2022-07-21 13:01 ` Camelia Alexandra Groza
@ 2022-07-21 15:33 ` Sean Anderson
2022-07-22 12:30 ` Camelia Alexandra Groza
0 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-21 15:33 UTC (permalink / raw)
To: Camelia Alexandra Groza, David S . Miller, Jakub Kicinski,
Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King, linux-kernel
On 7/21/22 9:01 AM, Camelia Alexandra Groza wrote:
>> -----Original Message-----
>> From: Sean Anderson <sean.anderson@seco.com>
>> Sent: Saturday, July 16, 2022 1:00
>> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
>> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
>> netdev@vger.kernel.org
>> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
>> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
>> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
>> <sean.anderson@seco.com>
>> Subject: [PATCH net-next v3 27/47] net: fman: Inline several functions into
>> initialization
>>
>> There are several small functions which weer only necessary because the
>
> *were* typo.
Hm, I thought commit messages were supposed to be written as if the patch hadn't
yet been applied (e.g. the current state as the patch is reviewed).
--Sean
>> initialization functions didn't have access to the mac private data. Now
>> that they do, just do things directly.
>>
>> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
>
> Acked-by: Camelia Groza <camelia.groza@nxp.com>
>
^ permalink raw reply [flat|nested] 123+ messages in thread
* RE: [PATCH net-next v3 27/47] net: fman: Inline several functions into initialization
2022-07-21 15:33 ` Sean Anderson
@ 2022-07-22 12:30 ` Camelia Alexandra Groza
0 siblings, 0 replies; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-22 12:30 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King, linux-kernel
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Thursday, July 21, 2022 18:34
> To: Camelia Alexandra Groza <camelia.groza@nxp.com>; David S . Miller
> <davem@davemloft.net>; Jakub Kicinski <kuba@kernel.org>; Madalin Bucur
> <madalin.bucur@nxp.com>; netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH net-next v3 27/47] net: fman: Inline several functions
> into initialization
>
>
>
> On 7/21/22 9:01 AM, Camelia Alexandra Groza wrote:
> >> -----Original Message-----
> >> From: Sean Anderson <sean.anderson@seco.com>
> >> Sent: Saturday, July 16, 2022 1:00
> >> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> >> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> >> netdev@vger.kernel.org
> >> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> >> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> >> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean
> Anderson
> >> <sean.anderson@seco.com>
> >> Subject: [PATCH net-next v3 27/47] net: fman: Inline several functions
> into
> >> initialization
> >>
> >> There are several small functions which weer only necessary because the
> >
> > *were* typo.
>
> Hm, I thought commit messages were supposed to be written as if the patch
> hadn't
> yet been applied (e.g. the current state as the patch is reviewed).
That's my understanding as well. I was pointing out this bit: "which weer only necessary ".
I assume you wanted to type "were" here.
> >> initialization functions didn't have access to the mac private data. Now
> >> that they do, just do things directly.
> >>
> >> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> >
> > Acked-by: Camelia Groza <camelia.groza@nxp.com>
> >
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 28/47] net: fman: Remove internal_phy_node from params
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (26 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 27/47] net: fman: Inline several functions into initialization Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:03 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 29/47] net: fman: Map the base address once Sean Anderson
` (19 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
This member was used to pass the phy node between mac_probe and the
mac-specific initialization function. But now that the phy node is
gotten in the initialization function, this parameter does not serve a
purpose. Remove it, and do the grabbing of the node/grabbing of the phy
in the same place.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v1)
.../net/ethernet/freescale/fman/fman_dtsec.c | 33 +++++++++---------
.../net/ethernet/freescale/fman/fman_mac.h | 2 --
.../net/ethernet/freescale/fman/fman_memac.c | 34 +++++++++----------
3 files changed, 34 insertions(+), 35 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.c b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
index 84205be3a817..c2c4677451a9 100644
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
@@ -1463,26 +1463,11 @@ static struct fman_mac *dtsec_config(struct fman_mac_params *params)
dtsec->fm = params->fm;
dtsec->basex_if = params->basex_if;
- if (!params->internal_phy_node) {
- pr_err("TBI PHY node is not available\n");
- goto err_dtsec_drv_param;
- }
-
- dtsec->tbiphy = of_phy_find_device(params->internal_phy_node);
- if (!dtsec->tbiphy) {
- pr_err("of_phy_find_device (TBI PHY) failed\n");
- goto err_dtsec_drv_param;
- }
-
- put_device(&dtsec->tbiphy->mdio.dev);
-
/* Save FMan revision */
fman_get_revision(dtsec->fm, &dtsec->fm_rev_info);
return dtsec;
-err_dtsec_drv_param:
- kfree(dtsec_drv_param);
err_dtsec:
kfree(dtsec);
return NULL;
@@ -1494,6 +1479,7 @@ int dtsec_initialization(struct mac_device *mac_dev,
int err;
struct fman_mac_params params;
struct fman_mac *dtsec;
+ struct device_node *phy_node;
mac_dev->set_promisc = dtsec_set_promiscuous;
mac_dev->change_addr = dtsec_modify_mac_address;
@@ -1512,7 +1498,6 @@ int dtsec_initialization(struct mac_device *mac_dev,
err = set_fman_mac_params(mac_dev, ¶ms);
if (err)
goto _return;
- params.internal_phy_node = of_parse_phandle(mac_node, "tbi-handle", 0);
mac_dev->fman_mac = dtsec_config(¶ms);
if (!mac_dev->fman_mac) {
@@ -1523,6 +1508,22 @@ int dtsec_initialization(struct mac_device *mac_dev,
dtsec = mac_dev->fman_mac;
dtsec->dtsec_drv_param->maximum_frame = fman_get_max_frm();
dtsec->dtsec_drv_param->tx_pad_crc = true;
+
+ phy_node = of_parse_phandle(mac_node, "tbi-handle", 0);
+ if (!phy_node) {
+ pr_err("TBI PHY node is not available\n");
+ err = -EINVAL;
+ goto _return_fm_mac_free;
+ }
+
+ dtsec->tbiphy = of_phy_find_device(phy_node);
+ if (!dtsec->tbiphy) {
+ pr_err("of_phy_find_device (TBI PHY) failed\n");
+ err = -EINVAL;
+ goto _return_fm_mac_free;
+ }
+ put_device(&dtsec->tbiphy->mdio.dev);
+
err = dtsec_init(dtsec);
if (err < 0)
goto _return_fm_mac_free;
diff --git a/drivers/net/ethernet/freescale/fman/fman_mac.h b/drivers/net/ethernet/freescale/fman/fman_mac.h
index 418d1de85702..7774af6463e5 100644
--- a/drivers/net/ethernet/freescale/fman/fman_mac.h
+++ b/drivers/net/ethernet/freescale/fman/fman_mac.h
@@ -190,8 +190,6 @@ struct fman_mac_params {
* synchronize with far-end phy at 10Mbps, 100Mbps or 1000Mbps
*/
bool basex_if;
- /* Pointer to TBI/PCS PHY node, used for TBI/PCS PHY access */
- struct device_node *internal_phy_node;
};
struct eth_hash_t {
diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.c b/drivers/net/ethernet/freescale/fman/fman_memac.c
index 039f71e31efc..5c0b837ebcbc 100644
--- a/drivers/net/ethernet/freescale/fman/fman_memac.c
+++ b/drivers/net/ethernet/freescale/fman/fman_memac.c
@@ -1150,22 +1150,6 @@ static struct fman_mac *memac_config(struct fman_mac_params *params)
/* Save FMan revision */
fman_get_revision(memac->fm, &memac->fm_rev_info);
- if (memac->phy_if == PHY_INTERFACE_MODE_SGMII ||
- memac->phy_if == PHY_INTERFACE_MODE_QSGMII) {
- if (!params->internal_phy_node) {
- pr_err("PCS PHY node is not available\n");
- memac_free(memac);
- return NULL;
- }
-
- memac->pcsphy = of_phy_find_device(params->internal_phy_node);
- if (!memac->pcsphy) {
- pr_err("of_phy_find_device (PCS PHY) failed\n");
- memac_free(memac);
- return NULL;
- }
- }
-
return memac;
}
@@ -1173,6 +1157,7 @@ int memac_initialization(struct mac_device *mac_dev,
struct device_node *mac_node)
{
int err;
+ struct device_node *phy_node;
struct fman_mac_params params;
struct fixed_phy_status *fixed_link;
struct fman_mac *memac;
@@ -1194,7 +1179,6 @@ int memac_initialization(struct mac_device *mac_dev,
err = set_fman_mac_params(mac_dev, ¶ms);
if (err)
goto _return;
- params.internal_phy_node = of_parse_phandle(mac_node, "pcsphy-handle", 0);
if (params.max_speed == SPEED_10000)
params.phy_if = PHY_INTERFACE_MODE_XGMII;
@@ -1208,6 +1192,22 @@ int memac_initialization(struct mac_device *mac_dev,
memac = mac_dev->fman_mac;
memac->memac_drv_param->max_frame_length = fman_get_max_frm();
memac->memac_drv_param->reset_on_init = true;
+ if (memac->phy_if == PHY_INTERFACE_MODE_SGMII ||
+ memac->phy_if == PHY_INTERFACE_MODE_QSGMII) {
+ phy_node = of_parse_phandle(mac_node, "pcsphy-handle", 0);
+ if (!phy_node) {
+ pr_err("PCS PHY node is not available\n");
+ err = -EINVAL;
+ goto _return_fm_mac_free;
+ }
+
+ memac->pcsphy = of_phy_find_device(phy_node);
+ if (!memac->pcsphy) {
+ pr_err("of_phy_find_device (PCS PHY) failed\n");
+ err = -EINVAL;
+ goto _return_fm_mac_free;
+ }
+ }
if (!mac_dev->phy_node && of_phy_is_fixed_link(mac_node)) {
struct phy_device *phy;
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 28/47] net: fman: Remove internal_phy_node from params
2022-07-15 21:59 ` [PATCH net-next v3 28/47] net: fman: Remove internal_phy_node from params Sean Anderson
@ 2022-07-21 13:03 ` Camelia Alexandra Groza
0 siblings, 0 replies; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 13:03 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>
> Subject: [PATCH net-next v3 28/47] net: fman: Remove internal_phy_node
> from params
>
> This member was used to pass the phy node between mac_probe and the
> mac-specific initialization function. But now that the phy node is
> gotten in the initialization function, this parameter does not serve a
> purpose. Remove it, and do the grabbing of the node/grabbing of the phy
> in the same place.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 29/47] net: fman: Map the base address once
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (27 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 28/47] net: fman: Remove internal_phy_node from params Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:04 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 30/47] net: fman: Pass params directly to mac init Sean Anderson
` (18 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
We don't need to remap the base address from the resource twice (once in
mac_probe() and again in set_fman_mac_params()). We still need the
resource to get the end address, but we can use a single function call
to get both at once.
While we're at it, use platform_get_mem_or_io and devm_request_resource
to map the resource. I think this is the more "correct" way to do things
here, since we use the pdev resource, instead of creating a new one.
It's still a bit tricy, since we need to ensure that the resource is a
child of the fman region when it gets requested.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v2)
Changes in v2:
- Fix warning if sizeof(void *) != sizeof(resource_size_t)
.../net/ethernet/freescale/dpaa/dpaa_eth.c | 4 +--
.../ethernet/freescale/dpaa/dpaa_eth_sysfs.c | 2 +-
drivers/net/ethernet/freescale/fman/mac.c | 35 +++++++------------
drivers/net/ethernet/freescale/fman/mac.h | 3 +-
4 files changed, 17 insertions(+), 27 deletions(-)
diff --git a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
index e974d90f15e3..02b588c46fcf 100644
--- a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
+++ b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
@@ -218,8 +218,8 @@ static int dpaa_netdev_init(struct net_device *net_dev,
net_dev->netdev_ops = dpaa_ops;
mac_addr = priv->mac_dev->addr;
- net_dev->mem_start = priv->mac_dev->res->start;
- net_dev->mem_end = priv->mac_dev->res->end;
+ net_dev->mem_start = (unsigned long)priv->mac_dev->vaddr;
+ net_dev->mem_end = (unsigned long)priv->mac_dev->vaddr_end;
net_dev->min_mtu = ETH_MIN_MTU;
net_dev->max_mtu = dpaa_get_max_mtu();
diff --git a/drivers/net/ethernet/freescale/dpaa/dpaa_eth_sysfs.c b/drivers/net/ethernet/freescale/dpaa/dpaa_eth_sysfs.c
index 4fee74c024bd..258eb6c8f4c0 100644
--- a/drivers/net/ethernet/freescale/dpaa/dpaa_eth_sysfs.c
+++ b/drivers/net/ethernet/freescale/dpaa/dpaa_eth_sysfs.c
@@ -18,7 +18,7 @@ static ssize_t dpaa_eth_show_addr(struct device *dev,
if (mac_dev)
return sprintf(buf, "%llx",
- (unsigned long long)mac_dev->res->start);
+ (unsigned long long)mac_dev->vaddr);
else
return sprintf(buf, "none");
}
diff --git a/drivers/net/ethernet/freescale/fman/mac.c b/drivers/net/ethernet/freescale/fman/mac.c
index 7afedd4995c9..62af81c0c942 100644
--- a/drivers/net/ethernet/freescale/fman/mac.c
+++ b/drivers/net/ethernet/freescale/fman/mac.c
@@ -28,7 +28,6 @@ MODULE_LICENSE("Dual BSD/GPL");
MODULE_DESCRIPTION("FSL FMan MAC API based driver");
struct mac_priv_s {
- void __iomem *vaddr;
u8 cell_index;
struct fman *fman;
/* List of multicast addresses */
@@ -63,12 +62,7 @@ int set_fman_mac_params(struct mac_device *mac_dev,
{
struct mac_priv_s *priv = mac_dev->priv;
- params->base_addr = (typeof(params->base_addr))
- devm_ioremap(mac_dev->dev, mac_dev->res->start,
- resource_size(mac_dev->res));
- if (!params->base_addr)
- return -ENOMEM;
-
+ params->base_addr = mac_dev->vaddr;
memcpy(¶ms->addr, mac_dev->addr, sizeof(mac_dev->addr));
params->max_speed = priv->max_speed;
params->phy_if = mac_dev->phy_if;
@@ -305,7 +299,7 @@ static int mac_probe(struct platform_device *_of_dev)
struct device_node *mac_node, *dev_node;
struct mac_device *mac_dev;
struct platform_device *of_dev;
- struct resource res;
+ struct resource *res;
struct mac_priv_s *priv;
u32 val;
u8 fman_id;
@@ -368,30 +362,25 @@ static int mac_probe(struct platform_device *_of_dev)
of_node_put(dev_node);
/* Get the address of the memory mapped registers */
- err = of_address_to_resource(mac_node, 0, &res);
- if (err < 0) {
- dev_err(dev, "of_address_to_resource(%pOF) = %d\n",
- mac_node, err);
- goto _return_of_node_put;
+ res = platform_get_mem_or_io(_of_dev, 0);
+ if (!res) {
+ dev_err(dev, "could not get registers\n");
+ return -EINVAL;
}
- mac_dev->res = __devm_request_region(dev,
- fman_get_mem_region(priv->fman),
- res.start, resource_size(&res),
- "mac");
- if (!mac_dev->res) {
- dev_err(dev, "__devm_request_mem_region(mac) failed\n");
- err = -EBUSY;
+ err = devm_request_resource(dev, fman_get_mem_region(priv->fman), res);
+ if (err) {
+ dev_err_probe(dev, err, "could not request resource\n");
goto _return_of_node_put;
}
- priv->vaddr = devm_ioremap(dev, mac_dev->res->start,
- resource_size(mac_dev->res));
- if (!priv->vaddr) {
+ mac_dev->vaddr = devm_ioremap(dev, res->start, resource_size(res));
+ if (!mac_dev->vaddr) {
dev_err(dev, "devm_ioremap() failed\n");
err = -EIO;
goto _return_of_node_put;
}
+ mac_dev->vaddr_end = mac_dev->vaddr + resource_size(res);
if (!of_device_is_available(mac_node)) {
err = -ENODEV;
diff --git a/drivers/net/ethernet/freescale/fman/mac.h b/drivers/net/ethernet/freescale/fman/mac.h
index da410a7d00c9..7aa71b05bd3e 100644
--- a/drivers/net/ethernet/freescale/fman/mac.h
+++ b/drivers/net/ethernet/freescale/fman/mac.h
@@ -19,8 +19,9 @@ struct fman_mac;
struct mac_priv_s;
struct mac_device {
+ void __iomem *vaddr;
+ void __iomem *vaddr_end;
struct device *dev;
- struct resource *res;
u8 addr[ETH_ALEN];
struct fman_port *port[2];
u32 if_support;
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 29/47] net: fman: Map the base address once
2022-07-15 21:59 ` [PATCH net-next v3 29/47] net: fman: Map the base address once Sean Anderson
@ 2022-07-21 13:04 ` Camelia Alexandra Groza
2022-07-21 15:34 ` Sean Anderson
0 siblings, 1 reply; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 13:04 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>
> Subject: [PATCH net-next v3 29/47] net: fman: Map the base address once
>
> We don't need to remap the base address from the resource twice (once in
> mac_probe() and again in set_fman_mac_params()). We still need the
> resource to get the end address, but we can use a single function call
> to get both at once.
>
> While we're at it, use platform_get_mem_or_io and
> devm_request_resource
> to map the resource. I think this is the more "correct" way to do things
> here, since we use the pdev resource, instead of creating a new one.
> It's still a bit tricy, since we need to ensure that the resource is a
*tricky* typo
> child of the fman region when it gets requested.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
^ permalink raw reply [flat|nested] 123+ messages in thread
* Re: [PATCH net-next v3 29/47] net: fman: Map the base address once
2022-07-21 13:04 ` Camelia Alexandra Groza
@ 2022-07-21 15:34 ` Sean Anderson
0 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-21 15:34 UTC (permalink / raw)
To: Camelia Alexandra Groza, David S . Miller, Jakub Kicinski,
Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King, linux-kernel
On 7/21/22 9:04 AM, Camelia Alexandra Groza wrote:
>> -----Original Message-----
>> From: Sean Anderson <sean.anderson@seco.com>
>> Sent: Saturday, July 16, 2022 1:00
>> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
>> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
>> netdev@vger.kernel.org
>> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
>> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
>> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
>> <sean.anderson@seco.com>
>> Subject: [PATCH net-next v3 29/47] net: fman: Map the base address once
>>
>> We don't need to remap the base address from the resource twice (once in
>> mac_probe() and again in set_fman_mac_params()). We still need the
>> resource to get the end address, but we can use a single function call
>> to get both at once.
>>
>> While we're at it, use platform_get_mem_or_io and
>> devm_request_resource
>> to map the resource. I think this is the more "correct" way to do things
>> here, since we use the pdev resource, instead of creating a new one.
>> It's still a bit tricy, since we need to ensure that the resource is a
>
> *tricky* typo
Thanks, will fix.
--Sean
>> child of the fman region when it gets requested.
>>
>> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
>
> Acked-by: Camelia Groza <camelia.groza@nxp.com>
>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 30/47] net: fman: Pass params directly to mac init
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (28 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 29/47] net: fman: Map the base address once Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:05 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 31/47] net: fman: Use mac_dev for some params Sean Anderson
` (17 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
Instead of having the mac init functions call back into the fman core to
get their params, just pass them directly to the init functions.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v1)
.../net/ethernet/freescale/fman/fman_dtsec.c | 10 ++----
.../net/ethernet/freescale/fman/fman_dtsec.h | 3 +-
.../net/ethernet/freescale/fman/fman_memac.c | 14 +++-----
.../net/ethernet/freescale/fman/fman_memac.h | 3 +-
.../net/ethernet/freescale/fman/fman_tgec.c | 10 ++----
.../net/ethernet/freescale/fman/fman_tgec.h | 3 +-
drivers/net/ethernet/freescale/fman/mac.c | 36 ++++++++-----------
drivers/net/ethernet/freescale/fman/mac.h | 2 --
8 files changed, 32 insertions(+), 49 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.c b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
index c2c4677451a9..9fabb2dfc972 100644
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
@@ -1474,10 +1474,10 @@ static struct fman_mac *dtsec_config(struct fman_mac_params *params)
}
int dtsec_initialization(struct mac_device *mac_dev,
- struct device_node *mac_node)
+ struct device_node *mac_node,
+ struct fman_mac_params *params)
{
int err;
- struct fman_mac_params params;
struct fman_mac *dtsec;
struct device_node *phy_node;
@@ -1495,11 +1495,7 @@ int dtsec_initialization(struct mac_device *mac_dev,
mac_dev->enable = dtsec_enable;
mac_dev->disable = dtsec_disable;
- err = set_fman_mac_params(mac_dev, ¶ms);
- if (err)
- goto _return;
-
- mac_dev->fman_mac = dtsec_config(¶ms);
+ mac_dev->fman_mac = dtsec_config(params);
if (!mac_dev->fman_mac) {
err = -EINVAL;
goto _return;
diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.h b/drivers/net/ethernet/freescale/fman/fman_dtsec.h
index cf3e683c089c..8c72d280c51a 100644
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.h
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.h
@@ -11,6 +11,7 @@
struct mac_device;
int dtsec_initialization(struct mac_device *mac_dev,
- struct device_node *mac_node);
+ struct device_node *mac_node,
+ struct fman_mac_params *params);
#endif /* __DTSEC_H */
diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.c b/drivers/net/ethernet/freescale/fman/fman_memac.c
index 5c0b837ebcbc..7121be0f958b 100644
--- a/drivers/net/ethernet/freescale/fman/fman_memac.c
+++ b/drivers/net/ethernet/freescale/fman/fman_memac.c
@@ -1154,11 +1154,11 @@ static struct fman_mac *memac_config(struct fman_mac_params *params)
}
int memac_initialization(struct mac_device *mac_dev,
- struct device_node *mac_node)
+ struct device_node *mac_node,
+ struct fman_mac_params *params)
{
int err;
struct device_node *phy_node;
- struct fman_mac_params params;
struct fixed_phy_status *fixed_link;
struct fman_mac *memac;
@@ -1176,14 +1176,10 @@ int memac_initialization(struct mac_device *mac_dev,
mac_dev->enable = memac_enable;
mac_dev->disable = memac_disable;
- err = set_fman_mac_params(mac_dev, ¶ms);
- if (err)
- goto _return;
+ if (params->max_speed == SPEED_10000)
+ params->phy_if = PHY_INTERFACE_MODE_XGMII;
- if (params.max_speed == SPEED_10000)
- params.phy_if = PHY_INTERFACE_MODE_XGMII;
-
- mac_dev->fman_mac = memac_config(¶ms);
+ mac_dev->fman_mac = memac_config(params);
if (!mac_dev->fman_mac) {
err = -EINVAL;
goto _return;
diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.h b/drivers/net/ethernet/freescale/fman/fman_memac.h
index a58215a3b1d9..5a3a14f9684f 100644
--- a/drivers/net/ethernet/freescale/fman/fman_memac.h
+++ b/drivers/net/ethernet/freescale/fman/fman_memac.h
@@ -14,6 +14,7 @@
struct mac_device;
int memac_initialization(struct mac_device *mac_dev,
- struct device_node *mac_node);
+ struct device_node *mac_node,
+ struct fman_mac_params *params);
#endif /* __MEMAC_H */
diff --git a/drivers/net/ethernet/freescale/fman/fman_tgec.c b/drivers/net/ethernet/freescale/fman/fman_tgec.c
index 32ee1674ff2f..f34f89e46a6f 100644
--- a/drivers/net/ethernet/freescale/fman/fman_tgec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_tgec.c
@@ -783,10 +783,10 @@ static struct fman_mac *tgec_config(struct fman_mac_params *params)
}
int tgec_initialization(struct mac_device *mac_dev,
- struct device_node *mac_node)
+ struct device_node *mac_node,
+ struct fman_mac_params *params)
{
int err;
- struct fman_mac_params params;
struct fman_mac *tgec;
mac_dev->set_promisc = tgec_set_promiscuous;
@@ -803,11 +803,7 @@ int tgec_initialization(struct mac_device *mac_dev,
mac_dev->enable = tgec_enable;
mac_dev->disable = tgec_disable;
- err = set_fman_mac_params(mac_dev, ¶ms);
- if (err)
- goto _return;
-
- mac_dev->fman_mac = tgec_config(¶ms);
+ mac_dev->fman_mac = tgec_config(params);
if (!mac_dev->fman_mac) {
err = -EINVAL;
goto _return;
diff --git a/drivers/net/ethernet/freescale/fman/fman_tgec.h b/drivers/net/ethernet/freescale/fman/fman_tgec.h
index 2e45b9fea352..768b8d165e05 100644
--- a/drivers/net/ethernet/freescale/fman/fman_tgec.h
+++ b/drivers/net/ethernet/freescale/fman/fman_tgec.h
@@ -11,6 +11,7 @@
struct mac_device;
int tgec_initialization(struct mac_device *mac_dev,
- struct device_node *mac_node);
+ struct device_node *mac_node,
+ struct fman_mac_params *params);
#endif /* __TGEC_H */
diff --git a/drivers/net/ethernet/freescale/fman/mac.c b/drivers/net/ethernet/freescale/fman/mac.c
index 62af81c0c942..fb04c1f9cd3e 100644
--- a/drivers/net/ethernet/freescale/fman/mac.c
+++ b/drivers/net/ethernet/freescale/fman/mac.c
@@ -57,25 +57,6 @@ static void mac_exception(void *handle, enum fman_mac_exceptions ex)
__func__, ex);
}
-int set_fman_mac_params(struct mac_device *mac_dev,
- struct fman_mac_params *params)
-{
- struct mac_priv_s *priv = mac_dev->priv;
-
- params->base_addr = mac_dev->vaddr;
- memcpy(¶ms->addr, mac_dev->addr, sizeof(mac_dev->addr));
- params->max_speed = priv->max_speed;
- params->phy_if = mac_dev->phy_if;
- params->basex_if = false;
- params->mac_id = priv->cell_index;
- params->fm = (void *)priv->fman;
- params->exception_cb = mac_exception;
- params->event_cb = mac_exception;
- params->dev_id = mac_dev;
-
- return 0;
-}
-
int fman_set_multi(struct net_device *net_dev, struct mac_device *mac_dev)
{
struct mac_priv_s *priv;
@@ -294,13 +275,15 @@ MODULE_DEVICE_TABLE(of, mac_match);
static int mac_probe(struct platform_device *_of_dev)
{
int err, i, nph;
- int (*init)(struct mac_device *mac_dev, struct device_node *mac_node);
+ int (*init)(struct mac_device *mac_dev, struct device_node *mac_node,
+ struct fman_mac_params *params);
struct device *dev;
struct device_node *mac_node, *dev_node;
struct mac_device *mac_dev;
struct platform_device *of_dev;
struct resource *res;
struct mac_priv_s *priv;
+ struct fman_mac_params params;
u32 val;
u8 fman_id;
phy_interface_t phy_if;
@@ -474,7 +457,18 @@ static int mac_probe(struct platform_device *_of_dev)
/* Get the rest of the PHY information */
mac_dev->phy_node = of_parse_phandle(mac_node, "phy-handle", 0);
- err = init(mac_dev, mac_node);
+ params.base_addr = mac_dev->vaddr;
+ memcpy(¶ms.addr, mac_dev->addr, sizeof(mac_dev->addr));
+ params.max_speed = priv->max_speed;
+ params.phy_if = mac_dev->phy_if;
+ params.basex_if = false;
+ params.mac_id = priv->cell_index;
+ params.fm = (void *)priv->fman;
+ params.exception_cb = mac_exception;
+ params.event_cb = mac_exception;
+ params.dev_id = mac_dev;
+
+ err = init(mac_dev, mac_node, ¶ms);
if (err < 0) {
dev_err(dev, "mac_dev->init() = %d\n", err);
of_node_put(mac_dev->phy_node);
diff --git a/drivers/net/ethernet/freescale/fman/mac.h b/drivers/net/ethernet/freescale/fman/mac.h
index 7aa71b05bd3e..c5fb4d46210f 100644
--- a/drivers/net/ethernet/freescale/fman/mac.h
+++ b/drivers/net/ethernet/freescale/fman/mac.h
@@ -72,8 +72,6 @@ int fman_set_mac_active_pause(struct mac_device *mac_dev, bool rx, bool tx);
void fman_get_pause_cfg(struct mac_device *mac_dev, bool *rx_pause,
bool *tx_pause);
-int set_fman_mac_params(struct mac_device *mac_dev,
- struct fman_mac_params *params);
int fman_set_multi(struct net_device *net_dev, struct mac_device *mac_dev);
#endif /* __MAC_H */
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 30/47] net: fman: Pass params directly to mac init
2022-07-15 21:59 ` [PATCH net-next v3 30/47] net: fman: Pass params directly to mac init Sean Anderson
@ 2022-07-21 13:05 ` Camelia Alexandra Groza
0 siblings, 0 replies; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 13:05 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>
> Subject: [PATCH net-next v3 30/47] net: fman: Pass params directly to mac
> init
>
> Instead of having the mac init functions call back into the fman core to
> get their params, just pass them directly to the init functions.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 31/47] net: fman: Use mac_dev for some params
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (29 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 30/47] net: fman: Pass params directly to mac init Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:05 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 32/47] net: fman: Specify type of mac_dev for exception_cb Sean Anderson
` (16 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
Some params are already present in mac_dev. Use them directly instead of
passing them through params.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v1)
.../net/ethernet/freescale/fman/fman_dtsec.c | 16 +++++++---------
drivers/net/ethernet/freescale/fman/fman_mac.h | 7 -------
.../net/ethernet/freescale/fman/fman_memac.c | 17 ++++++++---------
drivers/net/ethernet/freescale/fman/fman_tgec.c | 12 +++++-------
drivers/net/ethernet/freescale/fman/mac.c | 10 ++--------
5 files changed, 22 insertions(+), 40 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.c b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
index 9fabb2dfc972..09ad1117005a 100644
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
@@ -1413,13 +1413,11 @@ static int dtsec_free(struct fman_mac *dtsec)
return 0;
}
-static struct fman_mac *dtsec_config(struct fman_mac_params *params)
+static struct fman_mac *dtsec_config(struct mac_device *mac_dev,
+ struct fman_mac_params *params)
{
struct fman_mac *dtsec;
struct dtsec_cfg *dtsec_drv_param;
- void __iomem *base_addr;
-
- base_addr = params->base_addr;
/* allocate memory for the UCC GETH data structure. */
dtsec = kzalloc(sizeof(*dtsec), GFP_KERNEL);
@@ -1436,10 +1434,10 @@ static struct fman_mac *dtsec_config(struct fman_mac_params *params)
set_dflts(dtsec_drv_param);
- dtsec->regs = base_addr;
- dtsec->addr = ENET_ADDR_TO_UINT64(params->addr);
+ dtsec->regs = mac_dev->vaddr;
+ dtsec->addr = ENET_ADDR_TO_UINT64(mac_dev->addr);
dtsec->max_speed = params->max_speed;
- dtsec->phy_if = params->phy_if;
+ dtsec->phy_if = mac_dev->phy_if;
dtsec->mac_id = params->mac_id;
dtsec->exceptions = (DTSEC_IMASK_BREN |
DTSEC_IMASK_RXCEN |
@@ -1456,7 +1454,7 @@ static struct fman_mac *dtsec_config(struct fman_mac_params *params)
DTSEC_IMASK_RDPEEN);
dtsec->exception_cb = params->exception_cb;
dtsec->event_cb = params->event_cb;
- dtsec->dev_id = params->dev_id;
+ dtsec->dev_id = mac_dev;
dtsec->ptp_tsu_enabled = dtsec->dtsec_drv_param->ptp_tsu_en;
dtsec->en_tsu_err_exception = dtsec->dtsec_drv_param->ptp_exception_en;
@@ -1495,7 +1493,7 @@ int dtsec_initialization(struct mac_device *mac_dev,
mac_dev->enable = dtsec_enable;
mac_dev->disable = dtsec_disable;
- mac_dev->fman_mac = dtsec_config(params);
+ mac_dev->fman_mac = dtsec_config(mac_dev, params);
if (!mac_dev->fman_mac) {
err = -EINVAL;
goto _return;
diff --git a/drivers/net/ethernet/freescale/fman/fman_mac.h b/drivers/net/ethernet/freescale/fman/fman_mac.h
index 7774af6463e5..730aae7fed13 100644
--- a/drivers/net/ethernet/freescale/fman/fman_mac.h
+++ b/drivers/net/ethernet/freescale/fman/fman_mac.h
@@ -163,25 +163,18 @@ typedef void (fman_mac_exception_cb)(void *dev_id,
/* FMan MAC config input */
struct fman_mac_params {
- /* Base of memory mapped FM MAC registers */
- void __iomem *base_addr;
- /* MAC address of device; First octet is sent first */
- enet_addr_t addr;
/* MAC ID; numbering of dTSEC and 1G-mEMAC:
* 0 - FM_MAX_NUM_OF_1G_MACS;
* numbering of 10G-MAC (TGEC) and 10G-mEMAC:
* 0 - FM_MAX_NUM_OF_10G_MACS
*/
u8 mac_id;
- /* PHY interface */
- phy_interface_t phy_if;
/* Note that the speed should indicate the maximum rate that
* this MAC should support rather than the actual speed;
*/
u16 max_speed;
/* A handle to the FM object this port related to */
void *fm;
- void *dev_id; /* device cookie used by the exception cbs */
fman_mac_exception_cb *event_cb; /* MDIO Events Callback Routine */
fman_mac_exception_cb *exception_cb;/* Exception Callback Routine */
/* SGMII/QSGII interface with 1000BaseX auto-negotiation between MAC
diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.c b/drivers/net/ethernet/freescale/fman/fman_memac.c
index 7121be0f958b..2f3050df5ab9 100644
--- a/drivers/net/ethernet/freescale/fman/fman_memac.c
+++ b/drivers/net/ethernet/freescale/fman/fman_memac.c
@@ -1109,13 +1109,12 @@ static int memac_free(struct fman_mac *memac)
return 0;
}
-static struct fman_mac *memac_config(struct fman_mac_params *params)
+static struct fman_mac *memac_config(struct mac_device *mac_dev,
+ struct fman_mac_params *params)
{
struct fman_mac *memac;
struct memac_cfg *memac_drv_param;
- void __iomem *base_addr;
- base_addr = params->base_addr;
/* allocate memory for the m_emac data structure */
memac = kzalloc(sizeof(*memac), GFP_KERNEL);
if (!memac)
@@ -1133,17 +1132,17 @@ static struct fman_mac *memac_config(struct fman_mac_params *params)
set_dflts(memac_drv_param);
- memac->addr = ENET_ADDR_TO_UINT64(params->addr);
+ memac->addr = ENET_ADDR_TO_UINT64(mac_dev->addr);
- memac->regs = base_addr;
+ memac->regs = mac_dev->vaddr;
memac->max_speed = params->max_speed;
- memac->phy_if = params->phy_if;
+ memac->phy_if = mac_dev->phy_if;
memac->mac_id = params->mac_id;
memac->exceptions = (MEMAC_IMASK_TSECC_ER | MEMAC_IMASK_TECC_ER |
MEMAC_IMASK_RECC_ER | MEMAC_IMASK_MGI);
memac->exception_cb = params->exception_cb;
memac->event_cb = params->event_cb;
- memac->dev_id = params->dev_id;
+ memac->dev_id = mac_dev;
memac->fm = params->fm;
memac->basex_if = params->basex_if;
@@ -1177,9 +1176,9 @@ int memac_initialization(struct mac_device *mac_dev,
mac_dev->disable = memac_disable;
if (params->max_speed == SPEED_10000)
- params->phy_if = PHY_INTERFACE_MODE_XGMII;
+ mac_dev->phy_if = PHY_INTERFACE_MODE_XGMII;
- mac_dev->fman_mac = memac_config(params);
+ mac_dev->fman_mac = memac_config(mac_dev, params);
if (!mac_dev->fman_mac) {
err = -EINVAL;
goto _return;
diff --git a/drivers/net/ethernet/freescale/fman/fman_tgec.c b/drivers/net/ethernet/freescale/fman/fman_tgec.c
index f34f89e46a6f..2642a4c27292 100644
--- a/drivers/net/ethernet/freescale/fman/fman_tgec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_tgec.c
@@ -728,13 +728,11 @@ static int tgec_free(struct fman_mac *tgec)
return 0;
}
-static struct fman_mac *tgec_config(struct fman_mac_params *params)
+static struct fman_mac *tgec_config(struct mac_device *mac_dev, struct fman_mac_params *params)
{
struct fman_mac *tgec;
struct tgec_cfg *cfg;
- void __iomem *base_addr;
- base_addr = params->base_addr;
/* allocate memory for the UCC GETH data structure. */
tgec = kzalloc(sizeof(*tgec), GFP_KERNEL);
if (!tgec)
@@ -752,8 +750,8 @@ static struct fman_mac *tgec_config(struct fman_mac_params *params)
set_dflts(cfg);
- tgec->regs = base_addr;
- tgec->addr = ENET_ADDR_TO_UINT64(params->addr);
+ tgec->regs = mac_dev->vaddr;
+ tgec->addr = ENET_ADDR_TO_UINT64(mac_dev->addr);
tgec->max_speed = params->max_speed;
tgec->mac_id = params->mac_id;
tgec->exceptions = (TGEC_IMASK_MDIO_SCAN_EVENT |
@@ -773,7 +771,7 @@ static struct fman_mac *tgec_config(struct fman_mac_params *params)
TGEC_IMASK_RX_ALIGN_ER);
tgec->exception_cb = params->exception_cb;
tgec->event_cb = params->event_cb;
- tgec->dev_id = params->dev_id;
+ tgec->dev_id = mac_dev;
tgec->fm = params->fm;
/* Save FMan revision */
@@ -803,7 +801,7 @@ int tgec_initialization(struct mac_device *mac_dev,
mac_dev->enable = tgec_enable;
mac_dev->disable = tgec_disable;
- mac_dev->fman_mac = tgec_config(params);
+ mac_dev->fman_mac = tgec_config(mac_dev, params);
if (!mac_dev->fman_mac) {
err = -EINVAL;
goto _return;
diff --git a/drivers/net/ethernet/freescale/fman/mac.c b/drivers/net/ethernet/freescale/fman/mac.c
index fb04c1f9cd3e..0f9e3e9e60c6 100644
--- a/drivers/net/ethernet/freescale/fman/mac.c
+++ b/drivers/net/ethernet/freescale/fman/mac.c
@@ -34,7 +34,6 @@ struct mac_priv_s {
struct list_head mc_addr_list;
struct platform_device *eth_dev;
u16 speed;
- u16 max_speed;
};
struct mac_address {
@@ -439,7 +438,7 @@ static int mac_probe(struct platform_device *_of_dev)
mac_dev->phy_if = phy_if;
priv->speed = phy2speed[mac_dev->phy_if];
- priv->max_speed = priv->speed;
+ params.max_speed = priv->speed;
mac_dev->if_support = DTSEC_SUPPORTED;
/* We don't support half-duplex in SGMII mode */
if (mac_dev->phy_if == PHY_INTERFACE_MODE_SGMII)
@@ -447,7 +446,7 @@ static int mac_probe(struct platform_device *_of_dev)
SUPPORTED_100baseT_Half);
/* Gigabit support (no half-duplex) */
- if (priv->max_speed == 1000)
+ if (params.max_speed == 1000)
mac_dev->if_support |= SUPPORTED_1000baseT_Full;
/* The 10G interface only supports one mode */
@@ -457,16 +456,11 @@ static int mac_probe(struct platform_device *_of_dev)
/* Get the rest of the PHY information */
mac_dev->phy_node = of_parse_phandle(mac_node, "phy-handle", 0);
- params.base_addr = mac_dev->vaddr;
- memcpy(¶ms.addr, mac_dev->addr, sizeof(mac_dev->addr));
- params.max_speed = priv->max_speed;
- params.phy_if = mac_dev->phy_if;
params.basex_if = false;
params.mac_id = priv->cell_index;
params.fm = (void *)priv->fman;
params.exception_cb = mac_exception;
params.event_cb = mac_exception;
- params.dev_id = mac_dev;
err = init(mac_dev, mac_node, ¶ms);
if (err < 0) {
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 31/47] net: fman: Use mac_dev for some params
2022-07-15 21:59 ` [PATCH net-next v3 31/47] net: fman: Use mac_dev for some params Sean Anderson
@ 2022-07-21 13:05 ` Camelia Alexandra Groza
0 siblings, 0 replies; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 13:05 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>
> Subject: [PATCH net-next v3 31/47] net: fman: Use mac_dev for some
> params
>
> Some params are already present in mac_dev. Use them directly instead of
> passing them through params.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 32/47] net: fman: Specify type of mac_dev for exception_cb
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (30 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 31/47] net: fman: Use mac_dev for some params Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:06 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 33/47] net: fman: Clean up error handling Sean Anderson
` (15 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
Instead of using a void pointer for mac_dev, specify its type
explicitly.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v2)
Changes in v2:
- New
drivers/net/ethernet/freescale/fman/fman_dtsec.c | 2 +-
drivers/net/ethernet/freescale/fman/fman_mac.h | 5 +++--
drivers/net/ethernet/freescale/fman/fman_memac.c | 2 +-
drivers/net/ethernet/freescale/fman/fman_tgec.c | 2 +-
drivers/net/ethernet/freescale/fman/mac.c | 5 ++---
5 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.c b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
index 09ad1117005a..7acd57424034 100644
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
@@ -301,7 +301,7 @@ struct fman_mac {
/* Ethernet physical interface */
phy_interface_t phy_if;
u16 max_speed;
- void *dev_id; /* device cookie used by the exception cbs */
+ struct mac_device *dev_id; /* device cookie used by the exception cbs */
fman_mac_exception_cb *exception_cb;
fman_mac_exception_cb *event_cb;
/* Number of individual addresses in registers for this station */
diff --git a/drivers/net/ethernet/freescale/fman/fman_mac.h b/drivers/net/ethernet/freescale/fman/fman_mac.h
index 730aae7fed13..65887a3160d7 100644
--- a/drivers/net/ethernet/freescale/fman/fman_mac.h
+++ b/drivers/net/ethernet/freescale/fman/fman_mac.h
@@ -41,6 +41,7 @@
#include <linux/if_ether.h>
struct fman_mac;
+struct mac_device;
/* Ethernet Address */
typedef u8 enet_addr_t[ETH_ALEN];
@@ -158,8 +159,8 @@ struct eth_hash_entry {
struct list_head node;
};
-typedef void (fman_mac_exception_cb)(void *dev_id,
- enum fman_mac_exceptions exceptions);
+typedef void (fman_mac_exception_cb)(struct mac_device *dev_id,
+ enum fman_mac_exceptions exceptions);
/* FMan MAC config input */
struct fman_mac_params {
diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.c b/drivers/net/ethernet/freescale/fman/fman_memac.c
index 2f3050df5ab9..19619af99f9c 100644
--- a/drivers/net/ethernet/freescale/fman/fman_memac.c
+++ b/drivers/net/ethernet/freescale/fman/fman_memac.c
@@ -311,7 +311,7 @@ struct fman_mac {
/* Ethernet physical interface */
phy_interface_t phy_if;
u16 max_speed;
- void *dev_id; /* device cookie used by the exception cbs */
+ struct mac_device *dev_id; /* device cookie used by the exception cbs */
fman_mac_exception_cb *exception_cb;
fman_mac_exception_cb *event_cb;
/* Pointer to driver's global address hash table */
diff --git a/drivers/net/ethernet/freescale/fman/fman_tgec.c b/drivers/net/ethernet/freescale/fman/fman_tgec.c
index 2642a4c27292..010c0e0b57d7 100644
--- a/drivers/net/ethernet/freescale/fman/fman_tgec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_tgec.c
@@ -180,7 +180,7 @@ struct fman_mac {
/* MAC address of device; */
u64 addr;
u16 max_speed;
- void *dev_id; /* device cookie used by the exception cbs */
+ struct mac_device *dev_id; /* device cookie used by the exception cbs */
fman_mac_exception_cb *exception_cb;
fman_mac_exception_cb *event_cb;
/* pointer to driver's global address hash table */
diff --git a/drivers/net/ethernet/freescale/fman/mac.c b/drivers/net/ethernet/freescale/fman/mac.c
index 0f9e3e9e60c6..66a3742a862b 100644
--- a/drivers/net/ethernet/freescale/fman/mac.c
+++ b/drivers/net/ethernet/freescale/fman/mac.c
@@ -41,10 +41,9 @@ struct mac_address {
struct list_head list;
};
-static void mac_exception(void *handle, enum fman_mac_exceptions ex)
+static void mac_exception(struct mac_device *mac_dev,
+ enum fman_mac_exceptions ex)
{
- struct mac_device *mac_dev = handle;
-
if (ex == FM_MAC_EX_10G_RX_FIFO_OVFL) {
/* don't flag RX FIFO after the first */
mac_dev->set_exception(mac_dev->fman_mac,
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 32/47] net: fman: Specify type of mac_dev for exception_cb
2022-07-15 21:59 ` [PATCH net-next v3 32/47] net: fman: Specify type of mac_dev for exception_cb Sean Anderson
@ 2022-07-21 13:06 ` Camelia Alexandra Groza
0 siblings, 0 replies; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 13:06 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>
> Subject: [PATCH net-next v3 32/47] net: fman: Specify type of mac_dev for
> exception_cb
>
> Instead of using a void pointer for mac_dev, specify its type
> explicitly.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 33/47] net: fman: Clean up error handling
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (31 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 32/47] net: fman: Specify type of mac_dev for exception_cb Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:06 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 34/47] net: fman: Change return type of disable to void Sean Anderson
` (14 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
This removes the _return label, since something like
err = -EFOO;
goto _return;
can be replaced by the briefer
return -EFOO;
Additionally, this skips going to _return_of_node_put when dev_node has
already been put (preventing a double put).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v1)
drivers/net/ethernet/freescale/fman/mac.c | 43 ++++++++---------------
1 file changed, 15 insertions(+), 28 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/mac.c b/drivers/net/ethernet/freescale/fman/mac.c
index 66a3742a862b..7b7526fd7da3 100644
--- a/drivers/net/ethernet/freescale/fman/mac.c
+++ b/drivers/net/ethernet/freescale/fman/mac.c
@@ -291,15 +291,11 @@ static int mac_probe(struct platform_device *_of_dev)
init = of_device_get_match_data(dev);
mac_dev = devm_kzalloc(dev, sizeof(*mac_dev), GFP_KERNEL);
- if (!mac_dev) {
- err = -ENOMEM;
- goto _return;
- }
+ if (!mac_dev)
+ return -ENOMEM;
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- if (!priv) {
- err = -ENOMEM;
- goto _return;
- }
+ if (!priv)
+ return -ENOMEM;
/* Save private information */
mac_dev->priv = priv;
@@ -312,8 +308,7 @@ static int mac_probe(struct platform_device *_of_dev)
if (!dev_node) {
dev_err(dev, "of_get_parent(%pOF) failed\n",
mac_node);
- err = -EINVAL;
- goto _return_of_node_put;
+ return -EINVAL;
}
of_dev = of_find_device_by_node(dev_node);
@@ -352,28 +347,24 @@ static int mac_probe(struct platform_device *_of_dev)
err = devm_request_resource(dev, fman_get_mem_region(priv->fman), res);
if (err) {
dev_err_probe(dev, err, "could not request resource\n");
- goto _return_of_node_put;
+ return err;
}
mac_dev->vaddr = devm_ioremap(dev, res->start, resource_size(res));
if (!mac_dev->vaddr) {
dev_err(dev, "devm_ioremap() failed\n");
- err = -EIO;
- goto _return_of_node_put;
+ return -EIO;
}
mac_dev->vaddr_end = mac_dev->vaddr + resource_size(res);
- if (!of_device_is_available(mac_node)) {
- err = -ENODEV;
- goto _return_of_node_put;
- }
+ if (!of_device_is_available(mac_node))
+ return -ENODEV;
/* Get the cell-index */
err = of_property_read_u32(mac_node, "cell-index", &val);
if (err) {
dev_err(dev, "failed to read cell-index for %pOF\n", mac_node);
- err = -EINVAL;
- goto _return_of_node_put;
+ return -EINVAL;
}
priv->cell_index = (u8)val;
@@ -387,15 +378,13 @@ static int mac_probe(struct platform_device *_of_dev)
if (unlikely(nph < 0)) {
dev_err(dev, "of_count_phandle_with_args(%pOF, fsl,fman-ports) failed\n",
mac_node);
- err = nph;
- goto _return_of_node_put;
+ return nph;
}
if (nph != ARRAY_SIZE(mac_dev->port)) {
dev_err(dev, "Not supported number of fman-ports handles of mac node %pOF from device tree\n",
mac_node);
- err = -EINVAL;
- goto _return_of_node_put;
+ return -EINVAL;
}
for (i = 0; i < ARRAY_SIZE(mac_dev->port); i++) {
@@ -404,8 +393,7 @@ static int mac_probe(struct platform_device *_of_dev)
if (!dev_node) {
dev_err(dev, "of_parse_phandle(%pOF, fsl,fman-ports) failed\n",
mac_node);
- err = -EINVAL;
- goto _return_of_node_put;
+ return -EINVAL;
}
of_dev = of_find_device_by_node(dev_node);
@@ -465,7 +453,7 @@ static int mac_probe(struct platform_device *_of_dev)
if (err < 0) {
dev_err(dev, "mac_dev->init() = %d\n", err);
of_node_put(mac_dev->phy_node);
- goto _return_of_node_put;
+ return err;
}
/* pause frame autonegotiation enabled */
@@ -492,11 +480,10 @@ static int mac_probe(struct platform_device *_of_dev)
priv->eth_dev = NULL;
}
- goto _return;
+ return err;
_return_of_node_put:
of_node_put(dev_node);
-_return:
return err;
}
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 33/47] net: fman: Clean up error handling
2022-07-15 21:59 ` [PATCH net-next v3 33/47] net: fman: Clean up error handling Sean Anderson
@ 2022-07-21 13:06 ` Camelia Alexandra Groza
0 siblings, 0 replies; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 13:06 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>
> Subject: [PATCH net-next v3 33/47] net: fman: Clean up error handling
>
> This removes the _return label, since something like
>
> err = -EFOO;
> goto _return;
>
> can be replaced by the briefer
>
> return -EFOO;
>
> Additionally, this skips going to _return_of_node_put when dev_node has
> already been put (preventing a double put).
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 34/47] net: fman: Change return type of disable to void
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (32 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 33/47] net: fman: Clean up error handling Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:08 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 35/47] net: dpaa: Use mac_dev variable in dpaa_netdev_init Sean Anderson
` (13 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
When disabling, there is nothing we can do about errors. In fact, the
only error which can occur is misuse of the API. Just warn in the mac
driver instead.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v1)
drivers/net/ethernet/freescale/dpaa/dpaa_eth.c | 5 +----
drivers/net/ethernet/freescale/fman/fman_dtsec.c | 7 ++-----
drivers/net/ethernet/freescale/fman/fman_memac.c | 8 +++-----
drivers/net/ethernet/freescale/fman/fman_tgec.c | 7 ++-----
drivers/net/ethernet/freescale/fman/mac.h | 2 +-
5 files changed, 9 insertions(+), 20 deletions(-)
diff --git a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
index 02b588c46fcf..d378247a6d0c 100644
--- a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
+++ b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
@@ -290,10 +290,7 @@ static int dpaa_stop(struct net_device *net_dev)
if (mac_dev->phy_dev)
phy_stop(mac_dev->phy_dev);
- err = mac_dev->disable(mac_dev->fman_mac);
- if (err < 0)
- netif_err(priv, ifdown, net_dev, "mac_dev->disable() = %d\n",
- err);
+ mac_dev->disable(mac_dev->fman_mac);
for (i = 0; i < ARRAY_SIZE(mac_dev->port); i++) {
error = fman_port_disable(mac_dev->port[i]);
diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.c b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
index 7acd57424034..f2dd07b714ea 100644
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
@@ -871,13 +871,12 @@ static int dtsec_enable(struct fman_mac *dtsec)
return 0;
}
-static int dtsec_disable(struct fman_mac *dtsec)
+static void dtsec_disable(struct fman_mac *dtsec)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
u32 tmp;
- if (!is_init_done(dtsec->dtsec_drv_param))
- return -EINVAL;
+ WARN_ON_ONCE(!is_init_done(dtsec->dtsec_drv_param));
/* Graceful stop - Assert the graceful Rx/Tx stop bit */
graceful_stop(dtsec);
@@ -885,8 +884,6 @@ static int dtsec_disable(struct fman_mac *dtsec)
tmp = ioread32be(®s->maccfg1);
tmp &= ~(MACCFG1_RX_EN | MACCFG1_TX_EN);
iowrite32be(tmp, ®s->maccfg1);
-
- return 0;
}
static int dtsec_set_tx_pause_frames(struct fman_mac *dtsec,
diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.c b/drivers/net/ethernet/freescale/fman/fman_memac.c
index 19619af99f9c..8ad93a4c0c21 100644
--- a/drivers/net/ethernet/freescale/fman/fman_memac.c
+++ b/drivers/net/ethernet/freescale/fman/fman_memac.c
@@ -701,19 +701,17 @@ static int memac_enable(struct fman_mac *memac)
return 0;
}
-static int memac_disable(struct fman_mac *memac)
+static void memac_disable(struct fman_mac *memac)
+
{
struct memac_regs __iomem *regs = memac->regs;
u32 tmp;
- if (!is_init_done(memac->memac_drv_param))
- return -EINVAL;
+ WARN_ON_ONCE(!is_init_done(memac->memac_drv_param));
tmp = ioread32be(®s->command_config);
tmp &= ~(CMD_CFG_RX_EN | CMD_CFG_TX_EN);
iowrite32be(tmp, ®s->command_config);
-
- return 0;
}
static int memac_set_promiscuous(struct fman_mac *memac, bool new_val)
diff --git a/drivers/net/ethernet/freescale/fman/fman_tgec.c b/drivers/net/ethernet/freescale/fman/fman_tgec.c
index 010c0e0b57d7..f4cdf0cf7c32 100644
--- a/drivers/net/ethernet/freescale/fman/fman_tgec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_tgec.c
@@ -408,19 +408,16 @@ static int tgec_enable(struct fman_mac *tgec)
return 0;
}
-static int tgec_disable(struct fman_mac *tgec)
+static void tgec_disable(struct fman_mac *tgec)
{
struct tgec_regs __iomem *regs = tgec->regs;
u32 tmp;
- if (!is_init_done(tgec->cfg))
- return -EINVAL;
+ WARN_ON_ONCE(!is_init_done(tgec->cfg));
tmp = ioread32be(®s->command_config);
tmp &= ~(CMD_CFG_RX_EN | CMD_CFG_TX_EN);
iowrite32be(tmp, ®s->command_config);
-
- return 0;
}
static int tgec_set_promiscuous(struct fman_mac *tgec, bool new_val)
diff --git a/drivers/net/ethernet/freescale/fman/mac.h b/drivers/net/ethernet/freescale/fman/mac.h
index c5fb4d46210f..a55efcb7998c 100644
--- a/drivers/net/ethernet/freescale/fman/mac.h
+++ b/drivers/net/ethernet/freescale/fman/mac.h
@@ -38,7 +38,7 @@ struct mac_device {
bool allmulti;
int (*enable)(struct fman_mac *mac_dev);
- int (*disable)(struct fman_mac *mac_dev);
+ void (*disable)(struct fman_mac *mac_dev);
void (*adjust_link)(struct mac_device *mac_dev);
int (*set_promisc)(struct fman_mac *mac_dev, bool enable);
int (*change_addr)(struct fman_mac *mac_dev, const enet_addr_t *enet_addr);
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 34/47] net: fman: Change return type of disable to void
2022-07-15 21:59 ` [PATCH net-next v3 34/47] net: fman: Change return type of disable to void Sean Anderson
@ 2022-07-21 13:08 ` Camelia Alexandra Groza
0 siblings, 0 replies; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 13:08 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>
> Subject: [PATCH net-next v3 34/47] net: fman: Change return type of disable
> to void
>
> When disabling, there is nothing we can do about errors. In fact, the
> only error which can occur is misuse of the API. Just warn in the mac
> driver instead.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 35/47] net: dpaa: Use mac_dev variable in dpaa_netdev_init
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (33 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 34/47] net: fman: Change return type of disable to void Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:15 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 36/47] soc: fsl: qbman: Add helper for sanity checking cgr ops Sean Anderson
` (12 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
There are several references to mac_dev in dpaa_netdev_init. Make things a
bit more concise by adding a local variable for it.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v1)
drivers/net/ethernet/freescale/dpaa/dpaa_eth.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
index d378247a6d0c..377e5513a414 100644
--- a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
+++ b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
@@ -203,6 +203,7 @@ static int dpaa_netdev_init(struct net_device *net_dev,
{
struct dpaa_priv *priv = netdev_priv(net_dev);
struct device *dev = net_dev->dev.parent;
+ struct mac_device *mac_dev = priv->mac_dev;
struct dpaa_percpu_priv *percpu_priv;
const u8 *mac_addr;
int i, err;
@@ -216,10 +217,10 @@ static int dpaa_netdev_init(struct net_device *net_dev,
}
net_dev->netdev_ops = dpaa_ops;
- mac_addr = priv->mac_dev->addr;
+ mac_addr = mac_dev->addr;
- net_dev->mem_start = (unsigned long)priv->mac_dev->vaddr;
- net_dev->mem_end = (unsigned long)priv->mac_dev->vaddr_end;
+ net_dev->mem_start = (unsigned long)mac_dev->vaddr;
+ net_dev->mem_end = (unsigned long)mac_dev->vaddr_end;
net_dev->min_mtu = ETH_MIN_MTU;
net_dev->max_mtu = dpaa_get_max_mtu();
@@ -246,7 +247,7 @@ static int dpaa_netdev_init(struct net_device *net_dev,
eth_hw_addr_set(net_dev, mac_addr);
} else {
eth_hw_addr_random(net_dev);
- err = priv->mac_dev->change_addr(priv->mac_dev->fman_mac,
+ err = priv->mac_dev->change_addr(mac_dev->fman_mac,
(const enet_addr_t *)net_dev->dev_addr);
if (err) {
dev_err(dev, "Failed to set random MAC address\n");
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 35/47] net: dpaa: Use mac_dev variable in dpaa_netdev_init
2022-07-15 21:59 ` [PATCH net-next v3 35/47] net: dpaa: Use mac_dev variable in dpaa_netdev_init Sean Anderson
@ 2022-07-21 13:15 ` Camelia Alexandra Groza
2022-07-21 15:36 ` Sean Anderson
0 siblings, 1 reply; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 13:15 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>
> Subject: [PATCH net-next v3 35/47] net: dpaa: Use mac_dev variable in
> dpaa_netdev_init
>
> There are several references to mac_dev in dpaa_netdev_init. Make things a
> bit more concise by adding a local variable for it.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> ---
>
> (no changes since v1)
>
> drivers/net/ethernet/freescale/dpaa/dpaa_eth.c | 9 +++++----
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
> b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
> index d378247a6d0c..377e5513a414 100644
> --- a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
> +++ b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
> @@ -203,6 +203,7 @@ static int dpaa_netdev_init(struct net_device
> *net_dev,
> {
> struct dpaa_priv *priv = netdev_priv(net_dev);
> struct device *dev = net_dev->dev.parent;
> + struct mac_device *mac_dev = priv->mac_dev;
> struct dpaa_percpu_priv *percpu_priv;
> const u8 *mac_addr;
> int i, err;
> @@ -216,10 +217,10 @@ static int dpaa_netdev_init(struct net_device
> *net_dev,
> }
>
> net_dev->netdev_ops = dpaa_ops;
> - mac_addr = priv->mac_dev->addr;
> + mac_addr = mac_dev->addr;
>
> - net_dev->mem_start = (unsigned long)priv->mac_dev->vaddr;
> - net_dev->mem_end = (unsigned long)priv->mac_dev->vaddr_end;
> + net_dev->mem_start = (unsigned long)mac_dev->vaddr;
> + net_dev->mem_end = (unsigned long)mac_dev->vaddr_end;
>
> net_dev->min_mtu = ETH_MIN_MTU;
> net_dev->max_mtu = dpaa_get_max_mtu();
> @@ -246,7 +247,7 @@ static int dpaa_netdev_init(struct net_device
> *net_dev,
> eth_hw_addr_set(net_dev, mac_addr);
> } else {
> eth_hw_addr_random(net_dev);
> - err = priv->mac_dev->change_addr(priv->mac_dev-
> >fman_mac,
> + err = priv->mac_dev->change_addr(mac_dev->fman_mac,
> (const enet_addr_t *)net_dev->dev_addr);
You can replace priv->mac_dev->change_addr with mac_dev->change_addr as well.
> if (err) {
> dev_err(dev, "Failed to set random MAC address\n");
> --
> 2.35.1.1320.gc452695387.dirty
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 35/47] net: dpaa: Use mac_dev variable in dpaa_netdev_init
2022-07-21 13:15 ` Camelia Alexandra Groza
@ 2022-07-21 15:36 ` Sean Anderson
0 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-21 15:36 UTC (permalink / raw)
To: Camelia Alexandra Groza, David S . Miller, Jakub Kicinski,
Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King, linux-kernel
On 7/21/22 9:15 AM, Camelia Alexandra Groza wrote:
>> -----Original Message-----
>> From: Sean Anderson <sean.anderson@seco.com>
>> Sent: Saturday, July 16, 2022 1:00
>> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
>> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
>> netdev@vger.kernel.org
>> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
>> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
>> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
>> <sean.anderson@seco.com>
>> Subject: [PATCH net-next v3 35/47] net: dpaa: Use mac_dev variable in
>> dpaa_netdev_init
>>
>> There are several references to mac_dev in dpaa_netdev_init. Make things a
>> bit more concise by adding a local variable for it.
>>
>> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
>> ---
>>
>> (no changes since v1)
>>
>> drivers/net/ethernet/freescale/dpaa/dpaa_eth.c | 9 +++++----
>> 1 file changed, 5 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
>> b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
>> index d378247a6d0c..377e5513a414 100644
>> --- a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
>> +++ b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
>> @@ -203,6 +203,7 @@ static int dpaa_netdev_init(struct net_device
>> *net_dev,
>> {
>> struct dpaa_priv *priv = netdev_priv(net_dev);
>> struct device *dev = net_dev->dev.parent;
>> + struct mac_device *mac_dev = priv->mac_dev;
>> struct dpaa_percpu_priv *percpu_priv;
>> const u8 *mac_addr;
>> int i, err;
>> @@ -216,10 +217,10 @@ static int dpaa_netdev_init(struct net_device
>> *net_dev,
>> }
>>
>> net_dev->netdev_ops = dpaa_ops;
>> - mac_addr = priv->mac_dev->addr;
>> + mac_addr = mac_dev->addr;
>>
>> - net_dev->mem_start = (unsigned long)priv->mac_dev->vaddr;
>> - net_dev->mem_end = (unsigned long)priv->mac_dev->vaddr_end;
>> + net_dev->mem_start = (unsigned long)mac_dev->vaddr;
>> + net_dev->mem_end = (unsigned long)mac_dev->vaddr_end;
>>
>> net_dev->min_mtu = ETH_MIN_MTU;
>> net_dev->max_mtu = dpaa_get_max_mtu();
>> @@ -246,7 +247,7 @@ static int dpaa_netdev_init(struct net_device
>> *net_dev,
>> eth_hw_addr_set(net_dev, mac_addr);
>> } else {
>> eth_hw_addr_random(net_dev);
>> - err = priv->mac_dev->change_addr(priv->mac_dev-
>> >fman_mac,
>> + err = priv->mac_dev->change_addr(mac_dev->fman_mac,
>> (const enet_addr_t *)net_dev->dev_addr);
>
> You can replace priv->mac_dev->change_addr with mac_dev->change_addr as well.
OK
>> if (err) {
>> dev_err(dev, "Failed to set random MAC address\n");
>> --
>> 2.35.1.1320.gc452695387.dirty
>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 36/47] soc: fsl: qbman: Add helper for sanity checking cgr ops
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (34 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 35/47] net: dpaa: Use mac_dev variable in dpaa_netdev_init Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:16 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 37/47] soc: fsl: qbman: Add CGR update function Sean Anderson
` (11 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Li Yang, linuxppc-dev
This breaks out/combines get_affine_portal and the cgr sanity check in
preparation for the next commit. No functional change intended.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v2)
Changes in v2:
- New
drivers/soc/fsl/qbman/qman.c | 29 +++++++++++++++++++----------
1 file changed, 19 insertions(+), 10 deletions(-)
diff --git a/drivers/soc/fsl/qbman/qman.c b/drivers/soc/fsl/qbman/qman.c
index fde4edd83c14..eb6600aab09b 100644
--- a/drivers/soc/fsl/qbman/qman.c
+++ b/drivers/soc/fsl/qbman/qman.c
@@ -2483,13 +2483,8 @@ int qman_create_cgr(struct qman_cgr *cgr, u32 flags,
}
EXPORT_SYMBOL(qman_create_cgr);
-int qman_delete_cgr(struct qman_cgr *cgr)
+static struct qman_portal *qman_cgr_get_affine_portal(struct qman_cgr *cgr)
{
- unsigned long irqflags;
- struct qm_mcr_querycgr cgr_state;
- struct qm_mcc_initcgr local_opts;
- int ret = 0;
- struct qman_cgr *i;
struct qman_portal *p = get_affine_portal();
if (cgr->chan != p->config->channel) {
@@ -2497,10 +2492,25 @@ int qman_delete_cgr(struct qman_cgr *cgr)
dev_err(p->config->dev, "CGR not owned by current portal");
dev_dbg(p->config->dev, " create 0x%x, delete 0x%x\n",
cgr->chan, p->config->channel);
-
- ret = -EINVAL;
- goto put_portal;
+ put_affine_portal();
+ return NULL;
}
+
+ return p;
+}
+
+int qman_delete_cgr(struct qman_cgr *cgr)
+{
+ unsigned long irqflags;
+ struct qm_mcr_querycgr cgr_state;
+ struct qm_mcc_initcgr local_opts;
+ int ret = 0;
+ struct qman_cgr *i;
+ struct qman_portal *p = qman_cgr_get_affine_portal(cgr);
+
+ if (!p)
+ return -EINVAL;
+
memset(&local_opts, 0, sizeof(struct qm_mcc_initcgr));
spin_lock_irqsave(&p->cgr_lock, irqflags);
list_del(&cgr->node);
@@ -2528,7 +2538,6 @@ int qman_delete_cgr(struct qman_cgr *cgr)
list_add(&cgr->node, &p->cgr_cbs);
release_lock:
spin_unlock_irqrestore(&p->cgr_lock, irqflags);
-put_portal:
put_affine_portal();
return ret;
}
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 36/47] soc: fsl: qbman: Add helper for sanity checking cgr ops
2022-07-15 21:59 ` [PATCH net-next v3 36/47] soc: fsl: qbman: Add helper for sanity checking cgr ops Sean Anderson
@ 2022-07-21 13:16 ` Camelia Alexandra Groza
0 siblings, 0 replies; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 13:16 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Leo Li, Sean Anderson, Russell King, linux-kernel, Eric Dumazet,
Paolo Abeni, linuxppc-dev, linux-arm-kernel
> -----Original Message-----
> From: Linuxppc-dev <linuxppc-dev-
> bounces+camelia.groza=nxp.com@lists.ozlabs.org> On Behalf Of Sean
> Anderson
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Leo Li <leoyang.li@nxp.com>; Sean Anderson
> <sean.anderson@seco.com>; Russell King <linux@armlinux.org.uk>; linux-
> kernel@vger.kernel.org; Eric Dumazet <edumazet@google.com>; Paolo
> Abeni <pabeni@redhat.com>; linuxppc-dev@lists.ozlabs.org; linux-arm-
> kernel@lists.infradead.org
> Subject: [PATCH net-next v3 36/47] soc: fsl: qbman: Add helper for sanity
> checking cgr ops
>
> This breaks out/combines get_affine_portal and the cgr sanity check in
> preparation for the next commit. No functional change intended.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 37/47] soc: fsl: qbman: Add CGR update function
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (35 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 36/47] soc: fsl: qbman: Add helper for sanity checking cgr ops Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:18 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 38/47] net: dpaa: Adjust queue depth on rate change Sean Anderson
` (10 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Li Yang, linuxppc-dev
This adds a function to update a CGR with new parameters.
qman_cgr_create can almost be used for this (with flags=0), but it's not
suitable because it also registers the callback function. The _safe
variant was modeled off of qman_cgr_delete_safe. However, we handle
multiple arguments and a return value.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v2)
Changes in v2:
- New
drivers/soc/fsl/qbman/qman.c | 47 ++++++++++++++++++++++++++++++++++++
include/soc/fsl/qman.h | 9 +++++++
2 files changed, 56 insertions(+)
diff --git a/drivers/soc/fsl/qbman/qman.c b/drivers/soc/fsl/qbman/qman.c
index eb6600aab09b..68b825ea10f1 100644
--- a/drivers/soc/fsl/qbman/qman.c
+++ b/drivers/soc/fsl/qbman/qman.c
@@ -2568,6 +2568,53 @@ void qman_delete_cgr_safe(struct qman_cgr *cgr)
}
EXPORT_SYMBOL(qman_delete_cgr_safe);
+static int qman_update_cgr(struct qman_cgr *cgr, struct qm_mcc_initcgr *opts)
+{
+ int ret;
+ unsigned long irqflags;
+ struct qman_portal *p = qman_cgr_get_affine_portal(cgr);
+
+ if (!p)
+ return -EINVAL;
+
+ spin_lock_irqsave(&p->cgr_lock, irqflags);
+ ret = qm_modify_cgr(cgr, 0, opts);
+ spin_unlock_irqrestore(&p->cgr_lock, irqflags);
+ put_affine_portal();
+ return ret;
+}
+
+struct update_cgr_params {
+ struct qman_cgr *cgr;
+ struct qm_mcc_initcgr *opts;
+ int ret;
+};
+
+static void qman_update_cgr_smp_call(void *p)
+{
+ struct update_cgr_params *params = p;
+
+ params->ret = qman_update_cgr(params->cgr, params->opts);
+}
+
+int qman_update_cgr_safe(struct qman_cgr *cgr, struct qm_mcc_initcgr *opts)
+{
+ struct update_cgr_params params = {
+ .cgr = cgr,
+ .opts = opts,
+ };
+
+ preempt_disable();
+ if (qman_cgr_cpus[cgr->cgrid] != smp_processor_id())
+ smp_call_function_single(qman_cgr_cpus[cgr->cgrid],
+ qman_update_cgr_smp_call, ¶ms, true);
+ else
+ params.ret = qman_update_cgr(cgr, opts);
+ preempt_enable();
+ return params.ret;
+}
+EXPORT_SYMBOL(qman_update_cgr_safe);
+
/* Cleanup FQs */
static int _qm_mr_consume_and_match_verb(struct qm_portal *p, int v)
diff --git a/include/soc/fsl/qman.h b/include/soc/fsl/qman.h
index 59eeba31c192..0d3d6beb7fdb 100644
--- a/include/soc/fsl/qman.h
+++ b/include/soc/fsl/qman.h
@@ -1171,6 +1171,15 @@ int qman_delete_cgr(struct qman_cgr *cgr);
*/
void qman_delete_cgr_safe(struct qman_cgr *cgr);
+/**
+ * qman_update_cgr_safe - Modifies a congestion group object from any CPU
+ * @cgr: the 'cgr' object to modify
+ * @opts: state of the CGR settings
+ *
+ * This will select the proper CPU and modify the CGR settings.
+ */
+int qman_update_cgr_safe(struct qman_cgr *cgr, struct qm_mcc_initcgr *opts);
+
/**
* qman_query_cgr_congested - Queries CGR's congestion status
* @cgr: the 'cgr' object to query
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 37/47] soc: fsl: qbman: Add CGR update function
2022-07-15 21:59 ` [PATCH net-next v3 37/47] soc: fsl: qbman: Add CGR update function Sean Anderson
@ 2022-07-21 13:18 ` Camelia Alexandra Groza
2022-07-21 15:36 ` Sean Anderson
0 siblings, 1 reply; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 13:18 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Leo Li, Sean Anderson, Russell King, linux-kernel, Eric Dumazet,
Paolo Abeni, linuxppc-dev, linux-arm-kernel
> -----Original Message-----
> From: Linuxppc-dev <linuxppc-dev-
> bounces+camelia.groza=nxp.com@lists.ozlabs.org> On Behalf Of Sean
> Anderson
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Leo Li <leoyang.li@nxp.com>; Sean Anderson
> <sean.anderson@seco.com>; Russell King <linux@armlinux.org.uk>; linux-
> kernel@vger.kernel.org; Eric Dumazet <edumazet@google.com>; Paolo
> Abeni <pabeni@redhat.com>; linuxppc-dev@lists.ozlabs.org; linux-arm-
> kernel@lists.infradead.org
> Subject: [PATCH net-next v3 37/47] soc: fsl: qbman: Add CGR update
> function
>
> This adds a function to update a CGR with new parameters.
> qman_cgr_create can almost be used for this (with flags=0), but it's not
It's qman_create_cgr, not qman_cgr_create.
> suitable because it also registers the callback function. The _safe
> variant was modeled off of qman_cgr_delete_safe. However, we handle
> multiple arguments and a return value.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
^ permalink raw reply [flat|nested] 123+ messages in thread
* Re: [PATCH net-next v3 37/47] soc: fsl: qbman: Add CGR update function
2022-07-21 13:18 ` Camelia Alexandra Groza
@ 2022-07-21 15:36 ` Sean Anderson
0 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-21 15:36 UTC (permalink / raw)
To: Camelia Alexandra Groza, David S . Miller, Jakub Kicinski,
Madalin Bucur, netdev
Cc: Leo Li, Russell King, linux-kernel, Eric Dumazet, Paolo Abeni,
linuxppc-dev, linux-arm-kernel
On 7/21/22 9:18 AM, Camelia Alexandra Groza wrote:
>> -----Original Message-----
>> From: Linuxppc-dev <linuxppc-dev-
>> bounces+camelia.groza=nxp.com@lists.ozlabs.org> On Behalf Of Sean
>> Anderson
>> Sent: Saturday, July 16, 2022 1:00
>> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
>> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
>> netdev@vger.kernel.org
>> Cc: Leo Li <leoyang.li@nxp.com>; Sean Anderson
>> <sean.anderson@seco.com>; Russell King <linux@armlinux.org.uk>; linux-
>> kernel@vger.kernel.org; Eric Dumazet <edumazet@google.com>; Paolo
>> Abeni <pabeni@redhat.com>; linuxppc-dev@lists.ozlabs.org; linux-arm-
>> kernel@lists.infradead.org
>> Subject: [PATCH net-next v3 37/47] soc: fsl: qbman: Add CGR update
>> function
>>
>> This adds a function to update a CGR with new parameters.
>> qman_cgr_create can almost be used for this (with flags=0), but it's not
>
> It's qman_create_cgr, not qman_cgr_create.
Thanks, will fix.
>> suitable because it also registers the callback function. The _safe
>> variant was modeled off of qman_cgr_delete_safe. However, we handle
>> multiple arguments and a return value.
>>
>> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
>
> Acked-by: Camelia Groza <camelia.groza@nxp.com>
>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 38/47] net: dpaa: Adjust queue depth on rate change
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (36 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 37/47] soc: fsl: qbman: Add CGR update function Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:18 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 39/47] net: fman: memac: Add serdes support Sean Anderson
` (9 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Li Yang, linuxppc-dev
Instead of setting the queue depth once during probe, adjust it on the
fly whenever we configure the link. This is a bit unusal, since usually
the DPAA driver calls into the FMAN driver, but here we do the opposite.
We need to add a netdev to struct mac_device for this, but it will soon
live in the phylink config.
I haven't tested this extensively, but it doesn't seem to break
anything. We could possibly optimize this a bit by keeping track of the
last rate, but for now we just update every time. 10GEC probably doesn't
need to call into this at all, but I've added it for consistency.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v2)
Changes in v2:
- New
.../net/ethernet/freescale/dpaa/dpaa_eth.c | 38 +++++++++++++++++--
.../net/ethernet/freescale/fman/fman_dtsec.c | 1 +
.../net/ethernet/freescale/fman/fman_memac.c | 1 +
.../net/ethernet/freescale/fman/fman_tgec.c | 7 +++-
drivers/net/ethernet/freescale/fman/mac.h | 3 ++
5 files changed, 44 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
index 377e5513a414..a2a89f547813 100644
--- a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
+++ b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
@@ -197,6 +197,8 @@ static int dpaa_rx_extra_headroom;
#define dpaa_get_max_mtu() \
(dpaa_max_frm - (VLAN_ETH_HLEN + ETH_FCS_LEN))
+static void dpaa_eth_cgr_set_speed(struct mac_device *mac_dev, int speed);
+
static int dpaa_netdev_init(struct net_device *net_dev,
const struct net_device_ops *dpaa_ops,
u16 tx_timeout)
@@ -262,6 +264,9 @@ static int dpaa_netdev_init(struct net_device *net_dev,
net_dev->needed_headroom = priv->tx_headroom;
net_dev->watchdog_timeo = msecs_to_jiffies(tx_timeout);
+ mac_dev->net_dev = net_dev;
+ mac_dev->update_speed = dpaa_eth_cgr_set_speed;
+
/* start without the RUNNING flag, phylib controls it later */
netif_carrier_off(net_dev);
@@ -826,10 +831,10 @@ static int dpaa_eth_cgr_init(struct dpaa_priv *priv)
initcgr.we_mask = cpu_to_be16(QM_CGR_WE_CSCN_EN | QM_CGR_WE_CS_THRES);
initcgr.cgr.cscn_en = QM_CGR_EN;
- /* Set different thresholds based on the MAC speed.
- * This may turn suboptimal if the MAC is reconfigured at a speed
- * lower than its max, e.g. if a dTSEC later negotiates a 100Mbps link.
- * In such cases, we ought to reconfigure the threshold, too.
+ /* Set different thresholds based on the configured MAC speed.
+ * This may turn suboptimal if the MAC is reconfigured at another
+ * speed, so MACs must call dpaa_eth_cgr_set_speed in their adjust_link
+ * callback.
*/
if (priv->mac_dev->if_support & SUPPORTED_10000baseT_Full)
cs_th = DPAA_CS_THRESHOLD_10G;
@@ -858,6 +863,31 @@ static int dpaa_eth_cgr_init(struct dpaa_priv *priv)
return err;
}
+static void dpaa_eth_cgr_set_speed(struct mac_device *mac_dev, int speed)
+{
+ struct net_device *net_dev = mac_dev->net_dev;
+ struct dpaa_priv *priv = netdev_priv(net_dev);
+ struct qm_mcc_initcgr opts = { };
+ u32 cs_th;
+ int err;
+
+ opts.we_mask = cpu_to_be16(QM_CGR_WE_CS_THRES);
+ switch (speed) {
+ case SPEED_10000:
+ cs_th = DPAA_CS_THRESHOLD_10G;
+ break;
+ case SPEED_1000:
+ default:
+ cs_th = DPAA_CS_THRESHOLD_1G;
+ break;
+ }
+ qm_cgr_cs_thres_set64(&opts.cgr.cs_thres, cs_th, 1);
+
+ err = qman_update_cgr_safe(&priv->cgr_data.cgr, &opts);
+ if (err)
+ netdev_err(net_dev, "could not update speed: %d\n", err);
+}
+
static inline void dpaa_setup_ingress(const struct dpaa_priv *priv,
struct dpaa_fq *fq,
const struct qman_fq *template)
diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.c b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
index f2dd07b714ea..6617932fd3fd 100644
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
@@ -1244,6 +1244,7 @@ static void adjust_link_dtsec(struct mac_device *mac_dev)
}
dtsec_adjust_link(fman_mac, phy_dev->speed);
+ mac_dev->update_speed(mac_dev, phy_dev->speed);
fman_get_pause_cfg(mac_dev, &rx_pause, &tx_pause);
err = fman_set_mac_active_pause(mac_dev, rx_pause, tx_pause);
if (err < 0)
diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.c b/drivers/net/ethernet/freescale/fman/fman_memac.c
index 8ad93a4c0c21..02b3a0a2d5d1 100644
--- a/drivers/net/ethernet/freescale/fman/fman_memac.c
+++ b/drivers/net/ethernet/freescale/fman/fman_memac.c
@@ -782,6 +782,7 @@ static void adjust_link_memac(struct mac_device *mac_dev)
fman_mac = mac_dev->fman_mac;
memac_adjust_link(fman_mac, phy_dev->speed);
+ mac_dev->update_speed(mac_dev, phy_dev->speed);
fman_get_pause_cfg(mac_dev, &rx_pause, &tx_pause);
err = fman_set_mac_active_pause(mac_dev, rx_pause, tx_pause);
diff --git a/drivers/net/ethernet/freescale/fman/fman_tgec.c b/drivers/net/ethernet/freescale/fman/fman_tgec.c
index f4cdf0cf7c32..33f3b1cc2cfe 100644
--- a/drivers/net/ethernet/freescale/fman/fman_tgec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_tgec.c
@@ -601,8 +601,11 @@ static int tgec_del_hash_mac_address(struct fman_mac *tgec,
return 0;
}
-static void adjust_link_void(struct mac_device *mac_dev)
+static void tgec_adjust_link(struct mac_device *mac_dev)
{
+ struct phy_device *phy_dev = mac_dev->phy_dev;
+
+ mac_dev->update_speed(mac_dev, phy_dev->speed);
}
static int tgec_set_exception(struct fman_mac *tgec,
@@ -794,7 +797,7 @@ int tgec_initialization(struct mac_device *mac_dev,
mac_dev->set_allmulti = tgec_set_allmulti;
mac_dev->set_tstamp = tgec_set_tstamp;
mac_dev->set_multi = fman_set_multi;
- mac_dev->adjust_link = adjust_link_void;
+ mac_dev->adjust_link = tgec_adjust_link;
mac_dev->enable = tgec_enable;
mac_dev->disable = tgec_disable;
diff --git a/drivers/net/ethernet/freescale/fman/mac.h b/drivers/net/ethernet/freescale/fman/mac.h
index a55efcb7998c..b95d384271bd 100644
--- a/drivers/net/ethernet/freescale/fman/mac.h
+++ b/drivers/net/ethernet/freescale/fman/mac.h
@@ -28,6 +28,7 @@ struct mac_device {
struct phy_device *phy_dev;
phy_interface_t phy_if;
struct device_node *phy_node;
+ struct net_device *net_dev;
bool autoneg_pause;
bool rx_pause_req;
@@ -56,6 +57,8 @@ struct mac_device {
int (*remove_hash_mac_addr)(struct fman_mac *mac_dev,
enet_addr_t *eth_addr);
+ void (*update_speed)(struct mac_device *mac_dev, int speed);
+
struct fman_mac *fman_mac;
struct mac_priv_s *priv;
};
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 38/47] net: dpaa: Adjust queue depth on rate change
2022-07-15 21:59 ` [PATCH net-next v3 38/47] net: dpaa: Adjust queue depth on rate change Sean Anderson
@ 2022-07-21 13:18 ` Camelia Alexandra Groza
0 siblings, 0 replies; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 13:18 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Leo Li, Sean Anderson, Russell King, linux-kernel, Eric Dumazet,
Paolo Abeni, linuxppc-dev, linux-arm-kernel
> -----Original Message-----
> From: Linuxppc-dev <linuxppc-dev-
> bounces+camelia.groza=nxp.com@lists.ozlabs.org> On Behalf Of Sean
> Anderson
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Leo Li <leoyang.li@nxp.com>; Sean Anderson
> <sean.anderson@seco.com>; Russell King <linux@armlinux.org.uk>; linux-
> kernel@vger.kernel.org; Eric Dumazet <edumazet@google.com>; Paolo
> Abeni <pabeni@redhat.com>; linuxppc-dev@lists.ozlabs.org; linux-arm-
> kernel@lists.infradead.org
> Subject: [PATCH net-next v3 38/47] net: dpaa: Adjust queue depth on rate
> change
>
> Instead of setting the queue depth once during probe, adjust it on the
> fly whenever we configure the link. This is a bit unusal, since usually
> the DPAA driver calls into the FMAN driver, but here we do the opposite.
> We need to add a netdev to struct mac_device for this, but it will soon
> live in the phylink config.
>
> I haven't tested this extensively, but it doesn't seem to break
> anything. We could possibly optimize this a bit by keeping track of the
> last rate, but for now we just update every time. 10GEC probably doesn't
> need to call into this at all, but I've added it for consistency.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 39/47] net: fman: memac: Add serdes support
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (37 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 38/47] net: dpaa: Adjust queue depth on rate change Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:30 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 40/47] net: fman: memac: Use lynx pcs driver Sean Anderson
` (8 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
This adds support for using a serdes which has to be configured. This is
primarly in preparation for the next commit, which will then change the
serdes mode dynamically.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v1)
.../net/ethernet/freescale/fman/fman_memac.c | 48 ++++++++++++++++++-
1 file changed, 46 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.c b/drivers/net/ethernet/freescale/fman/fman_memac.c
index 02b3a0a2d5d1..a62fe860b1d0 100644
--- a/drivers/net/ethernet/freescale/fman/fman_memac.c
+++ b/drivers/net/ethernet/freescale/fman/fman_memac.c
@@ -13,6 +13,7 @@
#include <linux/io.h>
#include <linux/phy.h>
#include <linux/phy_fixed.h>
+#include <linux/phy/phy.h>
#include <linux/of_mdio.h>
/* PCS registers */
@@ -324,6 +325,7 @@ struct fman_mac {
void *fm;
struct fman_rev_info fm_rev_info;
bool basex_if;
+ struct phy *serdes;
struct phy_device *pcsphy;
bool allmulti_enabled;
};
@@ -1203,17 +1205,55 @@ int memac_initialization(struct mac_device *mac_dev,
}
}
+ memac->serdes = devm_of_phy_get(mac_dev->dev, mac_node, "serdes");
+ if (PTR_ERR(memac->serdes) == -ENODEV) {
+ memac->serdes = NULL;
+ } else if (IS_ERR(memac->serdes)) {
+ err = PTR_ERR(memac->serdes);
+ dev_err_probe(mac_dev->dev, err, "could not get serdes\n");
+ goto _return_fm_mac_free;
+ } else {
+ err = phy_init(memac->serdes);
+ if (err) {
+ dev_err_probe(mac_dev->dev, err,
+ "could not initialize serdes\n");
+ goto _return_fm_mac_free;
+ }
+
+ err = phy_power_on(memac->serdes);
+ if (err) {
+ dev_err_probe(mac_dev->dev, err,
+ "could not power on serdes\n");
+ goto _return_phy_exit;
+ }
+
+ if (memac->phy_if == PHY_INTERFACE_MODE_SGMII ||
+ memac->phy_if == PHY_INTERFACE_MODE_1000BASEX ||
+ memac->phy_if == PHY_INTERFACE_MODE_2500BASEX ||
+ memac->phy_if == PHY_INTERFACE_MODE_QSGMII ||
+ memac->phy_if == PHY_INTERFACE_MODE_XGMII) {
+ err = phy_set_mode_ext(memac->serdes, PHY_MODE_ETHERNET,
+ memac->phy_if);
+ if (err) {
+ dev_err_probe(mac_dev->dev, err,
+ "could not set serdes mode to %s\n",
+ phy_modes(memac->phy_if));
+ goto _return_phy_power_off;
+ }
+ }
+ }
+
if (!mac_dev->phy_node && of_phy_is_fixed_link(mac_node)) {
struct phy_device *phy;
err = of_phy_register_fixed_link(mac_node);
if (err)
- goto _return_fm_mac_free;
+ goto _return_phy_power_off;
fixed_link = kzalloc(sizeof(*fixed_link), GFP_KERNEL);
if (!fixed_link) {
err = -ENOMEM;
- goto _return_fm_mac_free;
+ goto _return_phy_power_off;
}
mac_dev->phy_node = of_node_get(mac_node);
@@ -1242,6 +1282,10 @@ int memac_initialization(struct mac_device *mac_dev,
goto _return;
+_return_phy_power_off:
+ phy_power_off(memac->serdes);
+_return_phy_exit:
+ phy_exit(memac->serdes);
_return_fixed_link_free:
kfree(fixed_link);
_return_fm_mac_free:
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 39/47] net: fman: memac: Add serdes support
2022-07-15 21:59 ` [PATCH net-next v3 39/47] net: fman: memac: Add serdes support Sean Anderson
@ 2022-07-21 13:30 ` Camelia Alexandra Groza
2022-07-21 15:38 ` Sean Anderson
0 siblings, 1 reply; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 13:30 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>
> Subject: [PATCH net-next v3 39/47] net: fman: memac: Add serdes support
>
> This adds support for using a serdes which has to be configured. This is
> primarly in preparation for the next commit, which will then change the
> serdes mode dynamically.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> ---
>
> (no changes since v1)
>
> .../net/ethernet/freescale/fman/fman_memac.c | 48
> ++++++++++++++++++-
> 1 file changed, 46 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.c
> b/drivers/net/ethernet/freescale/fman/fman_memac.c
> index 02b3a0a2d5d1..a62fe860b1d0 100644
> --- a/drivers/net/ethernet/freescale/fman/fman_memac.c
> +++ b/drivers/net/ethernet/freescale/fman/fman_memac.c
> @@ -13,6 +13,7 @@
> #include <linux/io.h>
> #include <linux/phy.h>
> #include <linux/phy_fixed.h>
> +#include <linux/phy/phy.h>
> #include <linux/of_mdio.h>
>
> /* PCS registers */
> @@ -324,6 +325,7 @@ struct fman_mac {
> void *fm;
> struct fman_rev_info fm_rev_info;
> bool basex_if;
> + struct phy *serdes;
> struct phy_device *pcsphy;
> bool allmulti_enabled;
> };
> @@ -1203,17 +1205,55 @@ int memac_initialization(struct mac_device
> *mac_dev,
> }
> }
>
> + memac->serdes = devm_of_phy_get(mac_dev->dev, mac_node,
> "serdes");
devm_of_phy_get returns -ENOSYS on PPC builds because CONFIG_GENERIC_PHY isn't
enabled by default. Please add a dependency.
> + if (PTR_ERR(memac->serdes) == -ENODEV) {
> + memac->serdes = NULL;
> + } else if (IS_ERR(memac->serdes)) {
> + err = PTR_ERR(memac->serdes);
> + dev_err_probe(mac_dev->dev, err, "could not get
> serdes\n");
> + goto _return_fm_mac_free;
> + } else {
> + err = phy_init(memac->serdes);
> + if (err) {
> + dev_err_probe(mac_dev->dev, err,
> + "could not initialize serdes\n");
> + goto _return_fm_mac_free;
> + }
> +
> + err = phy_power_on(memac->serdes);
> + if (err) {
> + dev_err_probe(mac_dev->dev, err,
> + "could not power on serdes\n");
> + goto _return_phy_exit;
> + }
> +
> + if (memac->phy_if == PHY_INTERFACE_MODE_SGMII ||
> + memac->phy_if == PHY_INTERFACE_MODE_1000BASEX ||
> + memac->phy_if == PHY_INTERFACE_MODE_2500BASEX ||
> + memac->phy_if == PHY_INTERFACE_MODE_QSGMII ||
> + memac->phy_if == PHY_INTERFACE_MODE_XGMII) {
> + err = phy_set_mode_ext(memac->serdes,
> PHY_MODE_ETHERNET,
> + memac->phy_if);
> + if (err) {
> + dev_err_probe(mac_dev->dev, err,
> + "could not set serdes mode
> to %s\n",
> + phy_modes(memac->phy_if));
> + goto _return_phy_power_off;
> + }
> + }
> + }
> +
> if (!mac_dev->phy_node && of_phy_is_fixed_link(mac_node)) {
> struct phy_device *phy;
>
> err = of_phy_register_fixed_link(mac_node);
> if (err)
> - goto _return_fm_mac_free;
> + goto _return_phy_power_off;
>
> fixed_link = kzalloc(sizeof(*fixed_link), GFP_KERNEL);
> if (!fixed_link) {
> err = -ENOMEM;
> - goto _return_fm_mac_free;
> + goto _return_phy_power_off;
> }
>
> mac_dev->phy_node = of_node_get(mac_node);
> @@ -1242,6 +1282,10 @@ int memac_initialization(struct mac_device
> *mac_dev,
>
> goto _return;
>
> +_return_phy_power_off:
> + phy_power_off(memac->serdes);
> +_return_phy_exit:
> + phy_exit(memac->serdes);
> _return_fixed_link_free:
> kfree(fixed_link);
_return_fixed_link_free should execute before _return_phy_power_off and _return_phy_exit
> _return_fm_mac_free:
> --
> 2.35.1.1320.gc452695387.dirty
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 39/47] net: fman: memac: Add serdes support
2022-07-21 13:30 ` Camelia Alexandra Groza
@ 2022-07-21 15:38 ` Sean Anderson
2022-07-22 12:43 ` Camelia Alexandra Groza
0 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-21 15:38 UTC (permalink / raw)
To: Camelia Alexandra Groza, David S . Miller, Jakub Kicinski,
Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King, linux-kernel
On 7/21/22 9:30 AM, Camelia Alexandra Groza wrote:
>> -----Original Message-----
>> From: Sean Anderson <sean.anderson@seco.com>
>> Sent: Saturday, July 16, 2022 1:00
>> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
>> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
>> netdev@vger.kernel.org
>> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
>> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
>> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
>> <sean.anderson@seco.com>
>> Subject: [PATCH net-next v3 39/47] net: fman: memac: Add serdes support
>>
>> This adds support for using a serdes which has to be configured. This is
>> primarly in preparation for the next commit, which will then change the
>> serdes mode dynamically.
>>
>> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
>> ---
>>
>> (no changes since v1)
>>
>> .../net/ethernet/freescale/fman/fman_memac.c | 48
>> ++++++++++++++++++-
>> 1 file changed, 46 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.c
>> b/drivers/net/ethernet/freescale/fman/fman_memac.c
>> index 02b3a0a2d5d1..a62fe860b1d0 100644
>> --- a/drivers/net/ethernet/freescale/fman/fman_memac.c
>> +++ b/drivers/net/ethernet/freescale/fman/fman_memac.c
>> @@ -13,6 +13,7 @@
>> #include <linux/io.h>
>> #include <linux/phy.h>
>> #include <linux/phy_fixed.h>
>> +#include <linux/phy/phy.h>
>> #include <linux/of_mdio.h>
>>
>> /* PCS registers */
>> @@ -324,6 +325,7 @@ struct fman_mac {
>> void *fm;
>> struct fman_rev_info fm_rev_info;
>> bool basex_if;
>> + struct phy *serdes;
>> struct phy_device *pcsphy;
>> bool allmulti_enabled;
>> };
>> @@ -1203,17 +1205,55 @@ int memac_initialization(struct mac_device
>> *mac_dev,
>> }
>> }
>>
>> + memac->serdes = devm_of_phy_get(mac_dev->dev, mac_node,
>> "serdes");
>
> devm_of_phy_get returns -ENOSYS on PPC builds because CONFIG_GENERIC_PHY isn't
> enabled by default. Please add a dependency.
>
>> + if (PTR_ERR(memac->serdes) == -ENODEV) {
I think it is better to add -ENOSYS to the condition here. That way,
the phy subsystem stays optional.
--Sean
>> + memac->serdes = NULL;
>> + } else if (IS_ERR(memac->serdes)) {
>> + err = PTR_ERR(memac->serdes);
>> + dev_err_probe(mac_dev->dev, err, "could not get
>> serdes\n");
>> + goto _return_fm_mac_free;
>> + } else {
>> + err = phy_init(memac->serdes);
>> + if (err) {
>> + dev_err_probe(mac_dev->dev, err,
>> + "could not initialize serdes\n");
>> + goto _return_fm_mac_free;
>> + }
>> +
>> + err = phy_power_on(memac->serdes);
>> + if (err) {
>> + dev_err_probe(mac_dev->dev, err,
>> + "could not power on serdes\n");
>> + goto _return_phy_exit;
>> + }
>> +
>> + if (memac->phy_if == PHY_INTERFACE_MODE_SGMII ||
>> + memac->phy_if == PHY_INTERFACE_MODE_1000BASEX ||
>> + memac->phy_if == PHY_INTERFACE_MODE_2500BASEX ||
>> + memac->phy_if == PHY_INTERFACE_MODE_QSGMII ||
>> + memac->phy_if == PHY_INTERFACE_MODE_XGMII) {
>> + err = phy_set_mode_ext(memac->serdes,
>> PHY_MODE_ETHERNET,
>> + memac->phy_if);
>> + if (err) {
>> + dev_err_probe(mac_dev->dev, err,
>> + "could not set serdes mode
>> to %s\n",
>> + phy_modes(memac->phy_if));
>> + goto _return_phy_power_off;
>> + }
>> + }
>> + }
>> +
>> if (!mac_dev->phy_node && of_phy_is_fixed_link(mac_node)) {
>> struct phy_device *phy;
>>
>> err = of_phy_register_fixed_link(mac_node);
>> if (err)
>> - goto _return_fm_mac_free;
>> + goto _return_phy_power_off;
>>
>> fixed_link = kzalloc(sizeof(*fixed_link), GFP_KERNEL);
>> if (!fixed_link) {
>> err = -ENOMEM;
>> - goto _return_fm_mac_free;
>> + goto _return_phy_power_off;
>> }
>>
>> mac_dev->phy_node = of_node_get(mac_node);
>> @@ -1242,6 +1282,10 @@ int memac_initialization(struct mac_device
>> *mac_dev,
>>
>> goto _return;
>>
>> +_return_phy_power_off:
>> + phy_power_off(memac->serdes);
>> +_return_phy_exit:
>> + phy_exit(memac->serdes);
>> _return_fixed_link_free:
>> kfree(fixed_link);
>
> _return_fixed_link_free should execute before _return_phy_power_off and _return_phy_exit
>
>> _return_fm_mac_free:
>> --
>> 2.35.1.1320.gc452695387.dirty
>
^ permalink raw reply [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 39/47] net: fman: memac: Add serdes support
2022-07-21 15:38 ` Sean Anderson
@ 2022-07-22 12:43 ` Camelia Alexandra Groza
0 siblings, 0 replies; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-22 12:43 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King, linux-kernel
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Thursday, July 21, 2022 18:38
> To: Camelia Alexandra Groza <camelia.groza@nxp.com>; David S . Miller
> <davem@davemloft.net>; Jakub Kicinski <kuba@kernel.org>; Madalin Bucur
> <madalin.bucur@nxp.com>; netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH net-next v3 39/47] net: fman: memac: Add serdes
> support
>
>
>
> On 7/21/22 9:30 AM, Camelia Alexandra Groza wrote:
> >> -----Original Message-----
> >> From: Sean Anderson <sean.anderson@seco.com>
> >> Sent: Saturday, July 16, 2022 1:00
> >> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> >> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> >> netdev@vger.kernel.org
> >> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> >> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> >> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean
> Anderson
> >> <sean.anderson@seco.com>
> >> Subject: [PATCH net-next v3 39/47] net: fman: memac: Add serdes
> support
> >>
> >> This adds support for using a serdes which has to be configured. This is
> >> primarly in preparation for the next commit, which will then change the
> >> serdes mode dynamically.
> >>
> >> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> >> ---
> >>
> >> (no changes since v1)
> >>
> >> .../net/ethernet/freescale/fman/fman_memac.c | 48
> >> ++++++++++++++++++-
> >> 1 file changed, 46 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.c
> >> b/drivers/net/ethernet/freescale/fman/fman_memac.c
> >> index 02b3a0a2d5d1..a62fe860b1d0 100644
> >> --- a/drivers/net/ethernet/freescale/fman/fman_memac.c
> >> +++ b/drivers/net/ethernet/freescale/fman/fman_memac.c
> >> @@ -13,6 +13,7 @@
> >> #include <linux/io.h>
> >> #include <linux/phy.h>
> >> #include <linux/phy_fixed.h>
> >> +#include <linux/phy/phy.h>
> >> #include <linux/of_mdio.h>
> >>
> >> /* PCS registers */
> >> @@ -324,6 +325,7 @@ struct fman_mac {
> >> void *fm;
> >> struct fman_rev_info fm_rev_info;
> >> bool basex_if;
> >> + struct phy *serdes;
> >> struct phy_device *pcsphy;
> >> bool allmulti_enabled;
> >> };
> >> @@ -1203,17 +1205,55 @@ int memac_initialization(struct mac_device
> >> *mac_dev,
> >> }
> >> }
> >>
> >> + memac->serdes = devm_of_phy_get(mac_dev->dev, mac_node,
> >> "serdes");
> >
> > devm_of_phy_get returns -ENOSYS on PPC builds because
> CONFIG_GENERIC_PHY isn't
> > enabled by default. Please add a dependency.
> >
> >> + if (PTR_ERR(memac->serdes) == -ENODEV) {
>
> I think it is better to add -ENOSYS to the condition here. That way,
> the phy subsystem stays optional.
>
> --Sean
Sure, sounds good.
> >> + memac->serdes = NULL;
> >> + } else if (IS_ERR(memac->serdes)) {
> >> + err = PTR_ERR(memac->serdes);
> >> + dev_err_probe(mac_dev->dev, err, "could not get
> >> serdes\n");
> >> + goto _return_fm_mac_free;
> >> + } else {
> >> + err = phy_init(memac->serdes);
> >> + if (err) {
> >> + dev_err_probe(mac_dev->dev, err,
> >> + "could not initialize serdes\n");
> >> + goto _return_fm_mac_free;
> >> + }
> >> +
> >> + err = phy_power_on(memac->serdes);
> >> + if (err) {
> >> + dev_err_probe(mac_dev->dev, err,
> >> + "could not power on serdes\n");
> >> + goto _return_phy_exit;
> >> + }
> >> +
> >> + if (memac->phy_if == PHY_INTERFACE_MODE_SGMII ||
> >> + memac->phy_if == PHY_INTERFACE_MODE_1000BASEX ||
> >> + memac->phy_if == PHY_INTERFACE_MODE_2500BASEX ||
> >> + memac->phy_if == PHY_INTERFACE_MODE_QSGMII ||
> >> + memac->phy_if == PHY_INTERFACE_MODE_XGMII) {
> >> + err = phy_set_mode_ext(memac->serdes,
> >> PHY_MODE_ETHERNET,
> >> + memac->phy_if);
> >> + if (err) {
> >> + dev_err_probe(mac_dev->dev, err,
> >> + "could not set serdes mode
> >> to %s\n",
> >> + phy_modes(memac->phy_if));
> >> + goto _return_phy_power_off;
> >> + }
> >> + }
> >> + }
> >> +
> >> if (!mac_dev->phy_node && of_phy_is_fixed_link(mac_node)) {
> >> struct phy_device *phy;
> >>
> >> err = of_phy_register_fixed_link(mac_node);
> >> if (err)
> >> - goto _return_fm_mac_free;
> >> + goto _return_phy_power_off;
> >>
> >> fixed_link = kzalloc(sizeof(*fixed_link), GFP_KERNEL);
> >> if (!fixed_link) {
> >> err = -ENOMEM;
> >> - goto _return_fm_mac_free;
> >> + goto _return_phy_power_off;
> >> }
> >>
> >> mac_dev->phy_node = of_node_get(mac_node);
> >> @@ -1242,6 +1282,10 @@ int memac_initialization(struct mac_device
> >> *mac_dev,
> >>
> >> goto _return;
> >>
> >> +_return_phy_power_off:
> >> + phy_power_off(memac->serdes);
> >> +_return_phy_exit:
> >> + phy_exit(memac->serdes);
> >> _return_fixed_link_free:
> >> kfree(fixed_link);
> >
> > _return_fixed_link_free should execute before _return_phy_power_off
> and _return_phy_exit
> >
> >> _return_fm_mac_free:
> >> --
> >> 2.35.1.1320.gc452695387.dirty
> >
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 40/47] net: fman: memac: Use lynx pcs driver
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (38 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 39/47] net: fman: memac: Add serdes support Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 41/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (7 subsequent siblings)
47 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
Although not stated in the datasheet, as far as I can tell PCS for mEMACs
is a "Lynx." By reusing the existing driver, we can remove the PCS
management code from the memac driver. This requires calling some PCS
functions manually which phylink would usually do for us, but we will let
it do that soon.
One problem is that we don't actually have a PCS for QSGMII. We pretend
that each mEMAC's MDIO bus has four QSGMII PCSs, but this is not the case.
Only the "base" mEMAC's MDIO bus has the four QSGMII PCSs. This is not an
issue yet, because we never get the PCS state. However, it will be once the
conversion to phylink is complete, since the links will appear to never
come up. To get around this, we allow specifying multiple PCSs in pcsphy.
This breaks backwards compatibility with old device trees, but only for
QSGMII. IMO this is the only reasonable way to figure out what the actual
QSGMII PCS is.
Additionally, we now also support a separate XFI PCS. This can allow the
SerDes driver to set different addresses for the SGMII and XFI PCSs so they
can be accessed at the same time.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
Changes in v3:
- Put the PCS mdiodev only after we are done with it (since the PCS
does not perform a get itself).
Changes in v2:
- Move PCS_LYNX dependency to fman Kconfig
drivers/net/ethernet/freescale/fman/Kconfig | 3 +
.../net/ethernet/freescale/fman/fman_memac.c | 257 +++++++-----------
2 files changed, 104 insertions(+), 156 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/Kconfig b/drivers/net/ethernet/freescale/fman/Kconfig
index 48bf8088795d..8f5637db41dd 100644
--- a/drivers/net/ethernet/freescale/fman/Kconfig
+++ b/drivers/net/ethernet/freescale/fman/Kconfig
@@ -4,6 +4,9 @@ config FSL_FMAN
depends on FSL_SOC || ARCH_LAYERSCAPE || COMPILE_TEST
select GENERIC_ALLOCATOR
select PHYLIB
+ select PHYLINK
+ select PCS
+ select PCS_LYNX
select CRC32
default n
help
diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.c b/drivers/net/ethernet/freescale/fman/fman_memac.c
index a62fe860b1d0..20950d924c35 100644
--- a/drivers/net/ethernet/freescale/fman/fman_memac.c
+++ b/drivers/net/ethernet/freescale/fman/fman_memac.c
@@ -11,43 +11,12 @@
#include <linux/slab.h>
#include <linux/io.h>
+#include <linux/pcs-lynx.h>
#include <linux/phy.h>
#include <linux/phy_fixed.h>
#include <linux/phy/phy.h>
#include <linux/of_mdio.h>
-/* PCS registers */
-#define MDIO_SGMII_CR 0x00
-#define MDIO_SGMII_DEV_ABIL_SGMII 0x04
-#define MDIO_SGMII_LINK_TMR_L 0x12
-#define MDIO_SGMII_LINK_TMR_H 0x13
-#define MDIO_SGMII_IF_MODE 0x14
-
-/* SGMII Control defines */
-#define SGMII_CR_AN_EN 0x1000
-#define SGMII_CR_RESTART_AN 0x0200
-#define SGMII_CR_FD 0x0100
-#define SGMII_CR_SPEED_SEL1_1G 0x0040
-#define SGMII_CR_DEF_VAL (SGMII_CR_AN_EN | SGMII_CR_FD | \
- SGMII_CR_SPEED_SEL1_1G)
-
-/* SGMII Device Ability for SGMII defines */
-#define MDIO_SGMII_DEV_ABIL_SGMII_MODE 0x4001
-#define MDIO_SGMII_DEV_ABIL_BASEX_MODE 0x01A0
-
-/* Link timer define */
-#define LINK_TMR_L 0xa120
-#define LINK_TMR_H 0x0007
-#define LINK_TMR_L_BASEX 0xaf08
-#define LINK_TMR_H_BASEX 0x002f
-
-/* SGMII IF Mode defines */
-#define IF_MODE_USE_SGMII_AN 0x0002
-#define IF_MODE_SGMII_EN 0x0001
-#define IF_MODE_SGMII_SPEED_100M 0x0004
-#define IF_MODE_SGMII_SPEED_1G 0x0008
-#define IF_MODE_SGMII_DUPLEX_HALF 0x0010
-
/* Num of additional exact match MAC adr regs */
#define MEMAC_NUM_OF_PADDRS 7
@@ -326,7 +295,9 @@ struct fman_mac {
struct fman_rev_info fm_rev_info;
bool basex_if;
struct phy *serdes;
- struct phy_device *pcsphy;
+ struct phylink_pcs *sgmii_pcs;
+ struct phylink_pcs *qsgmii_pcs;
+ struct phylink_pcs *xfi_pcs;
bool allmulti_enabled;
};
@@ -487,91 +458,22 @@ static u32 get_mac_addr_hash_code(u64 eth_addr)
return xor_val;
}
-static void setup_sgmii_internal_phy(struct fman_mac *memac,
- struct fixed_phy_status *fixed_link)
+static void setup_sgmii_internal(struct fman_mac *memac,
+ struct phylink_pcs *pcs,
+ struct fixed_phy_status *fixed_link)
{
- u16 tmp_reg16;
-
- if (WARN_ON(!memac->pcsphy))
- return;
-
- /* SGMII mode */
- tmp_reg16 = IF_MODE_SGMII_EN;
- if (!fixed_link)
- /* AN enable */
- tmp_reg16 |= IF_MODE_USE_SGMII_AN;
- else {
- switch (fixed_link->speed) {
- case 10:
- /* For 10M: IF_MODE[SPEED_10M] = 0 */
- break;
- case 100:
- tmp_reg16 |= IF_MODE_SGMII_SPEED_100M;
- break;
- case 1000:
- default:
- tmp_reg16 |= IF_MODE_SGMII_SPEED_1G;
- break;
- }
- if (!fixed_link->duplex)
- tmp_reg16 |= IF_MODE_SGMII_DUPLEX_HALF;
- }
- phy_write(memac->pcsphy, MDIO_SGMII_IF_MODE, tmp_reg16);
-
- /* Device ability according to SGMII specification */
- tmp_reg16 = MDIO_SGMII_DEV_ABIL_SGMII_MODE;
- phy_write(memac->pcsphy, MDIO_SGMII_DEV_ABIL_SGMII, tmp_reg16);
-
- /* Adjust link timer for SGMII -
- * According to Cisco SGMII specification the timer should be 1.6 ms.
- * The link_timer register is configured in units of the clock.
- * - When running as 1G SGMII, Serdes clock is 125 MHz, so
- * unit = 1 / (125*10^6 Hz) = 8 ns.
- * 1.6 ms in units of 8 ns = 1.6ms / 8ns = 2*10^5 = 0x30d40
- * - When running as 2.5G SGMII, Serdes clock is 312.5 MHz, so
- * unit = 1 / (312.5*10^6 Hz) = 3.2 ns.
- * 1.6 ms in units of 3.2 ns = 1.6ms / 3.2ns = 5*10^5 = 0x7a120.
- * Since link_timer value of 1G SGMII will be too short for 2.5 SGMII,
- * we always set up here a value of 2.5 SGMII.
- */
- phy_write(memac->pcsphy, MDIO_SGMII_LINK_TMR_H, LINK_TMR_H);
- phy_write(memac->pcsphy, MDIO_SGMII_LINK_TMR_L, LINK_TMR_L);
-
- if (!fixed_link)
- /* Restart AN */
- tmp_reg16 = SGMII_CR_DEF_VAL | SGMII_CR_RESTART_AN;
+ __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
+ phy_interface_t iface = memac->basex_if ? PHY_INTERFACE_MODE_1000BASEX :
+ PHY_INTERFACE_MODE_SGMII;
+ unsigned int mode = fixed_link ? MLO_AN_FIXED : MLO_AN_INBAND;
+
+ linkmode_set_pause(advertising, true, true);
+ pcs->ops->pcs_config(pcs, mode, iface, advertising, true);
+ if (fixed_link)
+ pcs->ops->pcs_link_up(pcs, mode, iface, fixed_link->speed,
+ fixed_link->duplex);
else
- /* AN disabled */
- tmp_reg16 = SGMII_CR_DEF_VAL & ~SGMII_CR_AN_EN;
- phy_write(memac->pcsphy, 0x0, tmp_reg16);
-}
-
-static void setup_sgmii_internal_phy_base_x(struct fman_mac *memac)
-{
- u16 tmp_reg16;
-
- /* AN Device capability */
- tmp_reg16 = MDIO_SGMII_DEV_ABIL_BASEX_MODE;
- phy_write(memac->pcsphy, MDIO_SGMII_DEV_ABIL_SGMII, tmp_reg16);
-
- /* Adjust link timer for SGMII -
- * For Serdes 1000BaseX auto-negotiation the timer should be 10 ms.
- * The link_timer register is configured in units of the clock.
- * - When running as 1G SGMII, Serdes clock is 125 MHz, so
- * unit = 1 / (125*10^6 Hz) = 8 ns.
- * 10 ms in units of 8 ns = 10ms / 8ns = 1250000 = 0x1312d0
- * - When running as 2.5G SGMII, Serdes clock is 312.5 MHz, so
- * unit = 1 / (312.5*10^6 Hz) = 3.2 ns.
- * 10 ms in units of 3.2 ns = 10ms / 3.2ns = 3125000 = 0x2faf08.
- * Since link_timer value of 1G SGMII will be too short for 2.5 SGMII,
- * we always set up here a value of 2.5 SGMII.
- */
- phy_write(memac->pcsphy, MDIO_SGMII_LINK_TMR_H, LINK_TMR_H_BASEX);
- phy_write(memac->pcsphy, MDIO_SGMII_LINK_TMR_L, LINK_TMR_L_BASEX);
-
- /* Restart AN */
- tmp_reg16 = SGMII_CR_DEF_VAL | SGMII_CR_RESTART_AN;
- phy_write(memac->pcsphy, 0x0, tmp_reg16);
+ pcs->ops->pcs_an_restart(pcs);
}
static int check_init_parameters(struct fman_mac *memac)
@@ -983,7 +885,6 @@ static int memac_set_exception(struct fman_mac *memac,
static int memac_init(struct fman_mac *memac)
{
struct memac_cfg *memac_drv_param;
- u8 i;
enet_addr_t eth_addr;
bool slow_10g_if = false;
struct fixed_phy_status *fixed_link;
@@ -1036,32 +937,10 @@ static int memac_init(struct fman_mac *memac)
iowrite32be(reg32, &memac->regs->command_config);
}
- if (memac->phy_if == PHY_INTERFACE_MODE_SGMII) {
- /* Configure internal SGMII PHY */
- if (memac->basex_if)
- setup_sgmii_internal_phy_base_x(memac);
- else
- setup_sgmii_internal_phy(memac, fixed_link);
- } else if (memac->phy_if == PHY_INTERFACE_MODE_QSGMII) {
- /* Configure 4 internal SGMII PHYs */
- for (i = 0; i < 4; i++) {
- u8 qsmgii_phy_addr, phy_addr;
- /* QSGMII PHY address occupies 3 upper bits of 5-bit
- * phy_address; the lower 2 bits are used to extend
- * register address space and access each one of 4
- * ports inside QSGMII.
- */
- phy_addr = memac->pcsphy->mdio.addr;
- qsmgii_phy_addr = (u8)((phy_addr << 2) | i);
- memac->pcsphy->mdio.addr = qsmgii_phy_addr;
- if (memac->basex_if)
- setup_sgmii_internal_phy_base_x(memac);
- else
- setup_sgmii_internal_phy(memac, fixed_link);
-
- memac->pcsphy->mdio.addr = phy_addr;
- }
- }
+ if (memac->phy_if == PHY_INTERFACE_MODE_SGMII)
+ setup_sgmii_internal(memac, memac->sgmii_pcs, fixed_link);
+ else if (memac->phy_if == PHY_INTERFACE_MODE_QSGMII)
+ setup_sgmii_internal(memac, memac->qsgmii_pcs, fixed_link);
/* Max Frame Length */
err = fman_set_mac_max_frame(memac->fm, memac->mac_id,
@@ -1097,12 +976,25 @@ static int memac_init(struct fman_mac *memac)
return 0;
}
+static void pcs_put(struct phylink_pcs *pcs)
+{
+ struct mdio_device *mdiodev;
+
+ if (!pcs)
+ return;
+
+ mdiodev = lynx_get_mdio_device(pcs);
+ lynx_pcs_destroy(pcs);
+ mdio_device_free(mdiodev);
+}
+
static int memac_free(struct fman_mac *memac)
{
free_init_resources(memac);
- if (memac->pcsphy)
- put_device(&memac->pcsphy->mdio.dev);
+ pcs_put(memac->sgmii_pcs);
+ pcs_put(memac->qsgmii_pcs);
+ pcs_put(memac->xfi_pcs);
kfree(memac->memac_drv_param);
kfree(memac);
@@ -1153,12 +1045,31 @@ static struct fman_mac *memac_config(struct mac_device *mac_dev,
return memac;
}
+static struct phylink_pcs *memac_pcs_create(struct device_node *mac_node,
+ int index)
+{
+ struct device_node *node;
+ struct mdio_device *mdiodev = NULL;
+ struct phylink_pcs *pcs;
+
+ node = of_parse_phandle(mac_node, "pcsphy-handle", index);
+ if (node && of_device_is_available(node))
+ mdiodev = of_mdio_find_device(node);
+ of_node_put(node);
+
+ if (!mdiodev)
+ return ERR_PTR(-EPROBE_DEFER);
+
+ pcs = lynx_pcs_create(mdiodev);
+ return pcs;
+}
+
int memac_initialization(struct mac_device *mac_dev,
struct device_node *mac_node,
struct fman_mac_params *params)
{
int err;
- struct device_node *phy_node;
+ struct phylink_pcs *pcs;
struct fixed_phy_status *fixed_link;
struct fman_mac *memac;
@@ -1188,23 +1099,57 @@ int memac_initialization(struct mac_device *mac_dev,
memac = mac_dev->fman_mac;
memac->memac_drv_param->max_frame_length = fman_get_max_frm();
memac->memac_drv_param->reset_on_init = true;
- if (memac->phy_if == PHY_INTERFACE_MODE_SGMII ||
- memac->phy_if == PHY_INTERFACE_MODE_QSGMII) {
- phy_node = of_parse_phandle(mac_node, "pcsphy-handle", 0);
- if (!phy_node) {
- pr_err("PCS PHY node is not available\n");
- err = -EINVAL;
+
+ err = of_property_match_string(mac_node, "pcs-names", "xfi");
+ if (err >= 0) {
+ memac->xfi_pcs = memac_pcs_create(mac_node, err);
+ if (IS_ERR(memac->xfi_pcs)) {
+ err = PTR_ERR(memac->xfi_pcs);
+ dev_err_probe(mac_dev->dev, err, "missing xfi pcs\n");
goto _return_fm_mac_free;
}
+ } else if (err != -EINVAL && err != -ENODATA) {
+ goto _return_fm_mac_free;
+ }
- memac->pcsphy = of_phy_find_device(phy_node);
- if (!memac->pcsphy) {
- pr_err("of_phy_find_device (PCS PHY) failed\n");
- err = -EINVAL;
+ err = of_property_match_string(mac_node, "pcs-names", "qsgmii");
+ if (err >= 0) {
+ memac->qsgmii_pcs = memac_pcs_create(mac_node, err);
+ if (IS_ERR(memac->qsgmii_pcs)) {
+ err = PTR_ERR(memac->qsgmii_pcs);
+ dev_err_probe(mac_dev->dev, err, "missing qsgmii pcs\n");
goto _return_fm_mac_free;
}
+ } else if (err != -EINVAL && err != -ENODATA) {
+ goto _return_fm_mac_free;
+ }
+
+ /* For compatibility, if pcs-names is missing, we assume this phy is
+ * the first one in pcsphy-handle
+ */
+ err = of_property_match_string(mac_node, "pcs-names", "sgmii");
+ if (err == -EINVAL)
+ pcs = memac_pcs_create(mac_node, 0);
+ else if (err < 0)
+ goto _return_fm_mac_free;
+ else
+ pcs = memac_pcs_create(mac_node, err);
+
+ if (!pcs) {
+ dev_err(mac_dev->dev, "missing pcs\n");
+ err = -ENOENT;
+ goto _return_fm_mac_free;
}
+ /* If err is set here, it means that pcs-names was missing above (and
+ * therefore that xfi_pcs cannot be set). If we are defaulting to
+ * XGMII, assume this is for XFI. Otherwise, assume it is for SGMII.
+ */
+ if (err && mac_dev->phy_if == PHY_INTERFACE_MODE_XGMII)
+ memac->xfi_pcs = pcs;
+ else
+ memac->sgmii_pcs = pcs;
+
memac->serdes = devm_of_phy_get(mac_dev->dev, mac_node, "serdes");
if (PTR_ERR(memac->serdes) == -ENODEV) {
memac->serdes = NULL;
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* [PATCH net-next v3 41/47] [RFT] net: dpaa: Convert to phylink
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (39 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 40/47] net: fman: memac: Use lynx pcs driver Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-16 21:27 ` kernel test robot
2022-07-15 21:59 ` [PATCH net-next v3 42/47] powerpc: dts: qoriq: Add nodes for QSGMII PCSs Sean Anderson
` (6 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson
This converts DPAA to phylink. All macs are converted. This should work
with no device tree modifications (including those made in this series),
except for QSGMII (as noted previously).
The mEMAC configuration is one of the tricker areas. I have tried to
capture all the restrictions across the various models. Most of the time,
we assume that if the serdes supports a mode or the phy-interface-mode
specifies it, then we support it. The only place we can't do this is
(RG)MII, since there's no serdes. In that case, we rely on a (new)
devicetree property. There are also several cases where half-duplex is
broken. Unfortunately, only a single compatible is used for the MAC, so we
have to use the board compatible instead.
The 10GEC conversion is very straightforward, since it only supports XAUI.
There is generally nothing to configure.
The dTSEC conversion is broadly similar to mEMAC, but is simpler because we
don't support configuring the SerDes (though this can be easily added) and
we don't have multiple PCSs. From what I can tell, there's nothing
different in the driver or documentation between SGMII and 1000BASE-X
except for the advertising. Similarly, I couldn't find anything about
2500BASE-X. In both cases, I treat them like SGMII. These modes aren't used
by any in-tree boards. Similarly, despite being mentioned in the driver, I
couldn't find any documented SoCs which supported QSGMII. I have left it
unimplemented for now.
10GEC and dTSEC have not been tested at all. I would greatly appreciate if
someone could try them out.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
This has been tested on an LS1046ARDB.
With managed=phy, I was unable to get the interfaces to come up at all,
hence the default to in-band.
Changes in v3:
- Remove _return label from memac_initialization in favor of returning
directly
- Fix grabbing the default PCS not checking for -ENODATA from
of_property_match_string
- Set DTSEC_ECNTRL_R100M in dtsec_link_up instead of dtsec_mac_config
- Remove rmii/mii properties
Changes in v2:
- Remove unused variable slow_10g_if
- Restrict valid link modes based on the phy interface. This is easier
to set up, and mostly captures what I intended to do the first time.
We now have a custom validate which restricts half-duplex for some SoCs
for RGMII, but generally just uses the default phylink validate.
- Configure the SerDes in enable/disable
- Properly implement all ethtool ops and ioctls. These were mostly
stubbed out just enough to compile last time.
- Convert 10GEC and dTSEC as well
drivers/net/ethernet/freescale/dpaa/Kconfig | 4 +-
.../net/ethernet/freescale/dpaa/dpaa_eth.c | 89 +--
.../ethernet/freescale/dpaa/dpaa_ethtool.c | 90 +--
drivers/net/ethernet/freescale/fman/Kconfig | 1 -
.../net/ethernet/freescale/fman/fman_dtsec.c | 457 +++++++-------
.../net/ethernet/freescale/fman/fman_mac.h | 10 -
.../net/ethernet/freescale/fman/fman_memac.c | 565 +++++++++---------
.../net/ethernet/freescale/fman/fman_tgec.c | 131 ++--
drivers/net/ethernet/freescale/fman/mac.c | 168 +-----
drivers/net/ethernet/freescale/fman/mac.h | 23 +-
10 files changed, 622 insertions(+), 916 deletions(-)
diff --git a/drivers/net/ethernet/freescale/dpaa/Kconfig b/drivers/net/ethernet/freescale/dpaa/Kconfig
index 0e1439fd00bd..2b560661c82a 100644
--- a/drivers/net/ethernet/freescale/dpaa/Kconfig
+++ b/drivers/net/ethernet/freescale/dpaa/Kconfig
@@ -2,8 +2,8 @@
menuconfig FSL_DPAA_ETH
tristate "DPAA Ethernet"
depends on FSL_DPAA && FSL_FMAN
- select PHYLIB
- select FIXED_PHY
+ select PHYLINK
+ select PCS_LYNX
help
Data Path Acceleration Architecture Ethernet driver,
supporting the Freescale QorIQ chips.
diff --git a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
index a2a89f547813..125e7db3dba8 100644
--- a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
+++ b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
@@ -264,8 +264,19 @@ static int dpaa_netdev_init(struct net_device *net_dev,
net_dev->needed_headroom = priv->tx_headroom;
net_dev->watchdog_timeo = msecs_to_jiffies(tx_timeout);
- mac_dev->net_dev = net_dev;
+ /* The rest of the config is filled in by the mac device already */
+ mac_dev->phylink_config.dev = &net_dev->dev;
+ mac_dev->phylink_config.type = PHYLINK_NETDEV;
mac_dev->update_speed = dpaa_eth_cgr_set_speed;
+ mac_dev->phylink = phylink_create(&mac_dev->phylink_config,
+ dev_fwnode(mac_dev->dev),
+ mac_dev->phy_if,
+ mac_dev->phylink_ops);
+ if (IS_ERR(mac_dev->phylink)) {
+ err = PTR_ERR(mac_dev->phylink);
+ dev_err_probe(dev, err, "Could not create phylink\n");
+ return err;
+ }
/* start without the RUNNING flag, phylib controls it later */
netif_carrier_off(net_dev);
@@ -273,6 +284,7 @@ static int dpaa_netdev_init(struct net_device *net_dev,
err = register_netdev(net_dev);
if (err < 0) {
dev_err(dev, "register_netdev() = %d\n", err);
+ phylink_destroy(mac_dev->phylink);
return err;
}
@@ -294,8 +306,7 @@ static int dpaa_stop(struct net_device *net_dev)
*/
msleep(200);
- if (mac_dev->phy_dev)
- phy_stop(mac_dev->phy_dev);
+ phylink_stop(mac_dev->phylink);
mac_dev->disable(mac_dev->fman_mac);
for (i = 0; i < ARRAY_SIZE(mac_dev->port); i++) {
@@ -304,8 +315,7 @@ static int dpaa_stop(struct net_device *net_dev)
err = error;
}
- if (net_dev->phydev)
- phy_disconnect(net_dev->phydev);
+ phylink_disconnect_phy(mac_dev->phylink);
net_dev->phydev = NULL;
msleep(200);
@@ -833,10 +843,10 @@ static int dpaa_eth_cgr_init(struct dpaa_priv *priv)
/* Set different thresholds based on the configured MAC speed.
* This may turn suboptimal if the MAC is reconfigured at another
- * speed, so MACs must call dpaa_eth_cgr_set_speed in their adjust_link
+ * speed, so MACs must call dpaa_eth_cgr_set_speed in their link_up
* callback.
*/
- if (priv->mac_dev->if_support & SUPPORTED_10000baseT_Full)
+ if (priv->mac_dev->phylink_config.mac_capabilities & MAC_10000FD)
cs_th = DPAA_CS_THRESHOLD_10G;
else
cs_th = DPAA_CS_THRESHOLD_1G;
@@ -865,7 +875,7 @@ static int dpaa_eth_cgr_init(struct dpaa_priv *priv)
static void dpaa_eth_cgr_set_speed(struct mac_device *mac_dev, int speed)
{
- struct net_device *net_dev = mac_dev->net_dev;
+ struct net_device *net_dev = to_net_dev(mac_dev->phylink_config.dev);
struct dpaa_priv *priv = netdev_priv(net_dev);
struct qm_mcc_initcgr opts = { };
u32 cs_th;
@@ -2904,58 +2914,6 @@ static void dpaa_eth_napi_disable(struct dpaa_priv *priv)
}
}
-static void dpaa_adjust_link(struct net_device *net_dev)
-{
- struct mac_device *mac_dev;
- struct dpaa_priv *priv;
-
- priv = netdev_priv(net_dev);
- mac_dev = priv->mac_dev;
- mac_dev->adjust_link(mac_dev);
-}
-
-/* The Aquantia PHYs are capable of performing rate adaptation */
-#define PHY_VEND_AQUANTIA 0x03a1b400
-#define PHY_VEND_AQUANTIA2 0x31c31c00
-
-static int dpaa_phy_init(struct net_device *net_dev)
-{
- __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
- struct mac_device *mac_dev;
- struct phy_device *phy_dev;
- struct dpaa_priv *priv;
- u32 phy_vendor;
-
- priv = netdev_priv(net_dev);
- mac_dev = priv->mac_dev;
-
- phy_dev = of_phy_connect(net_dev, mac_dev->phy_node,
- &dpaa_adjust_link, 0,
- mac_dev->phy_if);
- if (!phy_dev) {
- netif_err(priv, ifup, net_dev, "init_phy() failed\n");
- return -ENODEV;
- }
-
- phy_vendor = phy_dev->drv->phy_id & GENMASK(31, 10);
- /* Unless the PHY is capable of rate adaptation */
- if (mac_dev->phy_if != PHY_INTERFACE_MODE_XGMII ||
- (phy_vendor != PHY_VEND_AQUANTIA &&
- phy_vendor != PHY_VEND_AQUANTIA2)) {
- /* remove any features not supported by the controller */
- ethtool_convert_legacy_u32_to_link_mode(mask,
- mac_dev->if_support);
- linkmode_and(phy_dev->supported, phy_dev->supported, mask);
- }
-
- phy_support_asym_pause(phy_dev);
-
- mac_dev->phy_dev = phy_dev;
- net_dev->phydev = phy_dev;
-
- return 0;
-}
-
static int dpaa_open(struct net_device *net_dev)
{
struct mac_device *mac_dev;
@@ -2966,7 +2924,8 @@ static int dpaa_open(struct net_device *net_dev)
mac_dev = priv->mac_dev;
dpaa_eth_napi_enable(priv);
- err = dpaa_phy_init(net_dev);
+ err = phylink_of_phy_connect(mac_dev->phylink,
+ mac_dev->dev->of_node, 0);
if (err)
goto phy_init_failed;
@@ -2981,7 +2940,7 @@ static int dpaa_open(struct net_device *net_dev)
netif_err(priv, ifup, net_dev, "mac_dev->enable() = %d\n", err);
goto mac_start_failed;
}
- phy_start(priv->mac_dev->phy_dev);
+ phylink_start(mac_dev->phylink);
netif_tx_start_all_queues(net_dev);
@@ -2990,6 +2949,7 @@ static int dpaa_open(struct net_device *net_dev)
mac_start_failed:
for (i = 0; i < ARRAY_SIZE(mac_dev->port); i++)
fman_port_disable(mac_dev->port[i]);
+ phylink_disconnect_phy(mac_dev->phylink);
phy_init_failed:
dpaa_eth_napi_disable(priv);
@@ -3145,10 +3105,12 @@ static int dpaa_ts_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
static int dpaa_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
{
int ret = -EINVAL;
+ struct dpaa_priv *priv = netdev_priv(net_dev);
if (cmd == SIOCGMIIREG) {
if (net_dev->phydev)
- return phy_mii_ioctl(net_dev->phydev, rq, cmd);
+ return phylink_mii_ioctl(priv->mac_dev->phylink, rq,
+ cmd);
}
if (cmd == SIOCSHWTSTAMP)
@@ -3552,6 +3514,7 @@ static int dpaa_remove(struct platform_device *pdev)
dev_set_drvdata(dev, NULL);
unregister_netdev(net_dev);
+ phylink_destroy(priv->mac_dev->phylink);
err = dpaa_fq_free(dev, &priv->dpaa_fq_list);
diff --git a/drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c b/drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c
index 73f07881ce2d..7463ec7f0105 100644
--- a/drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c
+++ b/drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c
@@ -54,27 +54,19 @@ static char dpaa_stats_global[][ETH_GSTRING_LEN] = {
static int dpaa_get_link_ksettings(struct net_device *net_dev,
struct ethtool_link_ksettings *cmd)
{
- if (!net_dev->phydev)
- return 0;
+ struct dpaa_priv *priv = netdev_priv(net_dev);
+ struct mac_device *mac_dev = priv->mac_dev;
- phy_ethtool_ksettings_get(net_dev->phydev, cmd);
-
- return 0;
+ return phylink_ethtool_ksettings_get(mac_dev->phylink, cmd);
}
static int dpaa_set_link_ksettings(struct net_device *net_dev,
const struct ethtool_link_ksettings *cmd)
{
- int err;
+ struct dpaa_priv *priv = netdev_priv(net_dev);
+ struct mac_device *mac_dev = priv->mac_dev;
- if (!net_dev->phydev)
- return -ENODEV;
-
- err = phy_ethtool_ksettings_set(net_dev->phydev, cmd);
- if (err < 0)
- netdev_err(net_dev, "phy_ethtool_ksettings_set() = %d\n", err);
-
- return err;
+ return phylink_ethtool_ksettings_set(mac_dev->phylink, cmd);
}
static void dpaa_get_drvinfo(struct net_device *net_dev,
@@ -99,80 +91,28 @@ static void dpaa_set_msglevel(struct net_device *net_dev,
static int dpaa_nway_reset(struct net_device *net_dev)
{
- int err;
+ struct dpaa_priv *priv = netdev_priv(net_dev);
+ struct mac_device *mac_dev = priv->mac_dev;
- if (!net_dev->phydev)
- return -ENODEV;
-
- err = 0;
- if (net_dev->phydev->autoneg) {
- err = phy_start_aneg(net_dev->phydev);
- if (err < 0)
- netdev_err(net_dev, "phy_start_aneg() = %d\n",
- err);
- }
-
- return err;
+ return phylink_ethtool_nway_reset(mac_dev->phylink);
}
static void dpaa_get_pauseparam(struct net_device *net_dev,
struct ethtool_pauseparam *epause)
{
- struct mac_device *mac_dev;
- struct dpaa_priv *priv;
+ struct dpaa_priv *priv = netdev_priv(net_dev);
+ struct mac_device *mac_dev = priv->mac_dev;
- priv = netdev_priv(net_dev);
- mac_dev = priv->mac_dev;
-
- if (!net_dev->phydev)
- return;
-
- epause->autoneg = mac_dev->autoneg_pause;
- epause->rx_pause = mac_dev->rx_pause_active;
- epause->tx_pause = mac_dev->tx_pause_active;
+ phylink_ethtool_get_pauseparam(mac_dev->phylink, epause);
}
static int dpaa_set_pauseparam(struct net_device *net_dev,
struct ethtool_pauseparam *epause)
{
- struct mac_device *mac_dev;
- struct phy_device *phydev;
- bool rx_pause, tx_pause;
- struct dpaa_priv *priv;
- int err;
+ struct dpaa_priv *priv = netdev_priv(net_dev);
+ struct mac_device *mac_dev = priv->mac_dev;
- priv = netdev_priv(net_dev);
- mac_dev = priv->mac_dev;
-
- phydev = net_dev->phydev;
- if (!phydev) {
- netdev_err(net_dev, "phy device not initialized\n");
- return -ENODEV;
- }
-
- if (!phy_validate_pause(phydev, epause))
- return -EINVAL;
-
- /* The MAC should know how to handle PAUSE frame autonegotiation before
- * adjust_link is triggered by a forced renegotiation of sym/asym PAUSE
- * settings.
- */
- mac_dev->autoneg_pause = !!epause->autoneg;
- mac_dev->rx_pause_req = !!epause->rx_pause;
- mac_dev->tx_pause_req = !!epause->tx_pause;
-
- /* Determine the sym/asym advertised PAUSE capabilities from the desired
- * rx/tx pause settings.
- */
-
- phy_set_asym_pause(phydev, epause->rx_pause, epause->tx_pause);
-
- fman_get_pause_cfg(mac_dev, &rx_pause, &tx_pause);
- err = fman_set_mac_active_pause(mac_dev, rx_pause, tx_pause);
- if (err < 0)
- netdev_err(net_dev, "set_mac_active_pause() = %d\n", err);
-
- return err;
+ return phylink_ethtool_set_pauseparam(mac_dev->phylink, epause);
}
static int dpaa_get_sset_count(struct net_device *net_dev, int type)
diff --git a/drivers/net/ethernet/freescale/fman/Kconfig b/drivers/net/ethernet/freescale/fman/Kconfig
index 8f5637db41dd..e76a3d262b2b 100644
--- a/drivers/net/ethernet/freescale/fman/Kconfig
+++ b/drivers/net/ethernet/freescale/fman/Kconfig
@@ -3,7 +3,6 @@ config FSL_FMAN
tristate "FMan support"
depends on FSL_SOC || ARCH_LAYERSCAPE || COMPILE_TEST
select GENERIC_ALLOCATOR
- select PHYLIB
select PHYLINK
select PCS
select PCS_LYNX
diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.c b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
index 6617932fd3fd..c170457b0308 100644
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
@@ -17,6 +17,7 @@
#include <linux/crc32.h>
#include <linux/of_mdio.h>
#include <linux/mii.h>
+#include <linux/netdevice.h>
/* TBI register addresses */
#define MII_TBICON 0x11
@@ -29,9 +30,6 @@
#define TBICON_CLK_SELECT 0x0020 /* Clock select */
#define TBICON_MI_MODE 0x0010 /* GMII mode (TBI if not set) */
-#define TBIANA_SGMII 0x4001
-#define TBIANA_1000X 0x01a0
-
/* Interrupt Mask Register (IMASK) */
#define DTSEC_IMASK_BREN 0x80000000
#define DTSEC_IMASK_RXCEN 0x40000000
@@ -92,9 +90,10 @@
#define DTSEC_ECNTRL_GMIIM 0x00000040
#define DTSEC_ECNTRL_TBIM 0x00000020
-#define DTSEC_ECNTRL_SGMIIM 0x00000002
#define DTSEC_ECNTRL_RPM 0x00000010
#define DTSEC_ECNTRL_R100M 0x00000008
+#define DTSEC_ECNTRL_RMM 0x00000004
+#define DTSEC_ECNTRL_SGMIIM 0x00000002
#define DTSEC_ECNTRL_QSGMIIM 0x00000001
#define TCTRL_TTSE 0x00000040
@@ -318,7 +317,8 @@ struct fman_mac {
void *fm;
struct fman_rev_info fm_rev_info;
bool basex_if;
- struct phy_device *tbiphy;
+ struct mdio_device *tbidev;
+ struct phylink_pcs pcs;
};
static void set_dflts(struct dtsec_cfg *cfg)
@@ -356,7 +356,6 @@ static int init(struct dtsec_regs __iomem *regs, struct dtsec_cfg *cfg,
phy_interface_t iface, u16 iface_speed, u64 addr,
u32 exception_mask, u8 tbi_addr)
{
- bool is_rgmii, is_sgmii, is_qsgmii;
enet_addr_t eth_addr;
u32 tmp;
int i;
@@ -365,47 +364,6 @@ static int init(struct dtsec_regs __iomem *regs, struct dtsec_cfg *cfg,
iowrite32be(MACCFG1_SOFT_RESET, ®s->maccfg1);
iowrite32be(0, ®s->maccfg1);
- /* dtsec_id2 */
- tmp = ioread32be(®s->tsec_id2);
-
- /* check RGMII support */
- if (iface == PHY_INTERFACE_MODE_RGMII ||
- iface == PHY_INTERFACE_MODE_RGMII_ID ||
- iface == PHY_INTERFACE_MODE_RGMII_RXID ||
- iface == PHY_INTERFACE_MODE_RGMII_TXID ||
- iface == PHY_INTERFACE_MODE_RMII)
- if (tmp & DTSEC_ID2_INT_REDUCED_OFF)
- return -EINVAL;
-
- if (iface == PHY_INTERFACE_MODE_SGMII ||
- iface == PHY_INTERFACE_MODE_MII)
- if (tmp & DTSEC_ID2_INT_REDUCED_OFF)
- return -EINVAL;
-
- is_rgmii = iface == PHY_INTERFACE_MODE_RGMII ||
- iface == PHY_INTERFACE_MODE_RGMII_ID ||
- iface == PHY_INTERFACE_MODE_RGMII_RXID ||
- iface == PHY_INTERFACE_MODE_RGMII_TXID;
- is_sgmii = iface == PHY_INTERFACE_MODE_SGMII;
- is_qsgmii = iface == PHY_INTERFACE_MODE_QSGMII;
-
- tmp = 0;
- if (is_rgmii || iface == PHY_INTERFACE_MODE_GMII)
- tmp |= DTSEC_ECNTRL_GMIIM;
- if (is_sgmii)
- tmp |= (DTSEC_ECNTRL_SGMIIM | DTSEC_ECNTRL_TBIM);
- if (is_qsgmii)
- tmp |= (DTSEC_ECNTRL_SGMIIM | DTSEC_ECNTRL_TBIM |
- DTSEC_ECNTRL_QSGMIIM);
- if (is_rgmii)
- tmp |= DTSEC_ECNTRL_RPM;
- if (iface_speed == SPEED_100)
- tmp |= DTSEC_ECNTRL_R100M;
-
- iowrite32be(tmp, ®s->ecntrl);
-
- tmp = 0;
-
if (cfg->tx_pause_time)
tmp |= cfg->tx_pause_time;
if (cfg->tx_pause_time_extd)
@@ -446,17 +404,10 @@ static int init(struct dtsec_regs __iomem *regs, struct dtsec_cfg *cfg,
tmp = 0;
- if (iface_speed < SPEED_1000)
- tmp |= MACCFG2_NIBBLE_MODE;
- else if (iface_speed == SPEED_1000)
- tmp |= MACCFG2_BYTE_MODE;
-
tmp |= (cfg->preamble_len << MACCFG2_PREAMBLE_LENGTH_SHIFT) &
MACCFG2_PREAMBLE_LENGTH_MASK;
if (cfg->tx_pad_crc)
tmp |= MACCFG2_PAD_CRC_EN;
- /* Full Duplex */
- tmp |= MACCFG2_FULL_DUPLEX;
iowrite32be(tmp, ®s->maccfg2);
tmp = (((cfg->non_back_to_back_ipg1 <<
@@ -525,10 +476,6 @@ static void set_bucket(struct dtsec_regs __iomem *regs, int bucket,
static int check_init_parameters(struct fman_mac *dtsec)
{
- if (dtsec->max_speed >= SPEED_10000) {
- pr_err("1G MAC driver supports 1G or lower speeds\n");
- return -EINVAL;
- }
if ((dtsec->dtsec_drv_param)->rx_prepend >
MAX_PACKET_ALIGNMENT) {
pr_err("packetAlignmentPadding can't be > than %d\n",
@@ -630,22 +577,10 @@ static int get_exception_flag(enum fman_mac_exceptions exception)
return bit_mask;
}
-static bool is_init_done(struct dtsec_cfg *dtsec_drv_params)
-{
- /* Checks if dTSEC driver parameters were initialized */
- if (!dtsec_drv_params)
- return true;
-
- return false;
-}
-
static u16 dtsec_get_max_frame_length(struct fman_mac *dtsec)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
- if (is_init_done(dtsec->dtsec_drv_param))
- return 0;
-
return (u16)ioread32be(®s->maxfrm);
}
@@ -682,6 +617,7 @@ static void dtsec_isr(void *handle)
dtsec->exception_cb(dtsec->dev_id, FM_MAC_EX_1G_COL_RET_LMT);
if (event & DTSEC_IMASK_XFUNEN) {
/* FM_TX_LOCKUP_ERRATA_DTSEC6 Errata workaround */
+ /* FIXME: This races with the rest of the driver! */
if (dtsec->fm_rev_info.major == 2) {
u32 tpkt1, tmp_reg1, tpkt2, tmp_reg2, i;
/* a. Write 0x00E0_0C00 to DTSEC_ID
@@ -814,6 +750,43 @@ static void free_init_resources(struct fman_mac *dtsec)
dtsec->unicast_addr_hash = NULL;
}
+static struct fman_mac *pcs_to_dtsec(struct phylink_pcs *pcs)
+{
+ return container_of(pcs, struct fman_mac, pcs);
+}
+
+static void dtsec_pcs_get_state(struct phylink_pcs *pcs,
+ struct phylink_link_state *state)
+{
+ struct fman_mac *dtsec = pcs_to_dtsec(pcs);
+
+ phylink_mii_c22_pcs_get_state(dtsec->tbidev, state);
+}
+
+static int dtsec_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
+ phy_interface_t interface,
+ const unsigned long *advertising,
+ bool permit_pause_to_mac)
+{
+ struct fman_mac *dtsec = pcs_to_dtsec(pcs);
+
+ return phylink_mii_c22_pcs_config(dtsec->tbidev, mode, interface,
+ advertising);
+}
+
+static void dtsec_pcs_an_restart(struct phylink_pcs *pcs)
+{
+ struct fman_mac *dtsec = pcs_to_dtsec(pcs);
+
+ phylink_mii_c22_pcs_an_restart(dtsec->tbidev);
+}
+
+static const struct phylink_pcs_ops dtsec_pcs_ops = {
+ .pcs_get_state = dtsec_pcs_get_state,
+ .pcs_config = dtsec_pcs_config,
+ .pcs_an_restart = dtsec_pcs_an_restart,
+};
+
static void graceful_start(struct fman_mac *dtsec)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
@@ -854,36 +827,11 @@ static void graceful_stop(struct fman_mac *dtsec)
static int dtsec_enable(struct fman_mac *dtsec)
{
- struct dtsec_regs __iomem *regs = dtsec->regs;
- u32 tmp;
-
- if (!is_init_done(dtsec->dtsec_drv_param))
- return -EINVAL;
-
- /* Enable */
- tmp = ioread32be(®s->maccfg1);
- tmp |= MACCFG1_RX_EN | MACCFG1_TX_EN;
- iowrite32be(tmp, ®s->maccfg1);
-
- /* Graceful start - clear the graceful Rx/Tx stop bit */
- graceful_start(dtsec);
-
return 0;
}
static void dtsec_disable(struct fman_mac *dtsec)
{
- struct dtsec_regs __iomem *regs = dtsec->regs;
- u32 tmp;
-
- WARN_ON_ONCE(!is_init_done(dtsec->dtsec_drv_param));
-
- /* Graceful stop - Assert the graceful Rx/Tx stop bit */
- graceful_stop(dtsec);
-
- tmp = ioread32be(®s->maccfg1);
- tmp &= ~(MACCFG1_RX_EN | MACCFG1_TX_EN);
- iowrite32be(tmp, ®s->maccfg1);
}
static int dtsec_set_tx_pause_frames(struct fman_mac *dtsec,
@@ -894,11 +842,6 @@ static int dtsec_set_tx_pause_frames(struct fman_mac *dtsec,
struct dtsec_regs __iomem *regs = dtsec->regs;
u32 ptv = 0;
- if (!is_init_done(dtsec->dtsec_drv_param))
- return -EINVAL;
-
- graceful_stop(dtsec);
-
if (pause_time) {
/* FM_BAD_TX_TS_IN_B_2_B_ERRATA_DTSEC_A003 Errata workaround */
if (dtsec->fm_rev_info.major == 2 && pause_time <= 320) {
@@ -919,8 +862,6 @@ static int dtsec_set_tx_pause_frames(struct fman_mac *dtsec,
iowrite32be(ioread32be(®s->maccfg1) & ~MACCFG1_TX_FLOW,
®s->maccfg1);
- graceful_start(dtsec);
-
return 0;
}
@@ -929,11 +870,6 @@ static int dtsec_accept_rx_pause_frames(struct fman_mac *dtsec, bool en)
struct dtsec_regs __iomem *regs = dtsec->regs;
u32 tmp;
- if (!is_init_done(dtsec->dtsec_drv_param))
- return -EINVAL;
-
- graceful_stop(dtsec);
-
tmp = ioread32be(®s->maccfg1);
if (en)
tmp |= MACCFG1_RX_FLOW;
@@ -941,17 +877,124 @@ static int dtsec_accept_rx_pause_frames(struct fman_mac *dtsec, bool en)
tmp &= ~MACCFG1_RX_FLOW;
iowrite32be(tmp, ®s->maccfg1);
- graceful_start(dtsec);
-
return 0;
}
+static struct phylink_pcs *dtsec_select_pcs(struct phylink_config *config,
+ phy_interface_t iface)
+{
+ struct fman_mac *dtsec = fman_config_to_mac(config)->fman_mac;
+
+ switch (iface) {
+ case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_1000BASEX:
+ case PHY_INTERFACE_MODE_2500BASEX:
+ return &dtsec->pcs;
+ default:
+ return NULL;
+ }
+}
+
+static void dtsec_mac_config(struct phylink_config *config, unsigned int mode,
+ const struct phylink_link_state *state)
+{
+ struct mac_device *mac_dev = fman_config_to_mac(config);
+ struct dtsec_regs __iomem *regs = mac_dev->fman_mac->regs;
+ u32 tmp;
+
+ switch (state->interface) {
+ case PHY_INTERFACE_MODE_RMII:
+ tmp = DTSEC_ECNTRL_RMM;
+ break;
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
+ tmp = DTSEC_ECNTRL_GMIIM | DTSEC_ECNTRL_RPM;
+ break;
+ case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_1000BASEX:
+ case PHY_INTERFACE_MODE_2500BASEX:
+ tmp = DTSEC_ECNTRL_TBIM | DTSEC_ECNTRL_SGMIIM;
+ break;
+ default:
+ dev_warn(mac_dev->dev, "cannot configure dTSEC for %s\n",
+ phy_modes(state->interface));
+ }
+
+ iowrite32be(tmp, ®s->ecntrl);
+}
+
+static void dtsec_link_up(struct phylink_config *config, struct phy_device *phy,
+ unsigned int mode, phy_interface_t interface,
+ int speed, int duplex, bool tx_pause, bool rx_pause)
+{
+ struct mac_device *mac_dev = fman_config_to_mac(config);
+ struct fman_mac *dtsec = mac_dev->fman_mac;
+ struct dtsec_regs __iomem *regs = dtsec->regs;
+ u16 pause_time = tx_pause ? FSL_FM_PAUSE_TIME_ENABLE :
+ FSL_FM_PAUSE_TIME_DISABLE;
+ u32 tmp;
+
+ dtsec_set_tx_pause_frames(dtsec, 0, pause_time, 0);
+ dtsec_accept_rx_pause_frames(dtsec, rx_pause);
+
+ tmp = ioread32be(®s->ecntrl);
+ if (speed == SPEED_100)
+ tmp |= DTSEC_ECNTRL_R100M;
+ else
+ tmp &= ~DTSEC_ECNTRL_R100M;
+ iowrite32be(tmp, ®s->ecntrl);
+
+ tmp = ioread32be(®s->maccfg2);
+ tmp &= ~(MACCFG2_NIBBLE_MODE | MACCFG2_BYTE_MODE | MACCFG2_FULL_DUPLEX);
+ if (speed >= SPEED_1000)
+ tmp |= MACCFG2_BYTE_MODE;
+ else
+ tmp |= MACCFG2_NIBBLE_MODE;
+
+ if (duplex == DUPLEX_FULL)
+ tmp |= MACCFG2_FULL_DUPLEX;
+
+ iowrite32be(tmp, ®s->maccfg2);
+
+ mac_dev->update_speed(mac_dev, speed);
+
+ /* Enable */
+ tmp = ioread32be(®s->maccfg1);
+ tmp |= MACCFG1_RX_EN | MACCFG1_TX_EN;
+ iowrite32be(tmp, ®s->maccfg1);
+
+ /* Graceful start - clear the graceful Rx/Tx stop bit */
+ graceful_start(dtsec);
+}
+
+static void dtsec_link_down(struct phylink_config *config, unsigned int mode,
+ phy_interface_t interface)
+{
+ struct fman_mac *dtsec = fman_config_to_mac(config)->fman_mac;
+ struct dtsec_regs __iomem *regs = dtsec->regs;
+ u32 tmp;
+
+ /* Graceful stop - Assert the graceful Rx/Tx stop bit */
+ graceful_stop(dtsec);
+
+ tmp = ioread32be(®s->maccfg1);
+ tmp &= ~(MACCFG1_RX_EN | MACCFG1_TX_EN);
+ iowrite32be(tmp, ®s->maccfg1);
+}
+
+static const struct phylink_mac_ops dtsec_mac_ops = {
+ .validate = phylink_generic_validate,
+ .mac_select_pcs = dtsec_select_pcs,
+ .mac_config = dtsec_mac_config,
+ .mac_link_up = dtsec_link_up,
+ .mac_link_down = dtsec_link_down,
+};
+
static int dtsec_modify_mac_address(struct fman_mac *dtsec,
const enet_addr_t *enet_addr)
{
- if (!is_init_done(dtsec->dtsec_drv_param))
- return -EINVAL;
-
graceful_stop(dtsec);
/* Initialize MAC Station Address registers (1 & 2)
@@ -975,9 +1018,6 @@ static int dtsec_add_hash_mac_address(struct fman_mac *dtsec,
u32 crc = 0xFFFFFFFF;
bool mcast, ghtx;
- if (!is_init_done(dtsec->dtsec_drv_param))
- return -EINVAL;
-
addr = ENET_ADDR_TO_UINT64(*eth_addr);
ghtx = (bool)((ioread32be(®s->rctrl) & RCTRL_GHTX) ? true : false);
@@ -1037,9 +1077,6 @@ static int dtsec_set_allmulti(struct fman_mac *dtsec, bool enable)
u32 tmp;
struct dtsec_regs __iomem *regs = dtsec->regs;
- if (!is_init_done(dtsec->dtsec_drv_param))
- return -EINVAL;
-
tmp = ioread32be(®s->rctrl);
if (enable)
tmp |= RCTRL_MPROM;
@@ -1056,9 +1093,6 @@ static int dtsec_set_tstamp(struct fman_mac *dtsec, bool enable)
struct dtsec_regs __iomem *regs = dtsec->regs;
u32 rctrl, tctrl;
- if (!is_init_done(dtsec->dtsec_drv_param))
- return -EINVAL;
-
rctrl = ioread32be(®s->rctrl);
tctrl = ioread32be(®s->tctrl);
@@ -1087,9 +1121,6 @@ static int dtsec_del_hash_mac_address(struct fman_mac *dtsec,
u32 crc = 0xFFFFFFFF;
bool mcast, ghtx;
- if (!is_init_done(dtsec->dtsec_drv_param))
- return -EINVAL;
-
addr = ENET_ADDR_TO_UINT64(*eth_addr);
ghtx = (bool)((ioread32be(®s->rctrl) & RCTRL_GHTX) ? true : false);
@@ -1153,9 +1184,6 @@ static int dtsec_set_promiscuous(struct fman_mac *dtsec, bool new_val)
struct dtsec_regs __iomem *regs = dtsec->regs;
u32 tmp;
- if (!is_init_done(dtsec->dtsec_drv_param))
- return -EINVAL;
-
/* Set unicast promiscuous */
tmp = ioread32be(®s->rctrl);
if (new_val)
@@ -1177,90 +1205,12 @@ static int dtsec_set_promiscuous(struct fman_mac *dtsec, bool new_val)
return 0;
}
-static int dtsec_adjust_link(struct fman_mac *dtsec, u16 speed)
-{
- struct dtsec_regs __iomem *regs = dtsec->regs;
- u32 tmp;
-
- if (!is_init_done(dtsec->dtsec_drv_param))
- return -EINVAL;
-
- graceful_stop(dtsec);
-
- tmp = ioread32be(®s->maccfg2);
-
- /* Full Duplex */
- tmp |= MACCFG2_FULL_DUPLEX;
-
- tmp &= ~(MACCFG2_NIBBLE_MODE | MACCFG2_BYTE_MODE);
- if (speed < SPEED_1000)
- tmp |= MACCFG2_NIBBLE_MODE;
- else if (speed == SPEED_1000)
- tmp |= MACCFG2_BYTE_MODE;
- iowrite32be(tmp, ®s->maccfg2);
-
- tmp = ioread32be(®s->ecntrl);
- if (speed == SPEED_100)
- tmp |= DTSEC_ECNTRL_R100M;
- else
- tmp &= ~DTSEC_ECNTRL_R100M;
- iowrite32be(tmp, ®s->ecntrl);
-
- graceful_start(dtsec);
-
- return 0;
-}
-
-static int dtsec_restart_autoneg(struct fman_mac *dtsec)
-{
- u16 tmp_reg16;
-
- if (!is_init_done(dtsec->dtsec_drv_param))
- return -EINVAL;
-
- tmp_reg16 = phy_read(dtsec->tbiphy, MII_BMCR);
-
- tmp_reg16 &= ~(BMCR_SPEED100 | BMCR_SPEED1000);
- tmp_reg16 |= (BMCR_ANENABLE | BMCR_ANRESTART |
- BMCR_FULLDPLX | BMCR_SPEED1000);
-
- phy_write(dtsec->tbiphy, MII_BMCR, tmp_reg16);
-
- return 0;
-}
-
-static void adjust_link_dtsec(struct mac_device *mac_dev)
-{
- struct phy_device *phy_dev = mac_dev->phy_dev;
- struct fman_mac *fman_mac;
- bool rx_pause, tx_pause;
- int err;
-
- fman_mac = mac_dev->fman_mac;
- if (!phy_dev->link) {
- dtsec_restart_autoneg(fman_mac);
-
- return;
- }
-
- dtsec_adjust_link(fman_mac, phy_dev->speed);
- mac_dev->update_speed(mac_dev, phy_dev->speed);
- fman_get_pause_cfg(mac_dev, &rx_pause, &tx_pause);
- err = fman_set_mac_active_pause(mac_dev, rx_pause, tx_pause);
- if (err < 0)
- dev_err(mac_dev->dev, "fman_set_mac_active_pause() = %d\n",
- err);
-}
-
static int dtsec_set_exception(struct fman_mac *dtsec,
enum fman_mac_exceptions exception, bool enable)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
u32 bit_mask = 0;
- if (!is_init_done(dtsec->dtsec_drv_param))
- return -EINVAL;
-
if (exception != FM_MAC_EX_1G_1588_TS_RX_ERR) {
bit_mask = get_exception_flag(exception);
if (bit_mask) {
@@ -1310,12 +1260,9 @@ static int dtsec_init(struct fman_mac *dtsec)
{
struct dtsec_regs __iomem *regs = dtsec->regs;
struct dtsec_cfg *dtsec_drv_param;
- u16 max_frm_ln;
+ u16 max_frm_ln, tbicon;
int err;
- if (is_init_done(dtsec->dtsec_drv_param))
- return -EINVAL;
-
if (DEFAULT_RESET_ON_INIT &&
(fman_reset_mac(dtsec->fm, dtsec->mac_id) != 0)) {
pr_err("Can't reset MAC!\n");
@@ -1330,38 +1277,19 @@ static int dtsec_init(struct fman_mac *dtsec)
err = init(dtsec->regs, dtsec_drv_param, dtsec->phy_if,
dtsec->max_speed, dtsec->addr, dtsec->exceptions,
- dtsec->tbiphy->mdio.addr);
+ dtsec->tbidev->addr);
if (err) {
free_init_resources(dtsec);
pr_err("DTSEC version doesn't support this i/f mode\n");
return err;
}
- if (dtsec->phy_if == PHY_INTERFACE_MODE_SGMII) {
- u16 tmp_reg16;
+ /* Configure the TBI PHY Control Register */
+ tbicon = TBICON_CLK_SELECT | TBICON_SOFT_RESET;
+ mdiodev_write(dtsec->tbidev, MII_TBICON, tbicon);
- /* Configure the TBI PHY Control Register */
- tmp_reg16 = TBICON_CLK_SELECT | TBICON_SOFT_RESET;
- phy_write(dtsec->tbiphy, MII_TBICON, tmp_reg16);
-
- tmp_reg16 = TBICON_CLK_SELECT;
- phy_write(dtsec->tbiphy, MII_TBICON, tmp_reg16);
-
- tmp_reg16 = (BMCR_RESET | BMCR_ANENABLE |
- BMCR_FULLDPLX | BMCR_SPEED1000);
- phy_write(dtsec->tbiphy, MII_BMCR, tmp_reg16);
-
- if (dtsec->basex_if)
- tmp_reg16 = TBIANA_1000X;
- else
- tmp_reg16 = TBIANA_SGMII;
- phy_write(dtsec->tbiphy, MII_ADVERTISE, tmp_reg16);
-
- tmp_reg16 = (BMCR_ANENABLE | BMCR_ANRESTART |
- BMCR_FULLDPLX | BMCR_SPEED1000);
-
- phy_write(dtsec->tbiphy, MII_BMCR, tmp_reg16);
- }
+ tbicon = TBICON_CLK_SELECT;
+ mdiodev_write(dtsec->tbidev, MII_TBICON, tbicon);
/* Max Frame Length */
max_frm_ln = (u16)ioread32be(®s->maxfrm);
@@ -1406,6 +1334,8 @@ static int dtsec_free(struct fman_mac *dtsec)
kfree(dtsec->dtsec_drv_param);
dtsec->dtsec_drv_param = NULL;
+ if (!IS_ERR_OR_NULL(dtsec->tbidev))
+ put_device(&dtsec->tbidev->dev);
kfree(dtsec);
return 0;
@@ -1434,7 +1364,6 @@ static struct fman_mac *dtsec_config(struct mac_device *mac_dev,
dtsec->regs = mac_dev->vaddr;
dtsec->addr = ENET_ADDR_TO_UINT64(mac_dev->addr);
- dtsec->max_speed = params->max_speed;
dtsec->phy_if = mac_dev->phy_if;
dtsec->mac_id = params->mac_id;
dtsec->exceptions = (DTSEC_IMASK_BREN |
@@ -1457,7 +1386,6 @@ static struct fman_mac *dtsec_config(struct mac_device *mac_dev,
dtsec->en_tsu_err_exception = dtsec->dtsec_drv_param->ptp_exception_en;
dtsec->fm = params->fm;
- dtsec->basex_if = params->basex_if;
/* Save FMan revision */
fman_get_revision(dtsec->fm, &dtsec->fm_rev_info);
@@ -1476,18 +1404,18 @@ int dtsec_initialization(struct mac_device *mac_dev,
int err;
struct fman_mac *dtsec;
struct device_node *phy_node;
+ unsigned long capabilities;
+ unsigned long *supported;
+ mac_dev->phylink_ops = &dtsec_mac_ops;
mac_dev->set_promisc = dtsec_set_promiscuous;
mac_dev->change_addr = dtsec_modify_mac_address;
mac_dev->add_hash_mac_addr = dtsec_add_hash_mac_address;
mac_dev->remove_hash_mac_addr = dtsec_del_hash_mac_address;
- mac_dev->set_tx_pause = dtsec_set_tx_pause_frames;
- mac_dev->set_rx_pause = dtsec_accept_rx_pause_frames;
mac_dev->set_exception = dtsec_set_exception;
mac_dev->set_allmulti = dtsec_set_allmulti;
mac_dev->set_tstamp = dtsec_set_tstamp;
mac_dev->set_multi = fman_set_multi;
- mac_dev->adjust_link = adjust_link_dtsec;
mac_dev->enable = dtsec_enable;
mac_dev->disable = dtsec_disable;
@@ -1502,19 +1430,56 @@ int dtsec_initialization(struct mac_device *mac_dev,
dtsec->dtsec_drv_param->tx_pad_crc = true;
phy_node = of_parse_phandle(mac_node, "tbi-handle", 0);
- if (!phy_node) {
- pr_err("TBI PHY node is not available\n");
+ if (!phy_node || of_device_is_available(phy_node)) {
+ of_node_put(phy_node);
err = -EINVAL;
+ dev_err_probe(mac_dev->dev, err,
+ "TBI PCS node is not available\n");
goto _return_fm_mac_free;
}
- dtsec->tbiphy = of_phy_find_device(phy_node);
- if (!dtsec->tbiphy) {
- pr_err("of_phy_find_device (TBI PHY) failed\n");
- err = -EINVAL;
+ dtsec->tbidev = of_mdio_find_device(phy_node);
+ of_node_put(phy_node);
+ if (!dtsec->tbidev) {
+ err = -EPROBE_DEFER;
+ dev_err_probe(mac_dev->dev, err,
+ "could not find mdiodev for PCS\n");
goto _return_fm_mac_free;
}
- put_device(&dtsec->tbiphy->mdio.dev);
+ dtsec->pcs.ops = &dtsec_pcs_ops;
+ dtsec->pcs.poll = true;
+
+ supported = mac_dev->phylink_config.supported_interfaces;
+
+ /* FIXME: Can we use DTSEC_ID2_INT_FULL_OFF to determine if these are
+ * supported? If not, we can determine support via the phy if SerDes
+ * support is added.
+ */
+ if (mac_dev->phy_if == PHY_INTERFACE_MODE_SGMII ||
+ mac_dev->phy_if == PHY_INTERFACE_MODE_1000BASEX) {
+ __set_bit(PHY_INTERFACE_MODE_SGMII, supported);
+ __set_bit(PHY_INTERFACE_MODE_1000BASEX, supported);
+ } else if (mac_dev->phy_if == PHY_INTERFACE_MODE_2500BASEX) {
+ __set_bit(PHY_INTERFACE_MODE_2500BASEX, supported);
+ }
+
+ if (!(ioread32be(&dtsec->regs->tsec_id2) & DTSEC_ID2_INT_REDUCED_OFF)) {
+ phy_interface_set_rgmii(supported);
+
+ /* DTSEC_ID2_INT_REDUCED_OFF indicates that the dTSEC supports
+ * RMII and RGMII. However, the only SoCs which support RMII
+ * are the P1017 and P1023. Avoid advertising this mode on
+ * other SoCs. This is a bit of a moot point, since there's no
+ * in-tree support for ethernet on these platforms...
+ */
+ if (of_machine_is_compatible("fsl,P1023") ||
+ of_machine_is_compatible("fsl,P1023RDB"))
+ __set_bit(PHY_INTERFACE_MODE_RMII, supported);
+ }
+
+ capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
+ capabilities |= MAC_10 | MAC_100 | MAC_1000FD | MAC_2500FD;
+ mac_dev->phylink_config.mac_capabilities = capabilities;
err = dtsec_init(dtsec);
if (err < 0)
diff --git a/drivers/net/ethernet/freescale/fman/fman_mac.h b/drivers/net/ethernet/freescale/fman/fman_mac.h
index 65887a3160d7..e5d6cddea731 100644
--- a/drivers/net/ethernet/freescale/fman/fman_mac.h
+++ b/drivers/net/ethernet/freescale/fman/fman_mac.h
@@ -170,20 +170,10 @@ struct fman_mac_params {
* 0 - FM_MAX_NUM_OF_10G_MACS
*/
u8 mac_id;
- /* Note that the speed should indicate the maximum rate that
- * this MAC should support rather than the actual speed;
- */
- u16 max_speed;
/* A handle to the FM object this port related to */
void *fm;
fman_mac_exception_cb *event_cb; /* MDIO Events Callback Routine */
fman_mac_exception_cb *exception_cb;/* Exception Callback Routine */
- /* SGMII/QSGII interface with 1000BaseX auto-negotiation between MAC
- * and phy or backplane; Note: 1000BaseX auto-negotiation relates only
- * to interface between MAC and phy/backplane, SGMII phy can still
- * synchronize with far-end phy at 10Mbps, 100Mbps or 1000Mbps
- */
- bool basex_if;
};
struct eth_hash_t {
diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.c b/drivers/net/ethernet/freescale/fman/fman_memac.c
index 20950d924c35..1cac6b85e537 100644
--- a/drivers/net/ethernet/freescale/fman/fman_memac.c
+++ b/drivers/net/ethernet/freescale/fman/fman_memac.c
@@ -278,9 +278,6 @@ struct fman_mac {
struct memac_regs __iomem *regs;
/* MAC address of device */
u64 addr;
- /* Ethernet physical interface */
- phy_interface_t phy_if;
- u16 max_speed;
struct mac_device *dev_id; /* device cookie used by the exception cbs */
fman_mac_exception_cb *exception_cb;
fman_mac_exception_cb *event_cb;
@@ -293,12 +290,12 @@ struct fman_mac {
struct memac_cfg *memac_drv_param;
void *fm;
struct fman_rev_info fm_rev_info;
- bool basex_if;
struct phy *serdes;
struct phylink_pcs *sgmii_pcs;
struct phylink_pcs *qsgmii_pcs;
struct phylink_pcs *xfi_pcs;
bool allmulti_enabled;
+ bool rgmii_no_half_duplex;
};
static void add_addr_in_paddr(struct memac_regs __iomem *regs, const u8 *adr,
@@ -356,7 +353,6 @@ static void set_exception(struct memac_regs __iomem *regs, u32 val,
}
static int init(struct memac_regs __iomem *regs, struct memac_cfg *cfg,
- phy_interface_t phy_if, u16 speed, bool slow_10g_if,
u32 exceptions)
{
u32 tmp;
@@ -384,41 +380,6 @@ static int init(struct memac_regs __iomem *regs, struct memac_cfg *cfg,
iowrite32be((u32)cfg->pause_quanta, ®s->pause_quanta[0]);
iowrite32be((u32)0, ®s->pause_thresh[0]);
- /* IF_MODE */
- tmp = 0;
- switch (phy_if) {
- case PHY_INTERFACE_MODE_XGMII:
- tmp |= IF_MODE_10G;
- break;
- case PHY_INTERFACE_MODE_MII:
- tmp |= IF_MODE_MII;
- break;
- default:
- tmp |= IF_MODE_GMII;
- if (phy_if == PHY_INTERFACE_MODE_RGMII ||
- phy_if == PHY_INTERFACE_MODE_RGMII_ID ||
- phy_if == PHY_INTERFACE_MODE_RGMII_RXID ||
- phy_if == PHY_INTERFACE_MODE_RGMII_TXID)
- tmp |= IF_MODE_RGMII | IF_MODE_RGMII_AUTO;
- }
- iowrite32be(tmp, ®s->if_mode);
-
- /* TX_FIFO_SECTIONS */
- tmp = 0;
- if (phy_if == PHY_INTERFACE_MODE_XGMII) {
- if (slow_10g_if) {
- tmp |= (TX_FIFO_SECTIONS_TX_AVAIL_SLOW_10G |
- TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_10G);
- } else {
- tmp |= (TX_FIFO_SECTIONS_TX_AVAIL_10G |
- TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_10G);
- }
- } else {
- tmp |= (TX_FIFO_SECTIONS_TX_AVAIL_1G |
- TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_1G);
- }
- iowrite32be(tmp, ®s->tx_fifo_sections);
-
/* clear all pending events and set-up interrupts */
iowrite32be(0xffffffff, ®s->ievent);
set_exception(regs, exceptions, true);
@@ -458,24 +419,6 @@ static u32 get_mac_addr_hash_code(u64 eth_addr)
return xor_val;
}
-static void setup_sgmii_internal(struct fman_mac *memac,
- struct phylink_pcs *pcs,
- struct fixed_phy_status *fixed_link)
-{
- __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
- phy_interface_t iface = memac->basex_if ? PHY_INTERFACE_MODE_1000BASEX :
- PHY_INTERFACE_MODE_SGMII;
- unsigned int mode = fixed_link ? MLO_AN_FIXED : MLO_AN_INBAND;
-
- linkmode_set_pause(advertising, true, true);
- pcs->ops->pcs_config(pcs, mode, iface, advertising, true);
- if (fixed_link)
- pcs->ops->pcs_link_up(pcs, mode, iface, fixed_link->speed,
- fixed_link->duplex);
- else
- pcs->ops->pcs_an_restart(pcs);
-}
-
static int check_init_parameters(struct fman_mac *memac)
{
if (!memac->exception_cb) {
@@ -581,41 +524,31 @@ static void free_init_resources(struct fman_mac *memac)
memac->unicast_addr_hash = NULL;
}
-static bool is_init_done(struct memac_cfg *memac_drv_params)
-{
- /* Checks if mEMAC driver parameters were initialized */
- if (!memac_drv_params)
- return true;
-
- return false;
-}
-
static int memac_enable(struct fman_mac *memac)
{
- struct memac_regs __iomem *regs = memac->regs;
- u32 tmp;
+ int ret;
- if (!is_init_done(memac->memac_drv_param))
- return -EINVAL;
+ ret = phy_init(memac->serdes);
+ if (ret) {
+ dev_err(memac->dev_id->dev,
+ "could not initialize serdes: %pe\n", ERR_PTR(ret));
+ return ret;
+ }
- tmp = ioread32be(®s->command_config);
- tmp |= CMD_CFG_RX_EN | CMD_CFG_TX_EN;
- iowrite32be(tmp, ®s->command_config);
+ ret = phy_power_on(memac->serdes);
+ if (ret) {
+ dev_err(memac->dev_id->dev,
+ "could not power on serdes: %pe\n", ERR_PTR(ret));
+ phy_exit(memac->serdes);
+ }
- return 0;
+ return ret;
}
static void memac_disable(struct fman_mac *memac)
-
{
- struct memac_regs __iomem *regs = memac->regs;
- u32 tmp;
-
- WARN_ON_ONCE(!is_init_done(memac->memac_drv_param));
-
- tmp = ioread32be(®s->command_config);
- tmp &= ~(CMD_CFG_RX_EN | CMD_CFG_TX_EN);
- iowrite32be(tmp, ®s->command_config);
+ phy_power_off(memac->serdes);
+ phy_exit(memac->serdes);
}
static int memac_set_promiscuous(struct fman_mac *memac, bool new_val)
@@ -623,9 +556,6 @@ static int memac_set_promiscuous(struct fman_mac *memac, bool new_val)
struct memac_regs __iomem *regs = memac->regs;
u32 tmp;
- if (!is_init_done(memac->memac_drv_param))
- return -EINVAL;
-
tmp = ioread32be(®s->command_config);
if (new_val)
tmp |= CMD_CFG_PROMIS_EN;
@@ -637,73 +567,12 @@ static int memac_set_promiscuous(struct fman_mac *memac, bool new_val)
return 0;
}
-static int memac_adjust_link(struct fman_mac *memac, u16 speed)
-{
- struct memac_regs __iomem *regs = memac->regs;
- u32 tmp;
-
- if (!is_init_done(memac->memac_drv_param))
- return -EINVAL;
-
- tmp = ioread32be(®s->if_mode);
-
- /* Set full duplex */
- tmp &= ~IF_MODE_HD;
-
- if (phy_interface_mode_is_rgmii(memac->phy_if)) {
- /* Configure RGMII in manual mode */
- tmp &= ~IF_MODE_RGMII_AUTO;
- tmp &= ~IF_MODE_RGMII_SP_MASK;
- /* Full duplex */
- tmp |= IF_MODE_RGMII_FD;
-
- switch (speed) {
- case SPEED_1000:
- tmp |= IF_MODE_RGMII_1000;
- break;
- case SPEED_100:
- tmp |= IF_MODE_RGMII_100;
- break;
- case SPEED_10:
- tmp |= IF_MODE_RGMII_10;
- break;
- default:
- break;
- }
- }
-
- iowrite32be(tmp, ®s->if_mode);
-
- return 0;
-}
-
-static void adjust_link_memac(struct mac_device *mac_dev)
-{
- struct phy_device *phy_dev = mac_dev->phy_dev;
- struct fman_mac *fman_mac;
- bool rx_pause, tx_pause;
- int err;
-
- fman_mac = mac_dev->fman_mac;
- memac_adjust_link(fman_mac, phy_dev->speed);
- mac_dev->update_speed(mac_dev, phy_dev->speed);
-
- fman_get_pause_cfg(mac_dev, &rx_pause, &tx_pause);
- err = fman_set_mac_active_pause(mac_dev, rx_pause, tx_pause);
- if (err < 0)
- dev_err(mac_dev->dev, "fman_set_mac_active_pause() = %d\n",
- err);
-}
-
static int memac_set_tx_pause_frames(struct fman_mac *memac, u8 priority,
u16 pause_time, u16 thresh_time)
{
struct memac_regs __iomem *regs = memac->regs;
u32 tmp;
- if (!is_init_done(memac->memac_drv_param))
- return -EINVAL;
-
tmp = ioread32be(®s->tx_fifo_sections);
GET_TX_EMPTY_DEFAULT_VALUE(tmp);
@@ -738,9 +607,6 @@ static int memac_accept_rx_pause_frames(struct fman_mac *memac, bool en)
struct memac_regs __iomem *regs = memac->regs;
u32 tmp;
- if (!is_init_done(memac->memac_drv_param))
- return -EINVAL;
-
tmp = ioread32be(®s->command_config);
if (en)
tmp &= ~CMD_CFG_PAUSE_IGNORE;
@@ -752,12 +618,179 @@ static int memac_accept_rx_pause_frames(struct fman_mac *memac, bool en)
return 0;
}
+static void memac_validate(struct phylink_config *config,
+ unsigned long *supported,
+ struct phylink_link_state *state)
+{
+ __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
+ struct fman_mac *memac = fman_config_to_mac(config)->fman_mac;
+
+ phylink_generic_validate(config, supported, state);
+
+ if (phy_interface_mode_is_rgmii(state->interface) &&
+ memac->rgmii_no_half_duplex) {
+ phylink_get_linkmodes(mask, state->interface,
+ MAC_10HD | MAC_100HD, RATE_ADAPT_NONE);
+ linkmode_andnot(supported, supported, mask);
+ linkmode_andnot(state->advertising, state->advertising, mask);
+ }
+}
+
+/**
+ * memac_if_mode() - Convert an interface mode into an IF_MODE config
+ * @interface: A phy interface mode
+ *
+ * Return: A configuration word, suitable for programming into the lower bits
+ * of %IF_MODE.
+ */
+static u32 memac_if_mode(phy_interface_t interface)
+{
+ switch (interface) {
+ case PHY_INTERFACE_MODE_MII:
+ return IF_MODE_MII;
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
+ return IF_MODE_GMII | IF_MODE_RGMII;
+ case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_1000BASEX:
+ case PHY_INTERFACE_MODE_QSGMII:
+ return IF_MODE_GMII;
+ case PHY_INTERFACE_MODE_10GBASER:
+ return IF_MODE_10G;
+ default:
+ WARN_ON_ONCE(1);
+ return 0;
+ }
+}
+
+static struct phylink_pcs *memac_select_pcs(struct phylink_config *config,
+ phy_interface_t iface)
+{
+ struct fman_mac *memac = fman_config_to_mac(config)->fman_mac;
+
+ switch (iface) {
+ case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_1000BASEX:
+ return memac->sgmii_pcs;
+ case PHY_INTERFACE_MODE_QSGMII:
+ return memac->qsgmii_pcs;
+ case PHY_INTERFACE_MODE_10GBASER:
+ return memac->xfi_pcs;
+ default:
+ return NULL;
+ }
+}
+
+static int memac_prepare(struct phylink_config *config, unsigned int mode,
+ phy_interface_t iface)
+{
+ struct fman_mac *memac = fman_config_to_mac(config)->fman_mac;
+
+ switch (iface) {
+ case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_1000BASEX:
+ case PHY_INTERFACE_MODE_QSGMII:
+ case PHY_INTERFACE_MODE_10GBASER:
+ return phy_set_mode_ext(memac->serdes, PHY_MODE_ETHERNET,
+ iface);
+ default:
+ return 0;
+ }
+}
+
+static void memac_mac_config(struct phylink_config *config, unsigned int mode,
+ const struct phylink_link_state *state)
+{
+ struct mac_device *mac_dev = fman_config_to_mac(config);
+ struct memac_regs __iomem *regs = mac_dev->fman_mac->regs;
+ u32 tmp = ioread32be(®s->if_mode);
+
+ tmp &= ~(IF_MODE_MASK | IF_MODE_RGMII);
+ tmp |= memac_if_mode(state->interface);
+ if (phylink_autoneg_inband(mode))
+ tmp |= IF_MODE_RGMII_AUTO;
+ iowrite32be(tmp, ®s->if_mode);
+}
+
+static void memac_link_up(struct phylink_config *config, struct phy_device *phy,
+ unsigned int mode, phy_interface_t interface,
+ int speed, int duplex, bool tx_pause, bool rx_pause)
+{
+ struct mac_device *mac_dev = fman_config_to_mac(config);
+ struct fman_mac *memac = mac_dev->fman_mac;
+ struct memac_regs __iomem *regs = memac->regs;
+ u32 tmp = memac_if_mode(interface);
+ u16 pause_time = tx_pause ? FSL_FM_PAUSE_TIME_ENABLE :
+ FSL_FM_PAUSE_TIME_DISABLE;
+
+ memac_set_tx_pause_frames(memac, 0, pause_time, 0);
+ memac_accept_rx_pause_frames(memac, rx_pause);
+
+ if (duplex == DUPLEX_HALF)
+ tmp |= IF_MODE_HD;
+
+ switch (speed) {
+ case SPEED_1000:
+ tmp |= IF_MODE_RGMII_1000;
+ break;
+ case SPEED_100:
+ tmp |= IF_MODE_RGMII_100;
+ break;
+ case SPEED_10:
+ tmp |= IF_MODE_RGMII_10;
+ break;
+ }
+ iowrite32be(tmp, ®s->if_mode);
+
+ /* TODO: EEE? */
+
+ if (speed == SPEED_10000) {
+ if (memac->fm_rev_info.major == 6 &&
+ memac->fm_rev_info.minor == 4)
+ tmp = TX_FIFO_SECTIONS_TX_AVAIL_SLOW_10G;
+ else
+ tmp = TX_FIFO_SECTIONS_TX_AVAIL_10G;
+ tmp |= TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_10G;
+ } else {
+ tmp = TX_FIFO_SECTIONS_TX_AVAIL_1G |
+ TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_1G;
+ }
+ iowrite32be(tmp, ®s->tx_fifo_sections);
+
+ mac_dev->update_speed(mac_dev, speed);
+
+ tmp = ioread32be(®s->command_config);
+ tmp |= CMD_CFG_RX_EN | CMD_CFG_TX_EN;
+ iowrite32be(tmp, ®s->command_config);
+}
+
+static void memac_link_down(struct phylink_config *config, unsigned int mode,
+ phy_interface_t interface)
+{
+ struct fman_mac *memac = fman_config_to_mac(config)->fman_mac;
+ struct memac_regs __iomem *regs = memac->regs;
+ u32 tmp;
+
+ /* TODO: graceful */
+ tmp = ioread32be(®s->command_config);
+ tmp &= ~(CMD_CFG_RX_EN | CMD_CFG_TX_EN);
+ iowrite32be(tmp, ®s->command_config);
+}
+
+static const struct phylink_mac_ops memac_mac_ops = {
+ .validate = memac_validate,
+ .mac_select_pcs = memac_select_pcs,
+ .mac_prepare = memac_prepare,
+ .mac_config = memac_mac_config,
+ .mac_link_up = memac_link_up,
+ .mac_link_down = memac_link_down,
+};
+
static int memac_modify_mac_address(struct fman_mac *memac,
const enet_addr_t *enet_addr)
{
- if (!is_init_done(memac->memac_drv_param))
- return -EINVAL;
-
add_addr_in_paddr(memac->regs, (const u8 *)(*enet_addr), 0);
return 0;
@@ -771,9 +804,6 @@ static int memac_add_hash_mac_address(struct fman_mac *memac,
u32 hash;
u64 addr;
- if (!is_init_done(memac->memac_drv_param))
- return -EINVAL;
-
addr = ENET_ADDR_TO_UINT64(*eth_addr);
if (!(addr & GROUP_ADDRESS)) {
@@ -802,9 +832,6 @@ static int memac_set_allmulti(struct fman_mac *memac, bool enable)
u32 entry;
struct memac_regs __iomem *regs = memac->regs;
- if (!is_init_done(memac->memac_drv_param))
- return -EINVAL;
-
if (enable) {
for (entry = 0; entry < HASH_TABLE_SIZE; entry++)
iowrite32be(entry | HASH_CTRL_MCAST_EN,
@@ -834,9 +861,6 @@ static int memac_del_hash_mac_address(struct fman_mac *memac,
u32 hash;
u64 addr;
- if (!is_init_done(memac->memac_drv_param))
- return -EINVAL;
-
addr = ENET_ADDR_TO_UINT64(*eth_addr);
hash = get_mac_addr_hash_code(addr) & HASH_CTRL_ADDR_MASK;
@@ -864,9 +888,6 @@ static int memac_set_exception(struct fman_mac *memac,
{
u32 bit_mask = 0;
- if (!is_init_done(memac->memac_drv_param))
- return -EINVAL;
-
bit_mask = get_exception_flag(exception);
if (bit_mask) {
if (enable)
@@ -886,23 +907,15 @@ static int memac_init(struct fman_mac *memac)
{
struct memac_cfg *memac_drv_param;
enet_addr_t eth_addr;
- bool slow_10g_if = false;
- struct fixed_phy_status *fixed_link;
int err;
u32 reg32 = 0;
- if (is_init_done(memac->memac_drv_param))
- return -EINVAL;
-
err = check_init_parameters(memac);
if (err)
return err;
memac_drv_param = memac->memac_drv_param;
- if (memac->fm_rev_info.major == 6 && memac->fm_rev_info.minor == 4)
- slow_10g_if = true;
-
/* First, reset the MAC if desired. */
if (memac_drv_param->reset_on_init) {
err = reset(memac->regs);
@@ -918,10 +931,7 @@ static int memac_init(struct fman_mac *memac)
add_addr_in_paddr(memac->regs, (const u8 *)eth_addr, 0);
}
- fixed_link = memac_drv_param->fixed_link;
-
- init(memac->regs, memac->memac_drv_param, memac->phy_if,
- memac->max_speed, slow_10g_if, memac->exceptions);
+ init(memac->regs, memac->memac_drv_param, memac->exceptions);
/* FM_RX_FIFO_CORRUPT_ERRATA_10GMAC_A006320 errata workaround
* Exists only in FMan 6.0 and 6.3.
@@ -937,11 +947,6 @@ static int memac_init(struct fman_mac *memac)
iowrite32be(reg32, &memac->regs->command_config);
}
- if (memac->phy_if == PHY_INTERFACE_MODE_SGMII)
- setup_sgmii_internal(memac, memac->sgmii_pcs, fixed_link);
- else if (memac->phy_if == PHY_INTERFACE_MODE_QSGMII)
- setup_sgmii_internal(memac, memac->qsgmii_pcs, fixed_link);
-
/* Max Frame Length */
err = fman_set_mac_max_frame(memac->fm, memac->mac_id,
memac_drv_param->max_frame_length);
@@ -970,9 +975,6 @@ static int memac_init(struct fman_mac *memac)
fman_register_intr(memac->fm, FMAN_MOD_MAC, memac->mac_id,
FMAN_INTR_TYPE_NORMAL, memac_exception, memac);
- kfree(memac_drv_param);
- memac->memac_drv_param = NULL;
-
return 0;
}
@@ -995,7 +997,6 @@ static int memac_free(struct fman_mac *memac)
pcs_put(memac->sgmii_pcs);
pcs_put(memac->qsgmii_pcs);
pcs_put(memac->xfi_pcs);
-
kfree(memac->memac_drv_param);
kfree(memac);
@@ -1028,8 +1029,6 @@ static struct fman_mac *memac_config(struct mac_device *mac_dev,
memac->addr = ENET_ADDR_TO_UINT64(mac_dev->addr);
memac->regs = mac_dev->vaddr;
- memac->max_speed = params->max_speed;
- memac->phy_if = mac_dev->phy_if;
memac->mac_id = params->mac_id;
memac->exceptions = (MEMAC_IMASK_TSECC_ER | MEMAC_IMASK_TECC_ER |
MEMAC_IMASK_RECC_ER | MEMAC_IMASK_MGI);
@@ -1037,7 +1036,6 @@ static struct fman_mac *memac_config(struct mac_device *mac_dev,
memac->event_cb = params->event_cb;
memac->dev_id = mac_dev;
memac->fm = params->fm;
- memac->basex_if = params->basex_if;
/* Save FMan revision */
fman_get_revision(memac->fm, &memac->fm_rev_info);
@@ -1064,37 +1062,44 @@ static struct phylink_pcs *memac_pcs_create(struct device_node *mac_node,
return pcs;
}
+static bool memac_supports(struct mac_device *mac_dev, phy_interface_t iface)
+{
+ /* If there's no serdes device, assume that it's been configured for
+ * whatever the default interface mode is.
+ */
+ if (!mac_dev->fman_mac->serdes)
+ return mac_dev->phy_if == iface;
+ /* Otherwise, ask the serdes */
+ return !phy_validate(mac_dev->fman_mac->serdes, PHY_MODE_ETHERNET,
+ iface, NULL);
+}
+
int memac_initialization(struct mac_device *mac_dev,
struct device_node *mac_node,
struct fman_mac_params *params)
{
int err;
+ struct device_node *fixed;
struct phylink_pcs *pcs;
- struct fixed_phy_status *fixed_link;
struct fman_mac *memac;
+ unsigned long capabilities;
+ unsigned long *supported;
+ mac_dev->phylink_ops = &memac_mac_ops;
mac_dev->set_promisc = memac_set_promiscuous;
mac_dev->change_addr = memac_modify_mac_address;
mac_dev->add_hash_mac_addr = memac_add_hash_mac_address;
mac_dev->remove_hash_mac_addr = memac_del_hash_mac_address;
- mac_dev->set_tx_pause = memac_set_tx_pause_frames;
- mac_dev->set_rx_pause = memac_accept_rx_pause_frames;
mac_dev->set_exception = memac_set_exception;
mac_dev->set_allmulti = memac_set_allmulti;
mac_dev->set_tstamp = memac_set_tstamp;
mac_dev->set_multi = fman_set_multi;
- mac_dev->adjust_link = adjust_link_memac;
mac_dev->enable = memac_enable;
mac_dev->disable = memac_disable;
- if (params->max_speed == SPEED_10000)
- mac_dev->phy_if = PHY_INTERFACE_MODE_XGMII;
-
mac_dev->fman_mac = memac_config(mac_dev, params);
- if (!mac_dev->fman_mac) {
- err = -EINVAL;
- goto _return;
- }
+ if (!mac_dev->fman_mac)
+ return -EINVAL;
memac = mac_dev->fman_mac;
memac->memac_drv_param->max_frame_length = fman_get_max_frm();
@@ -1128,16 +1133,16 @@ int memac_initialization(struct mac_device *mac_dev,
* the first one in pcsphy-handle
*/
err = of_property_match_string(mac_node, "pcs-names", "sgmii");
- if (err == -EINVAL)
+ if (err == -EINVAL || err == -ENODATA)
pcs = memac_pcs_create(mac_node, 0);
else if (err < 0)
goto _return_fm_mac_free;
else
pcs = memac_pcs_create(mac_node, err);
- if (!pcs) {
- dev_err(mac_dev->dev, "missing pcs\n");
- err = -ENOENT;
+ if (IS_ERR(pcs)) {
+ err = PTR_ERR(pcs);
+ dev_err_probe(mac_dev->dev, err, "missing pcs\n");
goto _return_fm_mac_free;
}
@@ -1157,84 +1162,100 @@ int memac_initialization(struct mac_device *mac_dev,
err = PTR_ERR(memac->serdes);
dev_err_probe(mac_dev->dev, err, "could not get serdes\n");
goto _return_fm_mac_free;
+ }
+
+ /* The internal connection to the serdes is XGMII, but this isn't
+ * really correct for the phy mode (which is the external connection).
+ * However, this is how all older device trees say that they want
+ * 10GBASE-R (aka XFI), so just convert it for them.
+ */
+ if (mac_dev->phy_if == PHY_INTERFACE_MODE_XGMII)
+ mac_dev->phy_if = PHY_INTERFACE_MODE_10GBASER;
+
+ /* TODO: The following interface modes are supported by (some) hardware
+ * but not by this driver:
+ * - 1000BASE-KX
+ * - 10GBASE-KR
+ * - XAUI/HiGig
+ */
+ supported = mac_dev->phylink_config.supported_interfaces;
+
+ /* Note that half duplex is only supported on 10/100M interfaces. */
+
+ if (memac->sgmii_pcs &&
+ (memac_supports(mac_dev, PHY_INTERFACE_MODE_SGMII) ||
+ memac_supports(mac_dev, PHY_INTERFACE_MODE_1000BASEX))) {
+ __set_bit(PHY_INTERFACE_MODE_SGMII, supported);
+ __set_bit(PHY_INTERFACE_MODE_1000BASEX, supported);
+ }
+
+ if (memac->sgmii_pcs &&
+ memac_supports(mac_dev, PHY_INTERFACE_MODE_2500BASEX))
+ __set_bit(PHY_INTERFACE_MODE_2500BASEX, supported);
+
+ if (memac->qsgmii_pcs &&
+ memac_supports(mac_dev, PHY_INTERFACE_MODE_QSGMII))
+ __set_bit(PHY_INTERFACE_MODE_QSGMII, supported);
+ else if (mac_dev->phy_if == PHY_INTERFACE_MODE_QSGMII)
+ dev_warn(mac_dev->dev, "no QSGMII pcs specified\n");
+
+ if (memac->xfi_pcs &&
+ memac_supports(mac_dev, PHY_INTERFACE_MODE_10GBASER)) {
+ __set_bit(PHY_INTERFACE_MODE_10GBASER, supported);
} else {
- err = phy_init(memac->serdes);
- if (err) {
- dev_err_probe(mac_dev->dev, err,
- "could not initialize serdes\n");
- goto _return_fm_mac_free;
- }
-
- err = phy_power_on(memac->serdes);
- if (err) {
- dev_err_probe(mac_dev->dev, err,
- "could not power on serdes\n");
- goto _return_phy_exit;
- }
-
- if (memac->phy_if == PHY_INTERFACE_MODE_SGMII ||
- memac->phy_if == PHY_INTERFACE_MODE_1000BASEX ||
- memac->phy_if == PHY_INTERFACE_MODE_2500BASEX ||
- memac->phy_if == PHY_INTERFACE_MODE_QSGMII ||
- memac->phy_if == PHY_INTERFACE_MODE_XGMII) {
- err = phy_set_mode_ext(memac->serdes, PHY_MODE_ETHERNET,
- memac->phy_if);
- if (err) {
- dev_err_probe(mac_dev->dev, err,
- "could not set serdes mode to %s\n",
- phy_modes(memac->phy_if));
- goto _return_phy_power_off;
- }
- }
+ /* From what I can tell, no 10g macs support RGMII. */
+ phy_interface_set_rgmii(supported);
+ __set_bit(PHY_INTERFACE_MODE_MII, supported);
}
- if (!mac_dev->phy_node && of_phy_is_fixed_link(mac_node)) {
- struct phy_device *phy;
-
- err = of_phy_register_fixed_link(mac_node);
- if (err)
- goto _return_phy_power_off;
-
- fixed_link = kzalloc(sizeof(*fixed_link), GFP_KERNEL);
- if (!fixed_link) {
- err = -ENOMEM;
- goto _return_phy_power_off;
- }
-
- mac_dev->phy_node = of_node_get(mac_node);
- phy = of_phy_find_device(mac_dev->phy_node);
- if (!phy) {
- err = -EINVAL;
- of_node_put(mac_dev->phy_node);
- goto _return_fixed_link_free;
- }
-
- fixed_link->link = phy->link;
- fixed_link->speed = phy->speed;
- fixed_link->duplex = phy->duplex;
- fixed_link->pause = phy->pause;
- fixed_link->asym_pause = phy->asym_pause;
-
- put_device(&phy->mdio.dev);
- memac->memac_drv_param->fixed_link = fixed_link;
- }
+ capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
+ capabilities |= MAC_10 | MAC_100 | MAC_1000FD | MAC_2500FD | MAC_10000FD;
+
+ /* These SoCs don't support half duplex at all; there's no different
+ * FMan version or compatible, so we just have to check the machine
+ * compatible instead
+ */
+ if (of_machine_is_compatible("fsl,ls1043a") ||
+ of_machine_is_compatible("fsl,ls1046a") ||
+ of_machine_is_compatible("fsl,B4QDS"))
+ capabilities &= ~(MAC_10HD | MAC_100HD);
+
+ mac_dev->phylink_config.mac_capabilities = capabilities;
+
+ /* The T2080 and T4240 don't support half duplex RGMII. There is no
+ * other way to identify these SoCs, so just use the machine
+ * compatible.
+ */
+ if (of_machine_is_compatible("fsl,T2080QDS") ||
+ of_machine_is_compatible("fsl,T2080RDB") ||
+ of_machine_is_compatible("fsl,T2081QDS") ||
+ of_machine_is_compatible("fsl,T4240QDS") ||
+ of_machine_is_compatible("fsl,T4240RDB"))
+ memac->rgmii_no_half_duplex = true;
+
+ /* Most boards should use MLO_AN_INBAND, but existing boards don't have
+ * a managed property. Default to MLO_AN_INBAND if nothing else is
+ * specified. We need to be careful and not enable this if we have a
+ * fixed link or if we are using MII or RGMII, since those
+ * configurations modes don't use in-band autonegotiation.
+ */
+ fixed = of_get_child_by_name(mac_node, "fixed-link");
+ if (!fixed && !of_property_read_bool(mac_node, "fixed-link") &&
+ !of_property_read_bool(mac_node, "managed") &&
+ mac_dev->phy_if != PHY_INTERFACE_MODE_MII &&
+ !phy_interface_mode_is_rgmii(mac_dev->phy_if))
+ mac_dev->phylink_config.ovr_an_inband = true;
+ of_node_put(fixed);
err = memac_init(mac_dev->fman_mac);
if (err < 0)
- goto _return_fixed_link_free;
+ goto _return_fm_mac_free;
dev_info(mac_dev->dev, "FMan MEMAC\n");
- goto _return;
+ return 0;
-_return_phy_power_off:
- phy_power_off(memac->serdes);
-_return_phy_exit:
- phy_exit(memac->serdes);
-_return_fixed_link_free:
- kfree(fixed_link);
_return_fm_mac_free:
memac_free(mac_dev->fman_mac);
-_return:
return err;
}
diff --git a/drivers/net/ethernet/freescale/fman/fman_tgec.c b/drivers/net/ethernet/freescale/fman/fman_tgec.c
index 33f3b1cc2cfe..00a8c65cdd56 100644
--- a/drivers/net/ethernet/freescale/fman/fman_tgec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_tgec.c
@@ -13,6 +13,7 @@
#include <linux/bitrev.h>
#include <linux/io.h>
#include <linux/crc32.h>
+#include <linux/netdevice.h>
/* Transmit Inter-Packet Gap Length Register (TX_IPG_LENGTH) */
#define TGEC_TX_IPG_LENGTH_MASK 0x000003ff
@@ -243,10 +244,6 @@ static int init(struct tgec_regs __iomem *regs, struct tgec_cfg *cfg,
static int check_init_parameters(struct fman_mac *tgec)
{
- if (tgec->max_speed < SPEED_10000) {
- pr_err("10G MAC driver only support 10G speed\n");
- return -EINVAL;
- }
if (!tgec->exception_cb) {
pr_err("uninitialized exception_cb\n");
return -EINVAL;
@@ -384,40 +381,13 @@ static void free_init_resources(struct fman_mac *tgec)
tgec->unicast_addr_hash = NULL;
}
-static bool is_init_done(struct tgec_cfg *cfg)
-{
- /* Checks if tGEC driver parameters were initialized */
- if (!cfg)
- return true;
-
- return false;
-}
-
static int tgec_enable(struct fman_mac *tgec)
{
- struct tgec_regs __iomem *regs = tgec->regs;
- u32 tmp;
-
- if (!is_init_done(tgec->cfg))
- return -EINVAL;
-
- tmp = ioread32be(®s->command_config);
- tmp |= CMD_CFG_RX_EN | CMD_CFG_TX_EN;
- iowrite32be(tmp, ®s->command_config);
-
return 0;
}
static void tgec_disable(struct fman_mac *tgec)
{
- struct tgec_regs __iomem *regs = tgec->regs;
- u32 tmp;
-
- WARN_ON_ONCE(!is_init_done(tgec->cfg));
-
- tmp = ioread32be(®s->command_config);
- tmp &= ~(CMD_CFG_RX_EN | CMD_CFG_TX_EN);
- iowrite32be(tmp, ®s->command_config);
}
static int tgec_set_promiscuous(struct fman_mac *tgec, bool new_val)
@@ -425,9 +395,6 @@ static int tgec_set_promiscuous(struct fman_mac *tgec, bool new_val)
struct tgec_regs __iomem *regs = tgec->regs;
u32 tmp;
- if (!is_init_done(tgec->cfg))
- return -EINVAL;
-
tmp = ioread32be(®s->command_config);
if (new_val)
tmp |= CMD_CFG_PROMIS_EN;
@@ -444,9 +411,6 @@ static int tgec_set_tx_pause_frames(struct fman_mac *tgec,
{
struct tgec_regs __iomem *regs = tgec->regs;
- if (!is_init_done(tgec->cfg))
- return -EINVAL;
-
iowrite32be((u32)pause_time, ®s->pause_quant);
return 0;
@@ -457,9 +421,6 @@ static int tgec_accept_rx_pause_frames(struct fman_mac *tgec, bool en)
struct tgec_regs __iomem *regs = tgec->regs;
u32 tmp;
- if (!is_init_done(tgec->cfg))
- return -EINVAL;
-
tmp = ioread32be(®s->command_config);
if (!en)
tmp |= CMD_CFG_PAUSE_IGNORE;
@@ -470,12 +431,53 @@ static int tgec_accept_rx_pause_frames(struct fman_mac *tgec, bool en)
return 0;
}
+static void tgec_mac_config(struct phylink_config *config, unsigned int mode,
+ const struct phylink_link_state *state)
+{
+}
+
+static void tgec_link_up(struct phylink_config *config, struct phy_device *phy,
+ unsigned int mode, phy_interface_t interface,
+ int speed, int duplex, bool tx_pause, bool rx_pause)
+{
+ struct mac_device *mac_dev = fman_config_to_mac(config);
+ struct fman_mac *tgec = mac_dev->fman_mac;
+ struct tgec_regs __iomem *regs = tgec->regs;
+ u16 pause_time = tx_pause ? FSL_FM_PAUSE_TIME_ENABLE :
+ FSL_FM_PAUSE_TIME_DISABLE;
+ u32 tmp;
+
+ tgec_set_tx_pause_frames(tgec, 0, pause_time, 0);
+ tgec_accept_rx_pause_frames(tgec, rx_pause);
+ mac_dev->update_speed(mac_dev, speed);
+
+ tmp = ioread32be(®s->command_config);
+ tmp |= CMD_CFG_RX_EN | CMD_CFG_TX_EN;
+ iowrite32be(tmp, ®s->command_config);
+}
+
+static void tgec_link_down(struct phylink_config *config, unsigned int mode,
+ phy_interface_t interface)
+{
+ struct fman_mac *tgec = fman_config_to_mac(config)->fman_mac;
+ struct tgec_regs __iomem *regs = tgec->regs;
+ u32 tmp;
+
+ tmp = ioread32be(®s->command_config);
+ tmp &= ~(CMD_CFG_RX_EN | CMD_CFG_TX_EN);
+ iowrite32be(tmp, ®s->command_config);
+}
+
+static const struct phylink_mac_ops tgec_mac_ops = {
+ .validate = phylink_generic_validate,
+ .mac_config = tgec_mac_config,
+ .mac_link_up = tgec_link_up,
+ .mac_link_down = tgec_link_down,
+};
+
static int tgec_modify_mac_address(struct fman_mac *tgec,
const enet_addr_t *p_enet_addr)
{
- if (!is_init_done(tgec->cfg))
- return -EINVAL;
-
tgec->addr = ENET_ADDR_TO_UINT64(*p_enet_addr);
set_mac_address(tgec->regs, (const u8 *)(*p_enet_addr));
@@ -490,9 +492,6 @@ static int tgec_add_hash_mac_address(struct fman_mac *tgec,
u32 crc = 0xFFFFFFFF, hash;
u64 addr;
- if (!is_init_done(tgec->cfg))
- return -EINVAL;
-
addr = ENET_ADDR_TO_UINT64(*eth_addr);
if (!(addr & GROUP_ADDRESS)) {
@@ -525,9 +524,6 @@ static int tgec_set_allmulti(struct fman_mac *tgec, bool enable)
u32 entry;
struct tgec_regs __iomem *regs = tgec->regs;
- if (!is_init_done(tgec->cfg))
- return -EINVAL;
-
if (enable) {
for (entry = 0; entry < TGEC_HASH_TABLE_SIZE; entry++)
iowrite32be(entry | TGEC_HASH_MCAST_EN,
@@ -548,9 +544,6 @@ static int tgec_set_tstamp(struct fman_mac *tgec, bool enable)
struct tgec_regs __iomem *regs = tgec->regs;
u32 tmp;
- if (!is_init_done(tgec->cfg))
- return -EINVAL;
-
tmp = ioread32be(®s->command_config);
if (enable)
@@ -572,9 +565,6 @@ static int tgec_del_hash_mac_address(struct fman_mac *tgec,
u32 crc = 0xFFFFFFFF, hash;
u64 addr;
- if (!is_init_done(tgec->cfg))
- return -EINVAL;
-
addr = ((*(u64 *)eth_addr) >> 16);
/* CRC calculation */
@@ -601,22 +591,12 @@ static int tgec_del_hash_mac_address(struct fman_mac *tgec,
return 0;
}
-static void tgec_adjust_link(struct mac_device *mac_dev)
-{
- struct phy_device *phy_dev = mac_dev->phy_dev;
-
- mac_dev->update_speed(mac_dev, phy_dev->speed);
-}
-
static int tgec_set_exception(struct fman_mac *tgec,
enum fman_mac_exceptions exception, bool enable)
{
struct tgec_regs __iomem *regs = tgec->regs;
u32 bit_mask = 0;
- if (!is_init_done(tgec->cfg))
- return -EINVAL;
-
bit_mask = get_exception_flag(exception);
if (bit_mask) {
if (enable)
@@ -641,9 +621,6 @@ static int tgec_init(struct fman_mac *tgec)
enet_addr_t eth_addr;
int err;
- if (is_init_done(tgec->cfg))
- return -EINVAL;
-
if (DEFAULT_RESET_ON_INIT &&
(fman_reset_mac(tgec->fm, tgec->mac_id) != 0)) {
pr_err("Can't reset MAC!\n");
@@ -752,7 +729,6 @@ static struct fman_mac *tgec_config(struct mac_device *mac_dev, struct fman_mac_
tgec->regs = mac_dev->vaddr;
tgec->addr = ENET_ADDR_TO_UINT64(mac_dev->addr);
- tgec->max_speed = params->max_speed;
tgec->mac_id = params->mac_id;
tgec->exceptions = (TGEC_IMASK_MDIO_SCAN_EVENT |
TGEC_IMASK_REM_FAULT |
@@ -787,17 +763,15 @@ int tgec_initialization(struct mac_device *mac_dev,
int err;
struct fman_mac *tgec;
+ mac_dev->phylink_ops = &tgec_mac_ops;
mac_dev->set_promisc = tgec_set_promiscuous;
mac_dev->change_addr = tgec_modify_mac_address;
mac_dev->add_hash_mac_addr = tgec_add_hash_mac_address;
mac_dev->remove_hash_mac_addr = tgec_del_hash_mac_address;
- mac_dev->set_tx_pause = tgec_set_tx_pause_frames;
- mac_dev->set_rx_pause = tgec_accept_rx_pause_frames;
mac_dev->set_exception = tgec_set_exception;
mac_dev->set_allmulti = tgec_set_allmulti;
mac_dev->set_tstamp = tgec_set_tstamp;
mac_dev->set_multi = fman_set_multi;
- mac_dev->adjust_link = tgec_adjust_link;
mac_dev->enable = tgec_enable;
mac_dev->disable = tgec_disable;
@@ -807,6 +781,19 @@ int tgec_initialization(struct mac_device *mac_dev,
goto _return;
}
+ /* The internal connection to the serdes is XGMII, but this isn't
+ * really correct for the phy mode (which is the external connection).
+ * However, this is how all older device trees say that they want
+ * XAUI, so just convert it for them.
+ */
+ if (mac_dev->phy_if == PHY_INTERFACE_MODE_XGMII)
+ mac_dev->phy_if = PHY_INTERFACE_MODE_XAUI;
+
+ __set_bit(PHY_INTERFACE_MODE_XAUI,
+ mac_dev->phylink_config.supported_interfaces);
+ mac_dev->phylink_config.mac_capabilities =
+ MAC_SYM_PAUSE | MAC_ASYM_PAUSE | MAC_10000FD;
+
tgec = mac_dev->fman_mac;
tgec->cfg->max_frame_length = fman_get_max_frm();
err = tgec_init(tgec);
diff --git a/drivers/net/ethernet/freescale/fman/mac.c b/drivers/net/ethernet/freescale/fman/mac.c
index 7b7526fd7da3..2b0a30f69147 100644
--- a/drivers/net/ethernet/freescale/fman/mac.c
+++ b/drivers/net/ethernet/freescale/fman/mac.c
@@ -15,6 +15,7 @@
#include <linux/phy.h>
#include <linux/netdevice.h>
#include <linux/phy_fixed.h>
+#include <linux/phylink.h>
#include <linux/etherdevice.h>
#include <linux/libfdt_env.h>
@@ -93,130 +94,8 @@ int fman_set_multi(struct net_device *net_dev, struct mac_device *mac_dev)
return 0;
}
-/**
- * fman_set_mac_active_pause
- * @mac_dev: A pointer to the MAC device
- * @rx: Pause frame setting for RX
- * @tx: Pause frame setting for TX
- *
- * Set the MAC RX/TX PAUSE frames settings
- *
- * Avoid redundant calls to FMD, if the MAC driver already contains the desired
- * active PAUSE settings. Otherwise, the new active settings should be reflected
- * in FMan.
- *
- * Return: 0 on success; Error code otherwise.
- */
-int fman_set_mac_active_pause(struct mac_device *mac_dev, bool rx, bool tx)
-{
- struct fman_mac *fman_mac = mac_dev->fman_mac;
- int err = 0;
-
- if (rx != mac_dev->rx_pause_active) {
- err = mac_dev->set_rx_pause(fman_mac, rx);
- if (likely(err == 0))
- mac_dev->rx_pause_active = rx;
- }
-
- if (tx != mac_dev->tx_pause_active) {
- u16 pause_time = (tx ? FSL_FM_PAUSE_TIME_ENABLE :
- FSL_FM_PAUSE_TIME_DISABLE);
-
- err = mac_dev->set_tx_pause(fman_mac, 0, pause_time, 0);
-
- if (likely(err == 0))
- mac_dev->tx_pause_active = tx;
- }
-
- return err;
-}
-EXPORT_SYMBOL(fman_set_mac_active_pause);
-
-/**
- * fman_get_pause_cfg
- * @mac_dev: A pointer to the MAC device
- * @rx_pause: Return value for RX setting
- * @tx_pause: Return value for TX setting
- *
- * Determine the MAC RX/TX PAUSE frames settings based on PHY
- * autonegotiation or values set by eththool.
- *
- * Return: Pointer to FMan device.
- */
-void fman_get_pause_cfg(struct mac_device *mac_dev, bool *rx_pause,
- bool *tx_pause)
-{
- struct phy_device *phy_dev = mac_dev->phy_dev;
- u16 lcl_adv, rmt_adv;
- u8 flowctrl;
-
- *rx_pause = *tx_pause = false;
-
- if (!phy_dev->duplex)
- return;
-
- /* If PAUSE autonegotiation is disabled, the TX/RX PAUSE settings
- * are those set by ethtool.
- */
- if (!mac_dev->autoneg_pause) {
- *rx_pause = mac_dev->rx_pause_req;
- *tx_pause = mac_dev->tx_pause_req;
- return;
- }
-
- /* Else if PAUSE autonegotiation is enabled, the TX/RX PAUSE
- * settings depend on the result of the link negotiation.
- */
-
- /* get local capabilities */
- lcl_adv = linkmode_adv_to_lcl_adv_t(phy_dev->advertising);
-
- /* get link partner capabilities */
- rmt_adv = 0;
- if (phy_dev->pause)
- rmt_adv |= LPA_PAUSE_CAP;
- if (phy_dev->asym_pause)
- rmt_adv |= LPA_PAUSE_ASYM;
-
- /* Calculate TX/RX settings based on local and peer advertised
- * symmetric/asymmetric PAUSE capabilities.
- */
- flowctrl = mii_resolve_flowctrl_fdx(lcl_adv, rmt_adv);
- if (flowctrl & FLOW_CTRL_RX)
- *rx_pause = true;
- if (flowctrl & FLOW_CTRL_TX)
- *tx_pause = true;
-}
-EXPORT_SYMBOL(fman_get_pause_cfg);
-
-#define DTSEC_SUPPORTED \
- (SUPPORTED_10baseT_Half \
- | SUPPORTED_10baseT_Full \
- | SUPPORTED_100baseT_Half \
- | SUPPORTED_100baseT_Full \
- | SUPPORTED_Autoneg \
- | SUPPORTED_Pause \
- | SUPPORTED_Asym_Pause \
- | SUPPORTED_FIBRE \
- | SUPPORTED_MII)
-
static DEFINE_MUTEX(eth_lock);
-static const u16 phy2speed[] = {
- [PHY_INTERFACE_MODE_MII] = SPEED_100,
- [PHY_INTERFACE_MODE_GMII] = SPEED_1000,
- [PHY_INTERFACE_MODE_SGMII] = SPEED_1000,
- [PHY_INTERFACE_MODE_TBI] = SPEED_1000,
- [PHY_INTERFACE_MODE_RMII] = SPEED_100,
- [PHY_INTERFACE_MODE_RGMII] = SPEED_1000,
- [PHY_INTERFACE_MODE_RGMII_ID] = SPEED_1000,
- [PHY_INTERFACE_MODE_RGMII_RXID] = SPEED_1000,
- [PHY_INTERFACE_MODE_RGMII_TXID] = SPEED_1000,
- [PHY_INTERFACE_MODE_RTBI] = SPEED_1000,
- [PHY_INTERFACE_MODE_QSGMII] = SPEED_1000,
- [PHY_INTERFACE_MODE_XGMII] = SPEED_10000
-};
-
static struct platform_device *dpaa_eth_add_device(int fman_id,
struct mac_device *mac_dev)
{
@@ -263,8 +142,8 @@ static struct platform_device *dpaa_eth_add_device(int fman_id,
}
static const struct of_device_id mac_match[] = {
- { .compatible = "fsl,fman-dtsec", .data = dtsec_initialization },
- { .compatible = "fsl,fman-xgec", .data = tgec_initialization },
+ { .compatible = "fsl,fman-dtsec", .data = dtsec_initialization },
+ { .compatible = "fsl,fman-xgec", .data = tgec_initialization },
{ .compatible = "fsl,fman-memac", .data = memac_initialization },
{}
};
@@ -296,6 +175,7 @@ static int mac_probe(struct platform_device *_of_dev)
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
+ platform_set_drvdata(_of_dev, mac_dev);
/* Save private information */
mac_dev->priv = priv;
@@ -424,57 +304,21 @@ static int mac_probe(struct platform_device *_of_dev)
}
mac_dev->phy_if = phy_if;
- priv->speed = phy2speed[mac_dev->phy_if];
- params.max_speed = priv->speed;
- mac_dev->if_support = DTSEC_SUPPORTED;
- /* We don't support half-duplex in SGMII mode */
- if (mac_dev->phy_if == PHY_INTERFACE_MODE_SGMII)
- mac_dev->if_support &= ~(SUPPORTED_10baseT_Half |
- SUPPORTED_100baseT_Half);
-
- /* Gigabit support (no half-duplex) */
- if (params.max_speed == 1000)
- mac_dev->if_support |= SUPPORTED_1000baseT_Full;
-
- /* The 10G interface only supports one mode */
- if (mac_dev->phy_if == PHY_INTERFACE_MODE_XGMII)
- mac_dev->if_support = SUPPORTED_10000baseT_Full;
-
- /* Get the rest of the PHY information */
- mac_dev->phy_node = of_parse_phandle(mac_node, "phy-handle", 0);
-
- params.basex_if = false;
params.mac_id = priv->cell_index;
params.fm = (void *)priv->fman;
params.exception_cb = mac_exception;
params.event_cb = mac_exception;
err = init(mac_dev, mac_node, ¶ms);
- if (err < 0) {
- dev_err(dev, "mac_dev->init() = %d\n", err);
- of_node_put(mac_dev->phy_node);
- return err;
- }
-
- /* pause frame autonegotiation enabled */
- mac_dev->autoneg_pause = true;
-
- /* By intializing the values to false, force FMD to enable PAUSE frames
- * on RX and TX
- */
- mac_dev->rx_pause_req = true;
- mac_dev->tx_pause_req = true;
- mac_dev->rx_pause_active = false;
- mac_dev->tx_pause_active = false;
- err = fman_set_mac_active_pause(mac_dev, true, true);
if (err < 0)
- dev_err(dev, "fman_set_mac_active_pause() = %d\n", err);
+ return err;
if (!is_zero_ether_addr(mac_dev->addr))
dev_info(dev, "FMan MAC address: %pM\n", mac_dev->addr);
priv->eth_dev = dpaa_eth_add_device(fman_id, mac_dev);
if (IS_ERR(priv->eth_dev)) {
+ err = PTR_ERR(priv->eth_dev);
dev_err(dev, "failed to add Ethernet platform device for MAC %d\n",
priv->cell_index);
priv->eth_dev = NULL;
diff --git a/drivers/net/ethernet/freescale/fman/mac.h b/drivers/net/ethernet/freescale/fman/mac.h
index b95d384271bd..5bf03e1e279a 100644
--- a/drivers/net/ethernet/freescale/fman/mac.h
+++ b/drivers/net/ethernet/freescale/fman/mac.h
@@ -9,6 +9,7 @@
#include <linux/device.h>
#include <linux/if_ether.h>
#include <linux/phy.h>
+#include <linux/phylink.h>
#include <linux/list.h>
#include "fman_port.h"
@@ -24,32 +25,22 @@ struct mac_device {
struct device *dev;
u8 addr[ETH_ALEN];
struct fman_port *port[2];
- u32 if_support;
- struct phy_device *phy_dev;
+ struct phylink *phylink;
+ struct phylink_config phylink_config;
phy_interface_t phy_if;
- struct device_node *phy_node;
- struct net_device *net_dev;
- bool autoneg_pause;
- bool rx_pause_req;
- bool tx_pause_req;
- bool rx_pause_active;
- bool tx_pause_active;
bool promisc;
bool allmulti;
+ const struct phylink_mac_ops *phylink_ops;
int (*enable)(struct fman_mac *mac_dev);
void (*disable)(struct fman_mac *mac_dev);
- void (*adjust_link)(struct mac_device *mac_dev);
int (*set_promisc)(struct fman_mac *mac_dev, bool enable);
int (*change_addr)(struct fman_mac *mac_dev, const enet_addr_t *enet_addr);
int (*set_allmulti)(struct fman_mac *mac_dev, bool enable);
int (*set_tstamp)(struct fman_mac *mac_dev, bool enable);
int (*set_multi)(struct net_device *net_dev,
struct mac_device *mac_dev);
- int (*set_rx_pause)(struct fman_mac *mac_dev, bool en);
- int (*set_tx_pause)(struct fman_mac *mac_dev, u8 priority,
- u16 pause_time, u16 thresh_time);
int (*set_exception)(struct fman_mac *mac_dev,
enum fman_mac_exceptions exception, bool enable);
int (*add_hash_mac_addr)(struct fman_mac *mac_dev,
@@ -63,6 +54,12 @@ struct mac_device {
struct mac_priv_s *priv;
};
+static inline struct mac_device
+*fman_config_to_mac(struct phylink_config *config)
+{
+ return container_of(config, struct mac_device, phylink_config);
+}
+
struct dpaa_eth_data {
struct mac_device *mac_dev;
int mac_hw_id;
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 41/47] [RFT] net: dpaa: Convert to phylink
2022-07-15 21:59 ` [PATCH net-next v3 41/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
@ 2022-07-16 21:27 ` kernel test robot
0 siblings, 0 replies; 123+ messages in thread
From: kernel test robot @ 2022-07-16 21:27 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: kbuild-all, Paolo Abeni, Eric Dumazet, linux-arm-kernel,
Russell King, linux-kernel, Sean Anderson
Hi Sean,
I love your patch! Perhaps something to improve:
[auto build test WARNING on net-next/master]
url: https://github.com/intel-lab-lkp/linux/commits/Sean-Anderson/net-dpaa-Convert-to-phylink/20220717-002036
base: https://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git 2acd1022549e210edc4cfc9fc65b07b88751f0d9
config: powerpc-allmodconfig (https://download.01.org/0day-ci/archive/20220717/202207170518.RygxqhFI-lkp@intel.com/config)
compiler: powerpc-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/4411e66d2bb3fe21094f63ed67d2c2ebce69eaee
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Sean-Anderson/net-dpaa-Convert-to-phylink/20220717-002036
git checkout 4411e66d2bb3fe21094f63ed67d2c2ebce69eaee
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=powerpc SHELL=/bin/bash drivers/net/ethernet/freescale/fman/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
drivers/net/ethernet/freescale/fman/fman_dtsec.c: In function 'init.constprop':
>> drivers/net/ethernet/freescale/fman/fman_dtsec.c:368:21: warning: 'tmp' is used uninitialized [-Wuninitialized]
368 | tmp |= cfg->tx_pause_time;
| ~~~~^~~~~~~~~~~~~~~~~~~~~
drivers/net/ethernet/freescale/fman/fman_dtsec.c:360:13: note: 'tmp' was declared here
360 | u32 tmp;
| ^~~
vim +/tmp +368 drivers/net/ethernet/freescale/fman/fman_dtsec.c
6b995bdefc10b4 Madalin Bucur 2020-03-05 354
57ba4c9b56d898 Igal Liberman 2015-12-21 355 static int init(struct dtsec_regs __iomem *regs, struct dtsec_cfg *cfg,
6b995bdefc10b4 Madalin Bucur 2020-03-05 356 phy_interface_t iface, u16 iface_speed, u64 addr,
57ba4c9b56d898 Igal Liberman 2015-12-21 357 u32 exception_mask, u8 tbi_addr)
57ba4c9b56d898 Igal Liberman 2015-12-21 358 {
6b995bdefc10b4 Madalin Bucur 2020-03-05 359 enet_addr_t eth_addr;
57ba4c9b56d898 Igal Liberman 2015-12-21 360 u32 tmp;
6b995bdefc10b4 Madalin Bucur 2020-03-05 361 int i;
57ba4c9b56d898 Igal Liberman 2015-12-21 362
57ba4c9b56d898 Igal Liberman 2015-12-21 363 /* Soft reset */
57ba4c9b56d898 Igal Liberman 2015-12-21 364 iowrite32be(MACCFG1_SOFT_RESET, ®s->maccfg1);
57ba4c9b56d898 Igal Liberman 2015-12-21 365 iowrite32be(0, ®s->maccfg1);
57ba4c9b56d898 Igal Liberman 2015-12-21 366
57ba4c9b56d898 Igal Liberman 2015-12-21 367 if (cfg->tx_pause_time)
57ba4c9b56d898 Igal Liberman 2015-12-21 @368 tmp |= cfg->tx_pause_time;
57ba4c9b56d898 Igal Liberman 2015-12-21 369 if (cfg->tx_pause_time_extd)
57ba4c9b56d898 Igal Liberman 2015-12-21 370 tmp |= cfg->tx_pause_time_extd << PTV_PTE_SHIFT;
57ba4c9b56d898 Igal Liberman 2015-12-21 371 iowrite32be(tmp, ®s->ptv);
57ba4c9b56d898 Igal Liberman 2015-12-21 372
57ba4c9b56d898 Igal Liberman 2015-12-21 373 tmp = 0;
57ba4c9b56d898 Igal Liberman 2015-12-21 374 tmp |= (cfg->rx_prepend << RCTRL_PAL_SHIFT) & RCTRL_PAL_MASK;
57ba4c9b56d898 Igal Liberman 2015-12-21 375 /* Accept short frames */
57ba4c9b56d898 Igal Liberman 2015-12-21 376 tmp |= RCTRL_RSF;
57ba4c9b56d898 Igal Liberman 2015-12-21 377
57ba4c9b56d898 Igal Liberman 2015-12-21 378 iowrite32be(tmp, ®s->rctrl);
57ba4c9b56d898 Igal Liberman 2015-12-21 379
57ba4c9b56d898 Igal Liberman 2015-12-21 380 /* Assign a Phy Address to the TBI (TBIPA).
57ba4c9b56d898 Igal Liberman 2015-12-21 381 * Done also in cases where TBI is not selected to avoid conflict with
57ba4c9b56d898 Igal Liberman 2015-12-21 382 * the external PHY's Physical address
57ba4c9b56d898 Igal Liberman 2015-12-21 383 */
57ba4c9b56d898 Igal Liberman 2015-12-21 384 iowrite32be(tbi_addr, ®s->tbipa);
57ba4c9b56d898 Igal Liberman 2015-12-21 385
57ba4c9b56d898 Igal Liberman 2015-12-21 386 iowrite32be(0, ®s->tmr_ctrl);
57ba4c9b56d898 Igal Liberman 2015-12-21 387
57ba4c9b56d898 Igal Liberman 2015-12-21 388 if (cfg->ptp_tsu_en) {
57ba4c9b56d898 Igal Liberman 2015-12-21 389 tmp = 0;
57ba4c9b56d898 Igal Liberman 2015-12-21 390 tmp |= TMR_PEVENT_TSRE;
57ba4c9b56d898 Igal Liberman 2015-12-21 391 iowrite32be(tmp, ®s->tmr_pevent);
57ba4c9b56d898 Igal Liberman 2015-12-21 392
57ba4c9b56d898 Igal Liberman 2015-12-21 393 if (cfg->ptp_exception_en) {
57ba4c9b56d898 Igal Liberman 2015-12-21 394 tmp = 0;
57ba4c9b56d898 Igal Liberman 2015-12-21 395 tmp |= TMR_PEMASK_TSREEN;
57ba4c9b56d898 Igal Liberman 2015-12-21 396 iowrite32be(tmp, ®s->tmr_pemask);
57ba4c9b56d898 Igal Liberman 2015-12-21 397 }
57ba4c9b56d898 Igal Liberman 2015-12-21 398 }
57ba4c9b56d898 Igal Liberman 2015-12-21 399
57ba4c9b56d898 Igal Liberman 2015-12-21 400 tmp = 0;
57ba4c9b56d898 Igal Liberman 2015-12-21 401 tmp |= MACCFG1_RX_FLOW;
57ba4c9b56d898 Igal Liberman 2015-12-21 402 tmp |= MACCFG1_TX_FLOW;
57ba4c9b56d898 Igal Liberman 2015-12-21 403 iowrite32be(tmp, ®s->maccfg1);
57ba4c9b56d898 Igal Liberman 2015-12-21 404
57ba4c9b56d898 Igal Liberman 2015-12-21 405 tmp = 0;
57ba4c9b56d898 Igal Liberman 2015-12-21 406
57ba4c9b56d898 Igal Liberman 2015-12-21 407 tmp |= (cfg->preamble_len << MACCFG2_PREAMBLE_LENGTH_SHIFT) &
57ba4c9b56d898 Igal Liberman 2015-12-21 408 MACCFG2_PREAMBLE_LENGTH_MASK;
57ba4c9b56d898 Igal Liberman 2015-12-21 409 if (cfg->tx_pad_crc)
57ba4c9b56d898 Igal Liberman 2015-12-21 410 tmp |= MACCFG2_PAD_CRC_EN;
57ba4c9b56d898 Igal Liberman 2015-12-21 411 iowrite32be(tmp, ®s->maccfg2);
57ba4c9b56d898 Igal Liberman 2015-12-21 412
57ba4c9b56d898 Igal Liberman 2015-12-21 413 tmp = (((cfg->non_back_to_back_ipg1 <<
57ba4c9b56d898 Igal Liberman 2015-12-21 414 IPGIFG_NON_BACK_TO_BACK_IPG_1_SHIFT)
57ba4c9b56d898 Igal Liberman 2015-12-21 415 & IPGIFG_NON_BACK_TO_BACK_IPG_1)
57ba4c9b56d898 Igal Liberman 2015-12-21 416 | ((cfg->non_back_to_back_ipg2 <<
57ba4c9b56d898 Igal Liberman 2015-12-21 417 IPGIFG_NON_BACK_TO_BACK_IPG_2_SHIFT)
57ba4c9b56d898 Igal Liberman 2015-12-21 418 & IPGIFG_NON_BACK_TO_BACK_IPG_2)
57ba4c9b56d898 Igal Liberman 2015-12-21 419 | ((cfg->min_ifg_enforcement << IPGIFG_MIN_IFG_ENFORCEMENT_SHIFT)
57ba4c9b56d898 Igal Liberman 2015-12-21 420 & IPGIFG_MIN_IFG_ENFORCEMENT)
57ba4c9b56d898 Igal Liberman 2015-12-21 421 | (cfg->back_to_back_ipg & IPGIFG_BACK_TO_BACK_IPG));
57ba4c9b56d898 Igal Liberman 2015-12-21 422 iowrite32be(tmp, ®s->ipgifg);
57ba4c9b56d898 Igal Liberman 2015-12-21 423
57ba4c9b56d898 Igal Liberman 2015-12-21 424 tmp = 0;
57ba4c9b56d898 Igal Liberman 2015-12-21 425 tmp |= HAFDUP_EXCESS_DEFER;
57ba4c9b56d898 Igal Liberman 2015-12-21 426 tmp |= ((cfg->halfdup_retransmit << HAFDUP_RETRANSMISSION_MAX_SHIFT)
57ba4c9b56d898 Igal Liberman 2015-12-21 427 & HAFDUP_RETRANSMISSION_MAX);
57ba4c9b56d898 Igal Liberman 2015-12-21 428 tmp |= (cfg->halfdup_coll_window & HAFDUP_COLLISION_WINDOW);
57ba4c9b56d898 Igal Liberman 2015-12-21 429
57ba4c9b56d898 Igal Liberman 2015-12-21 430 iowrite32be(tmp, ®s->hafdup);
57ba4c9b56d898 Igal Liberman 2015-12-21 431
57ba4c9b56d898 Igal Liberman 2015-12-21 432 /* Initialize Maximum frame length */
57ba4c9b56d898 Igal Liberman 2015-12-21 433 iowrite32be(cfg->maximum_frame, ®s->maxfrm);
57ba4c9b56d898 Igal Liberman 2015-12-21 434
57ba4c9b56d898 Igal Liberman 2015-12-21 435 iowrite32be(0xffffffff, ®s->cam1);
57ba4c9b56d898 Igal Liberman 2015-12-21 436 iowrite32be(0xffffffff, ®s->cam2);
57ba4c9b56d898 Igal Liberman 2015-12-21 437
57ba4c9b56d898 Igal Liberman 2015-12-21 438 iowrite32be(exception_mask, ®s->imask);
57ba4c9b56d898 Igal Liberman 2015-12-21 439
57ba4c9b56d898 Igal Liberman 2015-12-21 440 iowrite32be(0xffffffff, ®s->ievent);
57ba4c9b56d898 Igal Liberman 2015-12-21 441
f3353b99022583 Madalin Bucur 2020-03-05 442 if (addr) {
6b995bdefc10b4 Madalin Bucur 2020-03-05 443 MAKE_ENET_ADDR_FROM_UINT64(addr, eth_addr);
766607570becbd Jakub Kicinski 2021-10-14 444 set_mac_address(regs, (const u8 *)eth_addr);
f3353b99022583 Madalin Bucur 2020-03-05 445 }
57ba4c9b56d898 Igal Liberman 2015-12-21 446
57ba4c9b56d898 Igal Liberman 2015-12-21 447 /* HASH */
57ba4c9b56d898 Igal Liberman 2015-12-21 448 for (i = 0; i < NUM_OF_HASH_REGS; i++) {
57ba4c9b56d898 Igal Liberman 2015-12-21 449 /* Initialize IADDRx */
57ba4c9b56d898 Igal Liberman 2015-12-21 450 iowrite32be(0, ®s->igaddr[i]);
57ba4c9b56d898 Igal Liberman 2015-12-21 451 /* Initialize GADDRx */
57ba4c9b56d898 Igal Liberman 2015-12-21 452 iowrite32be(0, ®s->gaddr[i]);
57ba4c9b56d898 Igal Liberman 2015-12-21 453 }
57ba4c9b56d898 Igal Liberman 2015-12-21 454
57ba4c9b56d898 Igal Liberman 2015-12-21 455 return 0;
57ba4c9b56d898 Igal Liberman 2015-12-21 456 }
57ba4c9b56d898 Igal Liberman 2015-12-21 457
--
0-DAY CI Kernel Test Service
https://01.org/lkp
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 42/47] powerpc: dts: qoriq: Add nodes for QSGMII PCSs
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (40 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 41/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:48 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 43/47] arm64: dts: layerscape: " Sean Anderson
` (5 subsequent siblings)
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Benjamin Herrenschmidt,
Krzysztof Kozlowski, Li Yang, Michael Ellerman, Paul Mackerras,
Rob Herring, Shawn Guo, devicetree, linuxppc-dev
Now that we actually read registers from QSGMII PCSs, it's important
that we have the correct address (instead of hoping that we're the MAC
with all the QSGMII PCSs on its bus). This adds nodes for the QSGMII
PCSs. They have the same addresses on all SoCs (e.g. if QSGMIIA is
present it's used for MACs 1 through 4).
Since the first QSGMII PCSs share an address with the SGMII and XFI
PCSs, we only add new nodes for PCSs 2-4. This avoids address conflicts
on the bus.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
Changes in v3:
- Add compatibles for QSGMII PCSs
- Split arm and powerpcs dts updates
Changes in v2:
- New
.../boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi | 3 ++-
arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi | 10 +++++++++-
.../boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi | 10 +++++++++-
arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi | 10 +++++++++-
arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi | 3 ++-
arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi | 10 +++++++++-
arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi | 10 +++++++++-
arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi | 10 +++++++++-
arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi | 3 ++-
arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi | 10 +++++++++-
arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi | 10 +++++++++-
arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi | 10 +++++++++-
arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi | 3 ++-
arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi | 10 +++++++++-
arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi | 10 +++++++++-
arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi | 10 +++++++++-
arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi | 3 ++-
arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi | 10 +++++++++-
18 files changed, 127 insertions(+), 18 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
index baa0c503e741..db169d630db3 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
@@ -55,7 +55,8 @@ ethernet@e0000 {
reg = <0xe0000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
ptp-timer = <&ptp_timer0>;
- pcsphy-handle = <&pcsphy0>;
+ pcsphy-handle = <&pcsphy0>, <&pcsphy0>;
+ pcs-names = "sgmii", "qsgmii";
};
mdio@e1000 {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
index 93095600e808..e80ad8675be8 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
@@ -52,7 +52,15 @@ ethernet@f0000 {
compatible = "fsl,fman-memac";
reg = <0xf0000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>;
- pcsphy-handle = <&pcsphy6>;
+ pcsphy-handle = <&pcsphy6>, <&qsgmiib_pcs2>, <&pcsphy6>;
+ pcs-names = "sgmii", "qsgmii", "xfi";
+ };
+
+ mdio@e9000 {
+ qsgmiib_pcs2: ethernet-pcs@2 {
+ compatible = "fsl,lynx-pcs";
+ reg = <2>;
+ };
};
mdio@f1000 {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
index ff4bd38f0645..6a6f51842ad5 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
@@ -55,7 +55,15 @@ ethernet@e2000 {
reg = <0xe2000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
ptp-timer = <&ptp_timer0>;
- pcsphy-handle = <&pcsphy1>;
+ pcsphy-handle = <&pcsphy1>, <&qsgmiia_pcs1>;
+ pcs-names = "sgmii", "qsgmii";
+ };
+
+ mdio@e1000 {
+ qsgmiia_pcs1: ethernet-pcs@1 {
+ compatible = "fsl,lynx-pcs";
+ reg = <1>;
+ };
};
mdio@e3000 {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
index 1fa38ed6f59e..543da5493e40 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
@@ -52,7 +52,15 @@ ethernet@f2000 {
compatible = "fsl,fman-memac";
reg = <0xf2000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>;
- pcsphy-handle = <&pcsphy7>;
+ pcsphy-handle = <&pcsphy7>, <&qsgmiib_pcs3>, <&pcsphy7>;
+ pcs-names = "sgmii", "qsgmii", "xfi";
+ };
+
+ mdio@e9000 {
+ qsgmiib_pcs3: ethernet-pcs@3 {
+ compatible = "fsl,lynx-pcs";
+ reg = <3>;
+ };
};
mdio@f3000 {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
index a8cc9780c0c4..ce76725e6eb2 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
@@ -51,7 +51,8 @@ ethernet@e0000 {
reg = <0xe0000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
ptp-timer = <&ptp_timer0>;
- pcsphy-handle = <&pcsphy0>;
+ pcsphy-handle = <&pcsphy0>, <&pcsphy0>;
+ pcs-names = "sgmii", "qsgmii";
};
mdio@e1000 {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
index 8b8bd70c9382..f3af67df4767 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
@@ -51,7 +51,15 @@ ethernet@e2000 {
reg = <0xe2000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
ptp-timer = <&ptp_timer0>;
- pcsphy-handle = <&pcsphy1>;
+ pcsphy-handle = <&pcsphy1>, <&qsgmiia_pcs1>;
+ pcs-names = "sgmii", "qsgmii";
+ };
+
+ mdio@e1000 {
+ qsgmiia_pcs1: ethernet-pcs@1 {
+ compatible = "fsl,lynx-pcs";
+ reg = <1>;
+ };
};
mdio@e3000 {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
index 619c880b54d8..f6d74de84bfe 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
@@ -51,7 +51,15 @@ ethernet@e4000 {
reg = <0xe4000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>;
ptp-timer = <&ptp_timer0>;
- pcsphy-handle = <&pcsphy2>;
+ pcsphy-handle = <&pcsphy2>, <&qsgmiia_pcs2>;
+ pcs-names = "sgmii", "qsgmii";
+ };
+
+ mdio@e1000 {
+ qsgmiia_pcs2: ethernet-pcs@2 {
+ compatible = "fsl,lynx-pcs";
+ reg = <2>;
+ };
};
mdio@e5000 {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
index d7ebb73a400d..6e091d8ae9e2 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
@@ -51,7 +51,15 @@ ethernet@e6000 {
reg = <0xe6000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>;
ptp-timer = <&ptp_timer0>;
- pcsphy-handle = <&pcsphy3>;
+ pcsphy-handle = <&pcsphy3>, <&qsgmiia_pcs3>;
+ pcs-names = "sgmii", "qsgmii";
+ };
+
+ mdio@e1000 {
+ qsgmiia_pcs3: ethernet-pcs@3 {
+ compatible = "fsl,lynx-pcs";
+ reg = <3>;
+ };
};
mdio@e7000 {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
index b151d696a069..e2174c0fc841 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
@@ -51,7 +51,8 @@ ethernet@e8000 {
reg = <0xe8000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;
ptp-timer = <&ptp_timer0>;
- pcsphy-handle = <&pcsphy4>;
+ pcsphy-handle = <&pcsphy4>, <&pcsphy4>;
+ pcs-names = "sgmii", "qsgmii";
};
mdio@e9000 {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
index adc0ae0013a3..9106815bd63e 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
@@ -51,7 +51,15 @@ ethernet@ea000 {
reg = <0xea000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x0d &fman0_tx_0x2d>;
ptp-timer = <&ptp_timer0>;
- pcsphy-handle = <&pcsphy5>;
+ pcsphy-handle = <&pcsphy5>, <&qsgmiib_pcs1>;
+ pcs-names = "sgmii", "qsgmii";
+ };
+
+ mdio@e9000 {
+ qsgmiib_pcs1: ethernet-pcs@1 {
+ compatible = "fsl,lynx-pcs";
+ reg = <1>;
+ };
};
mdio@eb000 {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
index 435047e0e250..a3c1538dfda1 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
@@ -52,7 +52,15 @@ ethernet@f0000 {
compatible = "fsl,fman-memac";
reg = <0xf0000 0x1000>;
fsl,fman-ports = <&fman1_rx_0x10 &fman1_tx_0x30>;
- pcsphy-handle = <&pcsphy14>;
+ pcsphy-handle = <&pcsphy14>, <&qsgmiid_pcs2>, <&pcsphy14>;
+ pcs-names = "sgmii", "qsgmii", "xfi";
+ };
+
+ mdio@e9000 {
+ qsgmiid_pcs2: ethernet-pcs@2 {
+ compatible = "fsl,lynx-pcs";
+ reg = <2>;
+ };
};
mdio@f1000 {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
index c098657cca0a..c024517e70d6 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
@@ -52,7 +52,15 @@ ethernet@f2000 {
compatible = "fsl,fman-memac";
reg = <0xf2000 0x1000>;
fsl,fman-ports = <&fman1_rx_0x11 &fman1_tx_0x31>;
- pcsphy-handle = <&pcsphy15>;
+ pcsphy-handle = <&pcsphy15>, <&qsgmiid_pcs3>, <&pcsphy15>;
+ pcs-names = "sgmii", "qsgmii", "xfi";
+ };
+
+ mdio@e9000 {
+ qsgmiid_pcs3: ethernet-pcs@3 {
+ compatible = "fsl,lynx-pcs";
+ reg = <3>;
+ };
};
mdio@f3000 {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
index 9d06824815f3..16fb299f615a 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
@@ -51,7 +51,8 @@ ethernet@e0000 {
reg = <0xe0000 0x1000>;
fsl,fman-ports = <&fman1_rx_0x08 &fman1_tx_0x28>;
ptp-timer = <&ptp_timer1>;
- pcsphy-handle = <&pcsphy8>;
+ pcsphy-handle = <&pcsphy8>, <&pcsphy8>;
+ pcs-names = "sgmii", "qsgmii";
};
mdio@e1000 {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
index 70e947730c4b..75cecbef8469 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
@@ -51,7 +51,15 @@ ethernet@e2000 {
reg = <0xe2000 0x1000>;
fsl,fman-ports = <&fman1_rx_0x09 &fman1_tx_0x29>;
ptp-timer = <&ptp_timer1>;
- pcsphy-handle = <&pcsphy9>;
+ pcsphy-handle = <&pcsphy9>, <&qsgmiic_pcs1>;
+ pcs-names = "sgmii", "qsgmii";
+ };
+
+ mdio@e1000 {
+ qsgmiic_pcs1: ethernet-pcs@1 {
+ compatible = "fsl,lynx-pcs";
+ reg = <1>;
+ };
};
mdio@e3000 {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
index ad96e6529595..98c1d27f17e7 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
@@ -51,7 +51,15 @@ ethernet@e4000 {
reg = <0xe4000 0x1000>;
fsl,fman-ports = <&fman1_rx_0x0a &fman1_tx_0x2a>;
ptp-timer = <&ptp_timer1>;
- pcsphy-handle = <&pcsphy10>;
+ pcsphy-handle = <&pcsphy10>, <&qsgmiic_pcs2>;
+ pcs-names = "sgmii", "qsgmii";
+ };
+
+ mdio@e1000 {
+ qsgmiic_pcs2: ethernet-pcs@2 {
+ compatible = "fsl,lynx-pcs";
+ reg = <2>;
+ };
};
mdio@e5000 {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
index 034bc4b71f7a..203a00036f17 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
@@ -51,7 +51,15 @@ ethernet@e6000 {
reg = <0xe6000 0x1000>;
fsl,fman-ports = <&fman1_rx_0x0b &fman1_tx_0x2b>;
ptp-timer = <&ptp_timer1>;
- pcsphy-handle = <&pcsphy11>;
+ pcsphy-handle = <&pcsphy11>, <&qsgmiic_pcs3>;
+ pcs-names = "sgmii", "qsgmii";
+ };
+
+ mdio@e1000 {
+ qsgmiic_pcs3: ethernet-pcs@3 {
+ compatible = "fsl,lynx-pcs";
+ reg = <3>;
+ };
};
mdio@e7000 {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
index 93ca23d82b39..9366935ebc02 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
@@ -51,7 +51,8 @@ ethernet@e8000 {
reg = <0xe8000 0x1000>;
fsl,fman-ports = <&fman1_rx_0x0c &fman1_tx_0x2c>;
ptp-timer = <&ptp_timer1>;
- pcsphy-handle = <&pcsphy12>;
+ pcsphy-handle = <&pcsphy12>, <&pcsphy12>;
+ pcs-names = "sgmii", "qsgmii";
};
mdio@e9000 {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
index 23b3117a2fd2..39f7c6133017 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
@@ -51,7 +51,15 @@ ethernet@ea000 {
reg = <0xea000 0x1000>;
fsl,fman-ports = <&fman1_rx_0x0d &fman1_tx_0x2d>;
ptp-timer = <&ptp_timer1>;
- pcsphy-handle = <&pcsphy13>;
+ pcsphy-handle = <&pcsphy13>, <&qsgmiid_pcs1>;
+ pcs-names = "sgmii", "qsgmii";
+ };
+
+ mdio@e9000 {
+ qsgmiid_pcs1: ethernet-pcs@1 {
+ compatible = "fsl,lynx-pcs";
+ reg = <1>;
+ };
};
mdio@eb000 {
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 42/47] powerpc: dts: qoriq: Add nodes for QSGMII PCSs
2022-07-15 21:59 ` [PATCH net-next v3 42/47] powerpc: dts: qoriq: Add nodes for QSGMII PCSs Sean Anderson
@ 2022-07-21 13:48 ` Camelia Alexandra Groza
2022-07-21 17:51 ` Sean Anderson
0 siblings, 1 reply; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 13:48 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: devicetree, Leo Li, Sean Anderson, linuxppc-dev, Russell King,
linux-kernel, Eric Dumazet, Rob Herring, Paul Mackerras,
Krzysztof Kozlowski, Paolo Abeni, Shawn Guo, linux-arm-kernel
> -----Original Message-----
> From: Linuxppc-dev <linuxppc-dev-
> bounces+camelia.groza=nxp.com@lists.ozlabs.org> On Behalf Of Sean
> Anderson
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: devicetree@vger.kernel.org; Leo Li <leoyang.li@nxp.com>; Sean
> Anderson <sean.anderson@seco.com>; linuxppc-dev@lists.ozlabs.org;
> Russell King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Eric
> Dumazet <edumazet@google.com>; Rob Herring <robh+dt@kernel.org>;
> Paul Mackerras <paulus@samba.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Paolo Abeni <pabeni@redhat.com>;
> Shawn Guo <shawnguo@kernel.org>; linux-arm-kernel@lists.infradead.org
> Subject: [PATCH net-next v3 42/47] powerpc: dts: qoriq: Add nodes for
> QSGMII PCSs
>
> Now that we actually read registers from QSGMII PCSs, it's important
> that we have the correct address (instead of hoping that we're the MAC
> with all the QSGMII PCSs on its bus). This adds nodes for the QSGMII
> PCSs. They have the same addresses on all SoCs (e.g. if QSGMIIA is
> present it's used for MACs 1 through 4).
>
> Since the first QSGMII PCSs share an address with the SGMII and XFI
> PCSs, we only add new nodes for PCSs 2-4. This avoids address conflicts
> on the bus.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
MAC1 and MAC2 can be XFI on T2080. This needs to be reflected in qoriq-fman3-0-1g-0.dtsi
and qoriq-fman3-0-1g-1.dtsi
The two associated netdevs fail to probe on a T2080RDB without "xfi" added to the pcs-names:
fsl_dpaa_mac ffe4e0000.ethernet (unnamed net_device) (uninitialized): failed to validate link configuration for in-band status
fsl_dpaa_mac ffe4e0000.ethernet: error -EINVAL: Could not create phylink
fsl_dpa: probe of dpaa-ethernet.0 failed with error -22
> ---
>
> Changes in v3:
> - Add compatibles for QSGMII PCSs
> - Split arm and powerpcs dts updates
>
> Changes in v2:
> - New
>
> .../boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi | 3 ++-
> arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi | 10 +++++++++-
> .../boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi | 10 +++++++++-
> arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi | 10 +++++++++-
> arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi | 3 ++-
> arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi | 10 +++++++++-
> arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi | 10 +++++++++-
> arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi | 10 +++++++++-
> arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi | 3 ++-
> arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi | 10 +++++++++-
> arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi | 10 +++++++++-
> arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi | 10 +++++++++-
> arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi | 3 ++-
> arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi | 10 +++++++++-
> arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi | 10 +++++++++-
> arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi | 10 +++++++++-
> arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi | 3 ++-
> arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi | 10 +++++++++-
> 18 files changed, 127 insertions(+), 18 deletions(-)
>
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
> index baa0c503e741..db169d630db3 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
> @@ -55,7 +55,8 @@ ethernet@e0000 {
> reg = <0xe0000 0x1000>;
> fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
> ptp-timer = <&ptp_timer0>;
> - pcsphy-handle = <&pcsphy0>;
> + pcsphy-handle = <&pcsphy0>, <&pcsphy0>;
> + pcs-names = "sgmii", "qsgmii";
> };
>
> mdio@e1000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
> index 93095600e808..e80ad8675be8 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
> @@ -52,7 +52,15 @@ ethernet@f0000 {
> compatible = "fsl,fman-memac";
> reg = <0xf0000 0x1000>;
> fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>;
> - pcsphy-handle = <&pcsphy6>;
> + pcsphy-handle = <&pcsphy6>, <&qsgmiib_pcs2>,
> <&pcsphy6>;
> + pcs-names = "sgmii", "qsgmii", "xfi";
> + };
> +
> + mdio@e9000 {
> + qsgmiib_pcs2: ethernet-pcs@2 {
> + compatible = "fsl,lynx-pcs";
> + reg = <2>;
> + };
> };
>
> mdio@f1000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
> index ff4bd38f0645..6a6f51842ad5 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
> @@ -55,7 +55,15 @@ ethernet@e2000 {
> reg = <0xe2000 0x1000>;
> fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
> ptp-timer = <&ptp_timer0>;
> - pcsphy-handle = <&pcsphy1>;
> + pcsphy-handle = <&pcsphy1>, <&qsgmiia_pcs1>;
> + pcs-names = "sgmii", "qsgmii";
> + };
> +
> + mdio@e1000 {
> + qsgmiia_pcs1: ethernet-pcs@1 {
> + compatible = "fsl,lynx-pcs";
> + reg = <1>;
> + };
> };
>
> mdio@e3000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
> index 1fa38ed6f59e..543da5493e40 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
> @@ -52,7 +52,15 @@ ethernet@f2000 {
> compatible = "fsl,fman-memac";
> reg = <0xf2000 0x1000>;
> fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>;
> - pcsphy-handle = <&pcsphy7>;
> + pcsphy-handle = <&pcsphy7>, <&qsgmiib_pcs3>,
> <&pcsphy7>;
> + pcs-names = "sgmii", "qsgmii", "xfi";
> + };
> +
> + mdio@e9000 {
> + qsgmiib_pcs3: ethernet-pcs@3 {
> + compatible = "fsl,lynx-pcs";
> + reg = <3>;
> + };
> };
>
> mdio@f3000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
> index a8cc9780c0c4..ce76725e6eb2 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
> @@ -51,7 +51,8 @@ ethernet@e0000 {
> reg = <0xe0000 0x1000>;
> fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
> ptp-timer = <&ptp_timer0>;
> - pcsphy-handle = <&pcsphy0>;
> + pcsphy-handle = <&pcsphy0>, <&pcsphy0>;
> + pcs-names = "sgmii", "qsgmii";
> };
>
> mdio@e1000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
> index 8b8bd70c9382..f3af67df4767 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
> @@ -51,7 +51,15 @@ ethernet@e2000 {
> reg = <0xe2000 0x1000>;
> fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
> ptp-timer = <&ptp_timer0>;
> - pcsphy-handle = <&pcsphy1>;
> + pcsphy-handle = <&pcsphy1>, <&qsgmiia_pcs1>;
> + pcs-names = "sgmii", "qsgmii";
> + };
> +
> + mdio@e1000 {
> + qsgmiia_pcs1: ethernet-pcs@1 {
> + compatible = "fsl,lynx-pcs";
> + reg = <1>;
> + };
> };
>
> mdio@e3000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
> index 619c880b54d8..f6d74de84bfe 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
> @@ -51,7 +51,15 @@ ethernet@e4000 {
> reg = <0xe4000 0x1000>;
> fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>;
> ptp-timer = <&ptp_timer0>;
> - pcsphy-handle = <&pcsphy2>;
> + pcsphy-handle = <&pcsphy2>, <&qsgmiia_pcs2>;
> + pcs-names = "sgmii", "qsgmii";
> + };
> +
> + mdio@e1000 {
> + qsgmiia_pcs2: ethernet-pcs@2 {
> + compatible = "fsl,lynx-pcs";
> + reg = <2>;
> + };
> };
>
> mdio@e5000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
> index d7ebb73a400d..6e091d8ae9e2 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
> @@ -51,7 +51,15 @@ ethernet@e6000 {
> reg = <0xe6000 0x1000>;
> fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>;
> ptp-timer = <&ptp_timer0>;
> - pcsphy-handle = <&pcsphy3>;
> + pcsphy-handle = <&pcsphy3>, <&qsgmiia_pcs3>;
> + pcs-names = "sgmii", "qsgmii";
> + };
> +
> + mdio@e1000 {
> + qsgmiia_pcs3: ethernet-pcs@3 {
> + compatible = "fsl,lynx-pcs";
> + reg = <3>;
> + };
> };
>
> mdio@e7000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
> index b151d696a069..e2174c0fc841 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
> @@ -51,7 +51,8 @@ ethernet@e8000 {
> reg = <0xe8000 0x1000>;
> fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;
> ptp-timer = <&ptp_timer0>;
> - pcsphy-handle = <&pcsphy4>;
> + pcsphy-handle = <&pcsphy4>, <&pcsphy4>;
> + pcs-names = "sgmii", "qsgmii";
> };
>
> mdio@e9000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
> index adc0ae0013a3..9106815bd63e 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
> @@ -51,7 +51,15 @@ ethernet@ea000 {
> reg = <0xea000 0x1000>;
> fsl,fman-ports = <&fman0_rx_0x0d &fman0_tx_0x2d>;
> ptp-timer = <&ptp_timer0>;
> - pcsphy-handle = <&pcsphy5>;
> + pcsphy-handle = <&pcsphy5>, <&qsgmiib_pcs1>;
> + pcs-names = "sgmii", "qsgmii";
> + };
> +
> + mdio@e9000 {
> + qsgmiib_pcs1: ethernet-pcs@1 {
> + compatible = "fsl,lynx-pcs";
> + reg = <1>;
> + };
> };
>
> mdio@eb000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
> index 435047e0e250..a3c1538dfda1 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
> @@ -52,7 +52,15 @@ ethernet@f0000 {
> compatible = "fsl,fman-memac";
> reg = <0xf0000 0x1000>;
> fsl,fman-ports = <&fman1_rx_0x10 &fman1_tx_0x30>;
> - pcsphy-handle = <&pcsphy14>;
> + pcsphy-handle = <&pcsphy14>, <&qsgmiid_pcs2>,
> <&pcsphy14>;
> + pcs-names = "sgmii", "qsgmii", "xfi";
> + };
> +
> + mdio@e9000 {
> + qsgmiid_pcs2: ethernet-pcs@2 {
> + compatible = "fsl,lynx-pcs";
> + reg = <2>;
> + };
> };
>
> mdio@f1000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
> index c098657cca0a..c024517e70d6 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
> @@ -52,7 +52,15 @@ ethernet@f2000 {
> compatible = "fsl,fman-memac";
> reg = <0xf2000 0x1000>;
> fsl,fman-ports = <&fman1_rx_0x11 &fman1_tx_0x31>;
> - pcsphy-handle = <&pcsphy15>;
> + pcsphy-handle = <&pcsphy15>, <&qsgmiid_pcs3>,
> <&pcsphy15>;
> + pcs-names = "sgmii", "qsgmii", "xfi";
> + };
> +
> + mdio@e9000 {
> + qsgmiid_pcs3: ethernet-pcs@3 {
> + compatible = "fsl,lynx-pcs";
> + reg = <3>;
> + };
> };
>
> mdio@f3000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
> index 9d06824815f3..16fb299f615a 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
> @@ -51,7 +51,8 @@ ethernet@e0000 {
> reg = <0xe0000 0x1000>;
> fsl,fman-ports = <&fman1_rx_0x08 &fman1_tx_0x28>;
> ptp-timer = <&ptp_timer1>;
> - pcsphy-handle = <&pcsphy8>;
> + pcsphy-handle = <&pcsphy8>, <&pcsphy8>;
> + pcs-names = "sgmii", "qsgmii";
> };
>
> mdio@e1000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
> index 70e947730c4b..75cecbef8469 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
> @@ -51,7 +51,15 @@ ethernet@e2000 {
> reg = <0xe2000 0x1000>;
> fsl,fman-ports = <&fman1_rx_0x09 &fman1_tx_0x29>;
> ptp-timer = <&ptp_timer1>;
> - pcsphy-handle = <&pcsphy9>;
> + pcsphy-handle = <&pcsphy9>, <&qsgmiic_pcs1>;
> + pcs-names = "sgmii", "qsgmii";
> + };
> +
> + mdio@e1000 {
> + qsgmiic_pcs1: ethernet-pcs@1 {
> + compatible = "fsl,lynx-pcs";
> + reg = <1>;
> + };
> };
>
> mdio@e3000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
> index ad96e6529595..98c1d27f17e7 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
> @@ -51,7 +51,15 @@ ethernet@e4000 {
> reg = <0xe4000 0x1000>;
> fsl,fman-ports = <&fman1_rx_0x0a &fman1_tx_0x2a>;
> ptp-timer = <&ptp_timer1>;
> - pcsphy-handle = <&pcsphy10>;
> + pcsphy-handle = <&pcsphy10>, <&qsgmiic_pcs2>;
> + pcs-names = "sgmii", "qsgmii";
> + };
> +
> + mdio@e1000 {
> + qsgmiic_pcs2: ethernet-pcs@2 {
> + compatible = "fsl,lynx-pcs";
> + reg = <2>;
> + };
> };
>
> mdio@e5000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
> index 034bc4b71f7a..203a00036f17 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
> @@ -51,7 +51,15 @@ ethernet@e6000 {
> reg = <0xe6000 0x1000>;
> fsl,fman-ports = <&fman1_rx_0x0b &fman1_tx_0x2b>;
> ptp-timer = <&ptp_timer1>;
> - pcsphy-handle = <&pcsphy11>;
> + pcsphy-handle = <&pcsphy11>, <&qsgmiic_pcs3>;
> + pcs-names = "sgmii", "qsgmii";
> + };
> +
> + mdio@e1000 {
> + qsgmiic_pcs3: ethernet-pcs@3 {
> + compatible = "fsl,lynx-pcs";
> + reg = <3>;
> + };
> };
>
> mdio@e7000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
> index 93ca23d82b39..9366935ebc02 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
> @@ -51,7 +51,8 @@ ethernet@e8000 {
> reg = <0xe8000 0x1000>;
> fsl,fman-ports = <&fman1_rx_0x0c &fman1_tx_0x2c>;
> ptp-timer = <&ptp_timer1>;
> - pcsphy-handle = <&pcsphy12>;
> + pcsphy-handle = <&pcsphy12>, <&pcsphy12>;
> + pcs-names = "sgmii", "qsgmii";
> };
>
> mdio@e9000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
> index 23b3117a2fd2..39f7c6133017 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
> @@ -51,7 +51,15 @@ ethernet@ea000 {
> reg = <0xea000 0x1000>;
> fsl,fman-ports = <&fman1_rx_0x0d &fman1_tx_0x2d>;
> ptp-timer = <&ptp_timer1>;
> - pcsphy-handle = <&pcsphy13>;
> + pcsphy-handle = <&pcsphy13>, <&qsgmiid_pcs1>;
> + pcs-names = "sgmii", "qsgmii";
> + };
> +
> + mdio@e9000 {
> + qsgmiid_pcs1: ethernet-pcs@1 {
> + compatible = "fsl,lynx-pcs";
> + reg = <1>;
> + };
> };
>
> mdio@eb000 {
> --
> 2.35.1.1320.gc452695387.dirty
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 42/47] powerpc: dts: qoriq: Add nodes for QSGMII PCSs
2022-07-21 13:48 ` Camelia Alexandra Groza
@ 2022-07-21 17:51 ` Sean Anderson
0 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-21 17:51 UTC (permalink / raw)
To: Camelia Alexandra Groza, David S . Miller, Jakub Kicinski,
Madalin Bucur, netdev
Cc: devicetree, Leo Li, linuxppc-dev, Russell King, linux-kernel,
Eric Dumazet, Rob Herring, Paul Mackerras, Krzysztof Kozlowski,
Paolo Abeni, Shawn Guo, linux-arm-kernel
On 7/21/22 9:48 AM, Camelia Alexandra Groza wrote:
>> -----Original Message-----
>> From: Linuxppc-dev <linuxppc-dev-
>> bounces+camelia.groza=nxp.com@lists.ozlabs.org> On Behalf Of Sean
>> Anderson
>> Sent: Saturday, July 16, 2022 1:00
>> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
>> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
>> netdev@vger.kernel.org
>> Cc: devicetree@vger.kernel.org; Leo Li <leoyang.li@nxp.com>; Sean
>> Anderson <sean.anderson@seco.com>; linuxppc-dev@lists.ozlabs.org;
>> Russell King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Eric
>> Dumazet <edumazet@google.com>; Rob Herring <robh+dt@kernel.org>;
>> Paul Mackerras <paulus@samba.org>; Krzysztof Kozlowski
>> <krzysztof.kozlowski+dt@linaro.org>; Paolo Abeni <pabeni@redhat.com>;
>> Shawn Guo <shawnguo@kernel.org>; linux-arm-kernel@lists.infradead.org
>> Subject: [PATCH net-next v3 42/47] powerpc: dts: qoriq: Add nodes for
>> QSGMII PCSs
>>
>> Now that we actually read registers from QSGMII PCSs, it's important
>> that we have the correct address (instead of hoping that we're the MAC
>> with all the QSGMII PCSs on its bus). This adds nodes for the QSGMII
>> PCSs. They have the same addresses on all SoCs (e.g. if QSGMIIA is
>> present it's used for MACs 1 through 4).
>>
>> Since the first QSGMII PCSs share an address with the SGMII and XFI
>> PCSs, we only add new nodes for PCSs 2-4. This avoids address conflicts
>> on the bus.
>>
>> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
>
> MAC1 and MAC2 can be XFI on T2080. This needs to be reflected in qoriq-fman3-0-1g-0.dtsi
> and qoriq-fman3-0-1g-1.dtsi
>
> The two associated netdevs fail to probe on a T2080RDB without "xfi" added to the pcs-names:
> fsl_dpaa_mac ffe4e0000.ethernet (unnamed net_device) (uninitialized): failed to validate link configuration for in-band status
> fsl_dpaa_mac ffe4e0000.ethernet: error -EINVAL: Could not create phylink
> fsl_dpa: probe of dpaa-ethernet.0 failed with error -22
Ah, I missed that this SoC had 10G on MAC1/MAC2. Going with the existing
naming scheme, these MACs should probably go in DTSs named
qoriq-fman3-0-1g-2.dtsi and qoriq-fman3-0-1g-3.dtsi. Alternatively, this
could be done in t2081si-post.dtsi, since it is only for one SoC. I don't
want to add these to qoriq-fman3-0-1g-0.dtsi and qoriq-fman3-0-1g-1.dtsi
because they are used on other SoCs which don't have 10G.
--Sean
>> ---
>>
>> Changes in v3:
>> - Add compatibles for QSGMII PCSs
>> - Split arm and powerpcs dts updates
>>
>> Changes in v2:
>> - New
>>
>> .../boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi | 3 ++-
>> arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi | 10 +++++++++-
>> .../boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi | 10 +++++++++-
>> arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi | 10 +++++++++-
>> arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi | 3 ++-
>> arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi | 10 +++++++++-
>> arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi | 10 +++++++++-
>> arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi | 10 +++++++++-
>> arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi | 3 ++-
>> arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi | 10 +++++++++-
>> arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi | 10 +++++++++-
>> arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi | 10 +++++++++-
>> arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi | 3 ++-
>> arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi | 10 +++++++++-
>> arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi | 10 +++++++++-
>> arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi | 10 +++++++++-
>> arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi | 3 ++-
>> arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi | 10 +++++++++-
>> 18 files changed, 127 insertions(+), 18 deletions(-)
>>
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
>> index baa0c503e741..db169d630db3 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
>> @@ -55,7 +55,8 @@ ethernet@e0000 {
>> reg = <0xe0000 0x1000>;
>> fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
>> ptp-timer = <&ptp_timer0>;
>> - pcsphy-handle = <&pcsphy0>;
>> + pcsphy-handle = <&pcsphy0>, <&pcsphy0>;
>> + pcs-names = "sgmii", "qsgmii";
>> };
>>
>> mdio@e1000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
>> index 93095600e808..e80ad8675be8 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
>> @@ -52,7 +52,15 @@ ethernet@f0000 {
>> compatible = "fsl,fman-memac";
>> reg = <0xf0000 0x1000>;
>> fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>;
>> - pcsphy-handle = <&pcsphy6>;
>> + pcsphy-handle = <&pcsphy6>, <&qsgmiib_pcs2>,
>> <&pcsphy6>;
>> + pcs-names = "sgmii", "qsgmii", "xfi";
>> + };
>> +
>> + mdio@e9000 {
>> + qsgmiib_pcs2: ethernet-pcs@2 {
>> + compatible = "fsl,lynx-pcs";
>> + reg = <2>;
>> + };
>> };
>>
>> mdio@f1000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
>> index ff4bd38f0645..6a6f51842ad5 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
>> @@ -55,7 +55,15 @@ ethernet@e2000 {
>> reg = <0xe2000 0x1000>;
>> fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
>> ptp-timer = <&ptp_timer0>;
>> - pcsphy-handle = <&pcsphy1>;
>> + pcsphy-handle = <&pcsphy1>, <&qsgmiia_pcs1>;
>> + pcs-names = "sgmii", "qsgmii";
>> + };
>> +
>> + mdio@e1000 {
>> + qsgmiia_pcs1: ethernet-pcs@1 {
>> + compatible = "fsl,lynx-pcs";
>> + reg = <1>;
>> + };
>> };
>>
>> mdio@e3000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
>> index 1fa38ed6f59e..543da5493e40 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
>> @@ -52,7 +52,15 @@ ethernet@f2000 {
>> compatible = "fsl,fman-memac";
>> reg = <0xf2000 0x1000>;
>> fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>;
>> - pcsphy-handle = <&pcsphy7>;
>> + pcsphy-handle = <&pcsphy7>, <&qsgmiib_pcs3>,
>> <&pcsphy7>;
>> + pcs-names = "sgmii", "qsgmii", "xfi";
>> + };
>> +
>> + mdio@e9000 {
>> + qsgmiib_pcs3: ethernet-pcs@3 {
>> + compatible = "fsl,lynx-pcs";
>> + reg = <3>;
>> + };
>> };
>>
>> mdio@f3000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
>> index a8cc9780c0c4..ce76725e6eb2 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
>> @@ -51,7 +51,8 @@ ethernet@e0000 {
>> reg = <0xe0000 0x1000>;
>> fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
>> ptp-timer = <&ptp_timer0>;
>> - pcsphy-handle = <&pcsphy0>;
>> + pcsphy-handle = <&pcsphy0>, <&pcsphy0>;
>> + pcs-names = "sgmii", "qsgmii";
>> };
>>
>> mdio@e1000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
>> index 8b8bd70c9382..f3af67df4767 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
>> @@ -51,7 +51,15 @@ ethernet@e2000 {
>> reg = <0xe2000 0x1000>;
>> fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
>> ptp-timer = <&ptp_timer0>;
>> - pcsphy-handle = <&pcsphy1>;
>> + pcsphy-handle = <&pcsphy1>, <&qsgmiia_pcs1>;
>> + pcs-names = "sgmii", "qsgmii";
>> + };
>> +
>> + mdio@e1000 {
>> + qsgmiia_pcs1: ethernet-pcs@1 {
>> + compatible = "fsl,lynx-pcs";
>> + reg = <1>;
>> + };
>> };
>>
>> mdio@e3000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
>> index 619c880b54d8..f6d74de84bfe 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
>> @@ -51,7 +51,15 @@ ethernet@e4000 {
>> reg = <0xe4000 0x1000>;
>> fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>;
>> ptp-timer = <&ptp_timer0>;
>> - pcsphy-handle = <&pcsphy2>;
>> + pcsphy-handle = <&pcsphy2>, <&qsgmiia_pcs2>;
>> + pcs-names = "sgmii", "qsgmii";
>> + };
>> +
>> + mdio@e1000 {
>> + qsgmiia_pcs2: ethernet-pcs@2 {
>> + compatible = "fsl,lynx-pcs";
>> + reg = <2>;
>> + };
>> };
>>
>> mdio@e5000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
>> index d7ebb73a400d..6e091d8ae9e2 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
>> @@ -51,7 +51,15 @@ ethernet@e6000 {
>> reg = <0xe6000 0x1000>;
>> fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>;
>> ptp-timer = <&ptp_timer0>;
>> - pcsphy-handle = <&pcsphy3>;
>> + pcsphy-handle = <&pcsphy3>, <&qsgmiia_pcs3>;
>> + pcs-names = "sgmii", "qsgmii";
>> + };
>> +
>> + mdio@e1000 {
>> + qsgmiia_pcs3: ethernet-pcs@3 {
>> + compatible = "fsl,lynx-pcs";
>> + reg = <3>;
>> + };
>> };
>>
>> mdio@e7000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
>> index b151d696a069..e2174c0fc841 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
>> @@ -51,7 +51,8 @@ ethernet@e8000 {
>> reg = <0xe8000 0x1000>;
>> fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;
>> ptp-timer = <&ptp_timer0>;
>> - pcsphy-handle = <&pcsphy4>;
>> + pcsphy-handle = <&pcsphy4>, <&pcsphy4>;
>> + pcs-names = "sgmii", "qsgmii";
>> };
>>
>> mdio@e9000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
>> index adc0ae0013a3..9106815bd63e 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
>> @@ -51,7 +51,15 @@ ethernet@ea000 {
>> reg = <0xea000 0x1000>;
>> fsl,fman-ports = <&fman0_rx_0x0d &fman0_tx_0x2d>;
>> ptp-timer = <&ptp_timer0>;
>> - pcsphy-handle = <&pcsphy5>;
>> + pcsphy-handle = <&pcsphy5>, <&qsgmiib_pcs1>;
>> + pcs-names = "sgmii", "qsgmii";
>> + };
>> +
>> + mdio@e9000 {
>> + qsgmiib_pcs1: ethernet-pcs@1 {
>> + compatible = "fsl,lynx-pcs";
>> + reg = <1>;
>> + };
>> };
>>
>> mdio@eb000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
>> index 435047e0e250..a3c1538dfda1 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
>> @@ -52,7 +52,15 @@ ethernet@f0000 {
>> compatible = "fsl,fman-memac";
>> reg = <0xf0000 0x1000>;
>> fsl,fman-ports = <&fman1_rx_0x10 &fman1_tx_0x30>;
>> - pcsphy-handle = <&pcsphy14>;
>> + pcsphy-handle = <&pcsphy14>, <&qsgmiid_pcs2>,
>> <&pcsphy14>;
>> + pcs-names = "sgmii", "qsgmii", "xfi";
>> + };
>> +
>> + mdio@e9000 {
>> + qsgmiid_pcs2: ethernet-pcs@2 {
>> + compatible = "fsl,lynx-pcs";
>> + reg = <2>;
>> + };
>> };
>>
>> mdio@f1000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
>> index c098657cca0a..c024517e70d6 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
>> @@ -52,7 +52,15 @@ ethernet@f2000 {
>> compatible = "fsl,fman-memac";
>> reg = <0xf2000 0x1000>;
>> fsl,fman-ports = <&fman1_rx_0x11 &fman1_tx_0x31>;
>> - pcsphy-handle = <&pcsphy15>;
>> + pcsphy-handle = <&pcsphy15>, <&qsgmiid_pcs3>,
>> <&pcsphy15>;
>> + pcs-names = "sgmii", "qsgmii", "xfi";
>> + };
>> +
>> + mdio@e9000 {
>> + qsgmiid_pcs3: ethernet-pcs@3 {
>> + compatible = "fsl,lynx-pcs";
>> + reg = <3>;
>> + };
>> };
>>
>> mdio@f3000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
>> index 9d06824815f3..16fb299f615a 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
>> @@ -51,7 +51,8 @@ ethernet@e0000 {
>> reg = <0xe0000 0x1000>;
>> fsl,fman-ports = <&fman1_rx_0x08 &fman1_tx_0x28>;
>> ptp-timer = <&ptp_timer1>;
>> - pcsphy-handle = <&pcsphy8>;
>> + pcsphy-handle = <&pcsphy8>, <&pcsphy8>;
>> + pcs-names = "sgmii", "qsgmii";
>> };
>>
>> mdio@e1000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
>> index 70e947730c4b..75cecbef8469 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
>> @@ -51,7 +51,15 @@ ethernet@e2000 {
>> reg = <0xe2000 0x1000>;
>> fsl,fman-ports = <&fman1_rx_0x09 &fman1_tx_0x29>;
>> ptp-timer = <&ptp_timer1>;
>> - pcsphy-handle = <&pcsphy9>;
>> + pcsphy-handle = <&pcsphy9>, <&qsgmiic_pcs1>;
>> + pcs-names = "sgmii", "qsgmii";
>> + };
>> +
>> + mdio@e1000 {
>> + qsgmiic_pcs1: ethernet-pcs@1 {
>> + compatible = "fsl,lynx-pcs";
>> + reg = <1>;
>> + };
>> };
>>
>> mdio@e3000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
>> index ad96e6529595..98c1d27f17e7 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
>> @@ -51,7 +51,15 @@ ethernet@e4000 {
>> reg = <0xe4000 0x1000>;
>> fsl,fman-ports = <&fman1_rx_0x0a &fman1_tx_0x2a>;
>> ptp-timer = <&ptp_timer1>;
>> - pcsphy-handle = <&pcsphy10>;
>> + pcsphy-handle = <&pcsphy10>, <&qsgmiic_pcs2>;
>> + pcs-names = "sgmii", "qsgmii";
>> + };
>> +
>> + mdio@e1000 {
>> + qsgmiic_pcs2: ethernet-pcs@2 {
>> + compatible = "fsl,lynx-pcs";
>> + reg = <2>;
>> + };
>> };
>>
>> mdio@e5000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
>> index 034bc4b71f7a..203a00036f17 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
>> @@ -51,7 +51,15 @@ ethernet@e6000 {
>> reg = <0xe6000 0x1000>;
>> fsl,fman-ports = <&fman1_rx_0x0b &fman1_tx_0x2b>;
>> ptp-timer = <&ptp_timer1>;
>> - pcsphy-handle = <&pcsphy11>;
>> + pcsphy-handle = <&pcsphy11>, <&qsgmiic_pcs3>;
>> + pcs-names = "sgmii", "qsgmii";
>> + };
>> +
>> + mdio@e1000 {
>> + qsgmiic_pcs3: ethernet-pcs@3 {
>> + compatible = "fsl,lynx-pcs";
>> + reg = <3>;
>> + };
>> };
>>
>> mdio@e7000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
>> index 93ca23d82b39..9366935ebc02 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
>> @@ -51,7 +51,8 @@ ethernet@e8000 {
>> reg = <0xe8000 0x1000>;
>> fsl,fman-ports = <&fman1_rx_0x0c &fman1_tx_0x2c>;
>> ptp-timer = <&ptp_timer1>;
>> - pcsphy-handle = <&pcsphy12>;
>> + pcsphy-handle = <&pcsphy12>, <&pcsphy12>;
>> + pcs-names = "sgmii", "qsgmii";
>> };
>>
>> mdio@e9000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
>> index 23b3117a2fd2..39f7c6133017 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
>> @@ -51,7 +51,15 @@ ethernet@ea000 {
>> reg = <0xea000 0x1000>;
>> fsl,fman-ports = <&fman1_rx_0x0d &fman1_tx_0x2d>;
>> ptp-timer = <&ptp_timer1>;
>> - pcsphy-handle = <&pcsphy13>;
>> + pcsphy-handle = <&pcsphy13>, <&qsgmiid_pcs1>;
>> + pcs-names = "sgmii", "qsgmii";
>> + };
>> +
>> + mdio@e9000 {
>> + qsgmiid_pcs1: ethernet-pcs@1 {
>> + compatible = "fsl,lynx-pcs";
>> + reg = <1>;
>> + };
>> };
>>
>> mdio@eb000 {
>> --
>> 2.35.1.1320.gc452695387.dirty
>
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 43/47] arm64: dts: layerscape: Add nodes for QSGMII PCSs
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (41 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 42/47] powerpc: dts: qoriq: Add nodes for QSGMII PCSs Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 44/47] arm64: dts: ls1046a: Add serdes bindings Sean Anderson
` (4 subsequent siblings)
47 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Benjamin Herrenschmidt,
Krzysztof Kozlowski, Li Yang, Michael Ellerman, Paul Mackerras,
Rob Herring, Shawn Guo, devicetree, linuxppc-dev
Now that we actually read registers from QSGMII PCSs, it's important
that we have the correct address (instead of hoping that we're the MAC
with all the QSGMII PCSs on its bus). This adds nodes for the QSGMII
PCSs. The exact mapping of QSGMII to MACs depends on the SoC.
Since the first QSGMII PCSs share an address with the SGMII and XFI
PCSs, we only add new nodes for PCSs 2-4. This avoids address conflicts
on the bus.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
Changes in v3:
- Split this patch off from the previous one
Changes in v2:
- New
.../boot/dts/freescale/fsl-ls1043-post.dtsi | 24 ++++++++++++++++++
.../boot/dts/freescale/fsl-ls1046-post.dtsi | 25 +++++++++++++++++++
2 files changed, 49 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
index d237162a8744..02c51690b9da 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
@@ -24,9 +24,12 @@ &fman0 {
/* these aliases provide the FMan ports mapping */
enet0: ethernet@e0000 {
+ pcs-names = "qsgmii";
};
enet1: ethernet@e2000 {
+ pcsphy-handle = <&pcsphy1>, <&qsgmiib_pcs1>;
+ pcs-names = "sgmii", "qsgmii";
};
enet2: ethernet@e4000 {
@@ -36,11 +39,32 @@ enet3: ethernet@e6000 {
};
enet4: ethernet@e8000 {
+ pcsphy-handle = <&pcsphy4>, <&qsgmiib_pcs2>;
+ pcs-names = "sgmii", "qsgmii";
};
enet5: ethernet@ea000 {
+ pcsphy-handle = <&pcsphy5>, <&qsgmiib_pcs3>;
+ pcs-names = "sgmii", "qsgmii";
};
enet6: ethernet@f0000 {
};
+
+ mdio@e1000 {
+ qsgmiib_pcs1: ethernet-pcs@1 {
+ compatible = "fsl,lynx-pcs";
+ reg = <0x1>;
+ };
+
+ qsgmiib_pcs2: ethernet-pcs@2 {
+ compatible = "fsl,lynx-pcs";
+ reg = <0x2>;
+ };
+
+ qsgmiib_pcs3: ethernet-pcs@3 {
+ compatible = "fsl,lynx-pcs";
+ reg = <0x3>;
+ };
+ };
};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
index d6caaea57d90..1ce40c35f344 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
@@ -23,6 +23,8 @@ &soc {
&fman0 {
/* these aliases provide the FMan ports mapping */
enet0: ethernet@e0000 {
+ pcsphy-handle = <&qsgmiib_pcs3>;
+ pcs-names = "qsgmii";
};
enet1: ethernet@e2000 {
@@ -35,14 +37,37 @@ enet3: ethernet@e6000 {
};
enet4: ethernet@e8000 {
+ pcsphy-handle = <&pcsphy4>, <&qsgmiib_pcs1>;
+ pcs-names = "sgmii", "qsgmii";
};
enet5: ethernet@ea000 {
+ pcsphy-handle = <&pcsphy5>, <&pcsphy5>;
+ pcs-names = "sgmii", "qsgmii";
};
enet6: ethernet@f0000 {
};
enet7: ethernet@f2000 {
+ pcsphy-handle = <&pcsphy7>, <&qsgmiib_pcs2>, <&pcsphy7>;
+ pcs-names = "sgmii", "qsgmii", "xfi";
+ };
+
+ mdio@eb000 {
+ qsgmiib_pcs1: ethernet-pcs@1 {
+ compatible = "fsl,lynx-pcs";
+ reg = <0x1>;
+ };
+
+ qsgmiib_pcs2: ethernet-pcs@2 {
+ compatible = "fsl,lynx-pcs";
+ reg = <0x2>;
+ };
+
+ qsgmiib_pcs3: ethernet-pcs@3 {
+ compatible = "fsl,lynx-pcs";
+ reg = <0x3>;
+ };
};
};
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* [PATCH net-next v3 44/47] arm64: dts: ls1046a: Add serdes bindings
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (42 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 43/47] arm64: dts: layerscape: " Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 45/47] arm64: dts: ls1088a: " Sean Anderson
` (3 subsequent siblings)
47 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Krzysztof Kozlowski, Li Yang,
Rob Herring, Shawn Guo, devicetree
This adds bindings for the SerDes devices. They are disabled by default
to prevent any breakage on existing boards.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
Changes in v3:
- Describe modes in device tree
Changes in v2:
- Use one phy cell for SerDes1, since no lanes can be grouped
- Disable SerDes by default to prevent breaking boards inadvertently.
.../arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 179 ++++++++++++++++++
1 file changed, 179 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 0085e83adf65..0b3765cad383 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -413,6 +413,185 @@ bportals: bman-portals@508000000 {
ranges = <0x0 0x5 0x08000000 0x8000000>;
};
+ /*
+ * XXX: For SerDes1, lane A uses pins SD1_RX3_P/N! That is, the
+ * lane numbers and pin numbers are _reversed_. In addition,
+ * the PCCR documentation is _inconsistent_ in its usage of
+ * these terms!
+ *
+ * PCCR "Lane 0" refers to...
+ * ==== =====================
+ * 0 Lane A
+ * 2 Lane A
+ * 8 Lane A
+ * 9 Lane A
+ * B Lane D!
+ */
+ serdes1: phy@1ea0000 {
+ #clock-cells = <1>;
+ #phy-cells = <1>;
+ compatible = "fsl,ls1046a-serdes", "fsl,lynx-10g";
+ reg = <0x0 0x1ea0000 0x0 0x2000>;
+ status = "disabled";
+
+ pccr-0 {
+ fsl,pccr = <0x0>;
+
+ /* PCIe.1 x1 */
+ pcie-0 {
+ fsl,index = <0>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <1>;
+ fsl,proto = "pcie";
+ };
+ };
+
+ pccr-8 {
+ fsl,pccr = <0x8>;
+
+ /* SGMII.6 */
+ sgmii-0 {
+ fsl,index = <0>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <0>;
+ fsl,proto = "sgmii";
+ };
+
+ /* SGMII.5 */
+ sgmii-1 {
+ fsl,index = <1>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <1>;
+ fsl,proto = "sgmii25";
+ };
+
+ /* SGMII.10 */
+ sgmii-2 {
+ fsl,index = <2>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <2>;
+ fsl,proto = "sgmii25";
+ };
+
+ /* SGMII.9 */
+ sgmii-3 {
+ fsl,index = <3>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <3>;
+ fsl,proto = "sgmii25";
+ };
+ };
+
+ pccr-9 {
+ fsl,pccr = <0x9>;
+
+ /* QSGMII.6,5,10,1 */
+ qsgmii-1 {
+ fsl,index = <1>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <1>;
+ fsl,proto = "qsgmii";
+ };
+ };
+
+ pccr-b {
+ fsl,pccr = <0xb>;
+
+ /* XFI.10 */
+ xfi-0 {
+ fsl,index = <0>;
+ fsl,cfg = <0x2>;
+ fsl,first-lane = <2>;
+ fsl,proto = "xfi";
+ };
+
+ /* XFI.9 */
+ xfi-1 {
+ fsl,index = <1>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <3>;
+ fsl,proto = "xfi";
+ };
+ };
+ };
+
+ serdes2: phy@1eb0000 {
+ #clock-cells = <1>;
+ #phy-cells = <2>;
+ compatible = "fsl,ls1046a-serdes", "fsl,lynx-10g";
+ reg = <0x0 0x1eb0000 0x0 0x2000>;
+ status = "disabled";
+
+ pccr-0 {
+ fsl,pccr = <0>;
+
+ pcie-0 {
+ fsl,index = <0>;
+ fsl,proto = "pcie";
+
+ /* PCIe.1 x1 */
+ cfg-1 {
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <1>;
+ };
+
+ /* PCIe.1 x4 */
+ cfg-3 {
+ fsl,cfg = <0x3>;
+ fsl,first-lane = <0>;
+ fsl,last-lane = <3>;
+ };
+ };
+
+ pcie-2 {
+ fsl,index = <2>;
+ fsl,proto = "pcie";
+
+ /* PCIe.2 x1 */
+ cfg-1 {
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <2>;
+ };
+
+ /* PCIe.3 x2 */
+ cfg-2 {
+ fsl,cfg = <0x2>;
+ fsl,first-lane = <2>;
+ fsl,last-lane = <3>;
+ };
+
+ /* PCIe.3 x1 */
+ cfg-3 {
+ fsl,cfg = <0x3>;
+ fsl,first-lane = <3>;
+ };
+ };
+ };
+
+ pccr-2 {
+ fsl,pccr = <0x2>;
+
+ sata-0 {
+ fsl,index = <0>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <3>;
+ fsl,proto = "sata";
+ };
+ };
+
+ pccr-8 {
+ fsl,pccr = <0x8>;
+
+ /* SGMII.2 */
+ sgmii-1 {
+ fsl,index = <1>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <1>;
+ fsl,proto = "sgmii";
+ };
+ };
+ };
+
dcfg: dcfg@1ee0000 {
compatible = "fsl,ls1046a-dcfg", "syscon";
reg = <0x0 0x1ee0000 0x0 0x1000>;
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* [PATCH net-next v3 45/47] arm64: dts: ls1088a: Add serdes bindings
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (43 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 44/47] arm64: dts: ls1046a: Add serdes bindings Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: " Sean Anderson
` (2 subsequent siblings)
47 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Krzysztof Kozlowski, Li Yang,
Rob Herring, Shawn Guo, devicetree
This adds bindings for the SerDes devices. They are disabled by default
to prevent any breakage on existing boards.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
Changes in v3:
- New
.../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 96 +++++++++++++++++++
1 file changed, 96 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index f476b7d8b056..987892bc69d7 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -238,6 +238,102 @@ reset: syscon@1e60000 {
reg = <0x0 0x1e60000 0x0 0x10000>;
};
+ serdes1: phy@1ea0000 {
+ #clock-cells = <1>;
+ #phy-cells = <1>;
+ compatible = "fsl,ls1088a-serdes", "fsl,lynx-10g";
+ reg = <0x0 0x1ea0000 0x0 0x2000>;
+ status = "disabled";
+
+ pccr-8 {
+ fsl,pccr = <0x8>;
+
+ /* SG3 */
+ sgmii-0 {
+ fsl,index = <0>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <3>;
+ fsl,proto = "sgmii";
+ };
+
+ /* SG7 */
+ sgmii-1 {
+ fsl,index = <1>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <2>;
+ fsl,proto = "sgmii";
+ };
+
+ /* SG1 */
+ sgmii-2 {
+ fsl,index = <2>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <1>;
+ fsl,proto = "sgmii25";
+ };
+
+ /* SG2 */
+ sgmii-3 {
+ fsl,index = <3>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <0>;
+ fsl,proto = "sgmii25";
+ };
+ };
+
+ pccr-9 {
+ fsl,pccr = <0x9>;
+
+ /* QSGa */
+ qsgmii-0 {
+ fsl,index = <0>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <3>;
+ fsl,proto = "qsgmii";
+ };
+
+ /* QSGb */
+ qsgmii-1 {
+ fsl,index = <1>;
+ fsl,proto = "qsgmii";
+
+ cfg-1 {
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <2>;
+ };
+
+ cfg-2 {
+ fsl,cfg = <0x2>;
+ fsl,first-lane = <0>;
+ };
+ };
+ };
+
+ pccr-b {
+ fsl,pccr = <0xb>;
+
+ /* XFI1 */
+ xfi-0 {
+ fsl,index = <0>;
+ fsl,cfg = <0x1>;
+ /*
+ * Table 23-1 and section 23.5.16.4
+ * disagree; this reflects the table
+ */
+ fsl,first-lane = <1>;
+ fsl,proto = "xfi";
+ };
+
+ /* XFI2 */
+ xfi-1 {
+ fsl,index = <1>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <0>;
+ fsl,proto = "xfi";
+ };
+ };
+ };
+
isc: syscon@1f70000 {
compatible = "fsl,ls1088a-isc", "syscon";
reg = <0x0 0x1f70000 0x0 0x10000>;
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes bindings
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (44 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 45/47] arm64: dts: ls1088a: " Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 14:20 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 47/47] [WIP] arm64: dts: ls1088ardb: " Sean Anderson
2022-07-21 14:26 ` [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Camelia Alexandra Groza
47 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Kishon Vijay Abraham I,
Krzysztof Kozlowski, Li Yang, Rob Herring, Shawn Guo, Vinod Koul,
devicetree, linux-phy
This adds appropriate bindings for the macs which use the SerDes. The
156.25MHz fixed clock is a crystal. The 100MHz clocks (there are
actually 3) come from a Renesas 6V49205B at address 69 on i2c0. There is
no driver for this device (and as far as I know all you can do with the
100MHz clocks is gate them), so I have chosen to model it as a single
fixed clock.
Note: the SerDes1 lane numbering for the LS1046A is *reversed*.
This means that Lane A (what the driver thinks is lane 0) uses pins
SD1_TX3_P/N.
Because this will break ethernet if the serdes is not enabled, enable
the serdes driver by default on Layerscape.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
Please let me know if there is a better/more specific config I can use
here.
(no changes since v1)
.../boot/dts/freescale/fsl-ls1046a-rdb.dts | 34 +++++++++++++++++++
drivers/phy/freescale/Kconfig | 1 +
2 files changed, 35 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
index 7025aad8ae89..4f4dd0ed8c53 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
@@ -26,6 +26,32 @@ aliases {
chosen {
stdout-path = "serial0:115200n8";
};
+
+ clocks {
+ clk_100mhz: clock-100mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ };
+
+ clk_156mhz: clock-156mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <156250000>;
+ };
+ };
+};
+
+&serdes1 {
+ clocks = <&clk_100mhz>, <&clk_156mhz>;
+ clock-names = "ref0", "ref1";
+ status = "okay";
+};
+
+&serdes2 {
+ clocks = <&clk_100mhz>, <&clk_100mhz>;
+ clock-names = "ref0", "ref1";
+ status = "okay";
};
&duart0 {
@@ -140,21 +166,29 @@ ethernet@e6000 {
ethernet@e8000 {
phy-handle = <&sgmii_phy1>;
phy-connection-type = "sgmii";
+ phys = <&serdes1 1>;
+ phy-names = "serdes";
};
ethernet@ea000 {
phy-handle = <&sgmii_phy2>;
phy-connection-type = "sgmii";
+ phys = <&serdes1 0>;
+ phy-names = "serdes";
};
ethernet@f0000 { /* 10GEC1 */
phy-handle = <&aqr106_phy>;
phy-connection-type = "xgmii";
+ phys = <&serdes1 3>;
+ phy-names = "serdes";
};
ethernet@f2000 { /* 10GEC2 */
fixed-link = <0 1 1000 0 0>;
phy-connection-type = "xgmii";
+ phys = <&serdes1 2>;
+ phy-names = "serdes";
};
mdio@fc000 {
diff --git a/drivers/phy/freescale/Kconfig b/drivers/phy/freescale/Kconfig
index fe2a3efe0ba4..9595666213d0 100644
--- a/drivers/phy/freescale/Kconfig
+++ b/drivers/phy/freescale/Kconfig
@@ -43,6 +43,7 @@ config PHY_FSL_LYNX_10G
tristate "Freescale Layerscale Lynx 10G SerDes support"
select GENERIC_PHY
select REGMAP_MMIO
+ default y if ARCH_LAYERSCAPE
help
This adds support for the Lynx "SerDes" devices found on various QorIQ
SoCs. There may be up to four SerDes devices on each SoC, and each
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes bindings
2022-07-15 21:59 ` [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: " Sean Anderson
@ 2022-07-21 14:20 ` Camelia Alexandra Groza
2022-07-21 15:40 ` Sean Anderson
0 siblings, 1 reply; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 14:20 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Kishon Vijay Abraham I,
Krzysztof Kozlowski, Leo Li, Rob Herring, Shawn Guo, Vinod Koul,
devicetree, linux-phy
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>; Kishon Vijay Abraham I <kishon@ti.com>;
> Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Leo Li
> <leoyang.li@nxp.com>; Rob Herring <robh+dt@kernel.org>; Shawn Guo
> <shawnguo@kernel.org>; Vinod Koul <vkoul@kernel.org>;
> devicetree@vger.kernel.org; linux-phy@lists.infradead.org
> Subject: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes
> bindings
>
> This adds appropriate bindings for the macs which use the SerDes. The
> 156.25MHz fixed clock is a crystal. The 100MHz clocks (there are
> actually 3) come from a Renesas 6V49205B at address 69 on i2c0. There is
> no driver for this device (and as far as I know all you can do with the
> 100MHz clocks is gate them), so I have chosen to model it as a single
> fixed clock.
>
> Note: the SerDes1 lane numbering for the LS1046A is *reversed*.
> This means that Lane A (what the driver thinks is lane 0) uses pins
> SD1_TX3_P/N.
>
> Because this will break ethernet if the serdes is not enabled, enable
> the serdes driver by default on Layerscape.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> ---
> Please let me know if there is a better/more specific config I can use
> here.
>
> (no changes since v1)
My LS1046ARDB hangs at boot with this patch right after the second SerDes is probed,
right before the point where the PCI host bridge is registered. I can get around this
either by disabling the second SerDes node from the device tree, or disabling
CONFIG_PCI_LAYERSCAPE at build.
I haven't debugged it more but there seems to be an issue here.
> .../boot/dts/freescale/fsl-ls1046a-rdb.dts | 34 +++++++++++++++++++
> drivers/phy/freescale/Kconfig | 1 +
> 2 files changed, 35 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
> b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
> index 7025aad8ae89..4f4dd0ed8c53 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
> @@ -26,6 +26,32 @@ aliases {
> chosen {
> stdout-path = "serial0:115200n8";
> };
> +
> + clocks {
> + clk_100mhz: clock-100mhz {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <100000000>;
> + };
> +
> + clk_156mhz: clock-156mhz {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <156250000>;
> + };
> + };
> +};
> +
> +&serdes1 {
> + clocks = <&clk_100mhz>, <&clk_156mhz>;
> + clock-names = "ref0", "ref1";
> + status = "okay";
> +};
> +
> +&serdes2 {
> + clocks = <&clk_100mhz>, <&clk_100mhz>;
> + clock-names = "ref0", "ref1";
> + status = "okay";
> };
>
> &duart0 {
> @@ -140,21 +166,29 @@ ethernet@e6000 {
> ethernet@e8000 {
> phy-handle = <&sgmii_phy1>;
> phy-connection-type = "sgmii";
> + phys = <&serdes1 1>;
> + phy-names = "serdes";
> };
>
> ethernet@ea000 {
> phy-handle = <&sgmii_phy2>;
> phy-connection-type = "sgmii";
> + phys = <&serdes1 0>;
> + phy-names = "serdes";
> };
>
> ethernet@f0000 { /* 10GEC1 */
> phy-handle = <&aqr106_phy>;
> phy-connection-type = "xgmii";
> + phys = <&serdes1 3>;
> + phy-names = "serdes";
> };
>
> ethernet@f2000 { /* 10GEC2 */
> fixed-link = <0 1 1000 0 0>;
> phy-connection-type = "xgmii";
> + phys = <&serdes1 2>;
> + phy-names = "serdes";
> };
>
> mdio@fc000 {
> diff --git a/drivers/phy/freescale/Kconfig b/drivers/phy/freescale/Kconfig
> index fe2a3efe0ba4..9595666213d0 100644
> --- a/drivers/phy/freescale/Kconfig
> +++ b/drivers/phy/freescale/Kconfig
> @@ -43,6 +43,7 @@ config PHY_FSL_LYNX_10G
> tristate "Freescale Layerscale Lynx 10G SerDes support"
> select GENERIC_PHY
> select REGMAP_MMIO
> + default y if ARCH_LAYERSCAPE
> help
> This adds support for the Lynx "SerDes" devices found on various
> QorIQ
> SoCs. There may be up to four SerDes devices on each SoC, and
> each
> --
> 2.35.1.1320.gc452695387.dirty
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes bindings
2022-07-21 14:20 ` Camelia Alexandra Groza
@ 2022-07-21 15:40 ` Sean Anderson
2022-07-22 12:41 ` Camelia Alexandra Groza
0 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-21 15:40 UTC (permalink / raw)
To: Camelia Alexandra Groza, David S . Miller, Jakub Kicinski,
Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Kishon Vijay Abraham I, Krzysztof Kozlowski,
Leo Li, Rob Herring, Shawn Guo, Vinod Koul, devicetree,
linux-phy
On 7/21/22 10:20 AM, Camelia Alexandra Groza wrote:
>> -----Original Message-----
>> From: Sean Anderson <sean.anderson@seco.com>
>> Sent: Saturday, July 16, 2022 1:00
>> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
>> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
>> netdev@vger.kernel.org
>> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
>> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
>> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
>> <sean.anderson@seco.com>; Kishon Vijay Abraham I <kishon@ti.com>;
>> Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Leo Li
>> <leoyang.li@nxp.com>; Rob Herring <robh+dt@kernel.org>; Shawn Guo
>> <shawnguo@kernel.org>; Vinod Koul <vkoul@kernel.org>;
>> devicetree@vger.kernel.org; linux-phy@lists.infradead.org
>> Subject: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes
>> bindings
>>
>> This adds appropriate bindings for the macs which use the SerDes. The
>> 156.25MHz fixed clock is a crystal. The 100MHz clocks (there are
>> actually 3) come from a Renesas 6V49205B at address 69 on i2c0. There is
>> no driver for this device (and as far as I know all you can do with the
>> 100MHz clocks is gate them), so I have chosen to model it as a single
>> fixed clock.
>>
>> Note: the SerDes1 lane numbering for the LS1046A is *reversed*.
>> This means that Lane A (what the driver thinks is lane 0) uses pins
>> SD1_TX3_P/N.
>>
>> Because this will break ethernet if the serdes is not enabled, enable
>> the serdes driver by default on Layerscape.
>>
>> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
>> ---
>> Please let me know if there is a better/more specific config I can use
>> here.
>>
>> (no changes since v1)
>
> My LS1046ARDB hangs at boot with this patch right after the second SerDes is probed,
> right before the point where the PCI host bridge is registered. I can get around this
> either by disabling the second SerDes node from the device tree, or disabling
> CONFIG_PCI_LAYERSCAPE at build.
>
> I haven't debugged it more but there seems to be an issue here.
Hm. Do you have anything plugged into the PCIe/SATA slots? I haven't been testing with
anything there. For now, it may be better to just leave it disabled.
--Sean
^ permalink raw reply [flat|nested] 123+ messages in thread
* RE: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes bindings
2022-07-21 15:40 ` Sean Anderson
@ 2022-07-22 12:41 ` Camelia Alexandra Groza
2022-07-25 20:02 ` Sean Anderson
0 siblings, 1 reply; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-22 12:41 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Kishon Vijay Abraham I, Krzysztof Kozlowski,
Leo Li, Rob Herring, Shawn Guo, Vinod Koul, devicetree,
linux-phy
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Thursday, July 21, 2022 18:41
> To: Camelia Alexandra Groza <camelia.groza@nxp.com>; David S . Miller
> <davem@davemloft.net>; Jakub Kicinski <kuba@kernel.org>; Madalin Bucur
> <madalin.bucur@nxp.com>; netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Kishon Vijay
> Abraham I <kishon@ti.com>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Leo Li <leoyang.li@nxp.com>; Rob
> Herring <robh+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Vinod
> Koul <vkoul@kernel.org>; devicetree@vger.kernel.org; linux-
> phy@lists.infradead.org
> Subject: Re: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes
> bindings
>
>
>
> On 7/21/22 10:20 AM, Camelia Alexandra Groza wrote:
> >> -----Original Message-----
> >> From: Sean Anderson <sean.anderson@seco.com>
> >> Sent: Saturday, July 16, 2022 1:00
> >> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> >> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> >> netdev@vger.kernel.org
> >> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> >> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> >> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean
> Anderson
> >> <sean.anderson@seco.com>; Kishon Vijay Abraham I <kishon@ti.com>;
> >> Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Leo Li
> >> <leoyang.li@nxp.com>; Rob Herring <robh+dt@kernel.org>; Shawn Guo
> >> <shawnguo@kernel.org>; Vinod Koul <vkoul@kernel.org>;
> >> devicetree@vger.kernel.org; linux-phy@lists.infradead.org
> >> Subject: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes
> >> bindings
> >>
> >> This adds appropriate bindings for the macs which use the SerDes. The
> >> 156.25MHz fixed clock is a crystal. The 100MHz clocks (there are
> >> actually 3) come from a Renesas 6V49205B at address 69 on i2c0. There is
> >> no driver for this device (and as far as I know all you can do with the
> >> 100MHz clocks is gate them), so I have chosen to model it as a single
> >> fixed clock.
> >>
> >> Note: the SerDes1 lane numbering for the LS1046A is *reversed*.
> >> This means that Lane A (what the driver thinks is lane 0) uses pins
> >> SD1_TX3_P/N.
> >>
> >> Because this will break ethernet if the serdes is not enabled, enable
> >> the serdes driver by default on Layerscape.
> >>
> >> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> >> ---
> >> Please let me know if there is a better/more specific config I can use
> >> here.
> >>
> >> (no changes since v1)
> >
> > My LS1046ARDB hangs at boot with this patch right after the second SerDes
> is probed,
> > right before the point where the PCI host bridge is registered. I can get
> around this
> > either by disabling the second SerDes node from the device tree, or
> disabling
> > CONFIG_PCI_LAYERSCAPE at build.
> >
> > I haven't debugged it more but there seems to be an issue here.
>
> Hm. Do you have anything plugged into the PCIe/SATA slots? I haven't been
> testing with
> anything there. For now, it may be better to just leave it disabled.
>
> --Sean
Yes, I have an Intel e1000 card plugged in.
Camelia
^ permalink raw reply [flat|nested] 123+ messages in thread
* Re: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes bindings
2022-07-22 12:41 ` Camelia Alexandra Groza
@ 2022-07-25 20:02 ` Sean Anderson
2022-07-26 11:35 ` Camelia Alexandra Groza
0 siblings, 1 reply; 123+ messages in thread
From: Sean Anderson @ 2022-07-25 20:02 UTC (permalink / raw)
To: Camelia Alexandra Groza, David S . Miller, Jakub Kicinski,
Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Kishon Vijay Abraham I, Krzysztof Kozlowski,
Leo Li, Rob Herring, Shawn Guo, Vinod Koul, devicetree,
linux-phy
On 7/22/22 8:41 AM, Camelia Alexandra Groza wrote:
>> -----Original Message-----
>> From: Sean Anderson <sean.anderson@seco.com>
>> Sent: Thursday, July 21, 2022 18:41
>> To: Camelia Alexandra Groza <camelia.groza@nxp.com>; David S . Miller
>> <davem@davemloft.net>; Jakub Kicinski <kuba@kernel.org>; Madalin Bucur
>> <madalin.bucur@nxp.com>; netdev@vger.kernel.org
>> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
>> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
>> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Kishon Vijay
>> Abraham I <kishon@ti.com>; Krzysztof Kozlowski
>> <krzysztof.kozlowski+dt@linaro.org>; Leo Li <leoyang.li@nxp.com>; Rob
>> Herring <robh+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Vinod
>> Koul <vkoul@kernel.org>; devicetree@vger.kernel.org; linux-
>> phy@lists.infradead.org
>> Subject: Re: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes
>> bindings
>>
>>
>>
>> On 7/21/22 10:20 AM, Camelia Alexandra Groza wrote:
>> >> -----Original Message-----
>> >> From: Sean Anderson <sean.anderson@seco.com>
>> >> Sent: Saturday, July 16, 2022 1:00
>> >> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
>> >> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
>> >> netdev@vger.kernel.org
>> >> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
>> >> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
>> >> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean
>> Anderson
>> >> <sean.anderson@seco.com>; Kishon Vijay Abraham I <kishon@ti.com>;
>> >> Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Leo Li
>> >> <leoyang.li@nxp.com>; Rob Herring <robh+dt@kernel.org>; Shawn Guo
>> >> <shawnguo@kernel.org>; Vinod Koul <vkoul@kernel.org>;
>> >> devicetree@vger.kernel.org; linux-phy@lists.infradead.org
>> >> Subject: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes
>> >> bindings
>> >>
>> >> This adds appropriate bindings for the macs which use the SerDes. The
>> >> 156.25MHz fixed clock is a crystal. The 100MHz clocks (there are
>> >> actually 3) come from a Renesas 6V49205B at address 69 on i2c0. There is
>> >> no driver for this device (and as far as I know all you can do with the
>> >> 100MHz clocks is gate them), so I have chosen to model it as a single
>> >> fixed clock.
>> >>
>> >> Note: the SerDes1 lane numbering for the LS1046A is *reversed*.
>> >> This means that Lane A (what the driver thinks is lane 0) uses pins
>> >> SD1_TX3_P/N.
>> >>
>> >> Because this will break ethernet if the serdes is not enabled, enable
>> >> the serdes driver by default on Layerscape.
>> >>
>> >> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
>> >> ---
>> >> Please let me know if there is a better/more specific config I can use
>> >> here.
>> >>
>> >> (no changes since v1)
>> >
>> > My LS1046ARDB hangs at boot with this patch right after the second SerDes
>> is probed,
>> > right before the point where the PCI host bridge is registered. I can get
>> around this
>> > either by disabling the second SerDes node from the device tree, or
>> disabling
>> > CONFIG_PCI_LAYERSCAPE at build.
>> >
>> > I haven't debugged it more but there seems to be an issue here.
>>
>> Hm. Do you have anything plugged into the PCIe/SATA slots? I haven't been
>> testing with
>> anything there. For now, it may be better to just leave it disabled.
>>
>> --Sean
>
> Yes, I have an Intel e1000 card plugged in.
>
> Camelia
>
Can you try the following patch? I was able to boot with PCI with it applied.
From 71f4136f1bdda89009936a9c24561b60e0554859 Mon Sep 17 00:00:00 2001
From: Sean Anderson <sean.anderson@seco.com>
Date: Mon, 25 Jul 2022 16:01:16 -0400
Subject: [PATCH] arm64: dts: ls1046a: Fix missing PCIe lane
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 0b3765cad383..3841ba274782 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -532,7 +532,7 @@ pcie-0 {
/* PCIe.1 x1 */
cfg-1 {
fsl,cfg = <0x1>;
- fsl,first-lane = <1>;
+ fsl,first-lane = <0>;
};
/* PCIe.1 x4 */
@@ -543,6 +543,14 @@ cfg-3 {
};
};
+ /* PCIe.2 x1 */
+ pcie-1 {
+ fsl,index = <1>;
+ fsl,proto = "pcie";
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <1>;
+ };
+
pcie-2 {
fsl,index = <2>;
fsl,proto = "pcie";
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes bindings
2022-07-25 20:02 ` Sean Anderson
@ 2022-07-26 11:35 ` Camelia Alexandra Groza
0 siblings, 0 replies; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-26 11:35 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Kishon Vijay Abraham I, Krzysztof Kozlowski,
Leo Li, Rob Herring, Shawn Guo, Vinod Koul, devicetree,
linux-phy
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Monday, July 25, 2022 23:02
> To: Camelia Alexandra Groza <camelia.groza@nxp.com>; David S . Miller
> <davem@davemloft.net>; Jakub Kicinski <kuba@kernel.org>; Madalin Bucur
> <madalin.bucur@nxp.com>; netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Kishon Vijay
> Abraham I <kishon@ti.com>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Leo Li <leoyang.li@nxp.com>; Rob
> Herring <robh+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Vinod
> Koul <vkoul@kernel.org>; devicetree@vger.kernel.org; linux-
> phy@lists.infradead.org
> Subject: Re: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes
> bindings
>
>
>
> On 7/22/22 8:41 AM, Camelia Alexandra Groza wrote:
> >> -----Original Message-----
> >> From: Sean Anderson <sean.anderson@seco.com>
> >> Sent: Thursday, July 21, 2022 18:41
> >> To: Camelia Alexandra Groza <camelia.groza@nxp.com>; David S . Miller
> >> <davem@davemloft.net>; Jakub Kicinski <kuba@kernel.org>; Madalin
> Bucur
> >> <madalin.bucur@nxp.com>; netdev@vger.kernel.org
> >> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> >> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> >> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Kishon Vijay
> >> Abraham I <kishon@ti.com>; Krzysztof Kozlowski
> >> <krzysztof.kozlowski+dt@linaro.org>; Leo Li <leoyang.li@nxp.com>; Rob
> >> Herring <robh+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>;
> Vinod
> >> Koul <vkoul@kernel.org>; devicetree@vger.kernel.org; linux-
> >> phy@lists.infradead.org
> >> Subject: Re: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add
> serdes
> >> bindings
> >>
> >>
> >>
> >> On 7/21/22 10:20 AM, Camelia Alexandra Groza wrote:
> >> >> -----Original Message-----
> >> >> From: Sean Anderson <sean.anderson@seco.com>
> >> >> Sent: Saturday, July 16, 2022 1:00
> >> >> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> >> >> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> >> >> netdev@vger.kernel.org
> >> >> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> >> >> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org;
> Russell
> >> >> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean
> >> Anderson
> >> >> <sean.anderson@seco.com>; Kishon Vijay Abraham I
> <kishon@ti.com>;
> >> >> Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Leo Li
> >> >> <leoyang.li@nxp.com>; Rob Herring <robh+dt@kernel.org>; Shawn
> Guo
> >> >> <shawnguo@kernel.org>; Vinod Koul <vkoul@kernel.org>;
> >> >> devicetree@vger.kernel.org; linux-phy@lists.infradead.org
> >> >> Subject: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes
> >> >> bindings
> >> >>
> >> >> This adds appropriate bindings for the macs which use the SerDes. The
> >> >> 156.25MHz fixed clock is a crystal. The 100MHz clocks (there are
> >> >> actually 3) come from a Renesas 6V49205B at address 69 on i2c0. There
> is
> >> >> no driver for this device (and as far as I know all you can do with the
> >> >> 100MHz clocks is gate them), so I have chosen to model it as a single
> >> >> fixed clock.
> >> >>
> >> >> Note: the SerDes1 lane numbering for the LS1046A is *reversed*.
> >> >> This means that Lane A (what the driver thinks is lane 0) uses pins
> >> >> SD1_TX3_P/N.
> >> >>
> >> >> Because this will break ethernet if the serdes is not enabled, enable
> >> >> the serdes driver by default on Layerscape.
> >> >>
> >> >> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> >> >> ---
> >> >> Please let me know if there is a better/more specific config I can use
> >> >> here.
> >> >>
> >> >> (no changes since v1)
> >> >
> >> > My LS1046ARDB hangs at boot with this patch right after the second
> SerDes
> >> is probed,
> >> > right before the point where the PCI host bridge is registered. I can get
> >> around this
> >> > either by disabling the second SerDes node from the device tree, or
> >> disabling
> >> > CONFIG_PCI_LAYERSCAPE at build.
> >> >
> >> > I haven't debugged it more but there seems to be an issue here.
> >>
> >> Hm. Do you have anything plugged into the PCIe/SATA slots? I haven't
> been
> >> testing with
> >> anything there. For now, it may be better to just leave it disabled.
> >>
> >> --Sean
> >
> > Yes, I have an Intel e1000 card plugged in.
> >
> > Camelia
> >
>
> Can you try the following patch? I was able to boot with PCI with it applied.
Works for me as well. The board boots fine and the PCI card is functional. Thanks.
> From 71f4136f1bdda89009936a9c24561b60e0554859 Mon Sep 17 00:00:00
> 2001
> From: Sean Anderson <sean.anderson@seco.com>
> Date: Mon, 25 Jul 2022 16:01:16 -0400
> Subject: [PATCH] arm64: dts: ls1046a: Fix missing PCIe lane
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> ---
> arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> index 0b3765cad383..3841ba274782 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> @@ -532,7 +532,7 @@ pcie-0 {
> /* PCIe.1 x1 */
> cfg-1 {
> fsl,cfg = <0x1>;
> - fsl,first-lane = <1>;
> + fsl,first-lane = <0>;
> };
>
> /* PCIe.1 x4 */
> @@ -543,6 +543,14 @@ cfg-3 {
> };
> };
>
> + /* PCIe.2 x1 */
> + pcie-1 {
> + fsl,index = <1>;
> + fsl,proto = "pcie";
> + fsl,cfg = <0x1>;
> + fsl,first-lane = <1>;
> + };
> +
> pcie-2 {
> fsl,index = <2>;
> fsl,proto = "pcie";
> --
> 2.35.1.1320.gc452695387.dirty
^ permalink raw reply [flat|nested] 123+ messages in thread
* [PATCH net-next v3 47/47] [WIP] arm64: dts: ls1088ardb: Add serdes bindings
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (45 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: " Sean Anderson
@ 2022-07-15 21:59 ` Sean Anderson
2022-07-21 14:26 ` [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Camelia Alexandra Groza
47 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-15 21:59 UTC (permalink / raw)
To: David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Ioana Ciornei,
Kishon Vijay Abraham I, Krzysztof Kozlowski, Li Yang,
Rob Herring, Shawn Guo, Vinod Koul, devicetree, linux-phy
This is a first stab at adding serdes support on the LS1088A. Linux hangs
around when the serdes is initialized if the si5341 is enabled, so it's
commented out. I also discovered that I have too old MC firmware to
reconfigure the phy interface mode. Consider all the LS1088A parts of
this series to be untested, but hopefully they can be a good starting
point.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v1)
.../boot/dts/freescale/fsl-ls1088a-rdb.dts | 87 +++++++++++++++++++
1 file changed, 87 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
index 1bfbce69cc8b..5875709f7f8b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
@@ -15,12 +15,59 @@
/ {
model = "LS1088A RDB Board";
compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
+
+ clocks {
+ si5341_xtal: clock-48mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <48000000>;
+ };
+
+ clk_100mhz: clock-100mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ };
+
+ clk_156mhz: clock-156mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <156250000>;
+ };
+ };
+
+ ovdd: regulator-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "ovdd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ dvdd: regulator-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "dvdd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+};
+
+&serdes1 {
+ //clocks = <&si5341 0 8>, <&si5341 0 9>;
+ clocks = <&clk_100mhz>, <&clk_156mhz>;
+ clock-names = "ref0", "ref1";
+ status = "okay";
+};
+
+&dpmac1 {
+ phys = <&serdes1 1>;
};
&dpmac2 {
phy-handle = <&mdio2_aquantia_phy>;
phy-connection-type = "10gbase-r";
pcs-handle = <&pcs2>;
+ phys = <&serdes1 0>;
};
&dpmac3 {
@@ -28,6 +75,7 @@ &dpmac3 {
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs3_0>;
+ phys = <&serdes1 3>;
};
&dpmac4 {
@@ -35,6 +83,7 @@ &dpmac4 {
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs3_1>;
+ phys = <&serdes1 3>;
};
&dpmac5 {
@@ -42,6 +91,7 @@ &dpmac5 {
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs3_2>;
+ phys = <&serdes1 3>;
};
&dpmac6 {
@@ -49,6 +99,7 @@ &dpmac6 {
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs3_3>;
+ phys = <&serdes1 3>;
};
&dpmac7 {
@@ -56,6 +107,7 @@ &dpmac7 {
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs7_0>;
+ phys = <&serdes1 2>;
};
&dpmac8 {
@@ -63,6 +115,7 @@ &dpmac8 {
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs7_1>;
+ phys = <&serdes1 2>;
};
&dpmac9 {
@@ -70,6 +123,7 @@ &dpmac9 {
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs7_2>;
+ phys = <&serdes1 2>;
};
&dpmac10 {
@@ -77,6 +131,7 @@ &dpmac10 {
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs7_3>;
+ phys = <&serdes1 2>;
};
&emdio1 {
@@ -142,6 +197,38 @@ i2c-switch@77 {
#address-cells = <1>;
#size-cells = <0>;
+ i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>;
+
+ si5341: clock-generator@74 {
+ #address-cells = <1>;
+ #clock-cells = <2>;
+ #size-cells = <0>;
+ compatible = "silabs,si5341";
+ reg = <0x74>;
+ clocks = <&si5341_xtal>;
+ clock-names = "xtal";
+ vdd-supply = <&ovdd>;
+ vdda-supply = <&dvdd>;
+ vddo8-supply = <&ovdd>;
+ vddo9-supply = <&ovdd>;
+ silabs,iovdd-33;
+ status = "disabled";
+
+ out@8 {
+ reg = <8>;
+ silabs,format = <1>;
+ };
+
+ out@9 {
+ reg = <9>;
+ silabs,format = <1>;
+ };
+ };
+ };
+
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
--
2.35.1.1320.gc452695387.dirty
^ permalink raw reply related [flat|nested] 123+ messages in thread* RE: [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
` (46 preceding siblings ...)
2022-07-15 21:59 ` [PATCH net-next v3 47/47] [WIP] arm64: dts: ls1088ardb: " Sean Anderson
@ 2022-07-21 14:26 ` Camelia Alexandra Groza
2022-07-21 15:39 ` Sean Anderson
47 siblings, 1 reply; 123+ messages in thread
From: Camelia Alexandra Groza @ 2022-07-21 14:26 UTC (permalink / raw)
To: Sean Anderson, David S . Miller, Jakub Kicinski, Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Sean Anderson, Alexandru Marginean, Andrew Lunn,
Benjamin Herrenschmidt, Heiner Kallweit, Ioana Ciornei,
Jonathan Corbet, Kishon Vijay Abraham I, Krzysztof Kozlowski,
Leo Li, Michael Ellerman, Paul Mackerras, Rob Herring, Shawn Guo,
Vinod Koul, Vladimir Oltean, devicetree, linux-doc, linux-phy,
linuxppc-dev
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 0:59
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>; Alexandru Marginean
> <alexandru.marginean@nxp.com>; Andrew Lunn <andrew@lunn.ch>;
> Benjamin Herrenschmidt <benh@kernel.crashing.org>; Heiner Kallweit
> <hkallweit1@gmail.com>; Ioana Ciornei <ioana.ciornei@nxp.com>; Jonathan
> Corbet <corbet@lwn.net>; Kishon Vijay Abraham I <kishon@ti.com>;
> Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Leo Li
> <leoyang.li@nxp.com>; Michael Ellerman <mpe@ellerman.id.au>; Paul
> Mackerras <paulus@samba.org>; Rob Herring <robh+dt@kernel.org>;
> Shawn Guo <shawnguo@kernel.org>; Vinod Koul <vkoul@kernel.org>;
> Vladimir Oltean <olteanv@gmail.com>; devicetree@vger.kernel.org; linux-
> doc@vger.kernel.org; linux-phy@lists.infradead.org; linuxppc-
> dev@lists.ozlabs.org
> Subject: [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink
>
> This series converts the DPAA driver to phylink. Additionally,
> it also adds a serdes driver to allow for dynamic reconfiguration
> between 1g and 10g interfaces (such as in an SFP+ slot). These changes
> are submitted together for this RFT, but they will eventually be
> submitted separately to the appropriate subsystem maintainers.
>
> I have tried to maintain backwards compatibility with existing device
> trees whereever possible. However, one area where I was unable to
> achieve this was with QSGMII. Please refer to patch 4 for details.
>
> All mac drivers have now been converted. I would greatly appreciate if
> anyone has QorIQ boards they can test/debug this series on. I only have an
> LS1046ARDB. Everything but QSGMII should work without breakage; QSGMII
> needs patches 42 and 43.
>
> The serdes driver is mostly functional (except for XFI). This series
> only adds support for the LS1046ARDB SerDes (and untested LS1088ARDB),
> but it should be fairly straightforward to add support for other SoCs
> and boards (see Documentation/driver-api/phy/qoriq.rst).
>
> This is the last spin of this series with all patches included. After next
> week (depending on feedback) I will resend the patches broken up as
> follows:
> - 5: 1000BASE-KX support
> - 1, 6, 44, 45: Lynx 10G support
> - 7-10, 12-14: Phy rate adaptation support
> - 2-4, 15-43, 46, 47: DPAA phylink conversion
Please also send patches 15-38 separately from the DPAA1 SerDes and phylink set for easier review
> Patches 15-19 were first submitted as [1].
>
> [1] https://lore.kernel.org/netdev/20220531195851.1592220-1-sean.anderson@seco.com/
>
> Changes in v3:
> - Manually expand yaml references
> - Add mode configuration to device tree
> - Expand pcs-handle to an array
> - Incorperate some minor changes into the first FMan binding commit
> - Add vendor prefix 'fsl,' to rgmii and mii properties.
> - Set maxItems for pcs-names
> - Remove phy-* properties from example because dt-schema complains and
> I
> can't be bothered to figure out how to make it work.
> - Add pcs-handle as a preferred version of pcsphy-handle
> - Deprecate pcsphy-handle
> - Remove mii/rmii properties
> - Add 1000BASE-KX interface mode
> - Rename remaining references to QorIQ SerDes to Lynx 10G
> - Fix PLL enable sequence by waiting for our reset request to be cleared
> before continuing. Do the same for the lock, even though it isn't as
> critical. Because we will delay for 1.5ms on average, use prepare
> instead of enable so we can sleep.
> - Document the status of each protocol
> - Fix offset of several bitfields in RECR0
> - Take into account PLLRST_B, SDRST_B, and SDEN when considering whether
> a PLL is "enabled."
> - Only power off unused lanes.
> - Split mode lane mask into first/last lane (like group)
> - Read modes from device tree
> - Use caps to determine whether KX/KR are supported
> - Move modes to lynx_priv
> - Ensure that the protocol controller is not already in-use when we try
> to configure a new mode. This should only occur if the device tree is
> misconfigured (e.g. when QSGMII is selected on two lanes but there is
> only one QSGMII controller).
> - Split PLL drivers off into their own file
> - Add clock for "ext_dly" instead of writing the bit directly (and
> racing with any clock code).
> - Use kasprintf instead of open-coding the snprintf dance
> - Support 1000BASE-KX in lynx_lookup_proto. This still requires PCS
> support, so nothing is truly "enabled" yet.
> - Add support for phy rate adaptation
> - Support differing link speeds and interface speeds
> - Adjust advertisement based on rate adaptation
> - Adjust link settings based on rate adaptation
> - Add support for CRS-based rate adaptation
> - Add support for AQR115
> - Add some additional phy interfaces
> - Add support for aquantia rate adaptation
> - Put the PCS mdiodev only after we are done with it (since the PCS
> does not perform a get itself).
> - Remove _return label from memac_initialization in favor of returning
> directly
> - Fix grabbing the default PCS not checking for -ENODATA from
> of_property_match_string
> - Set DTSEC_ECNTRL_R100M in dtsec_link_up instead of dtsec_mac_config
> - Remove rmii/mii properties
> - Replace 1000Base... with 1000BASE... to match IEEE capitalization
> - Add compatibles for QSGMII PCSs
> - Split arm and powerpcs dts updates
> - Describe modes in device tree
> - ls1088a: Add serdes bindings
>
> Changes in v2:
> - Rename to fsl,lynx-10g.yaml
> - Refer to the device in the documentation, rather than the binding
> - Move compatible first
> - Document phy cells in the description
> - Allow a value of 1 for phy-cells. This allows for compatibility with
> the similar (but according to Ioana Ciornei different enough) lynx-28g
> binding.
> - Remove minItems
> - Use list for clock-names
> - Fix example binding having too many cells in regs
> - Add #clock-cells. This will allow using assigned-clocks* to configure
> the PLLs.
> - Document the structure of the compatible strings
> - Convert FMan MAC bindings to yaml
> - Better document how we select which PCS to use in the default case
> - Rename driver to Lynx 10G (etc.)
> - Fix not clearing group->pll after disabling it
> - Support 1 and 2 phy-cells
> - Power off lanes during probe
> - Clear SGMIIaCR1_PCS_EN during probe
> - Rename LYNX_PROTO_UNKNOWN to LYNX_PROTO_NONE
> - Handle 1000BASE-KX in lynx_proto_mode_prep
> - Remove some unused variables
> - Fix prototype for dtsec_initialization
> - Fix warning if sizeof(void *) != sizeof(resource_size_t)
> - Specify type of mac_dev for exception_cb
> - Add helper for sanity checking cgr ops
> - Add CGR update function
> - Adjust queue depth on rate change
> - Move PCS_LYNX dependency to fman Kconfig
> - Remove unused variable slow_10g_if
> - Restrict valid link modes based on the phy interface. This is easier
> to set up, and mostly captures what I intended to do the first time.
> We now have a custom validate which restricts half-duplex for some SoCs
> for RGMII, but generally just uses the default phylink validate.
> - Configure the SerDes in enable/disable
> - Properly implement all ethtool ops and ioctls. These were mostly
> stubbed out just enough to compile last time.
> - Convert 10GEC and dTSEC as well
> - Fix capitalization of mEMAC in commit messages
> - Add nodes for QSGMII PCSs
> - Add nodes for QSGMII PCSs
> - Use one phy cell for SerDes1, since no lanes can be grouped
> - Disable SerDes by default to prevent breaking boards inadvertently.
>
> Sean Anderson (47):
> dt-bindings: phy: Add Lynx 10G phy binding
> dt-bindings: net: Expand pcs-handle to an array
> dt-bindings: net: Convert FMan MAC bindings to yaml
> dt-bindings: net: fman: Add additional interface properties
> net: phy: Add 1000BASE-KX interface mode
> [RFT] phy: fsl: Add Lynx 10G SerDes driver
> net: phy: Add support for rate adaptation
> net: phylink: Support differing link speeds and interface speeds
> net: phylink: Adjust advertisement based on rate adaptation
> net: phylink: Adjust link settings based on rate adaptation
> [RFC] net: phylink: Add support for CRS-based rate adaptation
> net: phy: aquantia: Add support for AQR115
> net: phy: aquantia: Add some additional phy interfaces
> net: phy: aquantia: Add support for rate adaptation
> net: fman: Convert to SPDX identifiers
> net: fman: Don't pass comm_mode to enable/disable
> net: fman: Store en/disable in mac_device instead of mac_priv_s
> net: fman: dtsec: Always gracefully stop/start
> net: fman: Get PCS node in per-mac init
> net: fman: Store initialization function in match data
> net: fman: Move struct dev to mac_device
> net: fman: Configure fixed link in memac_initialization
> net: fman: Export/rename some common functions
> net: fman: memac: Use params instead of priv for max_speed
> net: fman: Move initialization to mac-specific files
> net: fman: Mark mac methods static
> net: fman: Inline several functions into initialization
> net: fman: Remove internal_phy_node from params
> net: fman: Map the base address once
> net: fman: Pass params directly to mac init
> net: fman: Use mac_dev for some params
> net: fman: Specify type of mac_dev for exception_cb
> net: fman: Clean up error handling
> net: fman: Change return type of disable to void
> net: dpaa: Use mac_dev variable in dpaa_netdev_init
> soc: fsl: qbman: Add helper for sanity checking cgr ops
> soc: fsl: qbman: Add CGR update function
> net: dpaa: Adjust queue depth on rate change
> net: fman: memac: Add serdes support
> net: fman: memac: Use lynx pcs driver
> [RFT] net: dpaa: Convert to phylink
> powerpc: dts: qoriq: Add nodes for QSGMII PCSs
> arm64: dts: layerscape: Add nodes for QSGMII PCSs
> arm64: dts: ls1046a: Add serdes bindings
> arm64: dts: ls1088a: Add serdes bindings
> arm64: dts: ls1046ardb: Add serdes bindings
> [WIP] arm64: dts: ls1088ardb: Add serdes bindings
>
> .../bindings/net/dsa/renesas,rzn1-a5psw.yaml | 1 +
> .../bindings/net/ethernet-controller.yaml | 10 +-
> .../bindings/net/fsl,fman-dtsec.yaml | 172 +++
> .../bindings/net/fsl,qoriq-mc-dpmac.yaml | 2 +-
> .../devicetree/bindings/net/fsl-fman.txt | 133 +-
> .../devicetree/bindings/phy/fsl,lynx-10g.yaml | 311 ++++
> Documentation/driver-api/phy/index.rst | 1 +
> Documentation/driver-api/phy/lynx_10g.rst | 73 +
> MAINTAINERS | 6 +
> .../boot/dts/freescale/fsl-ls1043-post.dtsi | 24 +
> .../boot/dts/freescale/fsl-ls1046-post.dtsi | 25 +
> .../boot/dts/freescale/fsl-ls1046a-rdb.dts | 34 +
> .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 179 +++
> .../boot/dts/freescale/fsl-ls1088a-rdb.dts | 87 ++
> .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 96 ++
> .../fsl/qoriq-fman3-0-10g-0-best-effort.dtsi | 3 +-
> .../boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi | 10 +-
> .../fsl/qoriq-fman3-0-10g-1-best-effort.dtsi | 10 +-
> .../boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi | 10 +-
> .../boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi | 3 +-
> .../boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi | 10 +-
> .../boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi | 10 +-
> .../boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi | 10 +-
> .../boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi | 3 +-
> .../boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi | 10 +-
> .../boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi | 10 +-
> .../boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi | 10 +-
> .../boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi | 3 +-
> .../boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi | 10 +-
> .../boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi | 10 +-
> .../boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi | 10 +-
> .../boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi | 3 +-
> .../boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi | 10 +-
> drivers/net/ethernet/freescale/dpaa/Kconfig | 4 +-
> .../net/ethernet/freescale/dpaa/dpaa_eth.c | 132 +-
> .../ethernet/freescale/dpaa/dpaa_eth_sysfs.c | 2 +-
> .../ethernet/freescale/dpaa/dpaa_ethtool.c | 90 +-
> drivers/net/ethernet/freescale/fman/Kconfig | 4 +-
> drivers/net/ethernet/freescale/fman/fman.c | 31 +-
> drivers/net/ethernet/freescale/fman/fman.h | 31 +-
> .../net/ethernet/freescale/fman/fman_dtsec.c | 674 ++++-----
> .../net/ethernet/freescale/fman/fman_dtsec.h | 58 +-
> .../net/ethernet/freescale/fman/fman_keygen.c | 29 +-
> .../net/ethernet/freescale/fman/fman_keygen.h | 29 +-
> .../net/ethernet/freescale/fman/fman_mac.h | 34 +-
> .../net/ethernet/freescale/fman/fman_memac.c | 864 +++++------
> .../net/ethernet/freescale/fman/fman_memac.h | 57 +-
> .../net/ethernet/freescale/fman/fman_muram.c | 31 +-
> .../net/ethernet/freescale/fman/fman_muram.h | 32 +-
> .../net/ethernet/freescale/fman/fman_port.c | 29 +-
> .../net/ethernet/freescale/fman/fman_port.h | 29 +-
> drivers/net/ethernet/freescale/fman/fman_sp.c | 29 +-
> drivers/net/ethernet/freescale/fman/fman_sp.h | 28 +-
> .../net/ethernet/freescale/fman/fman_tgec.c | 274 ++--
> .../net/ethernet/freescale/fman/fman_tgec.h | 54 +-
> drivers/net/ethernet/freescale/fman/mac.c | 653 +--------
> drivers/net/ethernet/freescale/fman/mac.h | 66 +-
> drivers/net/phy/aquantia_main.c | 86 +-
> drivers/net/phy/phy.c | 21 +
> drivers/net/phy/phylink.c | 161 +-
> drivers/phy/freescale/Kconfig | 20 +
> drivers/phy/freescale/Makefile | 3 +
> drivers/phy/freescale/lynx-10g.h | 36 +
> drivers/phy/freescale/phy-fsl-lynx-10g-clk.c | 438 ++++++
> drivers/phy/freescale/phy-fsl-lynx-10g.c | 1297 +++++++++++++++++
> drivers/soc/fsl/qbman/qman.c | 76 +-
> include/linux/phy.h | 42 +
> include/linux/phylink.h | 12 +-
> include/soc/fsl/qman.h | 9 +
> 69 files changed, 4408 insertions(+), 2356 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/net/fsl,fman-
> dtsec.yaml
> create mode 100644 Documentation/devicetree/bindings/phy/fsl,lynx-
> 10g.yaml
> create mode 100644 Documentation/driver-api/phy/lynx_10g.rst
> create mode 100644 drivers/phy/freescale/lynx-10g.h
> create mode 100644 drivers/phy/freescale/phy-fsl-lynx-10g-clk.c
> create mode 100644 drivers/phy/freescale/phy-fsl-lynx-10g.c
>
> --
> 2.35.1.1320.gc452695387.dirty
^ permalink raw reply [flat|nested] 123+ messages in thread* Re: [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink
2022-07-21 14:26 ` [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Camelia Alexandra Groza
@ 2022-07-21 15:39 ` Sean Anderson
0 siblings, 0 replies; 123+ messages in thread
From: Sean Anderson @ 2022-07-21 15:39 UTC (permalink / raw)
To: Camelia Alexandra Groza, David S . Miller, Jakub Kicinski,
Madalin Bucur, netdev
Cc: Paolo Abeni, Eric Dumazet, linux-arm-kernel, Russell King,
linux-kernel, Alexandru Marginean, Andrew Lunn,
Benjamin Herrenschmidt, Heiner Kallweit, Ioana Ciornei,
Jonathan Corbet, Kishon Vijay Abraham I, Krzysztof Kozlowski,
Leo Li, Michael Ellerman, Paul Mackerras, Rob Herring, Shawn Guo,
Vinod Koul, Vladimir Oltean, devicetree, linux-doc, linux-phy,
linuxppc-dev
On 7/21/22 10:26 AM, Camelia Alexandra Groza wrote:
>> -----Original Message-----
>> From: Sean Anderson <sean.anderson@seco.com>
>> Sent: Saturday, July 16, 2022 0:59
>> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
>> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
>> netdev@vger.kernel.org
>> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
>> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
>> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
>> <sean.anderson@seco.com>; Alexandru Marginean
>> <alexandru.marginean@nxp.com>; Andrew Lunn <andrew@lunn.ch>;
>> Benjamin Herrenschmidt <benh@kernel.crashing.org>; Heiner Kallweit
>> <hkallweit1@gmail.com>; Ioana Ciornei <ioana.ciornei@nxp.com>; Jonathan
>> Corbet <corbet@lwn.net>; Kishon Vijay Abraham I <kishon@ti.com>;
>> Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Leo Li
>> <leoyang.li@nxp.com>; Michael Ellerman <mpe@ellerman.id.au>; Paul
>> Mackerras <paulus@samba.org>; Rob Herring <robh+dt@kernel.org>;
>> Shawn Guo <shawnguo@kernel.org>; Vinod Koul <vkoul@kernel.org>;
>> Vladimir Oltean <olteanv@gmail.com>; devicetree@vger.kernel.org; linux-
>> doc@vger.kernel.org; linux-phy@lists.infradead.org; linuxppc-
>> dev@lists.ozlabs.org
>> Subject: [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink
>>
>> This series converts the DPAA driver to phylink. Additionally,
>> it also adds a serdes driver to allow for dynamic reconfiguration
>> between 1g and 10g interfaces (such as in an SFP+ slot). These changes
>> are submitted together for this RFT, but they will eventually be
>> submitted separately to the appropriate subsystem maintainers.
>>
>> I have tried to maintain backwards compatibility with existing device
>> trees whereever possible. However, one area where I was unable to
>> achieve this was with QSGMII. Please refer to patch 4 for details.
>>
>> All mac drivers have now been converted. I would greatly appreciate if
>> anyone has QorIQ boards they can test/debug this series on. I only have an
>> LS1046ARDB. Everything but QSGMII should work without breakage; QSGMII
>> needs patches 42 and 43.
>>
>> The serdes driver is mostly functional (except for XFI). This series
>> only adds support for the LS1046ARDB SerDes (and untested LS1088ARDB),
>> but it should be fairly straightforward to add support for other SoCs
>> and boards (see Documentation/driver-api/phy/qoriq.rst).
>>
>> This is the last spin of this series with all patches included. After next
>> week (depending on feedback) I will resend the patches broken up as
>> follows:
>> - 5: 1000BASE-KX support
>> - 1, 6, 44, 45: Lynx 10G support
>> - 7-10, 12-14: Phy rate adaptation support
>> - 2-4, 15-43, 46, 47: DPAA phylink conversion
>
> Please also send patches 15-38 separately from the DPAA1 SerDes and phylink set for easier review
OK.
--Sean
>> Patches 15-19 were first submitted as [1].
>>
>> [1] https://lore.kernel.org/netdev/20220531195851.1592220-1-sean.anderson@seco.com/
>>
>> Changes in v3:
>> - Manually expand yaml references
>> - Add mode configuration to device tree
>> - Expand pcs-handle to an array
>> - Incorperate some minor changes into the first FMan binding commit
>> - Add vendor prefix 'fsl,' to rgmii and mii properties.
>> - Set maxItems for pcs-names
>> - Remove phy-* properties from example because dt-schema complains and
>> I
>> can't be bothered to figure out how to make it work.
>> - Add pcs-handle as a preferred version of pcsphy-handle
>> - Deprecate pcsphy-handle
>> - Remove mii/rmii properties
>> - Add 1000BASE-KX interface mode
>> - Rename remaining references to QorIQ SerDes to Lynx 10G
>> - Fix PLL enable sequence by waiting for our reset request to be cleared
>> before continuing. Do the same for the lock, even though it isn't as
>> critical. Because we will delay for 1.5ms on average, use prepare
>> instead of enable so we can sleep.
>> - Document the status of each protocol
>> - Fix offset of several bitfields in RECR0
>> - Take into account PLLRST_B, SDRST_B, and SDEN when considering whether
>> a PLL is "enabled."
>> - Only power off unused lanes.
>> - Split mode lane mask into first/last lane (like group)
>> - Read modes from device tree
>> - Use caps to determine whether KX/KR are supported
>> - Move modes to lynx_priv
>> - Ensure that the protocol controller is not already in-use when we try
>> to configure a new mode. This should only occur if the device tree is
>> misconfigured (e.g. when QSGMII is selected on two lanes but there is
>> only one QSGMII controller).
>> - Split PLL drivers off into their own file
>> - Add clock for "ext_dly" instead of writing the bit directly (and
>> racing with any clock code).
>> - Use kasprintf instead of open-coding the snprintf dance
>> - Support 1000BASE-KX in lynx_lookup_proto. This still requires PCS
>> support, so nothing is truly "enabled" yet.
>> - Add support for phy rate adaptation
>> - Support differing link speeds and interface speeds
>> - Adjust advertisement based on rate adaptation
>> - Adjust link settings based on rate adaptation
>> - Add support for CRS-based rate adaptation
>> - Add support for AQR115
>> - Add some additional phy interfaces
>> - Add support for aquantia rate adaptation
>> - Put the PCS mdiodev only after we are done with it (since the PCS
>> does not perform a get itself).
>> - Remove _return label from memac_initialization in favor of returning
>> directly
>> - Fix grabbing the default PCS not checking for -ENODATA from
>> of_property_match_string
>> - Set DTSEC_ECNTRL_R100M in dtsec_link_up instead of dtsec_mac_config
>> - Remove rmii/mii properties
>> - Replace 1000Base... with 1000BASE... to match IEEE capitalization
>> - Add compatibles for QSGMII PCSs
>> - Split arm and powerpcs dts updates
>> - Describe modes in device tree
>> - ls1088a: Add serdes bindings
>>
>> Changes in v2:
>> - Rename to fsl,lynx-10g.yaml
>> - Refer to the device in the documentation, rather than the binding
>> - Move compatible first
>> - Document phy cells in the description
>> - Allow a value of 1 for phy-cells. This allows for compatibility with
>> the similar (but according to Ioana Ciornei different enough) lynx-28g
>> binding.
>> - Remove minItems
>> - Use list for clock-names
>> - Fix example binding having too many cells in regs
>> - Add #clock-cells. This will allow using assigned-clocks* to configure
>> the PLLs.
>> - Document the structure of the compatible strings
>> - Convert FMan MAC bindings to yaml
>> - Better document how we select which PCS to use in the default case
>> - Rename driver to Lynx 10G (etc.)
>> - Fix not clearing group->pll after disabling it
>> - Support 1 and 2 phy-cells
>> - Power off lanes during probe
>> - Clear SGMIIaCR1_PCS_EN during probe
>> - Rename LYNX_PROTO_UNKNOWN to LYNX_PROTO_NONE
>> - Handle 1000BASE-KX in lynx_proto_mode_prep
>> - Remove some unused variables
>> - Fix prototype for dtsec_initialization
>> - Fix warning if sizeof(void *) != sizeof(resource_size_t)
>> - Specify type of mac_dev for exception_cb
>> - Add helper for sanity checking cgr ops
>> - Add CGR update function
>> - Adjust queue depth on rate change
>> - Move PCS_LYNX dependency to fman Kconfig
>> - Remove unused variable slow_10g_if
>> - Restrict valid link modes based on the phy interface. This is easier
>> to set up, and mostly captures what I intended to do the first time.
>> We now have a custom validate which restricts half-duplex for some SoCs
>> for RGMII, but generally just uses the default phylink validate.
>> - Configure the SerDes in enable/disable
>> - Properly implement all ethtool ops and ioctls. These were mostly
>> stubbed out just enough to compile last time.
>> - Convert 10GEC and dTSEC as well
>> - Fix capitalization of mEMAC in commit messages
>> - Add nodes for QSGMII PCSs
>> - Add nodes for QSGMII PCSs
>> - Use one phy cell for SerDes1, since no lanes can be grouped
>> - Disable SerDes by default to prevent breaking boards inadvertently.
>>
>> Sean Anderson (47):
>> dt-bindings: phy: Add Lynx 10G phy binding
>> dt-bindings: net: Expand pcs-handle to an array
>> dt-bindings: net: Convert FMan MAC bindings to yaml
>> dt-bindings: net: fman: Add additional interface properties
>> net: phy: Add 1000BASE-KX interface mode
>> [RFT] phy: fsl: Add Lynx 10G SerDes driver
>> net: phy: Add support for rate adaptation
>> net: phylink: Support differing link speeds and interface speeds
>> net: phylink: Adjust advertisement based on rate adaptation
>> net: phylink: Adjust link settings based on rate adaptation
>> [RFC] net: phylink: Add support for CRS-based rate adaptation
>> net: phy: aquantia: Add support for AQR115
>> net: phy: aquantia: Add some additional phy interfaces
>> net: phy: aquantia: Add support for rate adaptation
>> net: fman: Convert to SPDX identifiers
>> net: fman: Don't pass comm_mode to enable/disable
>> net: fman: Store en/disable in mac_device instead of mac_priv_s
>> net: fman: dtsec: Always gracefully stop/start
>> net: fman: Get PCS node in per-mac init
>> net: fman: Store initialization function in match data
>> net: fman: Move struct dev to mac_device
>> net: fman: Configure fixed link in memac_initialization
>> net: fman: Export/rename some common functions
>> net: fman: memac: Use params instead of priv for max_speed
>> net: fman: Move initialization to mac-specific files
>> net: fman: Mark mac methods static
>> net: fman: Inline several functions into initialization
>> net: fman: Remove internal_phy_node from params
>> net: fman: Map the base address once
>> net: fman: Pass params directly to mac init
>> net: fman: Use mac_dev for some params
>> net: fman: Specify type of mac_dev for exception_cb
>> net: fman: Clean up error handling
>> net: fman: Change return type of disable to void
>> net: dpaa: Use mac_dev variable in dpaa_netdev_init
>> soc: fsl: qbman: Add helper for sanity checking cgr ops
>> soc: fsl: qbman: Add CGR update function
>> net: dpaa: Adjust queue depth on rate change
>> net: fman: memac: Add serdes support
>> net: fman: memac: Use lynx pcs driver
>> [RFT] net: dpaa: Convert to phylink
>> powerpc: dts: qoriq: Add nodes for QSGMII PCSs
>> arm64: dts: layerscape: Add nodes for QSGMII PCSs
>> arm64: dts: ls1046a: Add serdes bindings
>> arm64: dts: ls1088a: Add serdes bindings
>> arm64: dts: ls1046ardb: Add serdes bindings
>> [WIP] arm64: dts: ls1088ardb: Add serdes bindings
>>
>> .../bindings/net/dsa/renesas,rzn1-a5psw.yaml | 1 +
>> .../bindings/net/ethernet-controller.yaml | 10 +-
>> .../bindings/net/fsl,fman-dtsec.yaml | 172 +++
>> .../bindings/net/fsl,qoriq-mc-dpmac.yaml | 2 +-
>> .../devicetree/bindings/net/fsl-fman.txt | 133 +-
>> .../devicetree/bindings/phy/fsl,lynx-10g.yaml | 311 ++++
>> Documentation/driver-api/phy/index.rst | 1 +
>> Documentation/driver-api/phy/lynx_10g.rst | 73 +
>> MAINTAINERS | 6 +
>> .../boot/dts/freescale/fsl-ls1043-post.dtsi | 24 +
>> .../boot/dts/freescale/fsl-ls1046-post.dtsi | 25 +
>> .../boot/dts/freescale/fsl-ls1046a-rdb.dts | 34 +
>> .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 179 +++
>> .../boot/dts/freescale/fsl-ls1088a-rdb.dts | 87 ++
>> .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 96 ++
>> .../fsl/qoriq-fman3-0-10g-0-best-effort.dtsi | 3 +-
>> .../boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi | 10 +-
>> .../fsl/qoriq-fman3-0-10g-1-best-effort.dtsi | 10 +-
>> .../boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi | 10 +-
>> .../boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi | 3 +-
>> .../boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi | 10 +-
>> .../boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi | 10 +-
>> .../boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi | 10 +-
>> .../boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi | 3 +-
>> .../boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi | 10 +-
>> .../boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi | 10 +-
>> .../boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi | 10 +-
>> .../boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi | 3 +-
>> .../boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi | 10 +-
>> .../boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi | 10 +-
>> .../boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi | 10 +-
>> .../boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi | 3 +-
>> .../boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi | 10 +-
>> drivers/net/ethernet/freescale/dpaa/Kconfig | 4 +-
>> .../net/ethernet/freescale/dpaa/dpaa_eth.c | 132 +-
>> .../ethernet/freescale/dpaa/dpaa_eth_sysfs.c | 2 +-
>> .../ethernet/freescale/dpaa/dpaa_ethtool.c | 90 +-
>> drivers/net/ethernet/freescale/fman/Kconfig | 4 +-
>> drivers/net/ethernet/freescale/fman/fman.c | 31 +-
>> drivers/net/ethernet/freescale/fman/fman.h | 31 +-
>> .../net/ethernet/freescale/fman/fman_dtsec.c | 674 ++++-----
>> .../net/ethernet/freescale/fman/fman_dtsec.h | 58 +-
>> .../net/ethernet/freescale/fman/fman_keygen.c | 29 +-
>> .../net/ethernet/freescale/fman/fman_keygen.h | 29 +-
>> .../net/ethernet/freescale/fman/fman_mac.h | 34 +-
>> .../net/ethernet/freescale/fman/fman_memac.c | 864 +++++------
>> .../net/ethernet/freescale/fman/fman_memac.h | 57 +-
>> .../net/ethernet/freescale/fman/fman_muram.c | 31 +-
>> .../net/ethernet/freescale/fman/fman_muram.h | 32 +-
>> .../net/ethernet/freescale/fman/fman_port.c | 29 +-
>> .../net/ethernet/freescale/fman/fman_port.h | 29 +-
>> drivers/net/ethernet/freescale/fman/fman_sp.c | 29 +-
>> drivers/net/ethernet/freescale/fman/fman_sp.h | 28 +-
>> .../net/ethernet/freescale/fman/fman_tgec.c | 274 ++--
>> .../net/ethernet/freescale/fman/fman_tgec.h | 54 +-
>> drivers/net/ethernet/freescale/fman/mac.c | 653 +--------
>> drivers/net/ethernet/freescale/fman/mac.h | 66 +-
>> drivers/net/phy/aquantia_main.c | 86 +-
>> drivers/net/phy/phy.c | 21 +
>> drivers/net/phy/phylink.c | 161 +-
>> drivers/phy/freescale/Kconfig | 20 +
>> drivers/phy/freescale/Makefile | 3 +
>> drivers/phy/freescale/lynx-10g.h | 36 +
>> drivers/phy/freescale/phy-fsl-lynx-10g-clk.c | 438 ++++++
>> drivers/phy/freescale/phy-fsl-lynx-10g.c | 1297 +++++++++++++++++
>> drivers/soc/fsl/qbman/qman.c | 76 +-
>> include/linux/phy.h | 42 +
>> include/linux/phylink.h | 12 +-
>> include/soc/fsl/qman.h | 9 +
>> 69 files changed, 4408 insertions(+), 2356 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/net/fsl,fman-
>> dtsec.yaml
>> create mode 100644 Documentation/devicetree/bindings/phy/fsl,lynx-
>> 10g.yaml
>> create mode 100644 Documentation/driver-api/phy/lynx_10g.rst
>> create mode 100644 drivers/phy/freescale/lynx-10g.h
>> create mode 100644 drivers/phy/freescale/phy-fsl-lynx-10g-clk.c
>> create mode 100644 drivers/phy/freescale/phy-fsl-lynx-10g.c
>>
>> --
>> 2.35.1.1320.gc452695387.dirty
>
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