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From: Andrew Lunn <andrew@lunn.ch>
To: Alexandru Ardelean <alexandru.ardelean@analog.com>
Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, davem@davemloft.net,
	robh+dt@kernel.org, mark.rutland@arm.com, f.fainelli@gmail.com,
	hkallweit1@gmail.com
Subject: Re: [PATCH v5 10/13] net: phy: adin: implement PHY subsystem software reset
Date: Fri, 16 Aug 2019 15:19:52 +0200
Message-ID: <20190816131952.GA307@lunn.ch> (raw)
In-Reply-To: <20190816131011.23264-11-alexandru.ardelean@analog.com>

On Fri, Aug 16, 2019 at 04:10:08PM +0300, Alexandru Ardelean wrote:
> The ADIN PHYs supports 4 types of reset:
> 1. The standard PHY reset via BMCR_RESET bit in MII_BMCR reg
> 2. Reset via GPIO
> 3. Reset via reg GeSftRst (0xff0c) & reload previous pin configs
> 4. Reset via reg GeSftRst (0xff0c) & request new pin configs
> 
> Resets 2, 3 & 4 are almost identical, with the exception that the crystal
> oscillator is available during reset for 2.
> 
> This change implements subsystem software reset via the GeSftRst and
> reloading the previous pin configuration (so reset number 3).
> This will also reset the PHY core regs (similar to reset 1).
> 
> Since writing bit 1 to reg GeSftRst is self-clearing, the only thing that
> can be done, is to write to that register, wait a specific amount of time
> (10 milliseconds should be enough) and try to read back and check if there
> are no errors on read. A busy-wait-read won't work well, and may sometimes
> work or not work.
> 
> In case phylib is configured to also do a reset via GPIO, the ADIN PHY may
> be reset twice when the PHY device registers, but that isn't a problem,
> since it's being done on boot (or PHY device register).
> 
> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

  reply index

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-16 13:09 [PATCH v5 00/13] net: phy: adin: add support for Analog Devices PHYs Alexandru Ardelean
2019-08-16 13:09 ` [PATCH v5 01/13] " Alexandru Ardelean
2019-08-16 13:10 ` [PATCH v5 02/13] net: phy: adin: hook genphy_{suspend,resume} into the driver Alexandru Ardelean
2019-08-16 13:10 ` [PATCH v5 03/13] net: phy: adin: add support for interrupts Alexandru Ardelean
2019-08-16 13:10 ` [PATCH v5 04/13] net: phy: adin: add {write,read}_mmd hooks Alexandru Ardelean
2019-08-16 13:10 ` [PATCH v5 05/13] net: phy: adin: configure RGMII/RMII/MII modes on config Alexandru Ardelean
2019-08-16 13:10 ` [PATCH v5 06/13] net: phy: adin: make RGMII internal delays configurable Alexandru Ardelean
2019-08-16 13:10 ` [PATCH v5 07/13] net: phy: adin: make RMII fifo depth configurable Alexandru Ardelean
2019-08-16 13:10 ` [PATCH v5 08/13] net: phy: adin: add support MDI/MDIX/Auto-MDI selection Alexandru Ardelean
2019-08-16 13:10 ` [PATCH v5 09/13] net: phy: adin: add EEE translation layer from Clause 45 to Clause 22 Alexandru Ardelean
2019-08-16 13:10 ` [PATCH v5 10/13] net: phy: adin: implement PHY subsystem software reset Alexandru Ardelean
2019-08-16 13:19   ` Andrew Lunn [this message]
2019-08-16 13:10 ` [PATCH v5 11/13] net: phy: adin: implement downshift configuration via phy-tunable Alexandru Ardelean
2019-08-16 13:10 ` [PATCH v5 12/13] net: phy: adin: add ethtool get_stats support Alexandru Ardelean
2019-08-16 13:24   ` Andrew Lunn
2019-08-16 13:10 ` [PATCH v5 13/13] dt-bindings: net: add bindings for ADIN PHY driver Alexandru Ardelean
2019-08-16 18:57 ` [PATCH v5 00/13] net: phy: adin: add support for Analog Devices PHYs David Miller

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