From: Dario Alcocer <dalcocer@helixd.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: netdev@vger.kernel.org
Subject: Re: Marvell switch port shows LOWERLAYERDOWN, ping fails
Date: Tue, 10 Aug 2021 13:58:21 -0700 [thread overview]
Message-ID: <404e5b00-59ee-1165-4f7c-d0853c730354@helixd.com> (raw)
In-Reply-To: <ac33ec5f-568e-e43c-5d58-48876a7d9b0d@helixd.com>
Well, I misread the schematic; the DSA ports are connected via four pins
on each of the MV88E6176 chips (S_RXP, S_RXN, S_TXP, S_TXN):
S_RXP (PHY 0x1E) <---> S_TXP (PHY 0x1A)
S_RXN (PHY 0x1E) <---> S_TXN (PHY 0x1A)
S_TXP (PHY 0x1E) <---> S_RXP (PHY 0x1A)
S_TXN (PHY 0x1E) <---> S_RXN (PHY 0x1A)
As you mentioned before, 1G requires 4 pairs. Thus, it seems that
phy-mode = "1000base-x" and speed = <1000> cannot be used for the SERDES
link.
So far, I've tried phy-mode = "mii" with speed = <100>, with no success.
Are there more appropriate values I should use to configure the SERDES
phy-mode and speed device-tree resources?
next prev parent reply other threads:[~2021-08-10 20:58 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-22 22:55 Marvell switch port shows LOWERLAYERDOWN, ping fails Dario Alcocer
2021-07-23 13:41 ` Andrew Lunn
2021-07-23 18:21 ` Dario Alcocer
2021-07-23 18:25 ` Andrew Lunn
2021-07-23 18:36 ` Dario Alcocer
2021-07-23 21:58 ` Dario Alcocer
2021-07-24 17:34 ` Andrew Lunn
2021-07-25 2:26 ` Dario Alcocer
2021-07-25 2:36 ` Dario Alcocer
2021-07-27 1:39 ` Dario Alcocer
2021-07-28 18:07 ` Dario Alcocer
2021-07-28 18:23 ` Andrew Lunn
2021-07-28 18:33 ` Dario Alcocer
2021-07-28 19:24 ` Andrew Lunn
2021-07-28 19:37 ` Dario Alcocer
2021-07-28 20:47 ` Andrew Lunn
2021-07-28 20:54 ` Dario Alcocer
2021-07-28 21:09 ` Andrew Lunn
2021-08-05 21:44 ` Dario Alcocer
2021-08-06 16:03 ` Dario Alcocer
2021-08-06 23:46 ` Dario Alcocer
2021-08-07 18:57 ` Andrew Lunn
2021-08-09 16:28 ` Dario Alcocer
2021-08-10 20:58 ` Dario Alcocer [this message]
2021-08-10 22:13 ` Andrew Lunn
2021-08-11 13:16 ` Dario Alcocer
2021-08-07 17:44 ` Andrew Lunn
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