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* [PATCH v2] ARM: dts: aspeed: rainier: Add N_MODE_VREF gpio
@ 2021-09-10 19:54 Adriana Kobylak
  2021-09-14  8:49 ` Joel Stanley
  0 siblings, 1 reply; 6+ messages in thread
From: Adriana Kobylak @ 2021-09-10 19:54 UTC (permalink / raw)
  To: joel, linux-arm-kernel, linux-aspeed
  Cc: spinler, derekh, openbmc, Adriana Kobylak, bjwyman, shawnmm

From: Adriana Kobylak <anoo@us.ibm.com>

The N_MODE_VREF gpio is designed to be used to specify how many power
supplies the system should have (2 or 4).  If enough power supplies fail
so that the system no longer has redundancy (no longer n+1), the
hardware will signal to the Onboard Chip Controller that the system may
be oversubscribed, and performance may need to be reduced so the system
can maintain it's powered on state. This gpio is on a 9552, populate all
the gpios on that chip for completeness.

Signed-off-by: Adriana Kobylak <anoo@us.ibm.com>
---

v2: Update commit message.

 arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 103 +++++++++++++++++++
 1 file changed, 103 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index 6fd3ddf97a21..d5eea86dc260 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -1502,6 +1502,109 @@ eeprom@51 {
 		reg = <0x51>;
 	};
 
+	pca_pres3: pca9552@60 {
+		compatible = "nxp,pca9552";
+		reg = <0x60>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio-line-names =
+			"",
+			"APSS_RESET_N",
+			"", "", "", "",
+			"P10_DCM0_PRES",
+			"P10_DCM1_PRES",
+			"", "",
+			"N_MODE_CPU_N",
+			"",
+			"PRESENT_VRM_DCM0_N",
+			"PRESENT_VRM_DCM1_N",
+			"N_MODE_VREF",
+			"";
+
+		gpio@0 {
+			reg = <0>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@1 {
+			reg = <1>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@2 {
+			reg = <2>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@3 {
+			reg = <3>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@4 {
+			reg = <4>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@5 {
+			reg = <5>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@6 {
+			reg = <6>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@7 {
+			reg = <7>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@8 {
+			reg = <8>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@9 {
+			reg = <9>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@10 {
+			reg = <10>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@11 {
+			reg = <11>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@12 {
+			reg = <12>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@13 {
+			reg = <13>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@14 {
+			reg = <14>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@15 {
+			reg = <15>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+	};
+
 	pca_pres2: pca9552@61 {
 		compatible = "nxp,pca9552";
 		reg = <0x61>;
-- 
2.25.1


^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2021-09-15 19:11 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-09-10 19:54 [PATCH v2] ARM: dts: aspeed: rainier: Add N_MODE_VREF gpio Adriana Kobylak
2021-09-14  8:49 ` Joel Stanley
2021-09-14 20:44   ` Adriana Kobylak
2021-09-15  2:21     ` Joel Stanley
2021-09-15  5:15     ` Milton Miller II
2021-09-15 19:10       ` [EXTERNAL] " Adriana Kobylak

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