* [Qemu-devel] [PATCH] ppc: Fix xsmaddmdp and friends
@ 2019-08-21 15:28 Paul A. Clarke
2019-08-21 22:56 ` David Gibson
0 siblings, 1 reply; 4+ messages in thread
From: Paul A. Clarke @ 2019-08-21 15:28 UTC (permalink / raw)
To: david; +Cc: qemu-ppc, qemu-devel
From: "Paul A. Clarke" <pc@us.ibm.com>
A class of instructions of the form:
op Target,A,B
which operate like:
Target = Target * A + B
have a bit set which distinguishes them from instructions that operate as:
Target = Target * B + A
This bit is not being checked properly (using PPC_BIT macro), so all
instructions in this class are operating incorrectly as the second form
above. The bit was being checked as if it were part of a 64-bit
instruction opcode, rather than a proper 32-bit opcode. Fix by using the
macro (PPC_BIT32) which treats the opcode as a 32-bit quantity.
Signed-off-by: Paul A. Clarke <pc@us.ibm.com>
---
target/ppc/translate/vsx-impl.inc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c
index 3922686..8287e27 100644
--- a/target/ppc/translate/vsx-impl.inc.c
+++ b/target/ppc/translate/vsx-impl.inc.c
@@ -1308,7 +1308,7 @@ static void gen_##name(DisasContext *ctx) \
} \
xt = gen_vsr_ptr(xT(ctx->opcode)); \
xa = gen_vsr_ptr(xA(ctx->opcode)); \
- if (ctx->opcode & PPC_BIT(25)) { \
+ if (ctx->opcode & PPC_BIT32(25)) { \
/* \
* AxT + B \
*/ \
--
1.8.3.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH] ppc: Fix xsmaddmdp and friends
2019-08-21 15:28 [Qemu-devel] [PATCH] ppc: Fix xsmaddmdp and friends Paul A. Clarke
@ 2019-08-21 22:56 ` David Gibson
2019-08-28 17:32 ` [Qemu-devel] [Qemu-ppc] " Laurent Vivier
0 siblings, 1 reply; 4+ messages in thread
From: David Gibson @ 2019-08-21 22:56 UTC (permalink / raw)
To: Paul A. Clarke; +Cc: qemu-ppc, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 2076 bytes --]
On Wed, Aug 21, 2019 at 10:28:41AM -0500, Paul A. Clarke wrote:
> From: "Paul A. Clarke" <pc@us.ibm.com>
>
> A class of instructions of the form:
> op Target,A,B
> which operate like:
> Target = Target * A + B
> have a bit set which distinguishes them from instructions that operate as:
> Target = Target * B + A
>
> This bit is not being checked properly (using PPC_BIT macro), so all
> instructions in this class are operating incorrectly as the second form
> above. The bit was being checked as if it were part of a 64-bit
> instruction opcode, rather than a proper 32-bit opcode. Fix by using the
> macro (PPC_BIT32) which treats the opcode as a 32-bit quantity.
>
> Signed-off-by: Paul A. Clarke <pc@us.ibm.com>
Applied to ppc-for-4.2, thanks.
> ---
> target/ppc/translate/vsx-impl.inc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c
> index 3922686..8287e27 100644
> --- a/target/ppc/translate/vsx-impl.inc.c
> +++ b/target/ppc/translate/vsx-impl.inc.c
> @@ -1308,7 +1308,7 @@ static void gen_##name(DisasContext *ctx) \
> } \
> xt = gen_vsr_ptr(xT(ctx->opcode)); \
> xa = gen_vsr_ptr(xA(ctx->opcode)); \
> - if (ctx->opcode & PPC_BIT(25)) { \
> + if (ctx->opcode & PPC_BIT32(25)) { \
> /* \
> * AxT + B \
> */ \
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH] ppc: Fix xsmaddmdp and friends
2019-08-21 22:56 ` David Gibson
@ 2019-08-28 17:32 ` Laurent Vivier
2019-08-28 23:28 ` David Gibson
0 siblings, 1 reply; 4+ messages in thread
From: Laurent Vivier @ 2019-08-28 17:32 UTC (permalink / raw)
To: David Gibson, Paul A. Clarke; +Cc: qemu-ppc, qemu-devel
On 22/08/2019 00:56, David Gibson wrote:
> On Wed, Aug 21, 2019 at 10:28:41AM -0500, Paul A. Clarke wrote:
>> From: "Paul A. Clarke" <pc@us.ibm.com>
>>
>> A class of instructions of the form:
>> op Target,A,B
>> which operate like:
>> Target = Target * A + B
>> have a bit set which distinguishes them from instructions that operate as:
>> Target = Target * B + A
>>
>> This bit is not being checked properly (using PPC_BIT macro), so all
>> instructions in this class are operating incorrectly as the second form
>> above. The bit was being checked as if it were part of a 64-bit
>> instruction opcode, rather than a proper 32-bit opcode. Fix by using the
>> macro (PPC_BIT32) which treats the opcode as a 32-bit quantity.
>>
>> Signed-off-by: Paul A. Clarke <pc@us.ibm.com>
>
> Applied to ppc-for-4.2, thanks.
David,
could you add:
Fixes: c9f4e4d8b632 ("target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro")
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
Tested-by: Laurent Vivier <lvivier@redhat.com>
Thanks,
Laurent
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH] ppc: Fix xsmaddmdp and friends
2019-08-28 17:32 ` [Qemu-devel] [Qemu-ppc] " Laurent Vivier
@ 2019-08-28 23:28 ` David Gibson
0 siblings, 0 replies; 4+ messages in thread
From: David Gibson @ 2019-08-28 23:28 UTC (permalink / raw)
To: Laurent Vivier; +Cc: qemu-ppc, Paul A. Clarke, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 1401 bytes --]
On Wed, Aug 28, 2019 at 07:32:38PM +0200, Laurent Vivier wrote:
> On 22/08/2019 00:56, David Gibson wrote:
> > On Wed, Aug 21, 2019 at 10:28:41AM -0500, Paul A. Clarke wrote:
> >> From: "Paul A. Clarke" <pc@us.ibm.com>
> >>
> >> A class of instructions of the form:
> >> op Target,A,B
> >> which operate like:
> >> Target = Target * A + B
> >> have a bit set which distinguishes them from instructions that operate as:
> >> Target = Target * B + A
> >>
> >> This bit is not being checked properly (using PPC_BIT macro), so all
> >> instructions in this class are operating incorrectly as the second form
> >> above. The bit was being checked as if it were part of a 64-bit
> >> instruction opcode, rather than a proper 32-bit opcode. Fix by using the
> >> macro (PPC_BIT32) which treats the opcode as a 32-bit quantity.
> >>
> >> Signed-off-by: Paul A. Clarke <pc@us.ibm.com>
> >
> > Applied to ppc-for-4.2, thanks.
>
> David,
>
> could you add:
>
> Fixes: c9f4e4d8b632 ("target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro")
>
> Reviewed-by: Laurent Vivier <lvivier@redhat.com>
> Tested-by: Laurent Vivier <lvivier@redhat.com>
Done, thanks.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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2019-08-21 15:28 [Qemu-devel] [PATCH] ppc: Fix xsmaddmdp and friends Paul A. Clarke
2019-08-21 22:56 ` David Gibson
2019-08-28 17:32 ` [Qemu-devel] [Qemu-ppc] " Laurent Vivier
2019-08-28 23:28 ` David Gibson
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