From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 08/49] target/arm: Introduce raise_exception_ra
Date: Fri, 18 Jan 2019 14:57:24 +0000 [thread overview]
Message-ID: <20190118145805.6852-9-peter.maydell@linaro.org> (raw)
In-Reply-To: <20190118145805.6852-1-peter.maydell@linaro.org>
From: Richard Henderson <richard.henderson@linaro.org>
This path uses cpu_loop_exit_restore to unwind current processor state.
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20190108223129.5570-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/internals.h | 7 +++++++
target/arm/op_helper.c | 19 +++++++++++++++++--
2 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 78e026d6e90..c01a3f8c968 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -103,6 +103,13 @@ FIELD(V7M_EXCRET, RES1, 7, 25) /* including the must-be-1 prefix */
void QEMU_NORETURN raise_exception(CPUARMState *env, uint32_t excp,
uint32_t syndrome, uint32_t target_el);
+/*
+ * Similarly, but also use unwinding to restore cpu state.
+ */
+void QEMU_NORETURN raise_exception_ra(CPUARMState *env, uint32_t excp,
+ uint32_t syndrome, uint32_t target_el,
+ uintptr_t ra);
+
/*
* For AArch64, map a given EL to an index in the banked_spsr array.
* Note that this mapping and the AArch32 mapping defined in bank_number()
diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
index ef72361a36d..8b31c6a13b8 100644
--- a/target/arm/op_helper.c
+++ b/target/arm/op_helper.c
@@ -28,8 +28,8 @@
#define SIGNBIT (uint32_t)0x80000000
#define SIGNBIT64 ((uint64_t)1 << 63)
-void raise_exception(CPUARMState *env, uint32_t excp,
- uint32_t syndrome, uint32_t target_el)
+static CPUState *do_raise_exception(CPUARMState *env, uint32_t excp,
+ uint32_t syndrome, uint32_t target_el)
{
CPUState *cs = CPU(arm_env_get_cpu(env));
@@ -50,9 +50,24 @@ void raise_exception(CPUARMState *env, uint32_t excp,
cs->exception_index = excp;
env->exception.syndrome = syndrome;
env->exception.target_el = target_el;
+
+ return cs;
+}
+
+void raise_exception(CPUARMState *env, uint32_t excp,
+ uint32_t syndrome, uint32_t target_el)
+{
+ CPUState *cs = do_raise_exception(env, excp, syndrome, target_el);
cpu_loop_exit(cs);
}
+void raise_exception_ra(CPUARMState *env, uint32_t excp, uint32_t syndrome,
+ uint32_t target_el, uintptr_t ra)
+{
+ CPUState *cs = do_raise_exception(env, excp, syndrome, target_el);
+ cpu_loop_exit_restore(cs, ra);
+}
+
static int exception_target_el(CPUARMState *env)
{
int target_el = MAX(1, arm_current_el(env));
--
2.20.1
next prev parent reply other threads:[~2019-01-18 14:58 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-18 14:57 [Qemu-devel] [PULL 00/49] target-arm queue Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 01/49] hw/char/stm32f2xx_usart: Do not update data register when device is disabled Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 02/49] hw/arm/virt-acpi-build: Set COHACC override flag in IORT SMMUv3 node Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 03/49] target/arm: Allow Aarch32 exception return to switch from Mon->Hyp Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 04/49] ftgmac100: implement the new MDIO interface on Aspeed SoC Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 05/49] target/arm: Add state for the ARMv8.3-PAuth extension Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 06/49] target/arm: Add SCTLR bits through ARMv8.5 Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 07/49] target/arm: Add PAuth active bit to tbflags Peter Maydell
2019-01-18 14:57 ` Peter Maydell [this message]
2019-01-18 14:57 ` [Qemu-devel] [PULL 09/49] target/arm: Add PAuth helpers Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 10/49] target/arm: Decode PAuth within system hint space Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 11/49] target/arm: Rearrange decode in disas_data_proc_1src Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 12/49] target/arm: Decode PAuth within disas_data_proc_1src Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 13/49] target/arm: Decode PAuth within disas_data_proc_2src Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 14/49] target/arm: Move helper_exception_return to helper-a64.c Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 15/49] target/arm: Add new_pc argument to helper_exception_return Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 16/49] target/arm: Rearrange decode in disas_uncond_b_reg Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 17/49] target/arm: Decode PAuth within disas_uncond_b_reg Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 18/49] target/arm: Decode Load/store register (pac) Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 19/49] target/arm: Move cpu_mmu_index out of line Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 20/49] target/arm: Introduce arm_mmu_idx Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 21/49] target/arm: Introduce arm_stage1_mmu_idx Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 22/49] target/arm: Create ARMVAParameters and helpers Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 23/49] target/arm: Merge TBFLAG_AA_TB{0, 1} to TBII Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 24/49] target/arm: Export aa64_va_parameters to internals.h Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 25/49] target/arm: Add aa64_va_parameters_both Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 26/49] target/arm: Decode TBID from TCR Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 27/49] target/arm: Reuse aa64_va_parameters for setting tbflags Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 28/49] target/arm: Implement pauth_strip Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 29/49] target/arm: Implement pauth_auth Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 30/49] target/arm: Implement pauth_addpac Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 31/49] target/arm: Implement pauth_computepac Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 32/49] target/arm: Add PAuth system registers Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 33/49] target/arm: Enable PAuth for -cpu max Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 34/49] target/arm: Enable PAuth for user-only Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 35/49] target/arm: Tidy TBI handling in gen_a64_set_pc Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 36/49] migration: Add post_save function to VMStateDescription Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 37/49] target/arm: Reorganize PMCCNTR accesses Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 38/49] target/arm: Swap PMU values before/after migrations Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 39/49] target/arm: Filter cycle counter based on PMCCFILTR_EL0 Peter Maydell
2020-08-24 16:33 ` Peter Maydell
2020-08-25 14:41 ` Aaron Lindsay
2020-08-25 14:48 ` [PATCH] target/arm: Count PMU events when MDCR.SPME is set Aaron Lindsay
2020-09-11 14:13 ` Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 40/49] target/arm: Allow AArch32 access for PMCCFILTR Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 41/49] target/arm: Implement PMOVSSET Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 42/49] target/arm: Define FIELDs for ID_DFR0 Peter Maydell
2019-01-18 14:57 ` [Qemu-devel] [PULL 43/49] target/arm: Make PMCEID[01]_EL0 64 bit registers, add PMCEID[23] Peter Maydell
2019-01-18 14:58 ` [Qemu-devel] [PULL 44/49] target/arm: Add array for supported PMU events, generate PMCEID[01]_EL0 Peter Maydell
2019-01-18 14:58 ` [Qemu-devel] [PULL 45/49] target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER Peter Maydell
2019-01-18 14:58 ` [Qemu-devel] [PULL 46/49] target/arm: PMU: Add instruction and cycle events Peter Maydell
2019-01-18 14:58 ` [Qemu-devel] [PULL 47/49] target/arm: PMU: Set PMCR.N to 4 Peter Maydell
2019-01-18 14:58 ` [Qemu-devel] [PULL 48/49] target/arm: Implement PMSWINC Peter Maydell
2019-01-18 14:58 ` [Qemu-devel] [PULL 49/49] tests/libqtest: Introduce qtest_init_with_serial() Peter Maydell
2019-01-31 17:48 ` [Qemu-devel] [PULL 00/49] target-arm queue no-reply
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