From: Yoshinori Sato <ysato@users.sourceforge.jp>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, richard.henderson@linaro.org,
"Philippe Mathieu-Daudé" <philmd@redhat.com>,
"Yoshinori Sato" <ysato@users.sourceforge.jp>
Subject: [Qemu-devel] [PATCH v20 21/24] hw/registerfields.h: Add 8bit and 16bit register macros
Date: Sun, 16 Jun 2019 23:28:33 +0900 [thread overview]
Message-ID: <20190616142836.10614-22-ysato@users.sourceforge.jp> (raw)
In-Reply-To: <20190616142836.10614-1-ysato@users.sourceforge.jp>
From: Philippe Mathieu-Daudé <philmd@redhat.com>
Some RX peripheral using 8bit and 16bit registers.
Added 8bit and 16bit APIs.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190607091116.49044-11-ysato@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/hw/registerfields.h | 32 +++++++++++++++++++++++++++++++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/include/hw/registerfields.h b/include/hw/registerfields.h
index 2659a58737..a0bb0654d6 100644
--- a/include/hw/registerfields.h
+++ b/include/hw/registerfields.h
@@ -22,6 +22,14 @@
enum { A_ ## reg = (addr) }; \
enum { R_ ## reg = (addr) / 4 };
+#define REG8(reg, addr) \
+ enum { A_ ## reg = (addr) }; \
+ enum { R_ ## reg = (addr) };
+
+#define REG16(reg, addr) \
+ enum { A_ ## reg = (addr) }; \
+ enum { R_ ## reg = (addr) / 2 };
+
/* Define SHIFT, LENGTH and MASK constants for a field within a register */
/* This macro will define R_FOO_BAR_MASK, R_FOO_BAR_SHIFT and R_FOO_BAR_LENGTH
@@ -34,6 +42,12 @@
MAKE_64BIT_MASK(shift, length)};
/* Extract a field from a register */
+#define FIELD_EX8(storage, reg, field) \
+ extract8((storage), R_ ## reg ## _ ## field ## _SHIFT, \
+ R_ ## reg ## _ ## field ## _LENGTH)
+#define FIELD_EX16(storage, reg, field) \
+ extract16((storage), R_ ## reg ## _ ## field ## _SHIFT, \
+ R_ ## reg ## _ ## field ## _LENGTH)
#define FIELD_EX32(storage, reg, field) \
extract32((storage), R_ ## reg ## _ ## field ## _SHIFT, \
R_ ## reg ## _ ## field ## _LENGTH)
@@ -49,6 +63,22 @@
* Assigning values larger then the target field will result in
* compilation warnings.
*/
+#define FIELD_DP8(storage, reg, field, val) ({ \
+ struct { \
+ unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \
+ } v = { .v = val }; \
+ uint8_t d; \
+ d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, \
+ R_ ## reg ## _ ## field ## _LENGTH, v.v); \
+ d; })
+#define FIELD_DP16(storage, reg, field, val) ({ \
+ struct { \
+ unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \
+ } v = { .v = val }; \
+ uint16_t d; \
+ d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, \
+ R_ ## reg ## _ ## field ## _LENGTH, v.v); \
+ d; })
#define FIELD_DP32(storage, reg, field, val) ({ \
struct { \
unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \
@@ -57,7 +87,7 @@
d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, \
R_ ## reg ## _ ## field ## _LENGTH, v.v); \
d; })
-#define FIELD_DP64(storage, reg, field, val) ({ \
+#define FIELD_DP64(storage, reg, field, val) ({ \
struct { \
unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \
} v = { .v = val }; \
--
2.11.0
next prev parent reply other threads:[~2019-06-16 15:01 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-16 14:28 [Qemu-devel] [PATCH v20 00/24] Add RX archtecture support Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 01/24] target/rx: TCG translation Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 02/24] target/rx: TCG helper Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 03/24] target/rx: CPU definition Yoshinori Sato
2019-06-16 18:13 ` Igor Mammedov
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 04/24] target/rx: Follow the change of tcg Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 05/24] target/rx: simplify rx_cpu_class_by_name Yoshinori Sato
2019-06-16 18:33 ` Igor Mammedov
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 06/24] target/rx: RX disassembler Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 07/24] target/rx: Disassemble rx_index_addr into a string Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 08/24] target/rx: Replace operand with prt_ldmi in disassembler Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 09/24] target/rx: Use prt_ldmi for XCHG_mr disassembly Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 10/24] target/rx: Emit all disassembly in one prt() Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 11/24] target/rx: Collect all bytes during disassembly Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 12/24] target/rx: Dump bytes for each insn " Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 13/24] hw/intc: RX62N interrupt controller (ICUa) Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 14/24] hw/timer: RX62N internal timer modules Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 15/24] hw/char: RX62N serial communication interface (SCI) Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 16/24] hw/rx: RX Target hardware definition Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 17/24] target/rx: Move rx_load_image to rx-virt Yoshinori Sato
2019-06-16 18:49 ` Igor Mammedov
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 18/24] hw/rx: Honor -accel qtest Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 19/24] hw/rx: Restrict the RX62N microcontroller to the RX62N CPU core Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 20/24] qemu/bitops.h: Add extract8 and extract16 Yoshinori Sato
2019-06-16 14:28 ` Yoshinori Sato [this message]
2019-06-16 19:06 ` [Qemu-devel] [PATCH v20 21/24] hw/registerfields.h: Add 8bit and 16bit register macros Igor Mammedov
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 22/24] Add rx-softmmu Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 23/24] MAINTAINERS: Add RX Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 24/24] BootLinuxConsoleTest: Test the RX-Virt machine Yoshinori Sato
2019-06-16 15:18 ` [Qemu-devel] [PATCH v20 00/24] Add RX archtecture support no-reply
2019-06-16 19:08 ` Igor Mammedov
2019-06-16 15:55 ` no-reply
2019-06-16 16:45 ` no-reply
2019-06-16 17:26 ` no-reply
2019-06-16 17:33 ` no-reply
2019-06-16 18:00 ` no-reply
2019-06-16 18:18 ` no-reply
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