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From: Claudio Fontana <cfontana@suse.de>
To: "Peter Maydell" <peter.maydell@linaro.org>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Alex Bennée" <alex.bennee@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	Roman Bolshakov <r.bolshakov@yadro.com>,
	Claudio Fontana <cfontana@suse.de>,
	Eduardo Habkost <ehabkost@redhat.com>,
	qemu-devel@nongnu.org
Subject: [RFC v12 60/65] target/arm: cpu-pauth: new module for ARMv8.3 Pointer Authentication
Date: Fri, 26 Mar 2021 20:36:56 +0100	[thread overview]
Message-ID: <20210326193701.5981-61-cfontana@suse.de> (raw)
In-Reply-To: <20210326193701.5981-1-cfontana@suse.de>

Pointer Authentication is an AARCH64-only ARMv8.3 optional
extension, whose cpu properties can be separated out in its own module.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
---
 target/arm/cpu.h           |  3 --
 target/arm/tcg/cpu-pauth.h | 34 ++++++++++++++++++++
 target/arm/cpu.c           |  4 +--
 target/arm/cpu64.c         | 35 ++------------------
 target/arm/tcg/cpu-pauth.c | 66 ++++++++++++++++++++++++++++++++++++++
 target/arm/tcg/meson.build |  1 +
 6 files changed, 105 insertions(+), 38 deletions(-)
 create mode 100644 target/arm/tcg/cpu-pauth.h
 create mode 100644 target/arm/tcg/cpu-pauth.c

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 6d0e8ac1be..3753591216 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -216,13 +216,10 @@ typedef struct ARMPredicateReg {
     uint64_t p[DIV_ROUND_UP(2 * ARM_MAX_VQ, 8)] QEMU_ALIGNED(16);
 } ARMPredicateReg;
 
-void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp);
 /* In AArch32 mode, PAC keys do not exist at all.  */
 typedef struct ARMPACKey {
     uint64_t lo, hi;
 } ARMPACKey;
-#else
-static inline void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp) { }
 
 #endif /* TARGET_AARCH64 */
 
diff --git a/target/arm/tcg/cpu-pauth.h b/target/arm/tcg/cpu-pauth.h
new file mode 100644
index 0000000000..a0ef74dc77
--- /dev/null
+++ b/target/arm/tcg/cpu-pauth.h
@@ -0,0 +1,34 @@
+/*
+ * QEMU AArch64 Pointer Authentication Extensions
+ *
+ * Copyright (c) 2013 Linaro Ltd
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see
+ * <http://www.gnu.org/licenses/gpl-2.0.html>
+ */
+
+#ifndef CPU_PAUTH_H
+#define CPU_PAUTH_H
+
+/* ARMv8.3 pauth is an AARCH64 option, only include this for TARGET_AARCH64 */
+
+#include "cpu.h"
+
+/* called by arm_cpu_finalize_features in realizefn */
+bool cpu_pauth_finalize(ARMCPU *cpu, Error **errp);
+
+/* add the CPU Pointer Authentication properties */
+void cpu_pauth_add_props(Object *obj);
+
+#endif /* CPU_PAUTH_H */
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index dda56381a6..4058a75c83 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -33,6 +33,7 @@
 #ifdef CONFIG_TCG
 #include "tcg/tcg-cpu.h"
 #endif /* CONFIG_TCG */
+#include "tcg/cpu-pauth.h"
 #include "cpu32.h"
 #include "exec/exec-all.h"
 #include "hw/qdev-properties.h"
@@ -836,8 +837,7 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp)
          * is in use, so the user will not be able to set them.
          */
         if (tcg_enabled()) {
-            arm_cpu_pauth_finalize(cpu, &local_err);
-            if (local_err != NULL) {
+            if (!cpu_pauth_finalize(cpu, &local_err)) {
                 error_propagate(errp, local_err);
                 return;
             }
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index b09e373486..b1d63fb7a7 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -23,6 +23,7 @@
 #include "qemu/qemu-print.h"
 #include "cpu.h"
 #include "cpu-sve.h"
+#include "tcg/cpu-pauth.h"
 #include "cpu-exceptions-aa64.h"
 #include "qemu/module.h"
 #include "sysemu/tcg.h"
@@ -247,36 +248,6 @@ static void aarch64_a72_initfn(Object *obj)
     define_arm_cp_regs(cpu, cortex_a72_a57_a53_cp_reginfo);
 }
 
-void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp)
-{
-    int arch_val = 0, impdef_val = 0;
-    uint64_t t;
-
-    /* TODO: Handle HaveEnhancedPAC, HaveEnhancedPAC2, HaveFPAC. */
-    if (cpu->prop_pauth) {
-        if (cpu->prop_pauth_impdef) {
-            impdef_val = 1;
-        } else {
-            arch_val = 1;
-        }
-    } else if (cpu->prop_pauth_impdef) {
-        error_setg(errp, "cannot enable pauth-impdef without pauth");
-        error_append_hint(errp, "Add pauth=on to the CPU property list.\n");
-    }
-
-    t = cpu->isar.id_aa64isar1;
-    t = FIELD_DP64(t, ID_AA64ISAR1, APA, arch_val);
-    t = FIELD_DP64(t, ID_AA64ISAR1, GPA, arch_val);
-    t = FIELD_DP64(t, ID_AA64ISAR1, API, impdef_val);
-    t = FIELD_DP64(t, ID_AA64ISAR1, GPI, impdef_val);
-    cpu->isar.id_aa64isar1 = t;
-}
-
-static Property arm_cpu_pauth_property =
-    DEFINE_PROP_BOOL("pauth", ARMCPU, prop_pauth, true);
-static Property arm_cpu_pauth_impdef_property =
-    DEFINE_PROP_BOOL("pauth-impdef", ARMCPU, prop_pauth_impdef, false);
-
 /* -cpu max: if KVM is enabled, like -cpu host (best possible with this host);
  * otherwise, a CPU with as many features enabled as our emulation supports.
  * The version of '-cpu max' for qemu-system-arm is defined in cpu.c;
@@ -434,9 +405,7 @@ static void aarch64_max_initfn(Object *obj)
         cpu->dcz_blocksize = 7; /*  512 bytes */
 #endif
 
-        /* Default to PAUTH on, with the architected algorithm. */
-        qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_property);
-        qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_impdef_property);
+        cpu_pauth_add_props(obj);
     }
 
     cpu_sve_add_props(obj);
diff --git a/target/arm/tcg/cpu-pauth.c b/target/arm/tcg/cpu-pauth.c
new file mode 100644
index 0000000000..4f087923ac
--- /dev/null
+++ b/target/arm/tcg/cpu-pauth.c
@@ -0,0 +1,66 @@
+/*
+ * QEMU AArch64 Pointer Authentication Extensions
+ *
+ * Copyright (c) 2012 SUSE LINUX Products GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see
+ * <http://www.gnu.org/licenses/gpl-2.0.html>
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "cpu.h"
+#include "sysemu/tcg.h"
+#include "tcg/cpu-pauth.h"
+#include "hw/qdev-properties.h"
+
+bool cpu_pauth_finalize(ARMCPU *cpu, Error **errp)
+{
+    bool result = true;
+    int arch_val = 0, impdef_val = 0;
+    uint64_t t;
+
+    /* TODO: Handle HaveEnhancedPAC, HaveEnhancedPAC2, HaveFPAC. */
+    if (cpu->prop_pauth) {
+        if (cpu->prop_pauth_impdef) {
+            impdef_val = 1;
+        } else {
+            arch_val = 1;
+        }
+    } else if (cpu->prop_pauth_impdef) {
+        error_setg(errp, "cannot enable pauth-impdef without pauth");
+        error_append_hint(errp, "Add pauth=on to the CPU property list.\n");
+        result = false;
+    }
+
+    t = cpu->isar.id_aa64isar1;
+    t = FIELD_DP64(t, ID_AA64ISAR1, APA, arch_val);
+    t = FIELD_DP64(t, ID_AA64ISAR1, GPA, arch_val);
+    t = FIELD_DP64(t, ID_AA64ISAR1, API, impdef_val);
+    t = FIELD_DP64(t, ID_AA64ISAR1, GPI, impdef_val);
+    cpu->isar.id_aa64isar1 = t;
+    return result;
+}
+
+static Property arm_cpu_pauth_property =
+    DEFINE_PROP_BOOL("pauth", ARMCPU, prop_pauth, true);
+static Property arm_cpu_pauth_impdef_property =
+    DEFINE_PROP_BOOL("pauth-impdef", ARMCPU, prop_pauth_impdef, false);
+
+void cpu_pauth_add_props(Object *obj)
+{
+    /* Default to PAUTH on, with the architected algorithm. */
+    qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_property);
+    qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_impdef_property);
+}
diff --git a/target/arm/tcg/meson.build b/target/arm/tcg/meson.build
index 750ca41518..f9d087166b 100644
--- a/target/arm/tcg/meson.build
+++ b/target/arm/tcg/meson.build
@@ -36,6 +36,7 @@ arm_ss.add(when: 'CONFIG_TCG', if_true: files(
 ))
 
 arm_ss.add(when: ['TARGET_AARCH64','CONFIG_TCG'], if_true: files(
+  'cpu-pauth.c',
   'translate-a64.c',
   'translate-sve.c',
   'helper-a64.c',
-- 
2.26.2



  parent reply	other threads:[~2021-03-26 20:39 UTC|newest]

Thread overview: 145+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-26 19:35 [RFC v12 00/65] arm cleanup experiment for kvm-only build Claudio Fontana
2021-03-26 19:35 ` [RFC v12 01/65] target/arm: move translate modules to tcg/ Claudio Fontana
2021-03-26 19:35 ` [RFC v12 02/65] target/arm: move helpers " Claudio Fontana
2021-03-26 19:35 ` [RFC v12 03/65] arm: tcg: only build under CONFIG_TCG Claudio Fontana
2021-04-13 20:49   ` Philippe Mathieu-Daudé
2021-04-14  8:28     ` Claudio Fontana
2021-03-26 19:36 ` [RFC v12 04/65] target/arm: tcg: add sysemu and user subdirs Claudio Fontana
2021-03-28 15:42   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 05/65] target/arm: tcg: split mte_helper user-only and sysemu code Claudio Fontana
2021-04-08 14:41   ` Alex Bennée
2021-04-08 15:56     ` Claudio Fontana
2021-03-26 19:36 ` [RFC v12 06/65] target/arm: tcg: move sysemu-only parts of debug_helper Claudio Fontana
2021-04-08 14:47   ` Alex Bennée
2021-03-26 19:36 ` [RFC v12 07/65] target/arm: tcg: split tlb_helper user-only and sysemu-only parts Claudio Fontana
2021-04-08 14:20   ` Alex Bennée
2021-03-26 19:36 ` [RFC v12 08/65] target/arm: tcg: split m_helper " Claudio Fontana
2021-04-08 17:34   ` Alex Bennée
2021-03-26 19:36 ` [RFC v12 09/65] target/arm: only build psci for TCG Claudio Fontana
2021-03-28 15:43   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 10/65] target/arm: split off cpu-sysemu.c Claudio Fontana
2021-03-26 19:36 ` [RFC v12 11/65] target/arm: tcg: fix comment style before move to cpu-mmu Claudio Fontana
2021-03-28 15:44   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 12/65] target/arm: move physical address translation " Claudio Fontana
2021-04-12 14:13   ` Alex Bennée
2021-03-26 19:36 ` [RFC v12 13/65] target/arm: fix style in preparation of new cpregs module Claudio Fontana
2021-03-28 15:45   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 14/65] target/arm: split cpregs from tcg/helper.c Claudio Fontana
2021-03-28 15:49   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 15/65] target/arm: move cpu definitions to common cpu module Claudio Fontana
2021-03-26 19:36 ` [RFC v12 16/65] target/arm: only perform TCG cpu and machine inits if TCG enabled Claudio Fontana
2021-03-26 19:36 ` [RFC v12 17/65] target/arm: tcg: add stubs for some helpers for non-tcg builds Claudio Fontana
2021-03-28 15:51   ` Richard Henderson
2021-03-28 16:22   ` Richard Henderson
2021-04-08 10:39     ` Claudio Fontana
2021-04-08 14:35       ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 18/65] target/arm: move cpsr_read, cpsr_write to cpu_common Claudio Fontana
2021-03-28 15:54   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 19/65] target/arm: add temporary stub for arm_rebuild_hflags Claudio Fontana
2021-03-28 15:57   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 20/65] target/arm: move arm_hcr_el2_eff from tcg/ to common_cpu Claudio Fontana
2021-03-28 16:05   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 21/65] target/arm: split vfp state setting from tcg helpers Claudio Fontana
2021-03-28 16:10   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 22/65] target/arm: move arm_mmu_idx* to cpu-mmu Claudio Fontana
2021-03-26 19:36 ` [RFC v12 23/65] target/arm: move sve_zcr_len_for_el to common_cpu Claudio Fontana
2021-03-26 19:36 ` [RFC v12 24/65] target/arm: move arm_sctlr away from tcg helpers Claudio Fontana
2021-03-28 16:12   ` Richard Henderson
2021-04-08  9:55     ` Claudio Fontana
2021-03-26 19:36 ` [RFC v12 25/65] target/arm: move arm_cpu_list to common_cpu Claudio Fontana
2021-03-26 19:36 ` [RFC v12 26/65] target/arm: move aarch64_sync_32_to_64 (and vv) to cpu code Claudio Fontana
2021-03-26 19:36 ` [RFC v12 27/65] target/arm: split a15 cpu model and 32bit class functions to cpu32.c Claudio Fontana
2021-03-28 16:18   ` Richard Henderson
2021-04-08 10:23     ` Claudio Fontana
2021-04-08 10:36       ` Peter Maydell
2021-04-12  9:05         ` Claudio Fontana
2021-04-12  9:10           ` Peter Maydell
2021-04-13  8:32       ` Claudio Fontana
2021-03-26 19:36 ` [RFC v12 28/65] target/arm: fixup sve_exception_el code style before move Claudio Fontana
2021-03-28 16:19   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 29/65] target/arm: move sve_exception_el out of TCG helpers Claudio Fontana
2021-03-26 19:36 ` [RFC v12 30/65] target/arm: fix style of arm_cpu_do_interrupt functions before move Claudio Fontana
2021-03-28 16:24   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 31/65] target/arm: move exception code out of tcg/helper.c Claudio Fontana
2021-03-28 16:40   ` Richard Henderson
2021-04-08 10:56     ` Claudio Fontana
2021-04-08 15:05       ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 32/65] target/arm: move TCGCPUOps to tcg/tcg-cpu.c Claudio Fontana
2021-03-28 16:48   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 33/65] target/arm: move cpu_tcg to tcg/tcg-cpu-models.c Claudio Fontana
2021-03-28 16:52   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 34/65] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled() Claudio Fontana
2021-03-26 19:36 ` [RFC v12 35/65] target/arm: remove kvm include file for PSCI and arm-powerctl Claudio Fontana
2021-03-26 19:36 ` [RFC v12 36/65] target/arm: move kvm-const.h, kvm.c, kvm64.c, kvm_arm.h to kvm/ Claudio Fontana
2021-03-28 16:54   ` Richard Henderson
2021-03-28 16:56   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 37/65] target/arm: cleanup cpu includes Claudio Fontana
2021-03-28 16:58   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 38/65] target/arm: remove broad "else" statements when checking accels Claudio Fontana
2021-03-28 17:11   ` Richard Henderson
2021-03-29  6:58     ` Claudio Fontana
2021-03-26 19:36 ` [RFC v12 39/65] target/arm: remove kvm-stub.c Claudio Fontana
2021-03-28 17:12   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 40/65] tests/qtest: skip bios-tables-test test_acpi_oem_fields_virt for KVM Claudio Fontana
2021-03-28 17:21   ` Richard Henderson
2021-03-29  7:02     ` Claudio Fontana
2021-03-29 14:03       ` Richard Henderson
2021-04-08 13:24         ` Claudio Fontana
2021-03-26 19:36 ` [RFC v12 41/65] tests: restrict TCG-only arm-cpu-features tests to TCG builds Claudio Fontana
2021-03-28 17:23   ` Richard Henderson
2021-04-08 13:30     ` Claudio Fontana
2021-03-26 19:36 ` [RFC v12 42/65] tests: do not run test-hmp on all machines for ARM KVM-only Claudio Fontana
2021-03-28 17:24   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 43/65] tests: device-introspect-test: cope with ARM TCG-only devices Claudio Fontana
2021-03-28 17:25   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 44/65] tests: do not run qom-test on all machines for ARM KVM-only Claudio Fontana
2021-03-28 17:26   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 45/65] Revert "target/arm: Restrict v8M IDAU to TCG" Claudio Fontana
2021-03-28 17:40   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 46/65] target/arm: create kvm cpu accel class Claudio Fontana
2021-03-28 17:46   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 47/65] target/arm: move kvm post init initialization to kvm cpu accel Claudio Fontana
2021-03-28 17:49   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 48/65] target/arm: add tcg cpu accel class Claudio Fontana
2021-03-28 17:51   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 49/65] target/arm: move TCG gt timer creation code in tcg/ Claudio Fontana
2021-03-28 17:54   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 50/65] target/arm: cpu-sve: new module Claudio Fontana
2021-03-28 18:05   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 51/65] target/arm: cpu-sve: split TCG and KVM functionality Claudio Fontana
2021-03-28 18:21   ` Richard Henderson
2021-04-08 14:28     ` Claudio Fontana
2021-03-26 19:36 ` [RFC v12 52/65] target/arm: make is_aa64 and arm_el_is_aa64 a macro for !TARGET_AARCH64 Claudio Fontana
2021-03-28 18:31   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 53/65] target/arm: restrict rebuild_hflags_a64 to TARGET_AARCH64 Claudio Fontana
2021-03-28 18:34   ` Richard Henderson
2021-03-28 19:02     ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 54/65] target/arm: arch_dump: restrict ELFCLASS64 to AArch64 Claudio Fontana
2021-03-28 18:36   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 55/65] target/arm: cpu-exceptions: new module Claudio Fontana
2021-03-28 18:40   ` Richard Henderson
2021-04-12 11:53     ` Claudio Fontana
2021-03-26 19:36 ` [RFC v12 56/65] target/arm: tcg: restrict ZCR cpregs to TARGET_AARCH64 Claudio Fontana
2021-03-28 18:47   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 57/65] target/arm: tcg-sve: import narrow_vq and change_el functions Claudio Fontana
2021-03-28 18:51   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 58/65] target/arm: tcg-sve: rename the " Claudio Fontana
2021-03-28 18:55   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 59/65] target/arm: move sve_zcr_len_for_el to TARGET_AARCH64-only cpu-sve Claudio Fontana
2021-03-28 19:03   ` Richard Henderson
2021-03-26 19:36 ` Claudio Fontana [this message]
2021-03-28 19:05   ` [RFC v12 60/65] target/arm: cpu-pauth: new module for ARMv8.3 Pointer Authentication Richard Henderson
2021-04-13 12:16     ` Claudio Fontana
2021-03-26 19:36 ` [RFC v12 61/65] cpu-sve: rename sve_zcr_len_for_el to cpu_sve_get_zcr_len_for_el Claudio Fontana
2021-03-28 19:09   ` Richard Henderson
2021-03-26 19:36 ` [RFC v12 62/65] target/arm: refactor arm_cpu_finalize_features into cpu64 Claudio Fontana
2021-03-28 19:12   ` Richard Henderson
2021-03-28 19:15     ` Richard Henderson
2021-04-13 17:14       ` Claudio Fontana
2021-03-26 19:36 ` [RFC v12 63/65] XXX target/arm: experiment refactoring cpu "max" Claudio Fontana
2021-03-26 19:37 ` [RFC v12 64/65] target/arm: tcg: remove superfluous CONFIG_TCG check Claudio Fontana
2021-03-28 19:16   ` Richard Henderson
2021-03-26 19:37 ` [RFC v12 65/65] target/arm: remove v7m stub function for !CONFIG_TCG Claudio Fontana
2021-03-28 19:17   ` Richard Henderson
2021-03-28 19:27 ` [RFC v12 00/65] arm cleanup experiment for kvm-only build Richard Henderson
2021-04-13 12:05   ` Claudio Fontana

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