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From: Claudio Fontana <cfontana@suse.de>
To: "Peter Maydell" <peter.maydell@linaro.org>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Alex Bennée" <alex.bennee@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	Roman Bolshakov <r.bolshakov@yadro.com>,
	Claudio Fontana <cfontana@suse.de>,
	Eduardo Habkost <ehabkost@redhat.com>,
	qemu-devel@nongnu.org
Subject: [RFC v14 10/80] target/arm: split off cpu-sysemu.c
Date: Fri, 16 Apr 2021 18:27:14 +0200
Message-ID: <20210416162824.25131-11-cfontana@suse.de> (raw)
In-Reply-To: <20210416162824.25131-1-cfontana@suse.de>

move work is needed later on to split things into
tcg-specific portions and kvm-specific portions of this

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/internals.h  |   8 ++-
 target/arm/cpu-sysemu.c | 105 ++++++++++++++++++++++++++++++++++++++++
 target/arm/cpu.c        |  83 -------------------------------
 target/arm/meson.build  |   1 +
 4 files changed, 113 insertions(+), 84 deletions(-)
 create mode 100644 target/arm/cpu-sysemu.c

diff --git a/target/arm/internals.h b/target/arm/internals.h
index f11bd32696..479dc10463 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -1205,4 +1205,10 @@ static inline uint64_t useronly_maybe_clean_ptr(uint32_t desc, uint64_t ptr)
     return ptr;
 }
 
-#endif
+#ifndef CONFIG_USER_ONLY
+void arm_cpu_set_irq(void *opaque, int irq, int level);
+void arm_cpu_kvm_set_irq(void *opaque, int irq, int level);
+bool arm_cpu_virtio_is_big_endian(CPUState *cs);
+#endif /* !CONFIG_USER_ONLY */
+
+#endif /* TARGET_ARM_INTERNALS_H */
diff --git a/target/arm/cpu-sysemu.c b/target/arm/cpu-sysemu.c
new file mode 100644
index 0000000000..db1c8cb245
--- /dev/null
+++ b/target/arm/cpu-sysemu.c
@@ -0,0 +1,105 @@
+/*
+ * QEMU ARM CPU
+ *
+ * Copyright (c) 2012 SUSE LINUX Products GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see
+ * <http://www.gnu.org/licenses/gpl-2.0.html>
+ */
+
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "internals.h"
+#include "sysemu/hw_accel.h"
+#include "kvm_arm.h"
+
+void arm_cpu_set_irq(void *opaque, int irq, int level)
+{
+    ARMCPU *cpu = opaque;
+    CPUARMState *env = &cpu->env;
+    CPUState *cs = CPU(cpu);
+    static const int mask[] = {
+        [ARM_CPU_IRQ] = CPU_INTERRUPT_HARD,
+        [ARM_CPU_FIQ] = CPU_INTERRUPT_FIQ,
+        [ARM_CPU_VIRQ] = CPU_INTERRUPT_VIRQ,
+        [ARM_CPU_VFIQ] = CPU_INTERRUPT_VFIQ
+    };
+
+    if (level) {
+        env->irq_line_state |= mask[irq];
+    } else {
+        env->irq_line_state &= ~mask[irq];
+    }
+
+    switch (irq) {
+    case ARM_CPU_VIRQ:
+        assert(arm_feature(env, ARM_FEATURE_EL2));
+        arm_cpu_update_virq(cpu);
+        break;
+    case ARM_CPU_VFIQ:
+        assert(arm_feature(env, ARM_FEATURE_EL2));
+        arm_cpu_update_vfiq(cpu);
+        break;
+    case ARM_CPU_IRQ:
+    case ARM_CPU_FIQ:
+        if (level) {
+            cpu_interrupt(cs, mask[irq]);
+        } else {
+            cpu_reset_interrupt(cs, mask[irq]);
+        }
+        break;
+    default:
+        g_assert_not_reached();
+    }
+}
+
+void arm_cpu_kvm_set_irq(void *opaque, int irq, int level)
+{
+#ifdef CONFIG_KVM
+    ARMCPU *cpu = opaque;
+    CPUARMState *env = &cpu->env;
+    CPUState *cs = CPU(cpu);
+    uint32_t linestate_bit;
+    int irq_id;
+
+    switch (irq) {
+    case ARM_CPU_IRQ:
+        irq_id = KVM_ARM_IRQ_CPU_IRQ;
+        linestate_bit = CPU_INTERRUPT_HARD;
+        break;
+    case ARM_CPU_FIQ:
+        irq_id = KVM_ARM_IRQ_CPU_FIQ;
+        linestate_bit = CPU_INTERRUPT_FIQ;
+        break;
+    default:
+        g_assert_not_reached();
+    }
+
+    if (level) {
+        env->irq_line_state |= linestate_bit;
+    } else {
+        env->irq_line_state &= ~linestate_bit;
+    }
+    kvm_arm_set_irq(cs->cpu_index, KVM_ARM_IRQ_TYPE_CPU, irq_id, !!level);
+#endif
+}
+
+bool arm_cpu_virtio_is_big_endian(CPUState *cs)
+{
+    ARMCPU *cpu = ARM_CPU(cs);
+    CPUARMState *env = &cpu->env;
+
+    cpu_synchronize_state(cs);
+    return arm_cpu_data_is_big_endian(env);
+}
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 0dd623e590..9722848923 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -650,89 +650,6 @@ void arm_cpu_update_vfiq(ARMCPU *cpu)
     }
 }
 
-#ifndef CONFIG_USER_ONLY
-static void arm_cpu_set_irq(void *opaque, int irq, int level)
-{
-    ARMCPU *cpu = opaque;
-    CPUARMState *env = &cpu->env;
-    CPUState *cs = CPU(cpu);
-    static const int mask[] = {
-        [ARM_CPU_IRQ] = CPU_INTERRUPT_HARD,
-        [ARM_CPU_FIQ] = CPU_INTERRUPT_FIQ,
-        [ARM_CPU_VIRQ] = CPU_INTERRUPT_VIRQ,
-        [ARM_CPU_VFIQ] = CPU_INTERRUPT_VFIQ
-    };
-
-    if (level) {
-        env->irq_line_state |= mask[irq];
-    } else {
-        env->irq_line_state &= ~mask[irq];
-    }
-
-    switch (irq) {
-    case ARM_CPU_VIRQ:
-        assert(arm_feature(env, ARM_FEATURE_EL2));
-        arm_cpu_update_virq(cpu);
-        break;
-    case ARM_CPU_VFIQ:
-        assert(arm_feature(env, ARM_FEATURE_EL2));
-        arm_cpu_update_vfiq(cpu);
-        break;
-    case ARM_CPU_IRQ:
-    case ARM_CPU_FIQ:
-        if (level) {
-            cpu_interrupt(cs, mask[irq]);
-        } else {
-            cpu_reset_interrupt(cs, mask[irq]);
-        }
-        break;
-    default:
-        g_assert_not_reached();
-    }
-}
-
-static void arm_cpu_kvm_set_irq(void *opaque, int irq, int level)
-{
-#ifdef CONFIG_KVM
-    ARMCPU *cpu = opaque;
-    CPUARMState *env = &cpu->env;
-    CPUState *cs = CPU(cpu);
-    uint32_t linestate_bit;
-    int irq_id;
-
-    switch (irq) {
-    case ARM_CPU_IRQ:
-        irq_id = KVM_ARM_IRQ_CPU_IRQ;
-        linestate_bit = CPU_INTERRUPT_HARD;
-        break;
-    case ARM_CPU_FIQ:
-        irq_id = KVM_ARM_IRQ_CPU_FIQ;
-        linestate_bit = CPU_INTERRUPT_FIQ;
-        break;
-    default:
-        g_assert_not_reached();
-    }
-
-    if (level) {
-        env->irq_line_state |= linestate_bit;
-    } else {
-        env->irq_line_state &= ~linestate_bit;
-    }
-    kvm_arm_set_irq(cs->cpu_index, KVM_ARM_IRQ_TYPE_CPU, irq_id, !!level);
-#endif
-}
-
-static bool arm_cpu_virtio_is_big_endian(CPUState *cs)
-{
-    ARMCPU *cpu = ARM_CPU(cs);
-    CPUARMState *env = &cpu->env;
-
-    cpu_synchronize_state(cs);
-    return arm_cpu_data_is_big_endian(env);
-}
-
-#endif
-
 static int
 print_insn_thumb1(bfd_vma pc, disassemble_info *info)
 {
diff --git a/target/arm/meson.build b/target/arm/meson.build
index a9fdada0cc..b75392e3e9 100644
--- a/target/arm/meson.build
+++ b/target/arm/meson.build
@@ -17,6 +17,7 @@ arm_softmmu_ss = ss.source_set()
 arm_softmmu_ss.add(files(
   'arch_dump.c',
   'arm-powerctl.c',
+  'cpu-sysemu.c',
   'machine.c',
   'monitor.c',
 ))
-- 
2.26.2



  parent reply index

Thread overview: 94+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-16 16:27 [RFC v14 00/80] arm cleanup experiment for kvm-only build Claudio Fontana
2021-04-16 16:27 ` [RFC v14 01/80] target/arm: move translate modules to tcg/ Claudio Fontana
2021-04-16 16:27 ` [RFC v14 02/80] target/arm: move helpers " Claudio Fontana
2021-04-16 16:27 ` [RFC v14 03/80] arm: tcg: only build under CONFIG_TCG Claudio Fontana
2021-04-16 16:27 ` [RFC v14 04/80] target/arm: tcg: add sysemu and user subdirs Claudio Fontana
2021-04-20  9:53   ` Alex Bennée
2021-04-16 16:27 ` [RFC v14 05/80] target/arm: tcg: split mte_helper user-only and sysemu code Claudio Fontana
2021-04-16 16:27 ` [RFC v14 06/80] target/arm: tcg: move sysemu-only parts of debug_helper Claudio Fontana
2021-04-16 16:27 ` [RFC v14 07/80] target/arm: tcg: split tlb_helper user-only and sysemu-only parts Claudio Fontana
2021-04-16 16:27 ` [RFC v14 08/80] target/arm: tcg: split m_helper " Claudio Fontana
2021-04-16 16:27 ` [RFC v14 09/80] target/arm: only build psci for TCG Claudio Fontana
2021-04-20 10:28   ` Alex Bennée
2021-04-16 16:27 ` Claudio Fontana [this message]
2021-04-16 16:27 ` [RFC v14 11/80] target/arm: tcg: fix comment style before move to cpu-mmu Claudio Fontana
2021-04-20 10:30   ` Alex Bennée
2021-04-16 16:27 ` [RFC v14 12/80] target/arm: move physical address translation " Claudio Fontana
2021-04-16 16:27 ` [RFC v14 13/80] target/arm: fix style in preparation of new cpregs module Claudio Fontana
2021-04-20 10:33   ` Alex Bennée
2021-04-16 16:27 ` [RFC v14 14/80] target/arm: split cpregs from tcg/helper.c Claudio Fontana
2021-04-20 10:56   ` Alex Bennée
2021-04-16 16:27 ` [RFC v14 15/80] target/arm: move cpu definitions to common cpu module Claudio Fontana
2021-04-20 10:57   ` Alex Bennée
2021-04-16 16:27 ` [RFC v14 16/80] target/arm: only perform TCG cpu and machine inits if TCG enabled Claudio Fontana
2021-04-16 16:27 ` [RFC v14 17/80] target/arm: tcg: add stubs for some helpers for non-tcg builds Claudio Fontana
2021-04-16 16:27 ` [RFC v14 18/80] target/arm: move cpsr_read, cpsr_write to cpu_common Claudio Fontana
2021-04-16 16:27 ` [RFC v14 19/80] target/arm: add temporary stub for arm_rebuild_hflags Claudio Fontana
2021-04-16 16:27 ` [RFC v14 20/80] target/arm: move arm_hcr_el2_eff from tcg/ to common_cpu Claudio Fontana
2021-04-16 16:27 ` [RFC v14 21/80] target/arm: split vfp state setting from tcg helpers Claudio Fontana
2021-04-16 16:27 ` [RFC v14 22/80] target/arm: move arm_mmu_idx* to cpu-mmu Claudio Fontana
2021-04-16 16:27 ` [RFC v14 23/80] target/arm: move sve_zcr_len_for_el to common_cpu Claudio Fontana
2021-04-16 16:27 ` [RFC v14 24/80] target/arm: move arm_sctlr away from tcg helpers Claudio Fontana
2021-04-16 16:27 ` [RFC v14 25/80] target/arm: move arm_cpu_list to common_cpu Claudio Fontana
2021-04-16 16:27 ` [RFC v14 26/80] target/arm: move aarch64_sync_32_to_64 (and vv) to cpu code Claudio Fontana
2021-04-16 16:27 ` [RFC v14 27/80] target/arm: new cpu32 ARM 32 bit CPU Class Claudio Fontana
2021-04-16 16:27 ` [RFC v14 28/80] target/arm: split 32bit and 64bit arm dump state Claudio Fontana
2021-04-16 16:27 ` [RFC v14 29/80] target/arm: move a15 cpu model away from the TCG-only models Claudio Fontana
2021-04-16 16:27 ` [RFC v14 30/80] target/arm: fixup sve_exception_el code style before move Claudio Fontana
2021-04-16 16:27 ` [RFC v14 31/80] target/arm: move sve_exception_el out of TCG helpers Claudio Fontana
2021-04-16 16:27 ` [RFC v14 32/80] target/arm: fix comments style of fp_exception_el before moving it Claudio Fontana
2021-04-16 16:27 ` [RFC v14 33/80] target/arm: move fp_exception_el out of TCG helpers Claudio Fontana
2021-04-16 16:27 ` [RFC v14 34/80] target/arm: remove now useless ifndef from fp_exception_el Claudio Fontana
2021-04-16 16:27 ` [RFC v14 35/80] target/arm: make further preparation for the exception code to move Claudio Fontana
2021-04-16 16:27 ` [RFC v14 36/80] target/arm: fix style of arm_cpu_do_interrupt functions before move Claudio Fontana
2021-04-16 16:27 ` [RFC v14 37/80] target/arm: move exception code out of tcg/helper.c Claudio Fontana
2021-04-16 16:27 ` [RFC v14 38/80] target/arm: rename handle_semihosting to tcg_handle_semihosting Claudio Fontana
2021-04-16 16:27 ` [RFC v14 39/80] target/arm: replace CONFIG_TCG with tcg_enabled Claudio Fontana
2021-04-16 16:27 ` [RFC v14 40/80] target/arm: move TCGCPUOps to tcg/tcg-cpu.c Claudio Fontana
2021-04-16 16:27 ` [RFC v14 41/80] target/arm: move cpu_tcg to tcg/tcg-cpu-models.c Claudio Fontana
2021-04-16 16:27 ` [RFC v14 42/80] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled() Claudio Fontana
2021-04-16 16:27 ` [RFC v14 43/80] target/arm: remove kvm include file for PSCI and arm-powerctl Claudio Fontana
2021-04-16 16:27 ` [RFC v14 44/80] target/arm: move kvm-const.h, kvm.c, kvm64.c, kvm_arm.h to kvm/ Claudio Fontana
2021-04-16 16:27 ` [RFC v14 45/80] MAINTAINERS: update arm kvm maintained files to all in target/arm/kvm/ Claudio Fontana
2021-04-16 16:27 ` [RFC v14 46/80] target/arm: cleanup cpu includes Claudio Fontana
2021-04-16 16:27 ` [RFC v14 47/80] target/arm: remove broad "else" statements when checking accels Claudio Fontana
2021-04-16 16:27 ` [RFC v14 48/80] target/arm: remove kvm-stub.c Claudio Fontana
2021-04-16 16:27 ` [RFC v14 49/80] tests/qtest: skip bios-tables-test test_acpi_oem_fields_virt for KVM Claudio Fontana
2021-04-16 16:27 ` [RFC v14 50/80] tests: restrict TCG-only arm-cpu-features tests to TCG builds Claudio Fontana
2021-04-16 16:27 ` [RFC v14 51/80] tests: do not run test-hmp on all machines for ARM KVM-only Claudio Fontana
2021-04-16 16:27 ` [RFC v14 52/80] tests: device-introspect-test: cope with ARM TCG-only devices Claudio Fontana
2021-04-19 10:22   ` Thomas Huth
2021-04-19 10:24     ` Claudio Fontana
2021-04-19 10:29       ` Thomas Huth
2021-04-19 10:33         ` Claudio Fontana
2021-04-20  9:34           ` Alex Bennée
2021-04-20 10:53             ` Claudio Fontana
2021-04-16 16:27 ` [RFC v14 53/80] tests: do not run qom-test on all machines for ARM KVM-only Claudio Fontana
2021-04-16 16:27 ` [RFC v14 54/80] Revert "target/arm: Restrict v8M IDAU to TCG" Claudio Fontana
2021-05-05 12:27   ` Philippe Mathieu-Daudé
2021-04-16 16:27 ` [RFC v14 55/80] target/arm: create kvm cpu accel class Claudio Fontana
2021-04-16 16:28 ` [RFC v14 56/80] target/arm: move kvm post init initialization to kvm cpu accel Claudio Fontana
2021-04-16 16:28 ` [RFC v14 57/80] target/arm: add tcg cpu accel class Claudio Fontana
2021-04-16 16:28 ` [RFC v14 58/80] target/arm: move TCG gt timer creation code in tcg/ Claudio Fontana
2021-04-16 16:28 ` [RFC v14 59/80] target/arm: cpu-sve: new module Claudio Fontana
2021-04-16 16:28 ` [RFC v14 60/80] target/arm: cpu-sve: rename functions according to module prefix Claudio Fontana
2021-04-16 16:28 ` [RFC v14 61/80] target/arm: cpu-sve: split TCG and KVM functionality Claudio Fontana
2021-04-16 16:28 ` [RFC v14 62/80] target/arm: cpu-sve: make cpu_sve_finalize_features return bool Claudio Fontana
2021-04-16 16:28 ` [RFC v14 63/80] target/arm: make is_aa64 and arm_el_is_aa64 a macro for !TARGET_AARCH64 Claudio Fontana
2021-04-16 16:28 ` [RFC v14 64/80] target/arm: restrict rebuild_hflags_a64 to TARGET_AARCH64 Claudio Fontana
2021-04-16 16:28 ` [RFC v14 65/80] target/arm: arch_dump: restrict ELFCLASS64 to AArch64 Claudio Fontana
2021-04-16 16:28 ` [RFC v14 66/80] target/arm: cpu-exceptions, cpu-exceptions-aa64: new modules Claudio Fontana
2021-04-16 16:28 ` [RFC v14 67/80] target/arm: tcg: restrict ZCR cpregs to TARGET_AARCH64 Claudio Fontana
2021-04-16 16:28 ` [RFC v14 68/80] target/arm: tcg-sve: import narrow_vq and change_el functions Claudio Fontana
2021-04-16 16:28 ` [RFC v14 69/80] target/arm: tcg-sve: rename the " Claudio Fontana
2021-04-16 16:28 ` [RFC v14 70/80] target/arm: move sve_zcr_len_for_el to TARGET_AARCH64-only cpu-sve Claudio Fontana
2021-04-16 16:28 ` [RFC v14 71/80] cpu-sve: rename sve_zcr_len_for_el to cpu_sve_get_zcr_len_for_el Claudio Fontana
2021-04-16 16:28 ` [RFC v14 72/80] target/arm: cpu-common: wrap a64-only check with is_a64 Claudio Fontana
2021-04-16 16:28 ` [RFC v14 73/80] target/arm: cpu-pauth: new module for ARMv8.3 Pointer Authentication Claudio Fontana
2021-04-16 16:28 ` [RFC v14 74/80] target/arm: cpu-pauth: change arm_cpu_pauth_finalize name and sig Claudio Fontana
2021-04-16 16:28 ` [RFC v14 75/80] target/arm: move arm_cpu_finalize_features into cpu64 Claudio Fontana
2021-04-16 16:28 ` [RFC v14 76/80] target/arm: cpu64: rename arm_cpu_finalize_features Claudio Fontana
2021-04-16 16:28 ` [RFC v14 77/80] target/arm: cpu64: some final cleanup on aarch64_cpu_finalize_features Claudio Fontana
2021-04-16 16:28 ` [RFC v14 78/80] XXX target/arm: experiment refactoring cpu "max" Claudio Fontana
2021-04-16 16:28 ` [RFC v14 79/80] target/arm: tcg: remove superfluous CONFIG_TCG check Claudio Fontana
2021-04-16 16:28 ` [RFC v14 80/80] target/arm: remove v7m stub function for !CONFIG_TCG Claudio Fontana

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