[PATCH 08/11] target/rx: Fix setting of FPSW.CE

[Richard Henderson <richard.henderson@linaro.org>]

The existing check was completely wrong, confused about the
definition of the (previous) float_flag_{input,output}_denormal
flags, then making sure that DN, the flush-to-zero bit, was off.

Update for the introduction of float_flag_inorm_denormal and
float_flag_result_denormal, taking into account that DN now sets
the softfloat flush-to-zero bits.

Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/rx/op_helper.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c
index b1772e9538..c2e4f9a5e3 100644
--- a/target/rx/op_helper.c
+++ b/target/rx/op_helper.c
@@ -97,9 +97,11 @@ static void update_fpsw(CPURXState *env, float32 ret, uintptr_t retaddr)
         if (xcpt & float_flag_inexact) {
             SET_FPSW(X);
         }
-        if ((xcpt & (float_flag_iflush_denormal
-                     | float_flag_oflush_denormal))
-            && !FIELD_EX32(env->fpsw, FPSW, DN)) {
+        /*
+         * If any input or output denormals, not flushed to zero, raise CE:
+         * unimplemented processing has been encountered.
+         */
+        if (xcpt & (float_flag_inorm_denormal | float_flag_result_denormal)) {
             env->fpsw = FIELD_DP32(env->fpsw, FPSW, CE, 1);
         }
 
-- 
2.25.1