From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: alex.bennee@linaro.org, mmorrell@tachyum.com,
Eduardo Habkost <ehabkost@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [PATCH 05/11] target/i386: Use float_flag_inorm_denormal
Date: Sat, 19 Jun 2021 11:41:27 -0700 [thread overview]
Message-ID: <b22c5ccd-a730-e5cc-0d45-702610464d64@linaro.org> (raw)
In-Reply-To: <20210527041405.391567-6-richard.henderson@linaro.org>
Ping. Cc paolo, ed.
This is the last unreviewed patch in this series, and the one that sparked the work in the
first place.
r~
On 5/26/21 9:13 PM, Richard Henderson wrote:
> The FSR and MXCSR DE flags have the semantics of the new flag.
> We get to remove a big fixme in update_mxcsr_from_sse_status
> vs float_flag_iflush_denormal.
>
> Reported-by: Michael Morrell <mmorrell@tachyum.com>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/i386/tcg/fpu_helper.c | 18 ++++++------------
> 1 file changed, 6 insertions(+), 12 deletions(-)
>
> diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c
> index c9779a9fe0..edc550de55 100644
> --- a/target/i386/tcg/fpu_helper.c
> +++ b/target/i386/tcg/fpu_helper.c
> @@ -148,7 +148,7 @@ static void merge_exception_flags(CPUX86State *env, uint8_t old_flags)
> (new_flags & float_flag_overflow ? FPUS_OE : 0) |
> (new_flags & float_flag_underflow ? FPUS_UE : 0) |
> (new_flags & float_flag_inexact ? FPUS_PE : 0) |
> - (new_flags & float_flag_iflush_denormal ? FPUS_DE : 0)));
> + (new_flags & float_flag_inorm_denormal ? FPUS_DE : 0)));
> }
>
> static inline floatx80 helper_fdiv(CPUX86State *env, floatx80 a, floatx80 b)
> @@ -1742,7 +1742,7 @@ void helper_fxtract(CPUX86State *env)
> int shift = clz64(temp.l.lower);
> temp.l.lower <<= shift;
> expdif = 1 - EXPBIAS - shift;
> - float_raise(float_flag_iflush_denormal, &env->fp_status);
> + float_raise(float_flag_inorm_denormal, &env->fp_status);
> } else {
> expdif = EXPD(temp) - EXPBIAS;
> }
> @@ -2976,7 +2976,8 @@ void update_mxcsr_status(CPUX86State *env)
> (mxcsr & FPUS_ZE ? float_flag_divbyzero : 0) |
> (mxcsr & FPUS_OE ? float_flag_overflow : 0) |
> (mxcsr & FPUS_UE ? float_flag_underflow : 0) |
> - (mxcsr & FPUS_PE ? float_flag_inexact : 0),
> + (mxcsr & FPUS_PE ? float_flag_inexact : 0) |
> + (mxcsr & FPUS_DE ? float_flag_inorm_denormal : 0),
> &env->sse_status);
>
> /* set denormals are zero */
> @@ -2989,20 +2990,13 @@ void update_mxcsr_status(CPUX86State *env)
> void update_mxcsr_from_sse_status(CPUX86State *env)
> {
> uint8_t flags = get_float_exception_flags(&env->sse_status);
> - /*
> - * The MXCSR denormal flag has opposite semantics to
> - * float_flag_iflush_denormal (the softfloat code sets that flag
> - * only when flushing input denormals to zero, but SSE sets it
> - * only when not flushing them to zero), so is not converted
> - * here.
> - */
> env->mxcsr |= ((flags & float_flag_invalid ? FPUS_IE : 0) |
> (flags & float_flag_divbyzero ? FPUS_ZE : 0) |
> (flags & float_flag_overflow ? FPUS_OE : 0) |
> (flags & float_flag_underflow ? FPUS_UE : 0) |
> (flags & float_flag_inexact ? FPUS_PE : 0) |
> - (flags & float_flag_oflush_denormal ? FPUS_UE | FPUS_PE :
> - 0));
> + (flags & float_flag_inorm_denormal ? FPUS_DE : 0) |
> + (flags & float_flag_oflush_denormal ? FPUS_UE | FPUS_PE : 0));
> }
>
> void helper_update_mxcsr(CPUX86State *env)
>
next prev parent reply other threads:[~2021-06-19 18:43 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-27 4:13 [PATCH 00/11] softfloat: Improve denormal handling Richard Henderson
2021-05-27 4:13 ` [PATCH 01/11] softfloat: Rename float_flag_input_denormal to float_flag_iflush_denormal Richard Henderson
2021-06-07 15:16 ` Alex Bennée
2021-06-19 15:08 ` Philippe Mathieu-Daudé
2021-05-27 4:13 ` [PATCH 02/11] softfloat: Rename float_flag_output_denormal to float_flag_oflush_denormal Richard Henderson
2021-06-07 15:16 ` Alex Bennée
2021-06-19 15:08 ` Philippe Mathieu-Daudé
2021-05-27 4:13 ` [PATCH 03/11] softfloat: Introduce float_flag_inorm_denormal Richard Henderson
2021-05-28 17:41 ` Michael Morrell
2021-05-29 15:21 ` Richard Henderson
2021-07-14 16:44 ` Michael Morrell
2021-07-14 16:57 ` Richard Henderson
2021-07-14 17:50 ` Michael Morrell
2022-01-12 0:02 ` Michael Morrell
2021-06-07 15:35 ` Alex Bennée
2021-06-07 16:28 ` Alex Bennée
2021-06-07 16:41 ` Richard Henderson
2021-06-07 17:19 ` Alex Bennée
2021-06-07 20:52 ` Richard Henderson
2021-05-27 4:13 ` [PATCH 04/11] softfloat: Introduce float_flag_result_denormal Richard Henderson
2021-06-07 16:30 ` Alex Bennée
2021-06-19 15:10 ` Philippe Mathieu-Daudé
2021-05-27 4:13 ` [PATCH 05/11] target/i386: Use float_flag_inorm_denormal Richard Henderson
2021-06-19 18:41 ` Richard Henderson [this message]
2021-05-27 4:14 ` [PATCH 06/11] target/rx: Handle the FPSW.DN bit in helper_set_fpsw Richard Henderson
2021-05-28 15:34 ` Yoshinori Sato
2021-05-27 4:14 ` [PATCH 07/11] target/rx: Use FloatRoundMode " Richard Henderson
2021-05-28 15:35 ` Yoshinori Sato
2021-06-01 3:27 ` Philippe Mathieu-Daudé
2021-05-27 4:14 ` [PATCH 08/11] target/rx: Fix setting of FPSW.CE Richard Henderson
2021-05-28 15:35 ` Yoshinori Sato
2021-05-27 4:14 ` [PATCH 09/11] target/mips: Drop inline markers from msa_helper.c Richard Henderson
2021-06-01 3:27 ` Philippe Mathieu-Daudé
2021-05-27 4:14 ` [PATCH 10/11] target/mips: Do not check MSACSR_FS_MASK in update_msacsr Richard Henderson
2021-06-19 15:15 ` Philippe Mathieu-Daudé
2021-05-27 4:14 ` [PATCH 11/11] target/mips: Drop denormal operand to update_msacsr Richard Henderson
2021-06-01 3:29 ` Philippe Mathieu-Daudé
2021-06-07 16:31 ` [PATCH 00/11] softfloat: Improve denormal handling Alex Bennée
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