From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Warner Losh" <imp@bsdimp.com>
Subject: [PATCH v3 13/24] target/microblaze: Restrict cpu_exec_interrupt() handler to sysemu
Date: Sat, 11 Sep 2021 18:54:23 +0200 [thread overview]
Message-ID: <20210911165434.531552-14-f4bug@amsat.org> (raw)
In-Reply-To: <20210911165434.531552-1-f4bug@amsat.org>
Restrict cpu_exec_interrupt() and its callees to sysemu.
Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/microblaze/cpu.h | 2 ++
target/microblaze/cpu.c | 2 +-
target/microblaze/helper.c | 13 ++-----------
3 files changed, 5 insertions(+), 12 deletions(-)
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index e4bba8a7551..40401c33b72 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -355,8 +355,10 @@ struct MicroBlazeCPU {
};
+#ifndef CONFIG_USER_ONLY
void mb_cpu_do_interrupt(CPUState *cs);
bool mb_cpu_exec_interrupt(CPUState *cs, int int_req);
+#endif /* !CONFIG_USER_ONLY */
void mb_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
MMUAccessType access_type,
int mmu_idx, uintptr_t retaddr);
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 72d8f2a0daa..15db277925f 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -365,10 +365,10 @@ static const struct SysemuCPUOps mb_sysemu_ops = {
static const struct TCGCPUOps mb_tcg_ops = {
.initialize = mb_tcg_init,
.synchronize_from_tb = mb_cpu_synchronize_from_tb,
- .cpu_exec_interrupt = mb_cpu_exec_interrupt,
.tlb_fill = mb_cpu_tlb_fill,
#ifndef CONFIG_USER_ONLY
+ .cpu_exec_interrupt = mb_cpu_exec_interrupt,
.do_interrupt = mb_cpu_do_interrupt,
.do_transaction_failed = mb_cpu_transaction_failed,
.do_unaligned_access = mb_cpu_do_unaligned_access,
diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
index 20dbd673136..dd2aecd1d58 100644
--- a/target/microblaze/helper.c
+++ b/target/microblaze/helper.c
@@ -26,16 +26,6 @@
#if defined(CONFIG_USER_ONLY)
-void mb_cpu_do_interrupt(CPUState *cs)
-{
- MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
- CPUMBState *env = &cpu->env;
-
- cs->exception_index = -1;
- env->res_addr = RES_ADDR_NONE;
- env->regs[14] = env->pc;
-}
-
bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr)
@@ -271,7 +261,6 @@ hwaddr mb_cpu_get_phys_page_attrs_debug(CPUState *cs, vaddr addr,
return paddr;
}
-#endif
bool mb_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
@@ -289,6 +278,8 @@ bool mb_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
return false;
}
+#endif /* !CONFIG_USER_ONLY */
+
void mb_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
MMUAccessType access_type,
int mmu_idx, uintptr_t retaddr)
--
2.31.1
next prev parent reply other threads:[~2021-09-11 17:07 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-11 16:54 [PATCH v3 00/24] accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() to sysemu Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 01/24] target/avr: Remove pointless use of CONFIG_USER_ONLY definition Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 02/24] target/i386: Restrict sysemu-only fpu_helper helpers Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 03/24] target/i386: Simplify TARGET_X86_64 #ifdef'ry Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 04/24] target/xtensa: Restrict do_transaction_failed() to sysemu Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 05/24] accel/tcg: Rename user-mode do_interrupt hack as fake_user_interrupt Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 06/24] target/alpha: Restrict cpu_exec_interrupt() handler to sysemu Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 07/24] target/arm: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 08/24] target/cris: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 09/24] target/hppa: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 10/24] target/i386: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 11/24] target/i386: Move x86_cpu_exec_interrupt() under sysemu/ folder Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 12/24] target/m68k: Restrict cpu_exec_interrupt() handler to sysemu Philippe Mathieu-Daudé
2021-09-11 16:54 ` Philippe Mathieu-Daudé [this message]
2021-09-11 16:54 ` [PATCH v3 14/24] target/mips: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 15/24] target/nios2: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 16/24] target/openrisc: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 17/24] target/ppc: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 18/24] target/riscv: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 19/24] target/sh4: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 20/24] target/sparc: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 21/24] target/rx: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 22/24] target/xtensa: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 23/24] accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 24/24] user: Remove cpu_get_pic_interrupt() stubs Philippe Mathieu-Daudé
2021-09-12 19:50 ` [PATCH v3 00/24] accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() to sysemu Richard Henderson
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