qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH v3 23/24] accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() to sysemu
Date: Sat, 11 Sep 2021 18:54:33 +0200	[thread overview]
Message-ID: <20210911165434.531552-24-f4bug@amsat.org> (raw)
In-Reply-To: <20210911165434.531552-1-f4bug@amsat.org>

All targets call TCGCPUOps::cpu_exec_interrupt() from sysemu code.
Move its declaration to restrict it to system emulation.
Extend the code guarded.
Restrict the static inlined need_replay_interrupt() method to
avoid a "defined but not used" warning.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 include/hw/core/tcg-cpu-ops.h |  4 ++--
 accel/tcg/cpu-exec.c          | 10 +++++++---
 2 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h
index 6c7ab9600ba..55123cb4d22 100644
--- a/include/hw/core/tcg-cpu-ops.h
+++ b/include/hw/core/tcg-cpu-ops.h
@@ -35,8 +35,6 @@ struct TCGCPUOps {
     void (*cpu_exec_enter)(CPUState *cpu);
     /** @cpu_exec_exit: Callback for cpu_exec cleanup */
     void (*cpu_exec_exit)(CPUState *cpu);
-    /** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */
-    bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
     /**
      * @tlb_fill: Handle a softmmu tlb miss or user-only address fault
      *
@@ -68,6 +66,8 @@ struct TCGCPUOps {
     void (*do_interrupt)(CPUState *cpu);
 #endif /* !CONFIG_USER_ONLY || !TARGET_I386 */
 #ifdef CONFIG_SOFTMMU
+    /** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */
+    bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
     /**
      * @do_transaction_failed: Callback for handling failed memory transactions
      * (ie bus faults or external aborts; not MMU faults)
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 2838177e7f0..75dbc1e4e33 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -685,6 +685,7 @@ static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
     return false;
 }
 
+#ifndef CONFIG_USER_ONLY
 /*
  * CPU_INTERRUPT_POLL is a virtual event which gets converted into a
  * "real" interrupt event later. It does not need to be recorded for
@@ -698,12 +699,11 @@ static inline bool need_replay_interrupt(int interrupt_request)
     return true;
 #endif
 }
+#endif /* !CONFIG_USER_ONLY */
 
 static inline bool cpu_handle_interrupt(CPUState *cpu,
                                         TranslationBlock **last_tb)
 {
-    CPUClass *cc = CPU_GET_CLASS(cpu);
-
     /* Clear the interrupt flag now since we're processing
      * cpu->interrupt_request and cpu->exit_request.
      * Ensure zeroing happens before reading cpu->exit_request or
@@ -725,6 +725,7 @@ static inline bool cpu_handle_interrupt(CPUState *cpu,
             qemu_mutex_unlock_iothread();
             return true;
         }
+#if !defined(CONFIG_USER_ONLY)
         if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {
             /* Do nothing */
         } else if (interrupt_request & CPU_INTERRUPT_HALT) {
@@ -753,12 +754,14 @@ static inline bool cpu_handle_interrupt(CPUState *cpu,
             qemu_mutex_unlock_iothread();
             return true;
         }
-#endif
+#endif /* !TARGET_I386 */
         /* The target hook has 3 exit conditions:
            False when the interrupt isn't processed,
            True when it is, and we should restart on a new TB,
            and via longjmp via cpu_loop_exit.  */
         else {
+            CPUClass *cc = CPU_GET_CLASS(cpu);
+
             if (cc->tcg_ops->cpu_exec_interrupt &&
                 cc->tcg_ops->cpu_exec_interrupt(cpu, interrupt_request)) {
                 if (need_replay_interrupt(interrupt_request)) {
@@ -777,6 +780,7 @@ static inline bool cpu_handle_interrupt(CPUState *cpu,
              * reload the 'interrupt_request' value */
             interrupt_request = cpu->interrupt_request;
         }
+#endif /* !CONFIG_USER_ONLY */
         if (interrupt_request & CPU_INTERRUPT_EXITTB) {
             cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
             /* ensure that no TB jump will be modified as
-- 
2.31.1



  parent reply	other threads:[~2021-09-11 17:09 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-11 16:54 [PATCH v3 00/24] accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() to sysemu Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 01/24] target/avr: Remove pointless use of CONFIG_USER_ONLY definition Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 02/24] target/i386: Restrict sysemu-only fpu_helper helpers Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 03/24] target/i386: Simplify TARGET_X86_64 #ifdef'ry Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 04/24] target/xtensa: Restrict do_transaction_failed() to sysemu Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 05/24] accel/tcg: Rename user-mode do_interrupt hack as fake_user_interrupt Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 06/24] target/alpha: Restrict cpu_exec_interrupt() handler to sysemu Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 07/24] target/arm: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 08/24] target/cris: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 09/24] target/hppa: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 10/24] target/i386: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 11/24] target/i386: Move x86_cpu_exec_interrupt() under sysemu/ folder Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 12/24] target/m68k: Restrict cpu_exec_interrupt() handler to sysemu Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 13/24] target/microblaze: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 14/24] target/mips: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 15/24] target/nios2: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 16/24] target/openrisc: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 17/24] target/ppc: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 18/24] target/riscv: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 19/24] target/sh4: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 20/24] target/sparc: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 21/24] target/rx: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` [PATCH v3 22/24] target/xtensa: " Philippe Mathieu-Daudé
2021-09-11 16:54 ` Philippe Mathieu-Daudé [this message]
2021-09-11 16:54 ` [PATCH v3 24/24] user: Remove cpu_get_pic_interrupt() stubs Philippe Mathieu-Daudé
2021-09-12 19:50 ` [PATCH v3 00/24] accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() to sysemu Richard Henderson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210911165434.531552-24-f4bug@amsat.org \
    --to=f4bug@amsat.org \
    --cc=pbonzini@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).