[PULL 0/4] tcg patch queue

[PULL 0/4] tcg patch queue

[Richard Henderson]

The following changes since commit 15df33ceb73cb6bb3c6736cf4d2cff51129ed4b4:

  Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20220312-1' into staging (2022-03-13 17:29:18 +0000)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20220314

for you to fetch changes up to 76cff100beeae8d3676bb658cccd45ef5ced8aa9:

  tcg/arm: Don't emit UNPREDICTABLE LDRD with Rm == Rt or Rt+1 (2022-03-14 10:31:51 -0700)

----------------------------------------------------------------
Fixes for s390x host vectors
Fix for arm ldrd unpredictable case

----------------------------------------------------------------
Richard Henderson (4):
      tcg/s390x: Fix tcg_out_dupi_vec vs VGM
      tcg/s390x: Fix INDEX_op_bitsel_vec vs VSEL
      tcg/s390x: Fix tcg_out_dup_vec vs general registers
      tcg/arm: Don't emit UNPREDICTABLE LDRD with Rm == Rt or Rt+1

 tcg/arm/tcg-target.c.inc   | 17 +++++++++++++++--
 tcg/s390x/tcg-target.c.inc |  7 ++++---
 2 files changed, 19 insertions(+), 5 deletions(-)

[PULL 1/4] tcg/s390x: Fix tcg_out_dupi_vec vs VGM

[Richard Henderson]

The immediate operands to VGM were in the wrong order,
producing an inverse mask.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/s390x/tcg-target.c.inc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index 6e65828c09..508f1bccc7 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -2715,7 +2715,7 @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType type, unsigned vece,
                 msb = clz32(val);
                 lsb = 31 - ctz32(val);
             }
-            tcg_out_insn(s, VRIb, VGM, dst, lsb, msb, MO_32);
+            tcg_out_insn(s, VRIb, VGM, dst, msb, lsb, MO_32);
             return;
         }
     } else {
@@ -2729,7 +2729,7 @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType type, unsigned vece,
                 msb = clz64(val);
                 lsb = 63 - ctz64(val);
             }
-            tcg_out_insn(s, VRIb, VGM, dst, lsb, msb, MO_64);
+            tcg_out_insn(s, VRIb, VGM, dst, msb, lsb, MO_64);
             return;
         }
     }
-- 
2.25.1

[PULL 2/4] tcg/s390x: Fix INDEX_op_bitsel_vec vs VSEL

[Richard Henderson]

The operands are output in the wrong order: the tcg selector
argument is first, whereas the s390x selector argument is last.

Tested-by: Thomas Huth <thuth@redhat.com>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/898
Fixes: 9bca986df88 ("tcg/s390x: Implement TCG_TARGET_HAS_bitsel_vec")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/s390x/tcg-target.c.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index 508f1bccc7..3b185b3c96 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -2868,7 +2868,7 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
         break;
 
     case INDEX_op_bitsel_vec:
-        tcg_out_insn(s, VRRe, VSEL, a0, a1, a2, args[3]);
+        tcg_out_insn(s, VRRe, VSEL, a0, a2, args[3], a1);
         break;
 
     case INDEX_op_cmp_vec:
-- 
2.25.1

[PULL 3/4] tcg/s390x: Fix tcg_out_dup_vec vs general registers

[Richard Henderson]

We copied the data from the general register input to the
vector register output, but have not yet replicated it.
We intended to fall through into the vector-vector case,
but failed to redirect the input register.

This is caught by an assertion failure in tcg_out_insn_VRIc,
which diagnosed the incorrect register class.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/s390x/tcg-target.c.inc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index 3b185b3c96..33becd7694 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -2675,6 +2675,7 @@ static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece,
         if (vece == MO_64) {
             return true;
         }
+        src = dst;
     }
 
     /*
-- 
2.25.1

[PULL 4/4] tcg/arm: Don't emit UNPREDICTABLE LDRD with Rm == Rt or Rt+1

[Richard Henderson]

The LDRD (register) instruction is UNPREDICTABLE if the Rm register
is the same as either Rt or Rt+1 (the two registers being loaded to).
We weren't making sure we avoided this, with the result that on some
host CPUs like the Cortex-A7 we would get a SIGILL because the CPU
chooses to UNDEF for this particular UNPREDICTABLE case.

Since we've already checked that datalo is aligned, we can simplify
the test vs the Rm operand by aligning it before comparison.  Check
for the two orderings before falling back to two ldr instructions.

We don't bother to do anything similar for tcg_out_ldrd_rwb(),
because it is only used in tcg_out_tlb_read() with a fixed set of
registers which don't overlap.

There is no equivalent UNPREDICTABLE case for STRD.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/896
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/arm/tcg-target.c.inc | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
index e1ea69669c..4bc0420f4d 100644
--- a/tcg/arm/tcg-target.c.inc
+++ b/tcg/arm/tcg-target.c.inc
@@ -1689,8 +1689,21 @@ static void tcg_out_qemu_ld_index(TCGContext *s, MemOp opc,
         /* LDRD requires alignment; double-check that. */
         if (get_alignment_bits(opc) >= MO_64
             && (datalo & 1) == 0 && datahi == datalo + 1) {
-            tcg_out_ldrd_r(s, COND_AL, datalo, addrlo, addend);
-        } else if (scratch_addend) {
+            /*
+             * Rm (the second address op) must not overlap Rt or Rt + 1.
+             * Since datalo is aligned, we can simplify the test via alignment.
+             * Flip the two address arguments if that works.
+             */
+            if ((addend & ~1) != datalo) {
+                tcg_out_ldrd_r(s, COND_AL, datalo, addrlo, addend);
+                break;
+            }
+            if ((addrlo & ~1) != datalo) {
+                tcg_out_ldrd_r(s, COND_AL, datalo, addend, addrlo);
+                break;
+            }
+        }
+        if (scratch_addend) {
             tcg_out_ld32_rwb(s, COND_AL, datalo, addend, addrlo);
             tcg_out_ld32_12(s, COND_AL, datahi, addend, 4);
         } else {
-- 
2.25.1

Re: [PULL 0/4] tcg patch queue

[Peter Maydell]

On Mon, 14 Mar 2022 at 17:36, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The following changes since commit 15df33ceb73cb6bb3c6736cf4d2cff51129ed4b4:
>
>   Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20220312-1' into staging (2022-03-13 17:29:18 +0000)
>
> are available in the Git repository at:
>
>   https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20220314
>
> for you to fetch changes up to 76cff100beeae8d3676bb658cccd45ef5ced8aa9:
>
>   tcg/arm: Don't emit UNPREDICTABLE LDRD with Rm == Rt or Rt+1 (2022-03-14 10:31:51 -0700)
>
> ----------------------------------------------------------------
> Fixes for s390x host vectors
> Fix for arm ldrd unpredictable case
>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/7.0
for any user-visible changes.

-- PMM

Re: [PULL 0/4] tcg patch queue

[Peter Maydell]

On Wed, 10 Jan 2024 at 21:52, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The following changes since commit 34eac35f893664eb8545b98142e23d9954722766:
>
>   Merge tag 'pull-riscv-to-apply-20240110' of https://github.com/alistair23/qemu into staging (2024-01-10 11:41:56 +0000)
>
> are available in the Git repository at:
>
>   https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20240111
>
> for you to fetch changes up to 1d513e06d96697f44de4a1b85c6ff627c443e306:
>
>   util: fix build with musl libc on ppc64le (2024-01-11 08:48:16 +1100)
>
> ----------------------------------------------------------------
> tcg/i386: Use more 8-bit immediate forms for add, sub, or, xor
> tcg/ppc: Use new registers for LQ destination
> util: fix build with musl libc on ppc64le
>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/9.0
for any user-visible changes.

-- PMM

[PULL 0/4] tcg patch queue

[Richard Henderson]

The following changes since commit 34eac35f893664eb8545b98142e23d9954722766:

  Merge tag 'pull-riscv-to-apply-20240110' of https://github.com/alistair23/qemu into staging (2024-01-10 11:41:56 +0000)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20240111

for you to fetch changes up to 1d513e06d96697f44de4a1b85c6ff627c443e306:

  util: fix build with musl libc on ppc64le (2024-01-11 08:48:16 +1100)

----------------------------------------------------------------
tcg/i386: Use more 8-bit immediate forms for add, sub, or, xor
tcg/ppc: Use new registers for LQ destination
util: fix build with musl libc on ppc64le

----------------------------------------------------------------
Natanael Copa (1):
      util: fix build with musl libc on ppc64le

Paolo Bonzini (2):
      tcg/i386: convert add/sub of 128 to sub/add of -128
      tcg/i386: use 8-bit OR or XOR for unsigned 8-bit immediates

Richard Henderson (1):
      tcg/ppc: Use new registers for LQ destination

 tcg/ppc/tcg-target-con-set.h |  2 +-
 tcg/tcg.c                    | 21 ++++++++++++----
 util/cpuinfo-ppc.c           |  6 ++---
 tcg/i386/tcg-target.c.inc    | 60 +++++++++++++++++++++++++++++++++-----------
 tcg/ppc/tcg-target.c.inc     |  3 ++-
 5 files changed, 67 insertions(+), 25 deletions(-)

Re: [PULL 0/4] tcg patch queue

[Richard Henderson]

On 8/29/23 10:02, Richard Henderson wrote:
> The following changes since commit 813bac3d8d70d85cb7835f7945eb9eed84c2d8d0:
> 
>    Merge tag '2023q3-bsd-user-pull-request' of https://gitlab.com/bsdimp/qemu into staging (2023-08-29 08:58:00 -0400)
> 
> are available in the Git repository at:
> 
>    https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230829
> 
> for you to fetch changes up to dad2f2f5afbaf58d6056f31dfd4b9edd0854b8ab:
> 
>    tcg/sparc64: Disable TCG_TARGET_HAS_extr_i64_i32 (2023-08-29 09:57:39 -0700)
> 
> ----------------------------------------------------------------
> softmmu: Use async_run_on_cpu in tcg_commit
> tcg: Remove vecop_list check from tcg_gen_not_vec
> tcg/sparc64: Disable TCG_TARGET_HAS_extr_i64_i32
> 

Disregard this PR.  I will re-issue with the abi_ptr change reverted.


r~

[PULL 0/4] tcg patch queue

[Richard Henderson]

The following changes since commit 813bac3d8d70d85cb7835f7945eb9eed84c2d8d0:

  Merge tag '2023q3-bsd-user-pull-request' of https://gitlab.com/bsdimp/qemu into staging (2023-08-29 08:58:00 -0400)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230829

for you to fetch changes up to dad2f2f5afbaf58d6056f31dfd4b9edd0854b8ab:

  tcg/sparc64: Disable TCG_TARGET_HAS_extr_i64_i32 (2023-08-29 09:57:39 -0700)

----------------------------------------------------------------
softmmu: Use async_run_on_cpu in tcg_commit
tcg: Remove vecop_list check from tcg_gen_not_vec
tcg/sparc64: Disable TCG_TARGET_HAS_extr_i64_i32

----------------------------------------------------------------
Richard Henderson (4):
      softmmu: Assert data in bounds in iotlb_to_section
      softmmu: Use async_run_on_cpu in tcg_commit
      tcg: Remove vecop_list check from tcg_gen_not_vec
      tcg/sparc64: Disable TCG_TARGET_HAS_extr_i64_i32

 include/exec/cpu-common.h    |  1 -
 tcg/sparc64/tcg-target.h     |  2 +-
 accel/tcg/cpu-exec-common.c  | 30 --------------------------
 softmmu/physmem.c            | 50 ++++++++++++++++++++++++++++++++------------
 tcg/tcg-op-vec.c             |  7 +++----
 tcg/sparc64/tcg-target.c.inc | 11 ----------
 6 files changed, 41 insertions(+), 60 deletions(-)

Re: [PULL 0/4] tcg patch queue

[Richard Henderson]

On 4/20/22 12:16, Richard Henderson wrote:
> The following changes since commit 2d20a57453f6a206938cbbf77bed0b378c806c1f:
> 
>    Merge tag 'pull-fixes-for-7.1-200422-1' of https://github.com/stsquad/qemu into staging (2022-04-20 11:13:08 -0700)
> 
> are available in the Git repository at:
> 
>    https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20220420
> 
> for you to fetch changes up to a61532faa5a4d5e021e35b6a4a1e180c72d4a22f:
> 
>    tcg: Add tcg_constant_ptr (2022-04-20 12:12:47 -0700)
> 
> ----------------------------------------------------------------
> Cleanup sysemu/tcg.h usage.
> Fix indirect lowering vs cond branches
> Remove ATOMIC_MMU_IDX
> Add tcg_constant_ptr

Applied, thanks.  Please update the wiki changelog for 7.1 as appropriate.


r~

> 
> ----------------------------------------------------------------
> Richard Henderson (3):
>        tcg: Fix indirect lowering vs TCG_OPF_COND_BRANCH
>        accel/tcg: Remove ATOMIC_MMU_IDX
>        tcg: Add tcg_constant_ptr
> 
> Thomas Huth (1):
>        Don't include sysemu/tcg.h if it is not necessary
> 
>   include/tcg/tcg.h                |  4 ++++
>   accel/tcg/cputlb.c               |  1 -
>   accel/tcg/hmp.c                  |  1 -
>   accel/tcg/tcg-accel-ops-icount.c |  1 -
>   accel/tcg/user-exec.c            |  1 -
>   bsd-user/main.c                  |  1 -
>   hw/virtio/vhost.c                |  1 -
>   linux-user/main.c                |  1 -
>   monitor/misc.c                   |  1 -
>   target/arm/helper.c              |  1 -
>   target/s390x/cpu_models_sysemu.c |  1 -
>   target/s390x/helper.c            |  1 -
>   tcg/tcg.c                        | 34 +++++++++++++++++++++++++++-------
>   13 files changed, 31 insertions(+), 18 deletions(-)

[PULL 0/4] tcg patch queue

[Richard Henderson]

The following changes since commit 2d20a57453f6a206938cbbf77bed0b378c806c1f:

  Merge tag 'pull-fixes-for-7.1-200422-1' of https://github.com/stsquad/qemu into staging (2022-04-20 11:13:08 -0700)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20220420

for you to fetch changes up to a61532faa5a4d5e021e35b6a4a1e180c72d4a22f:

  tcg: Add tcg_constant_ptr (2022-04-20 12:12:47 -0700)

----------------------------------------------------------------
Cleanup sysemu/tcg.h usage.
Fix indirect lowering vs cond branches
Remove ATOMIC_MMU_IDX
Add tcg_constant_ptr

----------------------------------------------------------------
Richard Henderson (3):
      tcg: Fix indirect lowering vs TCG_OPF_COND_BRANCH
      accel/tcg: Remove ATOMIC_MMU_IDX
      tcg: Add tcg_constant_ptr

Thomas Huth (1):
      Don't include sysemu/tcg.h if it is not necessary

 include/tcg/tcg.h                |  4 ++++
 accel/tcg/cputlb.c               |  1 -
 accel/tcg/hmp.c                  |  1 -
 accel/tcg/tcg-accel-ops-icount.c |  1 -
 accel/tcg/user-exec.c            |  1 -
 bsd-user/main.c                  |  1 -
 hw/virtio/vhost.c                |  1 -
 linux-user/main.c                |  1 -
 monitor/misc.c                   |  1 -
 target/arm/helper.c              |  1 -
 target/s390x/cpu_models_sysemu.c |  1 -
 target/s390x/helper.c            |  1 -
 tcg/tcg.c                        | 34 +++++++++++++++++++++++++++-------
 13 files changed, 31 insertions(+), 18 deletions(-)

Re: [PULL 0/4] tcg patch queue

[Richard Henderson]

On 1/4/22 4:40 PM, Richard Henderson wrote:
> The following changes since commit 67e41fe0cfb62e6cdfa659f0155417d17e5274ea:
> 
>    Merge tag 'pull-ppc-20220104' of https://github.com/legoater/qemu into staging (2022-01-04 07:23:27 -0800)
> 
> are available in the Git repository at:
> 
>    https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20220104
> 
> for you to fetch changes up to d7478d4229f0a2b2817a55487e6b17081099fae4:
> 
>    common-user: Fix tail calls to safe_syscall_set_errno_tail (2022-01-04 15:41:03 -0800)
> 
> ----------------------------------------------------------------
> Fix for safe_syscall_base.
> Fix for folding of vector add/sub.
> Fix build on loongarch64 with gcc 8.
> Remove decl for qemu_run_machine_init_done_notifiers.
> 
> ----------------------------------------------------------------
> Philippe Mathieu-Daudé (1):
>        linux-user: Fix trivial build error on loongarch64 hosts
> 
> Richard Henderson (2):
>        tcg/optimize: Fix folding of vector ops
>        common-user: Fix tail calls to safe_syscall_set_errno_tail
> 
> Xiaoyao Li (1):
>        sysemu: Cleanup qemu_run_machine_init_done_notifiers()
> 
>   include/sysemu/sysemu.h                    |  1 -
>   linux-user/host/loongarch64/host-signal.h  |  4 +--
>   tcg/optimize.c                             | 49 +++++++++++++++++++++++-------
>   common-user/host/i386/safe-syscall.inc.S   |  1 +
>   common-user/host/mips/safe-syscall.inc.S   |  1 +
>   common-user/host/x86_64/safe-syscall.inc.S |  1 +
>   6 files changed, 42 insertions(+), 15 deletions(-)

Applied.

r~

[PULL 0/4] tcg patch queue

[Richard Henderson]

The following changes since commit 67e41fe0cfb62e6cdfa659f0155417d17e5274ea:

  Merge tag 'pull-ppc-20220104' of https://github.com/legoater/qemu into staging (2022-01-04 07:23:27 -0800)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20220104

for you to fetch changes up to d7478d4229f0a2b2817a55487e6b17081099fae4:

  common-user: Fix tail calls to safe_syscall_set_errno_tail (2022-01-04 15:41:03 -0800)

----------------------------------------------------------------
Fix for safe_syscall_base.
Fix for folding of vector add/sub.
Fix build on loongarch64 with gcc 8.
Remove decl for qemu_run_machine_init_done_notifiers.

----------------------------------------------------------------
Philippe Mathieu-Daudé (1):
      linux-user: Fix trivial build error on loongarch64 hosts

Richard Henderson (2):
      tcg/optimize: Fix folding of vector ops
      common-user: Fix tail calls to safe_syscall_set_errno_tail

Xiaoyao Li (1):
      sysemu: Cleanup qemu_run_machine_init_done_notifiers()

 include/sysemu/sysemu.h                    |  1 -
 linux-user/host/loongarch64/host-signal.h  |  4 +--
 tcg/optimize.c                             | 49 +++++++++++++++++++++++-------
 common-user/host/i386/safe-syscall.inc.S   |  1 +
 common-user/host/mips/safe-syscall.inc.S   |  1 +
 common-user/host/x86_64/safe-syscall.inc.S |  1 +
 6 files changed, 42 insertions(+), 15 deletions(-)

Re: [PULL 0/4] tcg patch queue

[Richard Henderson]

On 11/11/21 12:06 PM, Richard Henderson wrote:
> The following changes since commit 1b9fc6d8ba6667ceb56a3392e84656dcaed0d676:
> 
>    Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2021-11-11 09:56:22 +0100)
> 
> are available in the Git repository at:
> 
>    https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20211111
> 
> for you to fetch changes up to d58f01733b94845b0c2232018a2bedb6a2347ec5:
> 
>    tcg/s390x: Fix tcg_out_vec_op argument type (2021-11-11 11:47:58 +0100)
> 
> ----------------------------------------------------------------
> appease coverity vs extract2
> update docs for ctpop opcodes
> tcg/s390x build fix for gcc11
> 
> ----------------------------------------------------------------
> Miroslav Rezanina (1):
>        tcg/s390x: Fix tcg_out_vec_op argument type
> 
> Philippe Mathieu-Daudé (1):
>        tcg: Remove TCI experimental status
> 
> Richard Henderson (2):
>        tcg/optimize: Add an extra cast to fold_extract2
>        tcg: Document ctpop opcodes
> 
>   docs/about/build-platforms.rst | 10 ++++++----
>   meson.build                    |  4 ++--
>   tcg/optimize.c                 |  2 +-
>   tcg/s390x/tcg-target.c.inc     |  3 ++-
>   meson_options.txt              |  2 +-
>   scripts/meson-buildoptions.sh  |  3 +--
>   tcg/README                     |  6 ++++++
>   7 files changed, 19 insertions(+), 11 deletions(-)

Applied, thanks.

r~

[PULL 0/4] tcg patch queue

[Richard Henderson]

The following changes since commit 1b9fc6d8ba6667ceb56a3392e84656dcaed0d676:

  Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2021-11-11 09:56:22 +0100)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20211111

for you to fetch changes up to d58f01733b94845b0c2232018a2bedb6a2347ec5:

  tcg/s390x: Fix tcg_out_vec_op argument type (2021-11-11 11:47:58 +0100)

----------------------------------------------------------------
appease coverity vs extract2
update docs for ctpop opcodes
tcg/s390x build fix for gcc11

----------------------------------------------------------------
Miroslav Rezanina (1):
      tcg/s390x: Fix tcg_out_vec_op argument type

Philippe Mathieu-Daudé (1):
      tcg: Remove TCI experimental status

Richard Henderson (2):
      tcg/optimize: Add an extra cast to fold_extract2
      tcg: Document ctpop opcodes

 docs/about/build-platforms.rst | 10 ++++++----
 meson.build                    |  4 ++--
 tcg/optimize.c                 |  2 +-
 tcg/s390x/tcg-target.c.inc     |  3 ++-
 meson_options.txt              |  2 +-
 scripts/meson-buildoptions.sh  |  3 +--
 tcg/README                     |  6 ++++++
 7 files changed, 19 insertions(+), 11 deletions(-)

Re: [PULL 0/4] tcg patch queue

[Philippe Mathieu-Daudé]

On 5/14/21 1:03 PM, Peter Maydell wrote:
> On Thu, 13 May 2021 at 13:20, Richard Henderson
> <richard.henderson@linaro.org> wrote:
>>
>> The following changes since commit 3e9f48bcdabe57f8f90cf19f01bbbf3c86937267:
>>
>>   Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210511' into staging (2021-05-12 17:31:52 +0100)
>>
>> are available in the Git repository at:
>>
>>   https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210513
>>
>> for you to fetch changes up to 9bcf4c52f801966b10f802e65c3ecc8bbbd8c660:
>>
>>   tcg: Add tcg_constant_tl (2021-05-13 05:42:44 -0500)
>>
>> ----------------------------------------------------------------
>> Minor gen-icount.h fix.
>> BSD cpu_signal_handler fix.
>> Add missing tcg_constant_tl symbol.
>>
> 
> Fails to build on FreeBSD and OpenBSD:
> 
> 
> ../src/accel/tcg/user-exec.c:358:46: error: use of undeclared
> identifier 'T_PAGEFLT'
>                              TRAP_sig(uc) == PAGE_FAULT_TRAP ?
>                                              ^
> ../src/accel/tcg/user-exec.c:334:31: note: expanded from macro 'PAGE_FAULT_TRAP'
> #define PAGE_FAULT_TRAP       T_PAGEFLT

Good excuse to highlight my "gitlab-ci: Allow using FreeBSD runners"
series :)
https://www.mail-archive.com/qemu-devel@nongnu.org/msg806537.html

Re: [PULL 0/4] tcg patch queue

[Peter Maydell]

On Thu, 13 May 2021 at 13:20, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The following changes since commit 3e9f48bcdabe57f8f90cf19f01bbbf3c86937267:
>
>   Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210511' into staging (2021-05-12 17:31:52 +0100)
>
> are available in the Git repository at:
>
>   https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210513
>
> for you to fetch changes up to 9bcf4c52f801966b10f802e65c3ecc8bbbd8c660:
>
>   tcg: Add tcg_constant_tl (2021-05-13 05:42:44 -0500)
>
> ----------------------------------------------------------------
> Minor gen-icount.h fix.
> BSD cpu_signal_handler fix.
> Add missing tcg_constant_tl symbol.
>

Fails to build on FreeBSD and OpenBSD:


../src/accel/tcg/user-exec.c:358:46: error: use of undeclared
identifier 'T_PAGEFLT'
                             TRAP_sig(uc) == PAGE_FAULT_TRAP ?
                                             ^
../src/accel/tcg/user-exec.c:334:31: note: expanded from macro 'PAGE_FAULT_TRAP'
#define PAGE_FAULT_TRAP       T_PAGEFLT
                              ^

thanks
-- PMM

[PULL 0/4] tcg patch queue

[Richard Henderson]

The following changes since commit 3e9f48bcdabe57f8f90cf19f01bbbf3c86937267:

  Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210511' into staging (2021-05-12 17:31:52 +0100)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210513

for you to fetch changes up to 9bcf4c52f801966b10f802e65c3ecc8bbbd8c660:

  tcg: Add tcg_constant_tl (2021-05-13 05:42:44 -0500)

----------------------------------------------------------------
Minor gen-icount.h fix.
BSD cpu_signal_handler fix.
Add missing tcg_constant_tl symbol.

----------------------------------------------------------------
Matheus Ferst (1):
      tcg: Add tcg_constant_tl

Philippe Mathieu-Daudé (2):
      MAINTAINERS: Add include/exec/gen-icount.h to 'Main Loop' section
      exec/gen-icount.h: Add missing "exec/exec-all.h" include

Warner Losh (1):
      tcg: Use correct trap number for page faults on *BSD systems

 include/exec/gen-icount.h |  1 +
 include/tcg/tcg-op.h      |  2 ++
 accel/tcg/user-exec.c     | 14 ++++++++++++--
 MAINTAINERS               |  1 +
 4 files changed, 16 insertions(+), 2 deletions(-)

Re: [PULL 0/4] tcg patch queue

[Peter Maydell]

On Mon, 11 Nov 2019 at 15:56, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The following changes since commit 654efcb511d394c1d3f5292c28503d1d19e5b1d3:
>
>   Merge remote-tracking branch 'remotes/vivier/tags/q800-branch-pull-request' into staging (2019-11-11 09:23:46 +0000)
>
> are available in the Git repository at:
>
>   https://github.com/rth7680/qemu.git tags/pull-tcg-20191111
>
> for you to fetch changes up to cb974c95df0e1c9e73a37facd3e13894bd3eedc2:
>
>   tcg/LICENSE: Remove out of date claim about TCG subdirectory licensing (2019-11-11 15:11:21 +0100)
>
> ----------------------------------------------------------------
> Remove no-longer-true statement that TCG is BSD-licensed
>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/4.2
for any user-visible changes.

-- PMM

[PULL 0/4] tcg patch queue

[Richard Henderson]

The following changes since commit 654efcb511d394c1d3f5292c28503d1d19e5b1d3:

  Merge remote-tracking branch 'remotes/vivier/tags/q800-branch-pull-request' into staging (2019-11-11 09:23:46 +0000)

are available in the Git repository at:

  https://github.com/rth7680/qemu.git tags/pull-tcg-20191111

for you to fetch changes up to cb974c95df0e1c9e73a37facd3e13894bd3eedc2:

  tcg/LICENSE: Remove out of date claim about TCG subdirectory licensing (2019-11-11 15:11:21 +0100)

----------------------------------------------------------------
Remove no-longer-true statement that TCG is BSD-licensed

----------------------------------------------------------------
Peter Maydell (4):
      tcg/aarch64/tcg-target.opc.h: Add copyright/license
      tcg/i386/tcg-target.opc.h: Add copyright/license
      tcg/ppc/tcg-target.opc.h: Add copyright/license
      tcg/LICENSE: Remove out of date claim about TCG subdirectory licensing

 tcg/aarch64/tcg-target.opc.h | 15 ++++++++++++---
 tcg/i386/tcg-target.opc.h    | 28 +++++++++++++++++++++++++---
 tcg/ppc/tcg-target.opc.h     | 20 ++++++++++++++++++++
 LICENSE                      |  5 +++--
 tcg/LICENSE                  |  3 ---
 5 files changed, 60 insertions(+), 11 deletions(-)
 delete mode 100644 tcg/LICENSE